JP2019047698A - Semiconductor device - Google Patents

Abstract

To provide a semiconductor device that is able to protect a switching element more safely while allowing electrical inspection of the switching element.SOLUTION: This semiconductor device comprises a first switching element and a second switching element whose output terminals are connected in series between a power source potential and a reference potential; a control unit that controls ON and OFF by supplying a voltage to a control terminal of the switching element; and a clamp circuit whose first terminal, or one end, is connected to a control terminal of the switching element. In the clamp circuit, a second terminal, or the other end of the first terminal, is connected between a low-potential-side output terminal of the switching element, to which the first terminal is connected, and a terminal at which a reference potential is set. The clamp circuit cuts off current from the first terminal to the second terminal and, when the potential of the second terminal is higher than the potential of the first terminal, supplies power such that a potential difference between the first terminal and the second terminal does not become equal to or higher than a predetermined clamp voltage.SELECTED DRAWING: Figure 1

Description

  The disclosure of this specification relates to a semiconductor device including a switching element for driving a load.

  In a drive circuit for driving a switching element such as an insulated gate bipolar transistor (IGBT) or a MOSFET, a semiconductor device having a protection circuit has been proposed to cope with a high-speed and large surge current caused by an inductive load.

  In the semiconductor device described in Patent Document 1, a protection circuit and a backflow preventing Zener diode are inserted between the drain and gate of the switching element. In this semiconductor device, a current flows into the gate terminal when a surge occurs, so that the switching element is turned on and the surge current is released via the switching element. For this reason, it is supposed that a high-speed surge withstand capability can be ensured.

JP 2001-44291 A

  However, since the semiconductor device disclosed in Patent Document 1 is configured to release the surge current by turning on the switching element, it cannot perform a leak test or a screening test at a voltage close to the breakdown voltage of the switching element. .

  Also, in the unlikely event that a short circuit failure occurs in the protection circuit, there is a possibility that the switching element will be short-circuited between the gate and the drain, and the switching element may enter a state where it cannot be turned off.

  Therefore, an object of the disclosure of this specification is to provide a semiconductor device that enables safer protection of a switching element while allowing electrical inspection of the switching element.

  The disclosure of this specification employs the following technical means to achieve the above object. In addition, the code | symbol in the bracket | parenthesis described in a claim and this clause shows the correspondence with the specific means as described in embodiment mentioned later as one aspect, Comprising: Technical scope is limited is not.

  In order to achieve the above object, a semiconductor device disclosed in this specification includes, as a switching element (10), a first switching element in which output terminals of each other are connected in series between a power supply potential and a reference potential ( Tr1) and the second switching element (Tr2), a control unit (20) for controlling on / off by supplying a voltage to the control terminal of the switching element, and a first terminal (one end of the control terminal of at least one switching element) C1) is connected to the clamp circuit (30), and the clamp circuit is provided between the output terminal on the low potential side of the switching element to which the first terminal is connected and the terminal to which the reference potential is set. The second terminal (C2) which is the other end of the first terminal is connected, and the clamp circuit cuts off the current from the first terminal to the second terminal and Position is at higher than the potential of the first terminal, the potential difference between the first terminal and the second terminal is energized while the not to exceed a predetermined clamp voltage.

  When a large current flows from the power supply potential toward the reference potential, a surge current flows when the large current is interrupted by a protective function or the like. The potential on the low potential side of the switching element rises due to surge current and parasitic inductance. That is, the potential of the second terminal in the clamp circuit increases. When the potential rises by a predetermined level or more, a current flows between the first terminal and the second terminal of the clamp circuit, and a clamp current flows while maintaining the clamp voltage. When this clamp current flows into the control terminal and the voltage drop at the control terminal is moderated, the off-speed of the switching element can be moderated to realize soft-off. Thereby, it is possible to suppress a surge current flowing through the switching element as compared with a semiconductor device that does not include a clamp circuit.

  In addition, since the clamp circuit that functions as a protection circuit is connected between the control terminal of the switching element and the output terminal on the reference potential side, even if the clamp circuit is short-circuited, the control terminal is close to the power supply voltage. A short circuit with the high potential side can be prevented.

  In addition, as described above, the clamp circuit is connected to the output terminal on the reference potential side, so that an unintentional malfunction of the clamp circuit can be caused even when a high voltage is applied to the switching element for leak inspection or screening inspection. Inspection can be done without worrying. That is, the switching element can be electrically inspected, and the switching element can be protected more safely.

It is a figure which shows the structure of the inverter circuit containing a semiconductor device. 1 is a circuit diagram illustrating a schematic configuration of a semiconductor device according to a first embodiment. It is a circuit diagram which shows the structure of the clamp circuit in 2nd Embodiment. It is a circuit diagram which shows an example of a clamp circuit. It is a circuit diagram which shows schematic structure of the semiconductor device in 3rd Embodiment. It is a circuit diagram which shows an example of schematic structure of a semiconductor device. It is a circuit diagram which shows schematic structure of the semiconductor device in 4th Embodiment. It is a circuit diagram which shows schematic structure of the semiconductor device in 5th Embodiment. It is a circuit diagram which shows schematic structure of the semiconductor device in 6th Embodiment. It is a circuit diagram which shows schematic structure of the semiconductor device in 7th Embodiment. It is a circuit diagram which shows the detailed structure of a control part. It is a circuit diagram which shows the detailed structure of the semiconductor device in 7th Embodiment. It is a circuit diagram which shows the detailed structure of the semiconductor device in 7th Embodiment. It is a circuit diagram which shows an example of a clamp circuit. It is a circuit diagram which shows an example of a clamp circuit.

  Hereinafter, a plurality of modes for carrying out the present disclosure will be described with reference to the drawings. In each embodiment, parts corresponding to the matters described in the preceding embodiment may be denoted by the same reference numerals, and redundant description may be omitted. When only a part of the configuration is described in each mode, the other modes described above can be applied to the other parts of the configuration. Not only combinations of parts that clearly indicate that combinations are possible in each form, but also forms may be partially combined even if they are not clearly specified, as long as there is no problem with the combination. Is possible.

(First embodiment)
First, a schematic configuration of the semiconductor device according to the present embodiment will be described with reference to FIGS. 1 and 2.

  As shown in FIG. 1, the semiconductor device 100 is incorporated in a circuit including a switching element such as an inverter circuit 200. The inverter circuit 200 is connected to the motor 300, for example, and is used for the purpose of converting a DC voltage supplied from the battery 400 into an AC voltage.

  In the present embodiment, a configuration in which two MOSFETs are connected in series with the battery 400 is referred to as a semiconductor device 100, and the three semiconductor devices 100 cooperate to realize generation of a three-phase alternating current. The inverter circuit 200 has an electrolytic capacitor 500 for the purpose of reducing ripple noise after DC-AC conversion.

  In the present embodiment, the voltage of the battery 400 is described as VB, and the potential at the positive electrode of the battery 400 is VB with reference to the potential of the negative electrode. In other words, the two MOSFETs constituting the semiconductor device 100 are connected in series between two potentials whose high potential side is VB with respect to the low potential side reference potential (GND).

  As illustrated in FIG. 2, the semiconductor device 100 includes a first switching element Tr1 and a second switching element Tr2 as the switching elements 10. The switching element 10 in this embodiment is an N-channel MOSFET. In addition, the semiconductor device 100 includes a control unit 20 that supplies a gate voltage to the gate terminals G1 and G2 of the first switching element Tr1 and the second switching element Tr2, and a clamp circuit 30 that functions as a surge protection circuit. Yes.

  The first switching element Tr1 is an N-channel MOSFET and has two output terminals and one control terminal. The output terminals are the drain terminal D1 and the source terminal S1, and the control terminal is the gate terminal G1. When a voltage equal to or higher than a predetermined threshold voltage of the gate terminal G1 is applied, the first switching element Tr1 is turned on, and an output current flows between D1 and S1. The drain terminal D1 of the first switching element Tr1 is connected to the terminal P1 to which the power supply potential VB is set, and the source terminal S1 is connected to the drain terminal D2 of the second switching element Tr2.

  The second switching element Tr2 is also an N-channel MOSFET, and has two output terminals and one control terminal. The output terminals are the drain terminal D2 and the source terminal S2, and the control terminal is the gate terminal G2. When a voltage equal to or higher than a predetermined threshold voltage of the gate terminal G2 is applied, the second switching element Tr2 is turned on, and an output current flows between D2 and S2. The drain terminal D2 of the second switching element Tr2 is connected to the source terminal S1 of the first switching element Tr1, and the source terminal S2 is connected to a terminal P2 set to the reference potential GND.

  Thus, the first switching element Tr1 and the second switching element Tr2 are connected in series between the power supply potential VB and the reference potential GND. In the present embodiment, the first switching element Tr1 is arranged on the power supply potential VB side to form an upper arm, and the second switching element Tr2 is arranged on the reference potential GND side to form a lower arm. The motor 300 is connected to an intermediate point between the first switching element Tr1 and the second switching element Tr2, and the direction of the current supplied to the motor 300 by switching the first switching element Tr1 and the second switching element Tr2 on and off each other. Can be switched.

  The control unit 20 is a part that outputs the gate voltage at a predetermined timing. The control unit 20 supplies a predetermined gate voltage to the gate terminal G1 of the first switching element Tr1, and also supplies a predetermined gate voltage to the gate terminal G2 of the second switching element Tr2.

  The clamp circuit 30 in the present embodiment is connected between the gate terminal G1 of the first switching element Tr1 and the terminal P2 to which the reference potential GND is set. In the clamp circuit 30, a terminal connected to the gate terminal G1 is referred to as a first terminal C1, and a terminal connected to the terminal P2 is referred to as a second terminal C2. The clamp circuit 30 does not flow current from the first terminal C1 to the second terminal C2, and the potential difference between C2 and C1 is determined under a predetermined condition in which the potential of the second terminal C2 is higher than that of the first terminal C1. This is a circuit that allows a current to flow from the second terminal C2 to the first terminal C1 while keeping it constant. The configuration of the clamp circuit 30 according to this embodiment includes a clamp diode 31 and a clamp Zener diode 32.

  The clamping diode 31 is inserted to rectify current so that no current flows from the first terminal C1 to the second terminal C2. The cathode terminal is connected to the first terminal C1 side, and the anode terminal is the second terminal. It is connected to the terminal C2 side.

  The clamping Zener diode 32 is connected in series with the clamping diode 31 between the first terminal C1 and the second terminal C2. The clamp Zener diode 32 has a cathode terminal connected to the second terminal C2 side and an anode terminal connected to the first terminal C1 side. The clamping Zener diode 32 breaks when the potential of the second terminal C2 becomes higher than the potential of the first terminal C1 by a predetermined value or more, and the potential difference between the terminals C1 and C2 is changed in the order of the predetermined break voltage and the clamping diode 31. Clamp to the clamp voltage which added direction voltage Vf.

  In this way, the clamp circuit 30 blocks the current from the first terminal C1 to the second terminal C2 by the clamp diode 31, and when the potential of the second terminal C2 is higher than the potential of the first terminal C1, The first terminal C1 and the second terminal C2 are energized while preventing the potential difference from exceeding a predetermined clamp voltage.

  By the way, in the semiconductor device 100, parasitic inductance is generated by the switching element 10, the clamp circuit 30, the motor 300, and the wiring connecting them. In the present embodiment, as shown in FIG. 2, for example, an inductance L1 is generated between P1 and D1, an inductance L2 is generated between S1 and D2, an inductance L3 is generated between S2 and P2, and an inductance is generated between P2 and C2. L4 has occurred. Inductances L1 to L4 shown in FIG. 2 are not shown as elements for insertion, but are shown for convenience to express parasitic inductance.

  Next, functions and effects obtained by employing the semiconductor device 100 according to the present embodiment will be described.

  First, the occurrence of surge will be briefly described. The surge generation mechanism described below is an example, and the present invention is not limited to this example.

  For example, it is assumed that the second switching element Tr2 of the lower arm has failed for some reason, and D2-S2 is short-circuited. Here, when the first switching element Tr1 is turned on during normal operation, both the first switching element Tr1 and the second switching element Tr2 are turned on. That is, a vertical through current flows between P1 and P2. When an overcurrent caused by the vertical through current is detected, it is conceivable to perform short-circuit protection for turning off the first switching element Tr1 by a protection mechanism (not shown). In such a protection operation, a method of intentionally slowing down the gate voltage reduction rate and reducing the time variation of the drain current is employed. However, in order to prevent erroneous detection of overcurrent, a filter time for detection is generally provided, and an off command for the first switching element Tr1 related to normal operation is issued during this filter time. As a result, the gate voltage of the first switching element Tr1 rapidly decreases, and a large current and a high-speed surge current are generated due to the parasitic inductance.

  When a vertical through current flows between P1 and P2, the potential on the ground line (the potential of the second terminal C2) is higher than the source terminal S1 of the first switching element Tr1 by a surge voltage (L2 + L3 + L4) · dj / dt. Become. Here, j is a surge current and t is time. When the potential of the ground line rises, the potential of the second terminal C2 in the clamp circuit 30 becomes relatively higher than the potential of the first terminal C1, and eventually exceeds the break voltage of the clamping Zener diode 32. Thereby, in the clamp circuit 30, a clamp current from the second terminal C2 toward the first terminal C1 flows. That is, the clamp current flows into the gate terminal G1 of the first switching element Tr1 via the clamp circuit 30, and the gate voltage is adjusted so that the off-speed is moderate with respect to the first switching element Tr1 to be turned off. . As a result, dj / dt can be suppressed, and the interruption surge caused by the first switching element Tr1 being turned off can be suppressed.

  In addition, since the clamp circuit 30 is enabled, the surge voltage is clamped to the sum of the threshold voltage Vth of the first switching element Tr1 and the clamp voltage of the clamp circuit 30, so that the drain of the first switching element Tr1 -The interruption surge applied between the sources can be suppressed.

  The clamp circuit 30 functioning as a protection circuit is connected to the gate terminal G1 that is the control terminal of the first switching element Tr1 and the source terminal S1 that is the output terminal on the reference potential side. Even when a short circuit failure occurs, it is possible to prevent a short circuit between the gate and the drain. Therefore, it is possible to avoid a situation in which the first switching element Tr1 is always turned on when the clamp circuit 30 is short-circuited.

  Further, as described above, since the clamp circuit 30 is connected to the output terminal on the reference potential side, even when a high voltage is applied between the terminals for leak inspection and screening inspection for the first switching element Tr1. The inspection can be performed without worrying about an unintended malfunction of the clamp circuit 30. That is, the switching element 10 can be protected more safely while the electrical inspection of the switching element can be performed.

(Second Embodiment)
The circuit configuration of the clamp circuit 30 is not limited to the one using the clamp Zener diode 32 as shown in the first embodiment, and no current flows from the first terminal C1 to the second terminal C2. A circuit that allows a current to flow from the second terminal C2 to the first terminal C1 while maintaining a constant potential difference between C2 and C1 under a predetermined condition in which the potential of the second terminal C2 is higher than that of the first terminal C1. It ’s fine.

  For example, as shown in FIG. 3, the clamp circuit 30 in this embodiment includes a clamp diode 31 and a clamp N-channel MOSFET 33. As in the first embodiment, the clamping diode 31 is inserted to rectify the current so as not to flow from the first terminal C1 to the second terminal C2, and the cathode terminal is connected to the first terminal C1 side. In addition, the anode terminal is connected to the second terminal C2 side.

  The clamping N-channel MOSFET 33 has a source terminal connected to the first terminal C1 side, that is, an anode terminal of the clamping diode 31, and a drain terminal connected to the second terminal C2 side. The clamping N-channel MOSFET 33 has a gate terminal and a drain terminal directly connected. The diode 33a that mediates between the source terminal and the drain terminal is a parasitic diode.

  In the clamp circuit 30, the gate voltage of the clamping N-channel MOSFET 33 increases as the potential of the second terminal C <b> 2 rises when a surge occurs, and the gate-source voltage becomes the threshold voltage Vth unique to the clamping N-channel MOSFET 33. If it exceeds, it will be energized. The voltage between the source and drain of the clamping N-channel MOSFET 33 depends on the threshold voltage Vth, which in turn determines the voltage between C1 and C2 in the clamping circuit 30.

  The operation and effect of the semiconductor device 100 are the same as those of the first embodiment except that the clamp voltages are different.

  In the present embodiment, as a method of adjusting the clamp voltage of the clamp circuit 30, as shown in FIG. 4, a diode is inserted between the gate and drain of the clamp N-channel MOSFET 33 so that the gate terminal side becomes the cathode terminal. Thus, a potential difference based on the forward voltage Vf of the diode can be provided between the gate and the drain of the N-channel MOSFET 33 for clamping, and the clamp voltage can be adjusted. In FIG. 4, two diodes 34 and 35 are inserted. The diodes 34 and 35 are connected in series between the gate and the drain. The number of diodes to be inserted is appropriately changed according to a desired clamp voltage.

(Third embodiment)
In the first embodiment and the second embodiment, the first terminal C1 and the second terminal C2 of the clamp circuit 30 are the gate terminal G1 of the first switching element Tr1 and the ground line (the wiring in which the reference potential GND is defined), respectively. ) Is shown as an example, but the present invention is not limited to this example. The clamp circuit 30 realizes soft-off of the switching element 10 in order to suppress a large current due to the switching element 10 being suddenly turned off. For this reason, the 1st terminal C1 should just be connected to the gate terminal of the switching element 10 used as the object of soft-off. Moreover, the 2nd terminal C2 should just be connected in the position which a parasitic inductance produces with respect to the output terminal of the switching element 10 made into soft off.

  The semiconductor device 110 shown in FIG. 5 includes a second clamp circuit 30 in addition to the configuration of the first embodiment. The first terminal C1 and the second terminal C2 of the second clamp circuit 30 are connected to the gate terminal G2 of the second switching element Tr2 and the ground line (wiring for defining the reference potential GND), respectively. According to this, soft-off of the second switching element Tr2 can be realized with respect to the surge current.

  Note that the clamp circuit 30 connected to the first switching element Tr1 may be excluded, and a soft-off effect may be provided only to the second switching element Tr2.

  Further, as described above, the second terminal C2 of the clamp circuit 30 may be connected to a position where parasitic inductance is generated with respect to the output terminal of the switching element 10 to be soft-off. As in the semiconductor device 120 shown, in the clamp circuit 30 connected to the first switching element Tr1, the second terminal C2 is connected between the source terminal S1 of the first switching element Tr1 and the drain terminal D2 of the second switching element Tr2. May be. In this case, the voltage increase at the second terminal C2 due to the surge current is L2 · dj / dt.

(Fourth embodiment)
As shown in FIG. 7, the semiconductor device 130 according to the present embodiment includes a bypass circuit 40 and a bypass control unit 50 that controls the validity of the bypass circuit 40 in addition to the aspect described in the first embodiment. ing.

  The bypass circuit 40 is connected so as to mediate the second terminal C2 of the clamp circuit 30 and the intermediate point between the first switching element Tr1 and the second switching element Tr2. In the bypass circuit 40, the terminal connected to the intermediate point between the first switching element Tr1 and the second switching element Tr2 is referred to as a third terminal C3, and the terminal connected to the second terminal C2 of the clamp circuit 30 is referred to as a third terminal C3. This is referred to as a fourth terminal C4.

  The bypass circuit 40 is a circuit that does not flow current from the third terminal C3 to the fourth terminal C4, and flows current from the fourth terminal C4 to the third terminal C3 under a predetermined condition. Although the configuration is not limited as long as the circuit has the above function, the bypass circuit 40 in this embodiment includes a bypass diode 41 and a bypass switch 42.

  The bypass diode 41 is inserted so as to rectify current so as not to flow from the third terminal C3 to the fourth terminal C4, the cathode terminal is connected to the third terminal C3 side, and the anode terminal is the fourth terminal. It is connected to the terminal C4 side.

  The bypass switch 42 is a switch that controls energization and interruption of the current between the fourth terminal C4 and the third terminal C3, and may be a MOSFET, for example. The bypass control unit 50 controls the on / off of the bypass switch 42. If a MOSFET is employed as the bypass switch 42, the bypass control unit 50 controls the on / off by controlling the application of the gate voltage to the gate terminal of the bypass switch 42.

  Thus, by having the bypass diode 41, the flow of current from the third terminal C3 to the fourth terminal C4 is interrupted regardless of whether the bypass switch 42 is turned on or off, and from the fourth terminal C4. The flow of current toward the third terminal C3 is controlled by the bypass switch 42. The function of the bypass control unit 50 that controls the bypass switch 42 may be included in the control unit 20 that controls on / off of the switching element 10, or a separate functional block may be provided.

  A predetermined condition for enabling the bypass circuit 40 will be described. The surge current can be generated not only when an abnormality occurs such as when the switching element 10 is short-circuited, but also during normal motor control. For example, when the motor 300 is initially started, a relatively large surge current due to an inrush current may occur. When the clamp circuit 30 becomes effective against the surge current that can be generated during the normal control of the switching element 10 and flows into the gate terminal G1 of the first switching element Tr1 via the clamp circuit 30, the first switching is performed. There is a possibility that the off-timing of the element Tr1 becomes unintended and the control of the motor 300 becomes unintended.

  Therefore, the bypass control unit 50 in the present embodiment controls the bypass switch 42 so as to switch between the valid and invalid states of the bypass circuit 40 in accordance with the driving state of the load. For example, when the switching element 10 can detect whether the switching element 10 is normal or abnormal and the switching element 10 is operating normally, the bypass control unit 50 closes the bypass switch 42 so that the bypass circuit 40 is Enable, thereby disabling the clamp circuit 30.

  Specifically, in a situation where an abnormality of the switching element 10 is not detected, for example, the bypass switch 42 is set to ON until a predetermined time has elapsed since the start of the motor 300, and then set to OFF.

  While the bypass switch 42 is on, a current flowing from the reference potential GND side into the clamp circuit 30 due to a surge is released to the source terminal S1 side of the first switching element Tr1 by the bypass circuit 40 and is supplied to the gate terminal G1. It can be prevented from flowing. Thereby, unintended soft-off of the first switching element Tr1 can be suppressed.

(Fifth embodiment)
As described in the first embodiment, the voltage applied to the second terminal C <b> 2 in the clamp circuit 30 depends on the parasitic inductance around the switching element 10 and the clamp circuit 30. In other words, the voltage applied to the second terminal C2 when a surge occurs can be controlled by adjusting the connection destination of the second terminal C2.

  The semiconductor device 140 in this embodiment is an example in which the connection destination of the second terminal C2 can be arbitrarily selected on the ground line. As shown in FIG. 8, the first switching element Tr <b> 1, the second switching element Tr <b> 2, and the clamp circuit 30 are packaged as a first module 61. The control unit 20 is also packaged as the second module 62. On the other hand, the ground line set to the reference potential GND is located outside the first module 61 and the second module 62. Specifically, the ground line is, for example, a bus bar. The bus bar has three connection points of point a, point b, and point c from the side far from the source terminal S2 of the second switching element Tr2. The wiring R extending from the second terminal C2 of the clamp circuit 30 and protruding to the outside of the first module 61 can be connected to any one of the connection points of point a, point b, and point c. The designer can select the connection destination of the second terminal C2 from any of the points a, b, and c according to the application.

  A parasitic inductance generated between the point a and the point b is L5, and a parasitic inductance generated between the point b and the point c is L6. If the connection destination of the second terminal C2 is the point a, when a vertical through current flows between P1 and P2, the potential on the ground line (the potential of the second terminal C2) is applied to the source terminal S1 of the first switching element Tr1. On the other hand, it becomes higher by (L2 + L3 + L5 + L6) · dj / dt. If the connection destination of the second terminal C2 is the point b, it becomes higher by (L2 + L3 + L6) · dj / dt. If the connection destination of the second terminal C2 is the point c, it becomes higher by (L2 + L3) · dj / dt. Thus, the voltage applied to the second terminal C2 of the clamp circuit 30 can be controlled when a surge occurs.

(Sixth embodiment)
In the fifth embodiment, the example in which the change of the connection destination of the second terminal C2 in the clamp circuit 30 is controlled by hardware has been described. However, as illustrated in FIG. A connection point changeover switch 70 for switching is provided and is switched by software.

  The connection point changeover switch 70 is connected to the second terminal C2, and the connection destination of the second terminal C2 can be connected to any one of the wires connected to the points a, b, and c. ing. Switching of the connection point changeover switch 70 is controlled by the control unit 20 or a control mechanism (not shown).

  Thus, since the connection destination of the second terminal C2 can be selected in software, for example, the connection destination can be easily changed even after the semiconductor device 150 is assembled in a vehicle or the like.

(Seventh embodiment)
As shown in FIG. 10, the semiconductor device 160 in the present embodiment includes a first resistor R1 between the gate terminal G1 of the first switching element Tr1 and the first terminal C1 of the clamp circuit 30.

  As described above, the surge voltage when the clamp circuit 30 is enabled is clamped to the sum of the threshold voltage Vth of the first switching element Tr1 and the clamp voltage of the clamp circuit 30. Thus, by providing the first resistor R1, it is possible to further reflect the voltage related to the voltage drop of the first resistor R1 in the surge voltage after clamping. That is, the degree of surge voltage clamping can be adjusted by appropriately setting the first resistor R1.

  Furthermore, the semiconductor device 160 in the present embodiment is in series with the first resistor R1 between the gate terminal G1 of the first switching element Tr1 and the source terminal S1 that is the output terminal on the low potential side of the first switching element Tr1. The second resistor R2 connected to the second resistor R2. A first terminal C1 of the clamp circuit 30 is connected to an intermediate point between the first resistor R1 and the second resistor R2. In the example shown in FIG. 10, the control unit 20 is interposed between the first resistor R1 and the second resistor R2 between the gate terminal G1 and the source terminal S1, but the first resistor R1 and the second resistor R2 is electrically connected inside the control unit 20.

  By the way, the surge voltage when the clamp circuit 30 is enabled is clamped to the sum of the threshold voltage Vth of the first switching element Tr1 and the clamp voltage of the clamp circuit 30, but the threshold voltage of the switching element is Due to manufacturing variations, etc., it is relatively easy to fluctuate. For this reason, the voltage after clamping may also be influenced and fluctuate.

  On the other hand, in the semiconductor device 160 of the present embodiment, the first terminal C1 of the clamp circuit 30 is connected to an intermediate point between the first resistor R1 and the second resistor R2. The factor relating to the threshold voltage Vth is multiplied by R2 / (R1 + R2) which is a resistance voltage division. That is, the influence of the threshold voltage Vth can be reduced as compared with the case where the first resistor R1 and the second resistor R2 are not provided. Therefore, the influence of variations in the threshold voltage Vth can be reduced.

  Note that the second resistor R2 is not an essential component, and even in a configuration having only the first resistor R1, the degree of surge voltage clamping can be adjusted by appropriately setting the first resistor R1. However, by providing the second resistor R2, it is possible to further suppress the influence of variations in the threshold voltage Vth of the switching element 10.

  Although the first resistor R1 and the second resistor R2 can be provided as new parts, for example, an existing resistor included in the control unit 20 can also be used. As shown in FIG. 11, the control unit 20 applies a gate voltage to the gate terminal G1 (G2) in order to control the first or second switching elements Tr1 and Tr2. The control unit 20 has a configuration in which switching elements Q1 and Q2 are connected in series between the power supply VDD and the source terminal S1 (S2), and is connected to the gate terminal G1 (G2) when Q1 is turned on and Q2 is turned off. Charged. On the other hand, the gate terminal G1 (G2) is discharged in a situation where Q2 is turned on and Q1 is turned off. The control unit 20 includes a resistor R1 for adjusting the charging speed during charging and a resistor R2 for adjusting the discharging speed during discharging. The resistors R1 and R2 that adjust the charge / discharge speed can be regarded as the first resistor R1 and the second resistor R2, respectively.

  In the example shown in FIG. 11, the gate terminal G1 (G2) of the switching element Tr1 (Tr2) and the source terminal that is the output terminal on the low potential side of the switching element Tr1 (Tr2) in a state where the switching element Q2 is turned on. The first resistor R1 and the second resistor R2 are connected in series between S1 (S2). The first terminal C1 of the clamp circuit 30 is connected to an intermediate point between the first resistor R1 and the second resistor R2. In FIG. 11, the clamp circuit 30 is connected at two points across the switching element Q2, but these two points are equivalent under the condition that the switching element Q2 is turned on, and the connection is made at any one point. However, there is an effect of suppressing the influence of variation in the threshold voltage Vth of the switching element 10.

  Also, as shown in FIG. 12, the first resistor R1 and the second resistor R2 are both connected in series between the switching element Q2 belonging to the control unit 20 and the gate electrode G1 (G2). Alternatively, as shown in FIG. 13, the first resistor R1 and the second resistor R2 are both connected in series between the switching element Q2 belonging to the control unit 20 and the source electrode S1 (S2). There may be.

  Further, as described in the fifth embodiment, when the switching element 10 and the control unit 20 are packaged and modularized, to which module the first resistor R1 and the second resistor R2 are packaged. Is not limited. For example, both the first resistor R1 and the second resistor R2 may belong to the first module 61 shown in FIG. 8, and both the first resistor R1 and the second resistor R2 may belong to the second module 62. . Moreover, each resistance R1, R2 may belong to another module. In addition, it is not limited whether the destination to which the first terminal C1 of the clamp circuit 30 is connected is in any module.

  Furthermore, regarding the first resistance R1 and the second resistance R2, the on-resistance and the wiring resistance of the switching element 10 may be regarded as the first resistance R1 and the second resistance R2, respectively, without being separately formed as resistance elements. .

(Other embodiments)
The preferred embodiment has been described above, but the present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the gist disclosed in this specification.

  In each of the above-described embodiments, a plurality of examples have been shown for the specific circuit configuration of the clamp circuit 30. However, the present invention is not limited to these examples, and the clamp circuit 30 is not limited to the first terminal C1 to the second terminal C2. No current flows through the second terminal C2 and the first terminal C1 while maintaining a constant potential difference between C2 and C1 under a predetermined condition in which the potential of the second terminal C2 is higher than that of the first terminal C1. Any circuit may be used as long as it allows a current to flow to the.

  In particular, in the second embodiment, an example in which the N-channel MOSFET 33 is employed for the clamp circuit 30 is illustrated, but a P-channel MOSFET 36 may be used as shown in FIG. The clamp circuit 30 includes a clamp diode 31 and a clamp P-channel MOSFET 36. As in the second embodiment, the clamping diode 31 is inserted to rectify the current so as not to flow from the first terminal C1 to the second terminal C2, and the cathode terminal is connected to the first terminal C1 side. In addition, the anode terminal is connected to the second terminal C2 side.

  The clamping P-channel MOSFET 36 has a drain terminal connected to the first terminal C1 side, that is, an anode terminal of the clamping diode 31, and a source terminal connected to the second terminal C2 side. In the clamping P-channel MOSFET 36, the gate terminal and the drain terminal are directly connected.

  Even in the form of using a P-channel MOSFET, the clamp voltage can be adjusted using a diode. That is, as shown in FIG. 15, by inserting diodes 37 and 38 between the gate and drain of the clamp P-channel MOSFET 36 so that the gate terminal side becomes the anode terminal, the gate-drain region of the clamp P-channel MOSFET 36 is inserted. Can be given a potential difference based on the forward voltage Vf of the diode, and the clamp voltage can be adjusted.

  In each of the above-described embodiments, the specific circuit configuration of the bypass circuit 40 has been described as an example. However, the present invention is not limited to these examples, and the bypass circuit 40 is not limited to the fourth terminal C4. Any circuit may be used as long as it does not flow current and flows current from the fourth terminal C4 to the third terminal C3 under a predetermined condition.

  In the fifth and sixth embodiments, the example in which the clamp circuit 30 is packaged in the same first module 61 as the switching element 10 has been described. However, the clamp circuit 30 is not necessarily associated with the switching element 10. is not. That is, the clamp circuit 30 may exist in the second module 62 together with the control unit 20. Further, the first module 61 and the second module 62 may be provided separately.

DESCRIPTION OF SYMBOLS 10 ... Switching element, Tr1 ... 1st switching element, Tr2 ... 2nd switching element, 20 ... Control part, 30 ... Clamp circuit, 200 ... Inverter circuit, 300 ... Motor

Claims (14)

As the switching element (10), a first switching element (Tr1) and a second switching element (Tr2) whose output terminals are connected in series between a power supply potential and a reference potential,
A control unit (20) for controlling on / off by supplying a voltage to a control terminal of the switching element;
A clamp circuit (30) having a first terminal (C1) as one end connected to a control terminal of at least one of the switching elements,
The clamp circuit is a second terminal that is the other end of the first terminal between an output terminal on the low potential side of the switching element to which the first terminal is connected and a terminal to which the reference potential is set. (C2) is connected,
The clamp circuit cuts off a current from the first terminal to the second terminal, and when the potential of the second terminal is higher than the potential of the first terminal, the first terminal and the second terminal A semiconductor device that is energized so that the potential difference between and does not exceed a predetermined clamping voltage. The clamp circuit is
A clamping diode (31) having a cathode terminal on the first terminal side;
A clamping Zener diode (32) having an anode terminal on the first terminal side,
The semiconductor device according to claim 1, wherein the clamp voltage is determined based on a break voltage of the Zener diode. The clamp circuit is
A clamping diode (31) having a cathode terminal on the first terminal side;
A clamping N-channel MOSFET (33) having a source terminal on the first terminal side, a drain terminal on the second terminal side, and a gate terminal connected to the drain terminal,
The semiconductor device according to claim 1, wherein the clamp voltage is determined based on a source-drain voltage of the clamp N-channel MOSFET.   4. The semiconductor device according to claim 3, wherein one or more diodes (34, 35) are connected in series between the gate and drain of the clamping N-channel MOSFET so that the cathode terminal is on the gate terminal side. The clamp circuit is
A clamping diode (31) having a cathode terminal on the first terminal side;
A clamping P-channel MOSFET (36) having a drain terminal on the first terminal side, a source terminal on the second terminal side, and a gate terminal connected to the drain terminal;
The semiconductor device according to claim 1, wherein the clamp voltage is determined based on a source-drain voltage of the clamping P-channel MOSFET.   6. The semiconductor device according to claim 5, wherein one or more diodes (37, 38) are connected in series between the gate and drain of the clamping P-channel MOSFET so that the anode terminal is on the gate terminal side. The first switching element constitutes an upper arm whose one end of the output terminal is the power supply potential, and the second switching element constitutes a lower arm whose one end of the output terminal is the reference potential,
The clamp circuit is interposed between a control terminal of the first switching element, an output terminal on the low potential side of the second switching element, and a terminal to which the reference potential is set.
And a bypass circuit (40) having a third terminal (C3) and a fourth terminal (C4),
In the bypass circuit, the third terminal is connected to an intermediate point between the first switching element and the second switching element, and the fourth terminal is connected to the second terminal in the clamp circuit,
7. The bypass circuit according to claim 1, wherein the bypass circuit cuts off a current from the third terminal to the fourth terminal and energizes the third terminal from the fourth terminal under a predetermined condition. The semiconductor device described. The bypass circuit is
A bypass diode (41) having a cathode terminal on the third terminal side;
A bypass switch (42) for controlling on / off of energization between the third terminal and the fourth terminal, the bypass switch being closed under a predetermined condition, The semiconductor device according to claim 7, wherein current is passed between the fourth terminal. A bypass control unit (50) for controlling the bypass switch;
The bypass control unit can detect whether the switching element is normal or abnormal,
When the switching element is operating normally, by closing the bypass switch, the potential difference between the first terminal and the second terminal is controlled so as not to increase to a predetermined clamp voltage. The semiconductor device according to claim 8. The first switching element and the second switching element constitute a packaged module (61),
The second terminal in the clamp circuit is connected between the output terminal on the low potential side of the switching element to which the first terminal is connected and the terminal to which the reference potential is set, outside the module. The semiconductor device according to any one of claims 1 to 9.   The semiconductor device according to claim 10, wherein a parasitic inductance between the second terminal and the module is made variable by changing a connection point to which the second terminal is connected. A connection point changeover switch (70) is provided between the connection point to which the second terminal is connected and the clamp circuit,
The semiconductor device according to claim 11, wherein a parasitic inductance between the second terminal and the module is made variable by switching the connection point changeover switch.   13. The device according to claim 1, further comprising: a first resistor connected between the first terminal of the clamp circuit and a control terminal of the switching element to which the clamp circuit is connected. Semiconductor device. A second resistor connected in series with the first resistor between the output terminal on the low potential side of the switching element to which the clamp circuit is connected and the control terminal;
The semiconductor device according to claim 13, wherein the first terminal is connected to an intermediate point between the first resistor and the second resistor.

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