JP2018513651A5 - - Google Patents

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Publication number
JP2018513651A5
JP2018513651A5 JP2017555219A JP2017555219A JP2018513651A5 JP 2018513651 A5 JP2018513651 A5 JP 2018513651A5 JP 2017555219 A JP2017555219 A JP 2017555219A JP 2017555219 A JP2017555219 A JP 2017555219A JP 2018513651 A5 JP2018513651 A5 JP 2018513651A5
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JP
Japan
Prior art keywords
adc
trim phase
voltage
trim
coupled
Prior art date
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Application number
JP2017555219A
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English (en)
Japanese (ja)
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JP2018513651A (ja
JP6762959B2 (ja
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Priority claimed from US14/871,005 external-priority patent/US9425811B1/en
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Publication of JP2018513651A publication Critical patent/JP2018513651A/ja
Publication of JP2018513651A5 publication Critical patent/JP2018513651A5/ja
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Publication of JP6762959B2 publication Critical patent/JP6762959B2/ja
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JP2017555219A 2015-04-20 2016-04-20 温度に伴うオフセットドリフトを補償するための方法及び装置 Active JP6762959B2 (ja)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US201562149971P 2015-04-20 2015-04-20
US62/149,971 2015-04-20
US14/871,005 US9425811B1 (en) 2015-04-20 2015-09-30 Method and apparatus for compensating offset drift with temperature
US14/871,005 2015-09-30
PCT/US2016/028465 WO2016172228A1 (en) 2015-04-20 2016-04-20 Method and apparatus for compensating offset drift with temperature

Publications (3)

Publication Number Publication Date
JP2018513651A JP2018513651A (ja) 2018-05-24
JP2018513651A5 true JP2018513651A5 (enExample) 2019-05-30
JP6762959B2 JP6762959B2 (ja) 2020-09-30

Family

ID=56683335

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2017555219A Active JP6762959B2 (ja) 2015-04-20 2016-04-20 温度に伴うオフセットドリフトを補償するための方法及び装置

Country Status (4)

Country Link
US (1) US9425811B1 (enExample)
JP (1) JP6762959B2 (enExample)
CN (1) CN107636970B (enExample)
WO (1) WO2016172228A1 (enExample)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110138386B (zh) * 2019-04-30 2020-12-25 厦门大学 一种比较器失调漂移后台校正电路和方法
JP2021150806A (ja) 2020-03-19 2021-09-27 キオクシア株式会社 半導体集積回路及び受信装置
EP4125220A1 (en) 2021-07-28 2023-02-01 Socionext Inc. Linearity and/or gain in mixed-signal circuitry
CN116185119B (zh) * 2023-04-23 2023-07-21 深圳市九天睿芯科技有限公司 基于cim的电压调节电路、芯片及电子设备
US12463651B2 (en) * 2023-09-01 2025-11-04 Apple Inc. Mixer second-order input-intercept point temperature compensation

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4399426A (en) * 1981-05-04 1983-08-16 Tan Khen Sang On board self-calibration of analog-to-digital and digital-to-analog converters
IT1186476B (it) * 1985-12-19 1987-11-26 Sgs Microelettronica Spa Apparecchio e metodo per la correzione della tensione di offset in un convertitore analogico-digitale
US6847319B1 (en) * 2003-07-22 2005-01-25 Standard Microsystems Corporation Temperature-to-digital converter
US7312648B2 (en) * 2005-06-23 2007-12-25 Himax Technologies, Inc. Temperature sensor
US7218259B2 (en) * 2005-08-12 2007-05-15 Analog Devices, Inc. Analog-to-digital converter with signal-to-noise ratio enhancement
US7286075B2 (en) * 2005-11-14 2007-10-23 Analog Devices, Inc. Analog to digital converter with dither
DE102009040543B4 (de) * 2009-09-08 2014-02-13 Texas Instruments Deutschland Gmbh Schaltung und Verfahren zum Trimmen einer Offsetdrift
US8368570B2 (en) * 2011-01-31 2013-02-05 SK Hynix Inc. Method and system for calibrating column parallel ADCs
WO2013001682A1 (ja) * 2011-06-30 2013-01-03 パナソニック株式会社 アナログ測定データ検出システム、電池電圧検出システム
US8638248B2 (en) * 2011-10-07 2014-01-28 Nxp, B.V. Input-independent self-calibration method and apparatus for successive approximation analog-to-digital converter with charge-redistribution digital to analog converter

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