JP2018187272A - Game machine - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a game machine capable of recognizing occurrence of a fraudulent act that is performed outside an imaging range of imaging means, and is indeterminable by image processing.SOLUTION: First control means includes detection result transmission means for transmitting a detection result outputted from detection result output means to second control means. The second control means includes determination result count means for counting the number of game media on the basis of a determination result received from determination result output means, and detection result count means for counting the number of game media on the basis of a detection result transmitted from the detection result transmission means. Display means reports occurrence of a fault when a difference between the number of game media counted by the determination result count means and the number of game media counted by the detection result count means is equal to or more than a predetermined value.SELECTED DRAWING: Figure 58

Description

  The present invention relates to a gaming machine.

  Conventionally, a game called pachislot, comprising a plurality of reels each having a plurality of symbols arranged on each surface, a start switch, a stop switch, a stepping motor provided for each reel, and a control unit. The machine is known. The start switch detects that the start lever has been operated by the player after a game medium such as a medal has been inserted into the gaming machine (hereinafter also referred to as “start operation”), and starts the rotation of all reels. Output the requested signal. The stop switch detects that a stop button provided for each reel has been pressed by the player (hereinafter also referred to as “stop operation”), and outputs a signal requesting the rotation of the corresponding reel to stop. To do. The stepping motor transmits the driving force to the corresponding reel. Further, the control unit controls the operation of the stepping motor based on the signals output from the start switch and the stop switch, and performs the rotation operation and stop operation of each reel.

  In such a gaming machine, when a start operation is detected, lottery processing using random numbers (hereinafter referred to as “internal lottery processing”) is performed on the program, and the result of the lottery (hereinafter referred to as “internal winning combination”). And the rotation of the reel is stopped based on the timing of the stop operation. Then, when the rotation of all the reels is stopped and the symbol combination related to the winning is displayed, a privilege corresponding to the symbol combination is given to the player.

  In addition, such a gaming machine is provided with a medal selector for detecting a medal inserted at the end of the medal slot. In addition, for this medal selector, a medal (illegal medal) that is not a proper medal (regular medal) is inserted into the medal insertion slot, or a device is inserted into the medal insertion slot, so that a regular medal is inserted into the gaming machine. Measures are taken against fraudulent acts of misrecognizing that the game has been thrown into the game.

  For example, Patent Document 1 describes a slot machine that uses a CCD camera to determine an improper medal inserted (illegal medal).

JP 2006-271462 A

  However, the slot machine described in Patent Document 1 cannot recognize an illegal act performed outside the imaging range of the CCD camera (imaging unit) or an illegal act that cannot be determined by image processing.

  The present invention has been made to solve the above-described problems, and the object of the present invention is to recognize the occurrence of fraudulent acts that are performed outside the imaging range of the imaging means or that cannot be determined by image processing. Is to provide a simple gaming machine.

  In order to achieve the above object, the present invention provides a gaming machine having the following configuration.

Display means for displaying various images (for example, a liquid crystal display device 11 described later);
First control means (for example, a main control circuit 91 described later);
Second control means (for example, a sub-control circuit 101 described later);
An insertion slot (for example, a medal insertion slot 21 described later) for inserting a game medium;
Game medium detecting means (for example, a medal selector 201 described later) for detecting a game medium inserted from the insertion slot,
The game medium detection means includes
A passage forming portion (for example, a medal rail 210 described later) that forms a passage through which game media pass;
Imaging means for imaging the passage (for example, a camera unit 209 described later);
Game medium determining means (for example, control LSI 234 described later) for determining whether an object passing through the passage is a regular game medium based on image data obtained through the imaging means;
Determination result output means for outputting the determination result of the game medium determination means to the second control means;
Object detection means (for example, a double photo sensor 502 described later) for detecting that an object has passed through the passage;
Detection result output means for outputting the detection result of the object detection means to the first control means,
The first control means includes detection result transmission means for transmitting the detection result output from the detection result output means to a second control means,
The second control means includes
Determination result counting means for counting the number of the game media based on the determination result received from the determination result output means;
Detection result counting means for counting the number of game media based on the detection result transmitted from the detection result transmission means,
When the difference between the number counted by the determination result counting means and the number counted by the detection result counting means is equal to or greater than a predetermined value, the display means notifies the occurrence of an abnormality (for example, when receiving a medal insertion command described later) Processing steps S214, S215)
A gaming machine characterized by that.

  According to the present invention, it is possible to recognize an illegal act performed outside the imaging range of the imaging unit or an illegal act that cannot be determined by image processing.

It is explanatory drawing explaining the functional flow in the game machine of one Embodiment of this invention. It is a perspective view which shows the example of an external appearance structure in the game machine of one Embodiment of this invention. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a perspective view showing an internal structure of a gaming machine according to an embodiment of the present invention, with a middle door closed. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a perspective view showing an internal structure of a gaming machine according to an embodiment of the present invention, with a middle door opened. It is explanatory drawing which shows the inside of the cabinet in the game machine of one Embodiment of this invention. It is explanatory drawing which shows the back surface side of the front door in the game machine of one Embodiment of this invention. It is the perspective view which looked at the medal selector in the gaming machine of one embodiment of the present invention from the slanting back of the gaming machine. It is an exploded view of the medal selector in the gaming machine of one embodiment of the present invention. It is the perspective view which looked at the medal selector in the gaming machine of one embodiment of the present invention from the diagonal front of the gaming machine. It is a rear view of the base board part of the medal selector in the gaming machine of one embodiment of the present invention. It is a perspective view of the select plate of the medal selector in the gaming machine of one embodiment of the present invention. It is a figure which shows the path | route of a medal when the medal selector in the game machine of one Embodiment of this invention guides a medal to a hopper apparatus. It is a figure which shows the path | route of a medal when the medal selector in the gaming machine of one embodiment of the invention guides the medal to the medal shoot. It is a block diagram which shows the control system in the game machine of one Embodiment of this invention. It is a block diagram which shows the structural example of the main control circuit in the game machine of one Embodiment of this invention. It is a block diagram which shows the structural example of the sub control circuit in the game machine of one Embodiment of this invention. It is a block diagram which shows the circuit structural example of the medal selector in the game machine of one Embodiment of this invention. It is a block diagram which shows the circuit structural example of control LSI in the game machine of one Embodiment of this invention. It is a figure for demonstrating distortion of the lens in the game machine of one Embodiment of this invention. It is a figure for demonstrating the projective transformation process in the game machine of one Embodiment of this invention, A shows the RGB Bayer image before projective transformation, B shows the RGB Bayer image after projective transformation. It is a figure for demonstrating the threshold value graph in the game machine of one Embodiment of this invention. It is FIG. (1) for demonstrating the determination area | region in the gaming machine of one Embodiment of this invention. It is FIG. (2) for demonstrating the determination area | region in the gaming machine of one Embodiment of this invention. It is FIG. (3) for demonstrating the determination area | region in the gaming machine of one Embodiment of this invention. It is FIG. (4) for demonstrating the determination area | region in the gaming machine of one Embodiment of this invention. It is a figure which shows an example of the determination area | region determination result data memorize | stored in SRAM in the gaming machine of one Embodiment of this invention. It is a figure for demonstrating the medal count determination table in the game machine of one Embodiment of this invention. It is a figure for demonstrating the Gaussian filter in the game machine of one Embodiment of this invention. It is a figure for demonstrating the circular area | region detection process in the game machine of one Embodiment of this invention. It is a figure for demonstrating the 3σ correction process in the gaming machine of one embodiment of the present invention. It is a figure for demonstrating the filter process in the game machine of one Embodiment of this invention, A represents typically the circular area image data after a 3σ correction process, B shows the coefficient for edge images X, C represents an edge image Y coefficient. It is a figure which shows an example of the regular medal used for the game machine of one Embodiment of this invention, A shows one side of a regular medal, B shows the gradient average image data of a regular medal. It is a figure for demonstrating the HOG conversion process in the game machine of one Embodiment of this invention. It is a figure for demonstrating the FFT conversion process in the game machine of one Embodiment of this invention. It is a flowchart of the process which the control LSI in the game machine of one Embodiment of this invention performs. It is a flowchart (the 1) which shows an example of the template production | generation process in the game machine of one Embodiment of this invention. It is a flowchart (the 2) which shows an example of the template production | generation process in the game machine of one Embodiment of this invention. It is a flowchart which shows an example of this template update process in the game machine of one Embodiment of this invention. It is a flowchart which shows an example of the coefficient update process in the game machine of one Embodiment of this invention. It is a figure for demonstrating the threshold plane in the game machine of one Embodiment of this invention. It is a list of commands transmitted and received between the medal selector and the sub control circuit in the gaming machine of one embodiment of the present invention. It is a figure for demonstrating an example of the command transmission / reception sequence between the medal selector and the sub control circuit in the game machine of one Embodiment of this invention. It is a flowchart which shows an example of the power-on process in the game machine of one Embodiment of this invention. It is a flowchart which shows an example of the process at the time of the no-operation command reception in the game machine of one Embodiment of this invention. It is a flowchart which shows an example of the medal selector communication task in the gaming machine of one embodiment of the present invention. It is a flowchart which shows an example of the medal selector command reception process in the gaming machine of one embodiment of the present invention. It is a flowchart which shows an example of the process at the time of the start completion command reception in the game machine of one Embodiment of this invention. It is a figure which shows an example of the initialization error screen in the game machine of one Embodiment of this invention. It is a figure which shows an example of the selector switch error screen in the game machine of one Embodiment of this invention. It is a flowchart which shows an example of the process at the time of the determination completion command reception in the gaming machine of one embodiment of the present invention. It is a figure which shows the cue | queue provided in the sub-RAM103 in the game machine of one Embodiment of this invention. It is a figure which shows an example of the C2 error screen in the gaming machine of one embodiment of the present invention. It is a flowchart which shows an example of the process at the time of medal selector error command reception in the gaming machine of one embodiment of the present invention. It is a figure which shows an example of the C1 error screen in the game machine of one Embodiment of this invention. It is a flowchart which shows an example of the process at the time of medal selector no operation command reception in the gaming machine of one embodiment of the present invention. It is a flowchart which shows an example of the starting frequency determination process in the game machine of one Embodiment of this invention. It is a flowchart which shows an example of the switch state determination process in the gaming machine of one embodiment of the present invention. It is a flowchart which shows an example of the process at the time of medal insertion command reception in the gaming machine of one embodiment of the present invention. It is a flowchart which shows an example of the medal selector command transmission process in the gaming machine of one embodiment of the present invention. It is a flowchart which shows an example of the error cancellation determination process in the gaming machine of one embodiment of the present invention. It is a figure which shows an example of the error information log | history screen in the game machine of one Embodiment of this invention. It is a figure for demonstrating the medal selector in the game machine of the modification 1 of this invention. It is a block diagram which shows the circuit structural example of the medal selector in the game machine of the modification 2 of this invention. It is a block diagram which shows the circuit structural example of control LSI in the game machine of the modification 2 of this invention. It is explanatory drawing for demonstrating the selector monitoring function in the game machine of the modification 3 of this invention. It is a block diagram which shows the circuit structural example of the medal selector in the game machine of the modification 4 of this invention. It is a rear view of the medal selector in the gaming machine of Modification 5 of the present invention. It is a block diagram which shows the circuit structural example of the medal selector in the game machine of the modification 5 of this invention. It is a block diagram which shows the circuit structural example of the medal selector in the game machine of the modification 6 of this invention. It is the top view which looked at the game apparatus which concerns on the application example 1 of embodiment of this invention from the upper surface. It is a perspective view which shows the internal structure of the game device which concerns on the application example 2 of embodiment of this invention. It is sectional drawing of the counting hopper which concerns on the application example 2 of embodiment of this invention. It is a perspective view which shows the example of an internal structure of the game device which concerns on the application example 3 of embodiment of this invention.

  Hereinafter, a pachislot machine that is a gaming machine according to an embodiment of the present invention will be described with reference to FIGS.

<Function flow>
First, the functional flow of the pachislot will be described with reference to FIG.
In the pachislot of this embodiment, medals are used as game media for playing games. In addition to the medals, coins, game balls, game point data, tokens, or the like can be applied as game media.

  When a player inserts a medal and operates the start lever, one value (hereinafter, random number value) is extracted from random numbers in a predetermined numerical range (for example, 0 to 65535).

  The internal lottery means performs lottery based on the extracted random number value and determines an internal winning combination. This internal lottery means is carried out by a main control circuit described later. By determining the internal winning combination, a combination of symbols that permits display along a winning determination line described later is determined. The types of symbol combinations include those related to “winning” in which benefits such as paying out medals, re-games, bonuses, etc. are given to players, and other so-called “loses”. Is provided.

  Further, when the start lever is operated, a plurality of reels are rotated. Thereafter, when the player presses the stop button corresponding to the predetermined reel, the reel stop control means performs control to stop the rotation of the corresponding reel based on the internal winning combination and the timing when the stop button is pressed. Do. The reel stop control means is responsible for a main control circuit described later.

  In the pachislot, basically, a control for stopping the rotation of the corresponding reel is performed within a specified time (190 msec or 75 msec) from when the stop button is pressed. In the present embodiment, the number of symbols that move with the rotation of the reel within the specified time is referred to as “the number of sliding symbols”. When the specified period is 190 msec, the maximum number of sliding symbols is set to 4 symbols, and when the specified period is 75 msec, the maximum number of sliding symbols is set to 1 symbol.

  When the internal winning combination allowing the symbol combination display related to winning is determined, the reel stop control means usually displays the symbol combination within the specified time of 190 msec (four symbols) for the winning determination line. The rotation of the reel is stopped so as to display as much as possible. In addition, the reel stop control means is defined for one or more reels when, for example, a challenge bonus (CB), which is a second-type special accessory, and a middle bonus (MB) for continuously operating the CB are operated. The reel rotation is stopped so that the combination of symbols is displayed as much as possible along the winning determination line within a time of 75 msec (for one symbol). Furthermore, the reel stop control means uses various specified times corresponding to the gaming state to rotate the reels so that combinations of symbols that are not permitted to be displayed by the internal winning combination are not displayed along the winning determination line. Stop.

  Thus, when the rotation of the plurality of reels is all stopped, the winning determination means determines whether or not the combination of symbols displayed along the winning determination line is related to winning. This winning determination means is carried out by a main control circuit described later. When it is determined by the winning determination means that it is related to winning, a privilege such as paying out medals is given to the player. In the pachislot, a series of flows as described above is performed as one game.

  Further, in the pachislot, in the above-described series of flows, video display performed by a display device such as a liquid crystal display device, light output performed by various lamps, sound output performed by a speaker, or a combination thereof is used. Various productions are performed.

  When the start lever is operated, an effect random number value (hereinafter referred to as effect random number value) is extracted separately from the random number value used for determining the internal winning combination. When the effect random number value is extracted, the effect content determining means determines, by lottery, what is to be executed this time from among a plurality of types of effect contents associated with the internal winning combination. This effect content determination means is carried out by a sub-control circuit described later.

  When the contents of the effect are determined, the effect executing means executes the corresponding effect in conjunction with each opportunity, such as when the rotation of the reels starts, when the rotation of each reel stops, or when determining whether there is a winning. In this way, in the pachislot machine, the player has the opportunity to know or predict the determined internal winning combination (in other words, the combination of symbols to be aimed at) by executing the production contents associated with the internal winning combination. It is possible to improve the player's interest.

<Pachislot structure>
Next, the structure of the pachislot machine 1 according to one embodiment will be described with reference to FIGS.

[Appearance structure]
FIG. 2 is a perspective view showing the external structure of the pachi-slot 1.

As shown in FIG. 2, the pachi-slot 1 includes an exterior body 2. The exterior body 2 includes a cabinet 2a that houses a hopper device 51, a medal auxiliary storage 52, and the like (see FIG. 5), which will be described later, and a front door 2b that is attached to the cabinet 2a so as to be opened and closed.
Handles 7 are provided on both side surfaces of the cabinet 2a (only one handle 7 is shown in FIG. 2). The handle 7 is a recess that is put on when carrying the pachi-slot 1.

  Inside the exterior body 2, three reels 3L, 3C, 3R are provided side by side. Hereinafter, the reels 3L, 3C, and 3R are referred to as a left reel 3L, a middle reel 3C, and a right reel 3R, respectively. Each reel 3L, 3C, 3R has a reel body formed in a cylindrical shape and a translucent sheet material mounted on the peripheral surface of the reel body. A plurality of (for example, 20) symbols are drawn on the surface of the sheet material at predetermined intervals along the circumferential direction.

  The front door 2b includes a door body 9, a front panel 10, and a liquid crystal display device 11 showing a specific example of the display device.

  The door body 9 is attached to the cabinet 2a using a hinge (not shown), and opens and closes the opening of the cabinet 2a. The hinge is provided at the left end of the door body 9 when the door body 9 is viewed from the front of the pachi-slot 1. The liquid crystal display device 11 is attached to the upper part of the door body 9. The liquid crystal display device 11 includes a display unit (display screen) 11a, and the liquid crystal display device 11 performs an effect by displaying an image.

  The front panel 10 is disposed so as to overlap the display unit 11 a side of the liquid crystal display device 11, and is formed in a frame shape having a panel opening 10 a that exposes the display unit 11 a of the liquid crystal display device 11. A lamp group 18 is provided on the front panel 10. The lamp group 18 is configured by an LED (Light Emitting Diode) or the like, and turns on and off the light in a pattern corresponding to the effect content.

  A pedestal 12 is formed in the center of the front door 2b. The pedestal portion 12 is provided with a symbol display area 4 and various devices to be operated by the player.

  The symbol display area 4 is arranged on the front side superimposed on the three reels 3L, 3C, 3R when viewed from the front, and is provided corresponding to the three reels 3L, 3C, 3R. The symbol display area 4 functions as a display window, and has a configuration capable of transmitting through the reels 3L, 3C, 3R provided behind the display window. Hereinafter, the symbol display area 4 is referred to as a reel display window 4.

  When the reels 3L, 3C, and 3R provided behind the reel display window 4 stop rotating, the reel display window 4 has an upper stage, a middle stage, and a lower stage within the frame among a plurality of types of symbols of the reels 3L, 3C, and 3R. One symbol (three in total) is displayed in each area. In the present embodiment, a target for determining whether or not to win a pseudo line configured by combining any one of the three regions including the upper, middle and lower regions of the reel display window 4 is determined. Is defined as a line (winning determination line).

  The reel display window 4 is formed by a frame member 13 provided on the pedestal portion 12. The frame member 13 has a reel display window 4, an information display window 14, and a stop button attachment portion 15.

  The information display window 14 is provided continuously below the reel display window 4 and opens upward. That is, the reel display window 4 and the information display window 14 are formed as one continuous opening. The information display window 14 and the reel display window 4 are covered with a transparent window cover 16.

  The window cover 16 is disposed on the inner surface side of the frame member 13 and cannot be removed from the front side of the front door 2b. In addition, the frame member 13 includes a sheet placement portion 17 that faces the opening of the information display window 14 with the window cover 16 interposed therebetween. And between the sheet | seat mounting part 17 and the window cover 16, the sheet | seat member (information sheet) in which the information regarding a game was described is arrange | positioned. Therefore, the information sheet is covered with the window cover 16 having a smooth surface without unevenness or gaps.

  The window cover 16 that constitutes the information sheet attachment portion cannot be removed from the front side of the front door 2b, and has a smooth surface with no irregularities or gaps. Can prevent fraudulent access to the inside.

  The stop button mounting portion 15 is provided below the information display window 14 and is formed on a plane facing the front. The stop button mounting portion 15 is provided with a through hole through which the stop buttons 19L, 19C, 19R pass. Stop buttons 19L, 19C, 19R are associated with each of the three reels 3L, 3C, 3R, and are provided to stop the rotation of the corresponding reels. Hereinafter, the stop buttons 19L, 19C, and 19R are referred to as a left stop button 19L, a middle stop button 19C, and a right stop button 19R, respectively.

  The stop buttons 19L, 19C, and 19R show examples of various devices that are targets of operations by the player. The pedestal unit 12 is provided with a medal slot 21, a BET button 22, a start lever 23, a SELECT button 28, and an enter button 29 as various devices to be operated by the player.

  The medal slot 21 is provided to accept a medal dropped from the outside by the player. The medals accepted by the medal slot 21 are inserted into one game with a predetermined number (for example, three) as the upper limit, and the amount exceeding the specified number is deposited inside the pachislot 1. (So-called credit function).

  The BET button 22 is provided to determine the number of coins to be inserted into one game from medals deposited inside the pachislot 1. The start lever 23 is provided to start rotation of all reels (3L, 3C, 3R).

  In addition, a 7-segment display 24 including a 7-segment LED (Light Emitting Diode) is provided on the left side of the reel display window 4 when the front door 2b is viewed from the front. The 7-segment display 24 digitally displays information such as the number of medals to be paid out to the player as a privilege (hereinafter referred to as the number of payouts), the number of medals deposited inside the pachislot (hereinafter referred to as the number of credits), and the like. .

  A settlement button 27 is provided on the left side of the base 12 when the front door 2b is viewed from the front. The checkout button 27 is provided to pull out (discharge) the outside stored in the interior of the pachislot machine 1. A lower panel unit 31 is provided below the pedestal 12. The waist panel unit 31 includes a decorative panel on which an arbitrary image is drawn and a light source that emits light for illuminating the decorative panel from the back side.

  Below the waist panel unit 31, a medal payout port 32, speaker holes 33L and 33R, and a medal tray unit 34 are provided. The medal payout port 32 guides medals discharged from a medal selector 201 described later and medals discharged by driving a hopper device 51 described later to the outside. The medals discharged from the medal payout opening 32 are stored in the medal tray unit 34. The speaker holes 33L and 33R are provided for outputting sound such as sound effects and music corresponding to the contents of the performance.

[Internal structure]
3 and 4 are perspective views showing the internal structure of the pachi-slot 1. FIG. 3 shows a state in which the front door 2b is opened and the middle door 41 provided on the back side of the front door 2b is closed with respect to the front door 2b. FIG. 4 shows a state where the front door 2b is opened and the middle door 41 is opened with respect to the front door 2b.
FIG. 5 is an explanatory diagram showing the inside of the cabinet 2a. FIG. 6 is an explanatory view showing the back side of the front door 2b.

  The cabinet 2a includes a top plate 20a, a bottom plate 20b, left and right side plates 20c and 20d, and a back plate 20e (see FIG. 5). A cabinet-side speaker 42 is disposed on the upper side inside the cabinet 2a. The cabinet-side speaker 42 is attached to the back plate 20e of the cabinet 2a via attachment brackets 43L and 43R. The cabinet side speaker 42 is, for example, a speaker for outputting sound effects.

  A cabinet-side relay board 44 is disposed on the left side of the cabinet-side speaker 42 when the inside of the cabinet 2a is viewed from the front. The cabinet side relay board 44 is attached to the left side plate 20c of the cabinet 2a. The cabinet-side relay board 44 includes a main control board 71 (see FIG. 14), which will be described later, attached to the middle door 41 (see FIGS. 3 and 4), a hopper device 51, a medal auxiliary storage switch (not shown), and a medal payout. The wiring connecting the count switch (not shown) is relayed.

  An amplifier board 45 that controls the output of sound from the cabinet-side speaker 42 is disposed in the center of the cabinet 2a. The amplifier board 45 is attached to a mounting shelf 46 fixed to the left and right side plates 20c, 20d.

  Further, an external concentrated terminal plate 47 is disposed on the right side of the amplifier board 45 when the inside of the cabinet 2a is viewed from the front (see FIG. 5). The external concentrated terminal plate 47 is attached to the right side plate 20d of the cabinet 2a. The external concentration terminal board 47 is provided for outputting signals such as a medal insertion signal, a medal payout signal, and a security signal to the outside of the pachislot machine 1.

  A sub power supply device 48 is disposed on the left side of the amplifier board 45 when the inside of the cabinet 2a is viewed from the front. The sub power supply 48 is attached to the left side plate 20c of the cabinet 2a. The sub power supply device 48 supplies power with an AC voltage of 100 V to the power supply device 53 described later. Further, the power of the AC voltage 100V is converted into the power of the DC voltage and supplied to the amplifier board 45.

  A medal payout device (hereinafter referred to as a hopper device) 51, a medal auxiliary storage 52, and a power supply device 53 are disposed on the lower side of the cabinet 2a.

  The hopper device 51 (storage means) is attached to the center of the bottom plate 20b in the cabinet 2a. This hopper device 51 can accommodate a large amount of medals, and has a structure capable of discharging them one by one. For example, when the settlement button 27 (see FIG. 2) is pressed to settle the medals stored in the pachislot, the hopper device 51 discharges the stored medals by the number of credits. The medals paid out by the hopper device 51 are discharged from the medal payout port 32 (see FIG. 2).

  The medal auxiliary storage 52 stores medals overflowing from the hopper device 51. The medal auxiliary storage 52 is disposed on the right side of the hopper device 51 when the inside of the cabinet 2a is viewed from the front. The medal auxiliary storage 52 is engaged with the bottom plate 20b of the cabinet 2a, and is configured to be detachable from the bottom plate 20b.

  The power supply device 53 is disposed on the left side of the hopper device 51 when the inside of the cabinet 2a is viewed from the front, and is attached to the left side plate 20c. The power supply device 53 includes a power switch 53a and a power supply board 53b (see FIG. 14). The power supply device 53 converts the power of the AC voltage 100V supplied from the sub power supply device 48 into the power of the DC voltage necessary for each part, and supplies the converted power to each part.

  As shown in FIGS. 3, 4 and 6, the middle door 41 is arranged at the center of the back surface of the front door 2b, and is configured such that the reel display window 4 (see FIG. 4) can be opened and closed from the back side. Door stoppers 41a, 41b, and 41c are provided on the upper and lower portions of the middle door 41. The door stoppers 41a, 41b and 41c fix (prohibit) the opening operation of the middle door 41 in a state where the reel display window 4 is closed from the back side. That is, in order to open the middle door 41, it is necessary to rotate the door stoppers 41a, 41b, and 41c to release the middle door 41 from being fixed.

  A main control board case 55 that houses a main control board 71 (see FIG. 14) and three reels 3L, 3C, and 3R are attached to the middle door 41. Stepping motors are connected to the three reels 3L, 3C, 3R through gears having a predetermined reduction ratio.

As shown in FIG. 6, the main control board case 55 is provided with a setting key type switch 56. The setting key type switch 56 is used when changing the setting of the pachislot 1 or confirming the setting of the pachislot 1.
In the present embodiment, a main control board unit is configured by the main control board case 55 and the main control board 71 accommodated in the main control board case 55.

  The main control board 71 (first control unit) housed in the main control board case 55 constitutes a main control circuit 91 (see FIG. 15) described later. The main control circuit 91 is a circuit that controls the main flow of the game in the pachislot 1 such as determination of an internal winning combination, rotation and stop of the reels 3L, 3C, 3R, and determination of the presence or absence of winning. A specific configuration of the main control circuit 91 will be described later.

  A sub control board case 57 that accommodates the sub control board 72 (see FIG. 14) is disposed above the middle door 41, and a center speaker 58 is disposed above the sub control board case 57. The sub control board 72 housed in the sub control board case 57 constitutes the sub control circuit 101 (see FIG. 16). The sub control circuit 101 (second control unit) is a circuit that controls execution of effects by displaying images. A specific configuration of the sub control circuit 101 will be described later.

  A sub relay board 61 is disposed on the right side of the sub control board case 57 when the front door 2b is viewed from the back side. The sub relay board 61 relays the wiring connecting the sub control board 72 and the main control board 71. Further, it is a board that relays the wiring that connects the sub-control board 72 and the board disposed around the sub-control board 72. In addition, as a board | substrate arrange | positioned around the sub control board 72, LED board 62A, 62B, 62C mentioned later is mentioned.

  The LED boards 62A, 62B, and 62C are disposed on both sides of the sub control board case 57 when viewed from the back side of the front door 2b. These LED boards 62A, 62B, and 62C have a plurality of LEDs (Light Emitting Diodes) 85 (see FIG. 14) showing a specific example of the light source according to the effects executed by the control of the sub-control circuit 101 (see FIG. 16). ) To display a blinking pattern. Note that the pachislot machine 1 of the present embodiment includes a plurality of LED boards in addition to the LED boards 62A, 62B, and 62C.

  Below the sub-relay board 61, a 24h door opening / closing monitoring unit 63 is disposed. The 24h door opening / closing monitoring unit 63 stores the opening / closing history of the front door 2b. When the front door 2b is opened, a signal for displaying an error on the liquid crystal display device 11 is output to the sub control board 72 (sub control circuit 101).

  Below the middle door 41, a board speaker 64 and lower speakers 65L and 65R are arranged. The board speaker 64 faces the waist panel unit 31 (see FIG. 2), and the lower speakers 65L and 65R face the speaker holes 33L and 33R (see FIG. 2), respectively.

  Above the lower speaker 65L, a medal selector 201, a medal chute 202, and a door open / close monitoring switch 67 are disposed. The medal selector 201 is a device that determines whether or not the material and shape of the medal are appropriate, and guides the medal inserted into the medal insertion slot 21 to the hopper device 51 via the slope 203 or the medal. Guide to the chute 202. A specific configuration of the medal selector 201 will be described later.

  The medal chute 202 is a substantially Y-shaped cylindrical member, and guides the medal guided by the medal selector 201 and the medal discharged from the hopper device 51 to the medal payout opening 32 (see FIG. 2).

  The door open / close monitoring switch 67 is disposed on the left side of the medal selector 201 when the front door 2b is viewed from the back side. The door open / close monitoring switch 67 outputs a security signal for notifying the opening / closing of the front door 2b to the outside of the pachi-slot 1.

  Further, a door relay terminal plate 68 is disposed in a region below the reel display window 4 and opened and closed by the middle door 41 (see FIG. 4). The door relay terminal board 68 includes a main control board 71 (see FIG. 14) in the main control board case 55, various buttons and switches, a sub-control board 72 (see FIG. 14), a medal selector 201, and a game operation display board. It is a board | substrate which relays wiring with 81 (refer FIG. 14). Examples of the various buttons and switches include a BET button 22, a settlement button 27, a door open / close monitoring switch 67, a BET switch 77, a start switch 79, and the like, which will be described later.

<Composition of medal selector>
Next, a specific configuration of the medal selector 201 will be described with reference to FIGS. FIG. 7 is a perspective view of the medal selector 201 as viewed obliquely from the back of the pachislot machine 1 and shows a state in which the cover member 240 fixed to the medal selector 201 is removed. FIG. 8 is an exploded view of the medal selector 201. FIG. 9 is a perspective view of the medal selector 201 as viewed obliquely from the front of the pachi-slot 1. FIG. 10 is a rear view of a base plate portion 204 (to be described later) of the medal selector 201. FIG. 11 is a perspective view of a later-described select plate 207 of the medal selector 201. FIG. 12 is a diagram showing a medal path when the medal selector 201 guides the medal to the hopper device 51. FIG. 13 is a diagram showing a medal path when the medal selector 201 guides the medal to the medal chute 202. In addition, the arrow X shown in FIGS. 7-13 shows the left-right direction of the pachislot 1, the arrow Y shows the front-back direction of the pachislot 1, and the arrow Z shows the up-down direction. Note that each of the medal selector 201 of this embodiment and the medal selector 301, the medal selector 401, the medal selector 501, the medal selector 601, the medal selector 701, and the medal selector 801 in each modified example described later constitute a game medium detecting unit. .

  As shown in FIGS. 7 to 9, the medal selector 201 includes a base plate portion 204, a sub plate 205, a cancel shooter 206, a select plate 207 (guide means), and a medal solenoid 208 (driving means, see FIG. 9). ) And a camera unit 209 (imaging means or passing object detection means). Further, as shown in FIG. 7, a cover member 240 that covers the rear side in the front-rear direction of the pachislot 1 of the medal selector 201 is fixed to the medal selector 201. In FIG. 7, the cover member 240 removed from the medal selector 201 is indicated by a broken line. The cover member 240 can be set to a closed state that covers the rear side in the front-rear direction of the pachislot slot 1 in the medal selector 201 and an open state that exposes the rear side.

  The base plate portion 204 is a substantially plate-like member that constitutes the outer frame housing of the medal selector 201, and is molded so that both left and right end portions of the pachi-slot 1 bend to the rear of the pachi-slot 1. The base plate portion 204 has a rear surface 204b that is one plane orthogonal to the front-rear direction of the pachislot 1 and a front surface 204a (see FIG. 9) that is the other plane. On the rear surface 204b, a medal rail 210 (passage forming portion) is formed in a substantially L shape so as to be recessed forward of the pachislot 1. A plurality of protrusions 210 a are formed on the surface of the medal rail 210.

  At the upper end portion of the base plate portion 204, a medal entrance portion 211 that receives a medal inserted from the medal insertion port 21 (see FIG. 2) is provided. A medal inserted into the medal selector 201 from the medal entrance 211 moves along the medal rail 210 from above to below. A medal outlet portion 204c (see FIG. 8) is provided at the lower portion of the base plate portion 204. The medals that have moved in the medal selector 201 are discharged from the medal outlet 204c and are accommodated in the hopper device 51 via the slope 203 (see FIG. 4).

  A central hole 212 penetrating in the front-rear direction is formed at a substantially intermediate position of the medal rail 210, and an end of the medal pressure 213 (see FIG. 8) is exposed from the central hole 212. As shown in FIG. 9, the medal pressure 213 is rotatably supported by a shaft portion 214 provided on the front surface 204 a of the base plate portion 204. A coil spring 215 is attached to the shaft portion 214, and the medal pressure 213 is urged by the coil spring 215 so that the medal pressure 213 protrudes from the central hole 212.

  As shown in FIG. 9, a magnet 217 is provided on the front surface 204 a of the base plate portion 204. The magnet 217 attracts (magnetizes) an illegal medal that is not an appropriate material among medals moving on the medal rail 210.

  As shown in FIG. 8, an upper exposure hole 219 that penetrates in the front-rear direction and exposes a rear end portion of an after-medal pressure 218, which will be described later, is formed in a substantially central portion of the downstream region of the medal rail 210. . Further, a lower exposure hole 220 that penetrates in the front-rear direction and exposes a later-described medal stopper portion 227 of the select plate 207 is formed in the lower portion of the downstream area of the medal rail 210.

  Further, as shown in FIG. 10, six reference markers 260 are formed on the medal rail 210. The reference marker 260 is arranged in an imaging area A1 (indicated by a one-dot chain line in FIG. 10) that is an area on the medal rail 210 that the camera unit 209 images.

  The reference marker 260 includes an upper reference marker 261 and a lower reference marker 262. The upper reference marker 261 is arranged on the top of the medal rail 210 so as to be aligned in the left-right direction while being inclined. Further, the lower reference markers 262 are arranged at the lower part of the medal rail 210 so as to be arranged in the left-right direction while being inclined.

  In the image data of the imaging area captured by the camera unit 209, the reference marker 260 includes the luminance related to the pixel at the location where the reference marker 260 is formed, the luminance related to the pixel where the reference marker 260 is not formed, Are formed so as to be different from each other by a predetermined value or more. In the present embodiment, each reference marker 260 is formed by making a triangular hole in the medal rail 210. In addition, the formation aspect of the reference | standard marker 260 is not restricted to this, The shape of a hole can be selected suitably. Further, for example, the reference marker 260 may be formed on the medal rail 210 by printing a graphic having a color different from the color of the ground of the medal rail 210.

  As shown in FIG. 9, the medal solenoid 208 is formed in a plate shape with a solenoid body 208a, and a movable plate 208b supported by the solenoid body 208a so that one end and the other end are movable in the front-rear direction. It has. The after medal pressure 218 is pivotally supported on the front surface 204a of the base plate portion 204 so as to be rotatable. When the front end of the after medal pressure 218 is pressed rearward of the pachislot 1 by the movable plate 208b of the medal solenoid 208, the after medal pressure 218 rotates, and the rear end of the after medal pressure 218 has an upper exposure hole 219 ( (See FIG. 8).

  As shown in FIGS. 7 and 8, the cancel shooter 206 is a substantially plate-like member, and is molded so that both ends in the left-right direction of the pachislot 1 bend forward of the pachislot 1. The cancel shooter 206 is detachably fixed to the base plate portion 204 and covers the lower portion of the base plate portion 204 from the rear. The cancel shooter 206 guides the medals discharged without going through the medal outlet 204c to the medal chute 202 (see FIG. 4). A cutout portion 206 a that is cut out in a substantially rectangular shape is formed at the upper portion of the substantially central portion in the left-right direction of the cancel shooter 206.

  The cancel shooter 206 is provided with a notification LED 206c. The notification LED 206c constitutes notification means for lighting and notifying that an error has occurred in an AE correction process described later. Further, an initialization switch 206d, a color switch 206e, and a marking switch 206f are provided. The initialization switch 206d is operated when resetting various settings including deletion of various templates described later. The color switch 206e is operated when switching between valid and invalid color determination described later. The marking switch 206f is operated when switching between valid and invalid marking determination described later.

  As shown in FIGS. 7 and 8, the sub plate 205 is a plate-like member that covers the medal rail 210 from behind. The sub-plate 205 has a flat plate-like main body part 221 and a shaft part 222 provided on the upper part of the main body part 221. A through hole 221a penetrating in the front-rear direction is provided in a substantially central portion of the main body portion 221, and a downstream region is exposed from the substantially central portion of the medal rail 210 from the through hole 221a.

  The shaft portion 222 is supported by the base plate portion 204, and the sub-plate 205 is attached to the base plate portion 204 so as to be rotatable about the shaft portion 222. A coil spring 223 is attached to the shaft portion 222. Under normal conditions, the sub plate 205 is pressed against the base plate portion 204 side by the biasing force of the coil spring 223. At this time, a space through which medals can pass is formed between the sub plate 205 and the upper part of the medal rail 210 covered with the sub plate 205. That is, the sub plate 205 functions as a guide plate that allows the medal to pass therethrough.

Here, for example, when a medal jam occurs in the medal selector 201, the sub plate 205 can be rotated against the urging force of the coil spring 223 to eliminate the medal jam.

  As shown in FIG. 7, the select plate 207 is a member that guides a medal that moves in a substantially central portion of the medal rail 210 that is not covered by the sub plate 205. As shown in FIG. 11, the select plate 207 includes a substantially trapezoidal plate main body 224 and a pair of bearing portions formed by bending both left and right end portions of the plate main body 224 forward of the pachislot 1. 225. A flange portion 226 is formed on the upper portion of the plate main body 224. The flange portion 226 is formed by bending the pachislot 1 forward and bending the rear end portion upward. One bearing portion 225 is formed with a medal stopper portion 227 extending downward.

  As shown in FIG. 7, the plate main body 224 faces the substantially central portion of the medal rail 210 not covered by the sub plate 205 in the front-rear direction of the pachislot 1.

  As shown in FIG. 9, the select plate 207 is rotatably supported by a shaft portion 228 provided on the front surface 204 a of the base plate portion 204. The shaft portion 228 is provided with a coil spring 229 and biases the flange portion 226 forward of the pachislot 1. The flange portion 226 is in contact with one end portion of the movable plate portion 208b of the medal solenoid 208. When the medal solenoid 208 is in the ON state, the flange portion 226 is pressed against one end of the movable plate portion 208 b of the medal solenoid 208 and moves to the rear of the pachislot 1 against the biasing force of the coil spring 229. The rotation position of the select plate 207 at this time is referred to as a “guide position”. The distance between the plate body 224 of the select plate 207 at the guide position and the medal rail 210 is set to a predetermined distance that allows the medal to be guided to the hopper device 51 without discharging the medal to the cancel shooter 206 side. At this time, the medal stopper portion 227 does not protrude from the lower exposure hole 220 (see FIG. 8).

  When the medal solenoid 208 is in the OFF state, the flange portion 226 is released from the pressing of the medal solenoid 208 and moves forward of the pachislot 1 by the biasing force of the coil spring 229. The rotation position of the select plate 207 at this time is referred to as a “discharge position”. The distance between the plate body 224 of the select plate 207 at the discharge position and the medal rail 210 is set to be longer than a predetermined distance. At this time, the flange portion 226 that moves forward of the pachi-slot 1 is pressed, and one end of the movable plate portion 208 b of the medal solenoid 208 moves forward of the pachi-slot 1. Accordingly, the other end portion of the movable plate portion 208b of the medal solenoid 208 moves to the rear of the pachislot 1 and presses the front end portion of the after medal pressure 218. As a result, the after medal pressure 218 rotates and the rear end of the after medal pressure 218 is exposed from the upper exposure hole 219 (see FIG. 8).

  The medal stopper 227 does not protrude from the lower exposure hole 220 (see FIG. 8) when the select plate 207 is at the guide position, and protrudes from the lower exposure hole 220 when at the discharge position.

  As shown in FIG. 12, when the medal moving on the medal rail 210 meets the standard dimension, the select plate 207 at the guide position contacts the upper part of the moving medal, and the medal exit portion 204c (see FIG. 8). ) When the medal is guided by the select plate 207, the medal pressure 213 is pressed forward of the pachislot 1. In FIG. 12, illustration of the sub plate 205 and the cancel shooter 206 of the medal selector 201 is omitted.

  On the other hand, as shown in FIG. 13, the select plate 207 at the discharge position has a distance between the plate main body 224 and the medal rail 210 even when the medal moving on the medal rail 210 satisfies the standard dimension. Therefore, the medal cannot be guided to the medal outlet 204c (see FIG. 8). The medal is pushed out by the medal pressure 213, the after medal pressure 218 protruding from the upper exposure hole 219, or the medal stopper portion 227 protruding from the lower exposure hole 220, and discharged toward the cancel shooter 206. In FIG. 13, as in FIG. 12, illustration of the sub plate 205 and the cancel shooter 206 of the medal selector 201 is omitted.

  In this embodiment, the select plate 207 is normally positioned at the guide position. However, under a predetermined condition (for example, when a predetermined number of medals are inserted, when an error occurs, when a game starts, etc.), the select plate 207 is positioned at the discharge position. It is positioned.

  If the medal moving on the medal rail 210 has a smaller diameter than the standard dimension, even if the select plate 207 is in the guide position, the medal is not guided to the select plate 207 but pushed out to the medal pressure 213 and the cancel shooter 206 It is discharged toward

  As shown in FIGS. 7 and 8, the camera unit 209 includes a first substrate 230, a second substrate 231 and a lens (not shown), and whether or not an object moving on the medal rail 210 is a regular medal. Is a unit that outputs the determination result to the main control circuit 91. The first substrate 230 is provided with a CMOS image sensor 232 (see FIG. 17) and an LED 233 (see FIG. 17). The second substrate 231 is provided with a control LSI 234 (see FIG. 17) that is communicably connected to the CMOS image sensor 232 and the LED 233 and is controllably connected.

  The first board 230 and the second board 231 are connected by a BtoB (Board-to-Board) type connector (not shown), and by legs 235 provided at the corners of the boards 230 and 231. It is fixed. The specific configuration of the camera unit 209 circuit will be described later. In this embodiment, the camera unit 209 is described as having two substrates 230 and 231 and a lens. However, instead of this, a single substrate having the CMOS image sensor 232, the LED 233, and the control LSI 234 is provided. You may comprise a camera unit. An aperture mechanism may be added.

  The camera unit 209 is fixed by screwing the first substrate 230 into a screw hole 206b provided around a notch 206a at the top of the cancel shooter 206.

  The CMOS image sensor 232 (see FIG. 17) is provided at a substantially central portion of the first substrate 230. The CMOS image sensor 232 images the imaging area A1 (see FIG. 10) on the medal rail 210 via the notch portion 206a (see FIG. 8) of the cancel shooter 206, and controls the captured image data to the control LSI 234 (FIG. 17). Output).

  The LED 233 (see FIG. 17) emits light around the CMOS image sensor 232, and irradiates the object moving on the medal rail 210 with light. The control LSI 234 (see FIG. 17) determines whether the object moving on the medal rail 210 is a regular medal based on the image data output from the CMOS image sensor 232 and outputs the determination result to the main control circuit 91. To do. In this embodiment, the mode in which the camera unit 209 is fixed to the cancel shooter 206 by screwing in the screw hole 206b formed around the notch portion 206a has been described. However, the camera unit fixing mode is limited to this. Not. For example, an attachment rail is provided between the first substrate 230 and the second substrate 231, and a recess is provided in the upper part of the cancel shooter 206. The attachment rail and the cancel shooter 206 are fitted in the recess. May be fixed with screws or an adhesive.

<Configuration of circuits provided in pachislot>
Next, a configuration of a circuit included in the pachislo 1 will be described with reference to FIGS. First, the outline of the entire circuit provided in the pachislot machine 1 will be described with reference to FIG. FIG. 14 is a block configuration diagram of the entire circuit provided in the pachislot 1.

The pachi-slot 1 has a main control board 71 (first control means) disposed on the middle door 41 and a sub-control board 72 (control means, second control means) disposed on the front door 2b.
The main control board 71 includes a reel relay terminal board 74, a setting key switch 56, an external concentration terminal board 47, a hopper device 51, a medal auxiliary storage switch 75, and a power supply board 53b of the power supply 53. It is connected. The setting key switch 56, the external concentration terminal board 47, the hopper device 51, and the medal auxiliary storage switch 75 are connected to the main control board 71 via the cabinet-side relay board 44. Since the external concentration terminal board 47 and the hopper device 51 have been described above, description thereof will be omitted.

  The reel relay terminal plate 74 is disposed inside the reel body of each reel 3L, 3C, 3R. The reel relay terminal plate 74 is electrically connected to stepping motors (not shown) of the reels 3L, 3C, 3R, and relays signals output from the main control board 71 to the stepping motors.

  The medal auxiliary storage switch 75 passes through a switch through hole (not shown) of the medal auxiliary storage 52. The medal auxiliary storage switch 75 detects whether or not the medal auxiliary storage 52 is full of medals.

  A power switch 53 a is connected to the power supply board 53 b of the power supply device 53. The power switch 53a is turned on when supplying necessary power to the pachislot machine 1.

  The main control board 71 has a medal selector 201, a door open / close monitoring switch 67, a BET switch 77, a settlement switch 78, a start switch 79, a stop switch board 80, and a game operation display board 81 via a door relay terminal board 68. The sub-relay board 61 is connected. Since the door opening / closing monitoring switch 67 and the sub relay board 61 have been described above, the description thereof will be omitted. The circuit configuration of the medal selector 201 will be described later.

  The BET switch 77 detects that the BET button 22 has been pressed by the player. The settlement switch 78 detects that the settlement button 27 has been pressed by the player. The start switch 79 detects that the start lever 23 has been operated by the player (start operation).

  The stop switch substrate 80 is a substrate constituting a circuit for stopping the rotating reel and a circuit for displaying the stopable reel by an LED or the like. The stop switch substrate 80 is provided with a stop switch. The stop switch detects that each stop button 19L, 19C, 19R has been pressed by the player (stop operation).

  The game operation display board 81 displays the number of inserted medals on the 7-segment display 24 when accepting insertion of medals, when the three reels 3L, 3C, 3R are rotatable and when replaying. It is a substrate for making it. A 7-segment display 24 and an LED 82 are connected to the game operation display board 81. The LED 82 lights, for example, a mark for displaying the start of a game or a mark for performing a re-game.

  The sub control board 72 is connected to the main control board 71 via the door relay terminal board 68 and the sub relay board 61. A sound I / O board 84, LED boards 62A, 62B, and 62C, a 24h door open / close monitoring unit 63, and a medal selector 201 are connected to the sub control board 72 through a sub relay board 61. Since these LED boards 62A, 62B, 62C and the 24h door opening / closing monitoring unit 63 have been described above, the description thereof will be omitted.

  The sound I / O board 84 outputs sound to a center speaker 58, a board speaker 64, lower speakers 65L and 65R, and a speaker (not shown) provided on the front door 2b.

The sub-control board 72 is connected to a ROM cartridge board 86 and a liquid crystal relay board 87. The ROM cartridge substrate 86 and the liquid crystal relay substrate 87 are housed in the sub control board case 57 together with the sub control board 72.
The ROM cartridge substrate 86 is a substrate for managing production images (video), sound, LED substrates 62A and 62B, other LED substrates (not shown), and communication data. The liquid crystal relay substrate 87 is a substrate that relays wiring that connects the sub-control board 72 and the liquid crystal display device 11.

<Main control circuit>
Next, the main control circuit 91 constituted by the main control board 71 will be described with reference to FIG.
FIG. 15 is a block diagram illustrating a configuration example of the main control circuit 91 of the pachi-slot 1.

  The main control circuit 91 includes a microcomputer 92 installed on the main control board 71 as a main component. The microcomputer 92 includes a main CPU 93, a main ROM 94, and a main RAM 95. The main CPU 93 and the hopper device 51 described above constitute a game medium payout device of the present invention.

  The main ROM 94 is used to transmit various control commands (commands) to the control program executed by the main CPU 93 (for example, the program for executing the internal lottery process described above), the data table, and the sub-control circuit 101. Data etc. are stored. The main RAM 95 is provided with a storage area for storing various data such as an internal winning combination determined by execution of the control program.

  The main CPU 93 is connected to a clock pulse generation circuit 96, a frequency divider 97, a random number generator 98, and a sampling circuit 99. The clock pulse generation circuit 96 and the frequency divider 97 generate clock pulses. The main CPU 93 executes a control program based on the generated clock pulse. The random number generator 98 generates a random number in a predetermined range (for example, 0 to 65535). The sampling circuit 99 extracts one value from the generated random numbers.

The main CPU 93 counts the number of times pulses are output to the stepping motors of the reels 3L, 3C, 3R after detecting the reel index. Thereby, the main CPU 93 manages the rotation angle of each reel 3L, 3C, 3R (mainly, how many symbols the reel has rotated).
The reel index is information indicating that the reel has made one revolution. This reel index is provided at a predetermined position of each of the reels 3L, 3C, 3R, for example, with a light emitting unit and a light receiving unit, and between the light emitting unit and the light receiving unit by the rotation of each reel 3L, 3C, 3R. Detection is performed by a reel position detection unit (not shown) including a detection piece interposed therebetween.

  Here, the management of the rotation angle of each reel 3L, 3C, 3R will be specifically described. The number of pulses output to the stepping motor is counted by a pulse counter provided in the main RAM 95. Each time the output of a predetermined number of pulses (for example, 16 times) necessary for the rotation of one symbol is counted by the pulse counter, the symbol counter provided in the main RAM 95 is incremented by one. The symbol counter is provided for each reel 3L, 3C, 3R. The value of the symbol counter is cleared when a reel index is detected by a reel position detector (not shown).

  In other words, in the present embodiment, by managing the symbol counter, it is possible to manage how many symbols have been rotated since the reel index was detected. Therefore, the position of each symbol on each reel 3L, 3C, 3R is detected with reference to the position where the reel index is detected.

  As described above, when the maximum number of sliding symbols is set to four symbols, the symbol of the left reel 3L in the middle of the reel display window 4 when the left stop button 19L is pressed, and the four symbols. Each symbol within the range up to the previous symbol becomes a symbol that can be stopped at the middle stage of the reel display window 4.

<Sub control circuit>
Next, the sub control circuit 101 constituted by the sub control board 72 will be described with reference to FIG.
FIG. 16 is a block diagram illustrating a configuration example of the sub control circuit 101 of the pachi-slot 1.

  The sub control circuit 101 is electrically connected to the main control circuit 91 and performs processing such as determination and execution of effect contents based on a command transmitted from the main control circuit 91. The sub control circuit 101 basically includes a sub CPU 102, a sub RAM 103, a rendering processor 104, a drawing RAM 105, and a driver 106.

  The sub CPU 102 controls the output of video, sound, and light according to the control program stored in the ROM cartridge substrate 86 in accordance with the command transmitted from the main control circuit 91. The ROM cartridge substrate 86 basically includes a program storage area and a data storage area.

  A control program executed by the sub CPU 102 is stored in the program storage area. For example, the control program includes a main board communication task for controlling communication with the main control circuit 91 and an effect registration task for extracting and registering effect contents (effect data) by extracting effect random numbers. Is included. In addition, a drawing control task for controlling display of an image by the liquid crystal display device 11 (see FIG. 2) based on the determined contents of the effect, a lamp control task for controlling light output by a light source such as the LED 85, and the speakers 58, 64, and 65L. , 65R, etc., and a voice control task for controlling the sound output from the speaker.

  The data storage area includes a storage area for storing various data tables, a storage area for storing effect data constituting each effect content, and a storage area for storing animation data related to creation of video. Also included are a storage area for storing sound data related to BGM and sound effects, a storage area for storing lamp data related to the light on / off pattern, and the like.

  The sub RAM 103 includes a DRAM (Dynamic Random Access Memory) and an SRAM (Static Random Access Memory). The DRAM is a work RAM as volatile storage means. The SRAM is a backup RAM as a nonvolatile storage means that is backed up by a backup power source. The backup area composed of the SRAM of the sub-RAM 103 can store the data retained when the power is turned off when the power is turned off. The data in the backup area can be used. Further, the DRAM of the sub RAM 103 has a storage area for registering the determined contents and effects data, a storage area for storing various data such as an internal winning combination transmitted from the main control circuit 91, and other backup areas. A storage area is provided for storing unallocated data (data that can be deleted even when the power is turned off). Further, an error information history area and a first switch information storage area, which will be described later, are allocated to the backup area.

  The sub CPU 102, the rendering processor 104, the drawing RAM (including the frame buffer) 105, and the driver 106 create a video according to the animation data designated by the content of the presentation, and display the created video on the liquid crystal display device 11.

  Further, the sub CPU 102 causes a sound such as BGM to be output from a speaker such as speakers 58, 64, 65L, and 65R in accordance with the sound data specified by the contents of the effect. Further, the sub CPU 102 controls the turning on and off of the light source such as the LED 85 in accordance with the lamp data designated by the contents of the effect.

<Circuit configuration of medal selector>
Next, the circuit configuration of the medal selector 201 will be described with reference to FIG.
FIG. 17 is a block diagram illustrating a circuit configuration example of the medal selector 201.

As shown in FIG. 17, the medal selector 201 includes a camera unit 209, a medal solenoid 208, and a double photo sensor 502.
The medal selector 201 is connected to the main control board 71 via the door relay terminal board 68. Further, the medal selector 201 is connected to the sub control board 72 via the sub relay board 61. That is, the medal selector 201 is electrically connected to the main control circuit 91 and the sub control circuit 101.

  The main control circuit 91 can set the medal solenoid 208 of the medal selector 201 to the ON state or the OFF state. That is, the main control circuit 91 can move the select plate 207 to the guide position or the discharge position.

  Specifically, the main control circuit 91 outputs a medal insertion signal indicating that insertion is possible when the pachi-slot 1 is in a state where the medal can be inserted. In addition, the main control circuit 91 outputs a medal insertion signal having a content that cannot be inserted when the pachi-slot 1 is not in a state where the medal can be inserted. Here, “to output a medal insertion signal of the contents that can be inserted” means that a signal line between devices connected to the main control circuit 91 (medal solenoid 208 in the present embodiment) is turned on. is there. Further, “outputting a medal insertion signal with contents that cannot be inserted” means setting a signal line between devices connected to the main control circuit 91 (medal solenoid 208 in this embodiment) to an OFF state. . When the medal solenoid 208 detects that the signal line between the main control circuit 91 and the medal solenoid 208 is turned on, it sets itself. Further, when the medal solenoid 208 detects that the signal line between the main control circuit 91 and the medal solenoid 208 is in the OFF state, the medal solenoid 208 sets itself in the OFF state.

  The double photo sensor 502 of the medal selector 201 is connected to the main control board 71 via the door relay terminal board 68. The double photo sensor 502 includes a first photo sensor 503 and a second photo sensor 504.

  As shown in FIG. 8, the first photosensor 503 is provided in the vicinity of the medal outlet portion 204 c in the base plate portion 204 of the medal selector 201. The first photosensor 503 includes a photodiode (not shown) embedded on the medal rail 210 of the base plate portion 204, and a light emitter (not shown) that irradiates light (infrared light) to the photodiode. . The photodiode and the light emitter face each other more than the thickness of the medal. When the select plate 207 is at the guide position, the medal moving on the medal rail 210 can pass between the photodiode and the light emitter. It has become.

  The light emitter always emits a predetermined amount of light. When the photodiode receives more than a predetermined amount of light from the light emitter, the first photosensor 503 outputs a high level signal. On the other hand, when the amount of light received by the photodiode is less than the predetermined light amount, the first photosensor 503 outputs a low level signal (medal detection signal). Therefore, when the medal blocks light from the light emitter when passing between the photodiode and the light emitter, the first photosensor 503 outputs a medal detection signal.

  The second photosensor 504 moves on the medal rail 210 closer to the medal outlet 204c in the base plate portion 204 of the medal selector 201 and closer to the first photosensor 503 than the first photosensor 503. It is provided downstream in the movement direction of medals. Since other points are the same as those of the first photosensor 503, description thereof is omitted.

  In the present embodiment, the first photosensor 503 and the second photosensor 504 constituting the double photosensor 502 block the light of the light emitter by passing a medal between the photodiode and the light emitter. In the above description, the shielding type sensor system that detects the passing object (that is, the detection system that detects when the state of the photodiode changes from the on state to the off state) has been described. However, the mode of detecting a medal with a photodiode is not limited to this. For example, a so-called reflective sensor system is adopted in which a photodiode and a light emitter are arranged on the left or right or top and bottom, and the photodiode receives light reflected from the medal that passes through the light of the light emitter. May be. Alternatively, the first photosensor 503 may be a shielding type, the second photosensor 504 may be a reflection type, or the reverse combination, and these sensor methods may be appropriately selected and employed depending on the position where the photodiode is disposed. Good.

  As described above, the first photosensor 503 is provided in the vicinity of the medal outlet portion 204c, and the second photosensor 504 is provided downstream of the medal rail 210 with respect to the first photosensor 503. Therefore, in the first photo sensor 503 and the second photo sensor 504, the select plate 207 is in the guide position, and the medal moving to the medal outlet 204c (see FIG. 8) side is detected, but the select plate 207 is in the discharge position. The medal guided to the medal chute 202 (see FIG. 6) is not detected.

  The medal detection signals output from the first photosensor 503 and the second photosensor 504 are input to the main control board 71 (main control circuit 91) via the door relay terminal board 68. The main CPU 93 (see FIG. 15) of the main control board 71 detects the medal detection signal input from the first photosensor 503, and then receives the medal detection signal input from the second photosensor 504 within a predetermined time. When detected, the number of inserted medals is incremented by 1 to the value of the inserted number counter which is a counter provided for the main CPU 93 to count. When the value of the inserted number counter is the maximum value (for example, 3), 1 is added to the value of a credit counter that is a counter provided for the main CPU 93 to count the number of credited medals.

  When the credit counter is the maximum value (for example, 50), the main control circuit 91 sets the medal solenoid 208 of the medal selector 201 to the OFF state. As a result, the select plate 207 (see FIG. 8) is positioned at the “discharge position”, the medal cannot be inserted, and the medal inserted after the credit counter reaches the maximum value is placed in the medal chute 202 (see FIG. 6). Guide and discharge from the medal payout port 32 (see FIG. 2) to the medal tray unit 34.

  Note that the main control circuit 91 sets the medal solenoid 208 of the medal selector 201 to the OFF state even after the start lever 23 is operated by the player in the unit game.

  Further, when the main CPU 93 receives the medal detection signal in the order of the medal detection signal input from the second photosensor 504 and the medal detection signal input from the first photosensor 503, the medal moves on the medal rail 210. It is detected that a so-called retrograde error has occurred in which the movement direction is different (reverse) from the proper movement direction.

  Further, even if a predetermined time has elapsed after the main CPU 93 detects the medal detection signal, the medal detection signal is continuously output from either or both of the first photosensor 503 and the second photosensor 504. If the medal detection signal from the second photosensor 504 cannot be detected even after a lapse of a certain time from the detection of the medal detection signal from the first photosensor 503, the medal stays on the medal rail 210. Detects that a medal clogging error has occurred.

  When the main control circuit 91 (main CPU 93) detects a retrograde error or a medal jamming error, the main control circuit 91 (main CPU 93) forcibly interrupts the game and causes the 7-segment display 24 (see FIG. 2) to display an error code corresponding to the detected error content. Is displayed, and an error command corresponding to the detected error content is transmitted to the sub-control circuit 101 to notify the error via the sub-control circuit 101. For example, an error screen indicating the content of the error is displayed on the liquid crystal display device 11 (a screen in which a square frame of “CE” or “CR” in FIG. 52 described later is highlighted), or the sub-control circuit 101 displays the error screen. When a sub 7-segment display (not shown) to be controlled is provided, a predetermined display is displayed on the sub 7-segment display.

  The sub control circuit 101 receives a determination result of color determination described later, a determination result of engraving determination, various signals and commands from the control LSI 234 of the medal selector 201.

  The camera unit 209 includes a control LSI 234, a CMOS image sensor 232, and an LED 233. The control LSI 234 of the camera unit 209 is configured by an ASIC (Application Specific Integrated Circuit), and is electrically connected to the CMOS image sensor 232 and the LED 233. The control LSI 234 controls the light emission of the LED 233. Further, the control LSI 234 determines whether or not the object moving on the medal rail 210 is a regular medal based on the image data output from the CMOS image sensor 232, and the determination result is sent from the UART 252 described later to the sub relay board. 61 to the sub control board 72 (sub control circuit 101).

The CMOS image sensor 232 includes an exposure time setting mechanism that sets the exposure time (shutter speed) in 1 to 25 stages. The exposure time is set to extend by 7 μs every time one step is increased. In this embodiment, the initial value of the exposure time (the value when the pachislot 1 is turned on) is set to stage 10, that is, 70 μsec. Therefore, in this embodiment, the exposure time can be set in a range from 70 μsec to a maximum of 175 μsec (exposure time corresponding to the stage 25).
In the present embodiment, the adopted CMOS image sensor 232 is a CMOS image sensor having a resolution of 648 × 488 pixels and a frame rate of 240 fps (Frames Per Second).

The control LSI 234 is electrically connected to the notification LED 206c via the GPIO 250. The notification LED 206c is turned on and off in response to an instruction from the control LSI 234.
The control LSI 234 is electrically connected to the initialization switch 206d, the color switch 206e, the marking switch 206f, and the GPIO 250. When the initialization switch 206d is operated (turned on) during energization, the control LSI 234 performs initialization processing. In the initialization process, the control LSI 234 deletes various parameters and templates stored in the SRAM 243 and the flash memory 244 described later, and sets (resets) initial values to these parameters.

  The color switch 206e can be set to an ON / OFF state. When the color switch 206e is set to the ON state, the control LSI 234 validates the color determination and sets the value of the color determination result included in the determination completion command described later to “1” (determination OK) according to the actual determination result. Alternatively, it is set to “0” (determination NG). On the other hand, when the color switch 206e is set to the OFF state, the control LSI 234 invalidates the color determination and sets the value of the color determination result included in the determination completion command described later to “1” (determination) regardless of the actual determination result. OK). That is, the color switch 206e is set to the ON state when the color determination is valid, and is set to the OFF state when it is invalid.

  The stamp switch 206f can be set to an ON / OFF state. When the stamp switch 206f is set to the ON state, the control LSI 234 validates the stamp determination, and sets the value of the stamp determination result included in the determination completion command described later to “1” (determination OK) according to the actual determination result. Alternatively, it is set to “0” (determination NG). On the other hand, when the marking switch 206f is set to the OFF state, the control LSI 234 invalidates the marking determination, and sets the value of the marking determination result included in the determination completion command described later to “1” (determination) regardless of the actual determination result. OK). That is, the marking switch 206f is set to the ON state when the marking determination is valid, and is set to the OFF state when it is invalidated.

  In the present embodiment, the control LSI 234 sets the validity / invalidity of the color determination according to the ON / OFF state of the color switch e when the power is turned on, and also according to the ON / OFF state of the stamp switch f when the power is turned on. Enable / disable engraving judgment. Even if these switches are operated after the power is turned on, the validity / invalidity of the color determination and the marking determination set according to the state of the switch when the power is turned on is not changed. The control LSI 234 acquires the ON / OFF states of the initialization switch 206d, the color switch 206e, and the marking switch 206f at a predetermined cycle (for example, a 10 msec cycle). This cycle is set shorter than a cycle for transmitting a medal selector no-operation command to be described later.

<Circuit configuration of control LSI>
Next, the circuit configuration of the control LSI 234 will be described with reference to FIG.
FIG. 18 is a block diagram illustrating a circuit configuration example of the control LSI 234.

  The control LSI 234 includes a host controller 241, an image recognition DSP (digital signal processor) circuit 242, an SRAM (Static Random Access Memory) 243 to which a backup power supply (not shown) is connected, a flash memory 244, an ISP (Image Signal Processing) circuit 245. And a medal count circuit 246. The control LSI 234 includes a color recognition circuit 247, a fish-eye correction scaler circuit 248, an image recognition accelerator circuit 249, a GPIO (General Purpose Input / Output) 250, and a UART (Universal Asynchronous Receiver Transmitter) 252. These devices constituting the control LSI 234 are connected to each other via a bus, and the control LSI 234 of this embodiment employs AXI (Advanced eXtensible Interface) as a bus protocol.

  The control LSI 234 includes an ISI (Image Sensor Interface) circuit 251. The ISI circuit 251 is electrically connected to the CMOS image sensor 232 and the ISP circuit. The ISI circuit 251 converts the image data transmitted from the CMOS image sensor 232 by the LVDS (Low voltage differential signaling) method into an RGB Bayer image and outputs it. At this time, the RGB image output from the ISI circuit 251 is given a unique image ID. This image ID is carried over to data after various image conversions to be described later. For this reason, each determination result can be linked | related based on image ID succeeded to the data concerning the various determinations mentioned later. That is, when a medal is reflected in the RGB image, these determination results for the medal can be associated.

<ISP circuit>
When an RGB Bayer image is output from the ISI circuit 251 (RGB Bayer image is input), the ISP circuit 245 outputs a VSYNC (Vertical Synchronization) interrupt signal to the host controller 241.
Further, the ISP circuit 245 performs image correction processing for subjecting the RGB Bayer image output from the ISI circuit 251 to lens distortion correction processing and projective transformation (homography) processing.

  The lens distortion correction process is a process for correcting distortion caused by the characteristics of the lens in the camera unit 209 on the image data captured by the CMOS image sensor 232 in order to increase the accuracy of various determination / determination processes described later. is there.

  For example, when a convex lens is employed as the lens of the camera unit 209, the thickness of the lens end is thinner than the thickness of the central portion of the lens, so that distortion as shown in FIG. 19 occurs. In FIG. 19, the imaging area A1 of the CMOS image sensor 232 and the image data G1 of the imaging area A1 captured by the CMOS image sensor 232 are schematically shown. The black dots in the image data G1 represent locations corresponding to the vertices of each grid in the imaging area A1.

  As shown in FIG. 19, in the image data G1, a relatively large distortion occurs at the end compared to the center. The ISP circuit 245 performs lens distortion correction processing based on various correction parameters set in advance to process the image data G1 (RGB Bayer image output from the ISI circuit 251). Specifically, the image data G1 is complemented so that the position of the black dot of the image data G1 is the same position as the vertex of the grid of the corresponding imaging region A1. This suppresses the influence of this distortion on various types of discrimination processing described later.

  Note that the various correction parameters are defined in advance in the program based on the prior characteristic evaluation for the lens employed in the camera unit 209. The various correction parameters may be stored in the flash memory 244 and referred to the ISP circuit 245 during the lens distortion correction process.

The projective transformation process is a process of correcting the image data so that the displacement of the mounting position of the camera unit 209 does not affect the accuracy of various determination / determination processes described later.
For example, when the camera unit 209 is attached to the cancel shooter 206 at an angle other than a suitable angle, as shown in FIG. 20A, an image area A2 required for various determination / determination processes described later is distorted and imaged. There is a case. In the projective transformation process, this distortion is corrected, and the image data is complemented with a mode suitable for various discrimination / determination processes to be described later.

  Specifically, in the projective transformation process, the ISP circuit 245 analyzes the RGB Bayer image after the lens distortion correction process, and detects the positions (coordinates: x, y) of at least four reference markers 260 in the RGB Bayer image. To do.

Next, the position of the reference marker 260 (coordinates: u, v) in image data suitable for improving the accuracy of various determination processes described later, which are defined in advance in the program, corresponding to the detected four reference markers. Based on the following formulas 1 and 2, conversion coefficients a, b, c, d, e, f, g, and h are calculated.
u = (x * a + y * b + c) / (x * g + y * h + 1) Formula (1)
v = (x × d + y × e + f) / (x × g + y × h + 1) (2)

  Then, the calculated conversion coefficients a, b, c, d, e, f, g, h, and the coordinate values of each pixel in the RGB Bayer image after the lens distortion correction process are substituted into the above-described Expression 1 and Expression 2. The coordinates after conversion for each pixel are calculated, and this RGB Bayer image is processed so that each pixel is positioned at the calculated coordinates after conversion. FIG. 20B schematically shows the image area A2 shown in FIG. 20A in the RGB Bayer image after the projective transformation processing.

  In the present embodiment, the mode in which the position (coordinates: u, v) of the reference marker 260 in image data suitable for improving the accuracy of various determination processes is defined on the program has been described. However, instead of this, for example, the position of the reference marker 260 may be stored in the flash memory 244 and referred to by the ISP circuit 245 during the projective transformation process.

  Next, the ISP circuit 245 performs color conversion processing for converting the RGB Bayer image after the lens distortion correction processing and the projective conversion processing into various formats. In the color conversion process, the ISP circuit 245 converts the RGB Bayer image into image data (YUV image data) corresponding to the YUV color space, and data relating to luminance in the YUV image data (hereinafter “grayscale image data”). Are output to the medal count circuit 246 (output to a predetermined area of the SRAM 243 referenced by the medal count circuit 246). Further, the gray scale image data is stored in the SRAM 243. The SRAM 243 is provided with a storage area capable of storing a predetermined number of gray scale image data. When the number of grayscale image data stored in the SRAM 243 reaches the upper limit, the stored order is overwritten from the old grayscale image data.

  In the color conversion process, the ISP circuit 245 converts the RGB Bayer image into image data (HSV color space) corresponding to a color space (HSV color space) composed of three components (H: hue, S: saturation, V: lightness). Image data) and output the HSV image data to the color recognition circuit 247 (output to a predetermined area of the SRAM 243 referenced by the color recognition circuit 247).

  In addition, when the RGB circuit image is output from the ISI circuit 251 when the power of the pachislot machine 1 is turned on (an RGB Bayer image is input), the ISP circuit 245 determines whether or not a predetermined image is included in the output image. AE (Auto Exposure) determination processing is performed to determine whether or not. In the present embodiment, the predetermined image is an image of the ridge 210a (see FIG. 8) formed on the surface of the medal rail 210. That is, in the present embodiment, the ISP circuit 245 constitutes an image determination unit that determines whether or not a predetermined image is included in the image data.

  When the ISP circuit 245 can extract a linear component having a predetermined length or more from the image output from the ISI circuit 251, the ISP circuit 245 determines that the image of the protruding portion 210 a is included in the output image, and extracts it. When it cannot, it determines with the image of the protrusion part 210a not being included in the output image. Extraction of a linear component having a predetermined length or more from the output image is performed by, for example, performing a Hough transform process on the output image, but the present invention is not limited to this, and other feature extraction methods are used. Also good.

  When the ISP circuit 245 determines that the image output from the ISI circuit 251 includes the image of the protrusion 210a, the ISP circuit 245 does not output the determination result of the AE determination process to the host controller 241. The AE determination process is not performed on the image output from the ISI circuit 251.

  On the other hand, when the ISP circuit 245 determines that the image output from the ISI circuit 251 does not include the image of the protrusion 210a, the ISP circuit 245 outputs the determination result of the AE determination process to the host controller 241. Further, the ISP circuit 245 outputs an image from the ISI circuit 251 until the exposure time of the CMOS image sensor 232 is set to the upper limit of 175 μsec (exposure time corresponding to step 25) in the present embodiment. AE determination processing is performed on the output image.

  In the present embodiment, the aspect in which the predetermined image is the ridge 210a formed on the surface of the medal rail 210 has been described. However, the present invention is not limited to this, and the predetermined image may be, for example, the reference marker 260 formed on the medal rail 210. Moreover, although the aspect which determines whether a linear component can be extracted from the output image was demonstrated, you may perform the determination based not only on this but the angle-of-view intensity | strength of the extracted linear component.

<Color recognition circuit>
The color recognition circuit 247 performs color determination processing based on the hue and saturation in the HSV image data output from the ISP circuit 245. The color determination processing includes medal detection processing, threshold determination processing, saturation / hue multiplication processing, color template generation processing, and color template comparison processing.

(1) Medal Detection Processing In the color determination processing, the color recognition circuit 247 stores the HSV image data output from the ISP circuit 245 in the SRAM 243. The SRAM 243 is provided with a storage area capable of storing a predetermined number of HSV image data. When the number of HSV image data stored in the SRAM 243 reaches the upper limit, the stored order is overwritten from the old HSV image data.

  The color recognition circuit 247 performs a medal detection process for determining whether or not a medal image is included in the HSV image data output from the ISP circuit 245. Specifically, the difference between the HSV image data output from the ISP circuit 245 this time and the background HSV image data stored in the SRAM 243 is detected, and if the difference portion matches the medal shape, the medal Is determined to be included. The background HSV image data is HSV image data that does not include an image of a medal. When the medal is not moving on the medal rail 210, for example, an image captured by the CMOS image sensor 232 immediately after the power is turned on. The data is obtained by the ISP circuit 245 converting the data into HSV image data. In the present embodiment, the ISP circuit 245 stores the obtained background HSV image data in the SRAM 243. Whether or not the detected difference portion matches the medal shape is determined by comparing with the medal shape HSV image data stored in the flash memory 244 in advance.

(2) Threshold Determination Processing When it is determined that the medal image is included in the HSV image data, the color recognition circuit 247 performs threshold determination processing based on the HSV image data. In the threshold determination processing, the color recognition circuit 247 is in a predetermined area of the medal image in the HSV image data, for example, a substantially square area including the center of the medal in the present embodiment (hereinafter, sometimes referred to as “medal area”). The saturation values of all the pixels are integrated, and the hue values are integrated. Then, the average saturation value and the average hue value are calculated by dividing the integrated value by the number of pixels in the medal area, and the position on the threshold graph shown in FIG. 21 is specified based on the calculated values.

  Here, the threshold graph of FIG. 21 is a graph in which the vertical axis represents the saturation value and the horizontal axis represents the hue value. In the threshold graph, the graph is divided into an allowable region and a non-permissible region based on a predetermined formula. In FIG. 21, the background of the allowable area is represented by a white background, and the background of the non-allowable area is represented by shading.

  If the position on the threshold graph based on the average saturation value and the average hue value is within the allowable region, the color determination process is continued. On the other hand, if it is within the non-allowable area, “threshold value determination impossible” is stored in the color determination storage area of the SRAM 243 as the determination result of the color determination process, and the color determination process is terminated. Note that a predetermined number of determination results can be stored in the color determination storage area of the SRAM 243, and when the stored determination results reach the upper limit number, the stored determination results are overwritten from the earlier determination results.

  Instead of the above, the color recognition circuit 247 specifies the position on the threshold graph shown in FIG. 21 based on the saturation value and the hue value of each pixel in the medal area. Also good. In this case, it is determined whether or not the number of pixels positioned in the non-allowable area exceeds a predetermined number, for example, 20% of the number of pixels in the medal area. If not, the color determination process is continued and exceeded. In this case, “threshold value determination impossible” may be stored in the SRAM 243 as the determination result of the color determination process, and the color determination process may be terminated.

  Further, the allowable region and the non-permissible region in the threshold graph can be set as appropriate. For example, in addition to the non-permissible area in FIG. 21, when the saturation value is equal to or greater than a predetermined value, for example, 90 or greater, a non-permissible area positioned in the non-permissible area may be provided.

(3) Saturation / Hue Multiplication Processing After the threshold determination processing, the color recognition circuit 247 performs saturation / hue multiplication processing in the threshold determination processing. In the saturation / hue multiplication process, the saturation value of each pixel in the medal area is multiplied by the hue value, and the value calculated by the multiplication is stored in the SRAM 243 in association with the position of the pixel. In the following description, a group of data stored by associating the multiplication value of the saturation value and the hue value of each pixel in the medal area with the position of the pixel is referred to as “color determination data”. There is.

(4) Color template generation process The color template generation process is a process of generating (creating) a color template used in a color template comparison process described later. In the color template generation process, the color recognition circuit 247 compares the color determination data relating to each medal until the number of medals inserted after power-on reaches the specified initial number of inserted medals, 50 in this embodiment, and matches. Or color determination data similar to a predetermined degree are grouped.

  For example, the color recognition circuit 247 compares the multiplication value of the saturation value and the hue value with respect to the data for color determination related to 50 medals for each position of the associated pixel. Then, when the number of multiplication values that coincide or fall within a predetermined error range (for example, ± 5) is a predetermined number or more (for example, 80% or more of all the multiplication values), these color determination data are grouped. .

  Next, the color recognition circuit 247 selects the upper four groups in the descending order of the number of color determination data to which they belong. Then, for each of the selected top four groups, one arbitrary color determination data is selected, and the four color determination data are stored as color templates in the storage area for storing the color template in the SRAM 243. For each of the selected top four groups, instead of selecting any one color determination data, the average value of the color determination data belonging to the same group (the average value of the multiplication values for each pixel) ) May be generated to generate a color template. Further, the color template stored in the SRAM 243 may be erased by initialization processing (not shown) of the host controller 241 when the gaming machine is turned on.

  As described above, by generating a color template, for example, when two kinds of medals having different markings (patterns) and colors on the front and back are used as regular medals, and the color template is stored in the storage area of the SRAM 243. If not stored, by inserting 50 of these regular medals after the power is turned on, four types of color templates relating to the front and back of these two types of medals can be generated. In addition, when the color template is not stored in the storage area of the SRAM 243 and there are one kind of 50 regular medals inserted after the power is turned on, two kinds of colors related to the front and back of the regular medals A template is generated, and two types of generated color templates are used in the color template comparison process described later.

  In addition, when the color template is not stored in the storage area of the SRAM 243, the color determination data relating to each medal until the number of medals inserted after power-on reaches the specified initial number of sheets, in this embodiment, 50 is It is generated in response to an instruction from the host controller 241. When the medal count circuit 246 described later determines that the medal has passed on the medal rail 210, the host controller 241 triggers HSV image data a predetermined time before (ie, a predetermined frame before) the determination. Is used to instruct the color recognition circuit 247 to generate color determination data. The predetermined time is set in advance based on experiments and simulations so that the HSV image data before the predetermined time always includes a medal image.

  The color determination data is generated through the above-described medal detection process, threshold determination process, and saturation / hue multiplication process, and is stored in the color determination data storage area of the SRAM 243. When the number of color determination data stored in the color determination data storage area reaches 50, that is, when color determination data relating to 50 medals is created, the color recognition circuit 247 executes color template generation processing. To do.

  In the color template generation process, when a color template cannot be created because, for example, color determination data similar to a predetermined degree cannot be grouped, the color recognition circuit 247 requests the host controller 241 to transmit a medal selector error command. . The host controller 241 transmits a medal selector error command in response to the request. The value DAT0 of the medal selector error command is set to “4” indicating “color template generation error”. Details of the medal selector error command will be described later.

(5) Color template comparison processing If the medal detection processing after the color template generation processing determines that a medal image is included, the color recognition circuit 247 performs color template comparison processing.

  In the color template comparison process, for the HSV image data determined to contain the medal image, the color determination data created through the threshold determination process and the saturation / hue multiplication process are compared with the color template. Then, it is determined whether or not they match or are similar to a predetermined degree, and “Yes” or “No” is stored in the color determination storage area of the SRAM 243 as the determination result. In this embodiment, since up to four color templates are used, determination results for up to four templates are stored in the SRAM 243. In the color template comparison process, the color determination result is stored in the color determination storage area of the SRAM 243. Here, as the color determination result, when “Yes” is stored as the determination result for at least four templates, “Decision OK” is stored, and when “No” is stored in all. Stores “determination NG”. Accordingly, in one color template comparison process, a maximum of four determination results (allowed or not) for up to four color templates and one color determination result (determination OK or determination NG) based on these determination results are stored. The When the color recognition circuit 247 stores the color determination result in the color determination storage area of the SRAM 243, the color recognition circuit 247 stores the above-described image ID inherited by the HSV image data related to the determination in association with the color determination result. In addition, a predetermined number of determination results can be stored in the color determination result area, and when the stored determination results reach the upper limit number, the stored order is overwritten from the earlier determination result.

  For example, the color recognition circuit 247 compares the product of the color determination data, the saturation value in the color template, and the hue value for each associated pixel position. Then, when the number of multiplication values that match or are within a predetermined error range (for example, ± 5) is equal to or greater than a predetermined number (for example, 80% or more of all the multiplication values), it is determined that they match or are similar to a certain degree. It should be noted that the criteria for determining whether or not they match or are similar to a predetermined degree in this process can be set as appropriate.

  As described above, in the color determination process, the threshold value determination process is performed, and the color template comparison process is performed, and the color determination data is compared with the color template to determine whether they match or are similar to a predetermined degree. The color recognition circuit 247 constitutes a game medium determination unit that determines whether an object that has passed on the medal rail 210 is a regular medal.

<Medal count circuit>
The medal count circuit 246 performs count processing based on the gray scale image data output from the ISP circuit 245. The count process includes a medal image determination process, a medal position detection process, and an order determination process.

(1) Medal image discrimination process In the count process, the medal count circuit 246 first performs a medal image discrimination process. In the medal image determination process, the medal count circuit 246 determines whether or not the grayscale image data output from the ISP circuit 245 includes a medal image. Specifically, a difference is detected for each pixel of the grayscale image data output from the ISP circuit 245 and the background grayscale image data stored in the SRAM 243 this time, and formed by a plurality of pixels from which the difference is detected. If the shape to be matched matches the medal shape template data stored in the flash memory 244, it is determined that a medal image is included. The background grayscale image data is grayscale image data that does not include an image of a medal. When the medal is not moving on the medal rail 210, for example, immediately after the power is turned on, the CMOS image sensor 232 captures an image. The obtained image data is obtained by the ISP circuit 245 converting it to gray scale image data. In the present embodiment, the ISP circuit 245 stores the obtained background grayscale image data in the SRAM 243. In the present embodiment, the medal count circuit 246 detects the difference between the background grayscale image data and the grayscale image data output from the ISP circuit 245, and the shape formed by the plurality of pixels from which the difference is detected is a medal. Whether or not the image of the medal is included is determined based on whether or not it matches the shape. However, the present invention is not limited to this, and it may be determined that a medal image is included based on whether or not a part of a shape formed by a plurality of pixels in which a difference is detected matches a part of the medal shape. Alternatively, it may be determined that a medal image is included when the number of detected difference pixels is greater than or equal to a certain number.

(2) Medal Position Detection Processing Next, the medal count circuit 246 is the gray scale image data that has been determined to be the gray scale image data output from the ISP circuit 245 and includes a medal image in the medal image determination processing. The medal position detection process is performed on the image data. In the medal position detection process, the medal count circuit 246 determines whether or not a medal image exists in a predetermined determination area in the grayscale image data, and stores the determination result in the SRAM 243.

  The predetermined determination area is a plurality of rectangular areas in the grayscale image data G2. In this embodiment, as shown in FIGS. 22 to 24, the determination areas A1 to A4, B1 to B4, C1, and C2 are used. , D1 to D4, E, and F, a total of 16 determination areas are set. 22A to 22C, FIGS. 23D to F, and FIG. 24G are diagrams for explaining the relationship between the determination area and the medal M that passes on the medal rail 210 and is discharged from the medal outlet portion 204c. FIG. 24H is a diagram for explaining the relationship between the medal guided by the medal chute 202 and the determination area.

  Each determination area is preliminarily defined on the program by defining the coordinate value (X, Y) of the corner of each determination area in the grayscale image data G2 so that a plurality of pixels are included in the determination area. ing. For example, as shown in FIG. 25, the determination area of C1 includes eight pixels in the area, and the coordinate values (450, 95), (453, 95), (450, 96), ( 453, 96) define the position. In FIG. 25, one square of the grid represents one pixel.

  As shown in FIGS. 22A to C, FIGS. 23D to F, and FIG. 24G, the determination areas A1 to A4 and B1 to B4 pass on the medal rail 210 and are below the image of the medal M that is discharged from the medal outlet portion 204c. It is arranged to overlap. In addition, the determination areas C1 and C2 are arranged so as to pass on the medal rail 210 and overlap with the upper part of the image of the medal M discharged from the medal outlet 204c. The determination areas E and F are arranged so as not to overlap the image of the medal M passing through the medal rail 210 and discharged from the medal exit portion 204c.

  Further, as shown in FIG. 24H, the determination area F is arranged below the grayscale image data G2 so as to overlap the image of the medal M when the medal is guided to the medal chute 202. The determination area E is located above the route of the medal M, and is arranged above the grayscale image data G2 so as to overlap images of various instruments used for fraud.

  The medal count circuit 246 calculates a luminance difference value of each pixel in each determination region of the grayscale image data and background grayscale image data to be processed, and calculates the number of pixels having the calculated difference value equal to or larger than a threshold value. Count for each judgment area. Then, the medal count circuit 246 determines whether or not the number of counted pixels is greater than or equal to a predetermined number (for example, 1 in the present embodiment) for each determination area. It is determined that a medal image exists (there is a medal) in the determination area. On the other hand, when it is determined that the number of counted pixels is less than the predetermined number, it is determined that there is no medal image (no medal) in the determination area. In this embodiment, the aspect of using grayscale image data in this processing has been described. However, the present invention is not limited to this. For example, for color determination generated by multiplying the saturation and hue used in the color determination processing described above. Data may be used.

  In addition, the medal count circuit 246 performs medal edge detection processing on a determination region in which it is determined that a medal image is present (there is a medal) in the medal position detection processing.

  The medal edge detection process is a process for detecting an outer edge (edge) of a medal based on an arrangement of pixels whose luminance difference value is less than a threshold value in a determination area where it is determined that a medal image exists. In the present embodiment, the movement direction of medals is from left to right in FIGS. Therefore, in the determined determination area where the medal image exists, if there is at least one pixel on the right side whose luminance difference value does not satisfy the threshold value, the medal count circuit 246 determines the front edge in the movement direction of the medal (movement destination direction). It is determined that there is a medal edge.

  On the other hand, if there is at least one pixel on the left side whose luminance difference value is less than the threshold value in the determined determination area where a medal image exists, the medal count circuit 246 determines the rear edge (after movement) in the movement direction of the medal. (Direction medal edge) is determined to exist. When there is no pixel whose luminance difference value does not satisfy the threshold value, the medal count circuit 246 determines that there is no outer edge of the medal in the determination area.

  For example, in the determination area C1 illustrated in FIG. 25, in any of the pixels 5C to 8C that are pixels on the right side, if there is even one pixel whose luminance difference value does not satisfy the threshold value, the movement direction medals It is determined that there is an edge. On the other hand, if any one of the pixels 1C to 4C located on the left side has a luminance difference value less than the threshold value, it is determined that there is a post-movement direction medal edge.

  For determination areas E and F, the movement direction of medals or various instruments is considered to be the downward direction from the top in FIGS. When there is even one pixel whose difference value is less than the threshold value, the medal count circuit 246 determines that there is a lower outer edge (moving destination direction medal edge) in the medal movement direction. On the other hand, when there is at least one pixel whose luminance difference value is lower than the threshold value above the pixel whose luminance difference value is equal to or higher than the threshold value, the medal counting circuit 246 determines that the medal counting circuit 246 has an upper outer edge (after movement) (Direction medal edge) is determined to exist. If there is no pixel whose luminance difference value is less than or equal to the threshold value for pixels located below or above the pixel whose luminance difference value is greater than or equal to the threshold value, the medal counting circuit 246 displays the medal in the determination area. It is determined that the image exists but there is no outer edge of the medal.

Then, the medal count circuit 246 determines, for each determination area of the determination target grayscale image data, the determination result, that is, the determination result of whether or not a medal image exists in the determination area, and the movement direction medals edge. Alternatively, the SRAM 243 stores the determination result as to whether or not there is a post-movement direction medal edge. For example, the medal count circuit 246 stores data “OFF” for the determination region where it is determined that there is no medal image. In addition, data “IN” is determined for a determination area where it is determined that a movement direction medal edge exists, data “OUT” is determined for a determination area where it is determined that a movement direction medal edge exists, and a medal image. “ON” is stored in the determination area determined that there is no outer edge of the medal.
When the determination result is already stored in the SRAM 243, the medal count circuit 246 compares the latest determination result with the current determination result, and changes to the determination result in any one of the determination areas. If there is, the SRAM 243 stores the determination results for all current determination areas. On the other hand, when there is no change in the determination result of any determination region, the determination results for all the determination regions at this time are not stored in the SRAM 243.

  Further, the medal count circuit 246 omits the determination of the determination areas A1 to A4, B1 to B4, C1, C2, and D1 to D4 when the medal cannot be inserted, for example, when the credit counter is the maximum value as described later. To do. Further, in this case, the medal count circuit 246 indicates to the SRAM that the above determination is omitted for the determination areas A1 to A4, B1 to B4, C1, C2, and D1 to D4, that is, “not determined”. * ”Data (a specific numerical value is hexadecimal“ FF ”).

  Therefore, the determination area determination result data as shown in FIG. 26 is stored in the SRAM 243 for the eight gray scale image data G2 shown in FIGS. For example, for the grayscale image data G2 in FIG. 22A, since it is determined that there is a moving direction medal edge for the determination areas A1 and A2, data “IN” (specific numerical values are hexadecimal numbers). “01”) is stored, and it is determined that no medal image exists for the other determination areas. Therefore, data “OFF” (specifically, “00” in hexadecimal) is stored. Remembered.

  For the grayscale image data in FIG. 23E, since it is determined that no medal image exists for the determination areas A1 to A4, E, and F, data “OFF” is stored. For the determination areas B1, B2, C1, and C2, since it is determined that there is a post-movement medal edge, data “OUT” (specifically, “02” in hexadecimal) is stored. Is done. In addition, for the determination areas B3, B4, D1 to D4, there is a medal image, but it is determined that there is no outer edge of the medal. Therefore, data “ON” (specific numerical values are hexadecimal “ 03 ") is stored.

  In addition, regarding the grayscale image data G2 shown in FIG. 24H, it is determined that there is a medal image in the determination area F, but there is no outer edge of the medal, so data “ON” is stored. For the determination areas A1 to A4, B1 to B4, C1, C2, and D1 to D4, data “*” indicating that the determination is not made is stored.

  Note that the grayscale image data G2 in FIGS. 22A to 22C, 23D to 23F, and 24G is output from the ISP circuit 245 when a medal passes over the medal rail 210 and is ejected from the medal outlet 204c. Of the grayscale image data G2, seven grayscale image data G2 are extracted for convenience of explanation. That is, in this case, the grayscale image data output from the ISP circuit 245 exists in addition to the grayscale image data G2 shown in FIGS. 22A to 22C, FIGS. 23D to 23F, and 24G.

  In addition, the SRAM 243 is provided with a storage area for storing a predetermined number of determination results relating to gray scale image data in the present embodiment as determination area determination result data.

(3) Order determination processing When the pachislot 1 is in a state in which the medal can be inserted, the medal count circuit 246 converts the predetermined number of gray scale image data in the present embodiment as 14 determination area determination result data into the SRAM 243. When the determination result is stored, an order determination process is performed. In addition, when the pachislot 1 is in a state where the medal cannot be inserted, the medal count circuit 246 stores the determination result relating to the grayscale image data for a predetermined number, that is, four gray scale image data in the present embodiment, as determination area determination result data in the SRAM 243. Is stored, order determination processing is performed. In the order determination process, in a predetermined number of grayscale image data arranged in time series, the transition mode of data “IN”, “OUT”, “ON”, “OFF” for each determination region is a predetermined transition. It is determined whether or not the medals match, and if they match, it is determined that the medals have passed on the medal rail 210.

  Here, as a predetermined transition mode, in this embodiment, the medal count determination table shown in FIG. 27 is converted into a numerical value and stored in the flash memory 244. In the medal count determination table, “IN” and “IN” in each determination area on the 14 grayscale image data arranged in time series when the medal passes on the medal rail 210 and is ejected from the medal exit portion 204c. The mode of data transition of “OUT”, “ON”, “OFF” is defined. In addition, data of “IN”, “OUT”, “ON”, and “OFF” in each determination area on the four grayscale image data arranged in time series when the medal is guided to the medal chute 202 is displayed. The mode of transition is defined. Note that these data transition modes are defined in advance by assuming that the medal moves at the fastest speed through simulations and experiments.

  In the order determination process when the pachislot 1 is in a state where the medal can be inserted, the medal count circuit 246 has data (“IN”, “OUT”) in each determination region of the 14 grayscale image data stored in the SRAM 243. , “ON”, “OFF”) and the data transition modes corresponding to the time series 1 to 14 defined in the medal count determination table are compared, It is determined that a medal has passed.

  If they do not match, it is determined that “abnormality has occurred”. If they do not match, for example, the first half of the data transition mode in each determination area of the 14 grayscale image data (hereinafter may be referred to as “transition mode of comparison target data”) Data transition corresponding to the time series 8 to 4 stipulated in the medal count determination table is the same as the data transition mode corresponding to the time series 1 to 8 stipulated in the medal count determination table. If this is the case, so-called “time-series retrograde” may occur.

  Further, in the order determination process when the pachislot 1 is in a state where medals cannot be inserted, the medal count circuit 246 includes a mode of data transition in each determination region of the four grayscale image data stored in the SRAM 243, and The data transition modes corresponding to the time series E1 to E4 defined in the medal count determination table are compared, and when they completely match, it is determined that “the medal is guided to the medal chute 202”.

  In addition, the data (“IN”, “OUT”, “ON”, “OFF”) in each determination area is first stored in the SRAM 243, and after a predetermined time (for example, 1 second) has elapsed, the data is input to the SRAM 243. It is considered that a medal clogging has occurred when data in each determination area of 14 grayscale image data is not stored when it is possible, or when four cannot be inserted. Therefore, in this case, the medal count circuit 246 determines that “abnormality has occurred”.

  When the number of data (“IN”, “OUT”, “ON”, “OFF”) in each determination area of the grayscale image data stored in the SRAM 243 is less than a predetermined number, for example, four or If the number is less than 14, the transition modes do not match due to a lack of data, and therefore, in the above comparison process, it is determined that “medal has passed” or “medal was guided to medal chute 202”. Never happen. In this case, the comparison process may be omitted. In addition, the medal count circuit 246 deletes the data in each determination region of the 14 or 4 grayscale image data stored in the SRAM 243 after performing the order determination process.

  Further, the medal count circuit 246, when any one of “IN”, “OUT”, and “ON” is stored in the SRAM 243 for the determination area E of the grayscale image data, It is determined that “abnormality has occurred” without waiting for the data in each determination area of the four gray scale image data to be stored.

  In the order determination process, the medal count circuit 246 stores the determination result in the order determination process in the SRAM 243 as the determination result of the count process. That is, in the SRAM 243, as the determination result of the count process, “medal has passed” (a specific value is hexadecimal “01”), “a medal is guided to the medal chute 202” (specific value) Three types of determination results are stored: “02” in hexadecimal number) and “abnormality has occurred” (specific numerical value is “10” in hexadecimal number). Here, the case where it is determined that “a medal has passed” is, for example, a case where a medal is inserted in a state where the main control circuit 91 can insert a medal. The case where it is determined that “the medal has been guided to the medal chute 202” means that the main control circuit 91 is in a state where the medal can be inserted and an illegal medal having an outer diameter smaller than the prescribed medal is inserted, This is a case where a medal is inserted while the control circuit 91 cannot insert a medal. In addition, the case where it is determined that “abnormality has occurred” is compared with the case where some foreign object is detected outside the range where the medal passes or the data transition mode defined in the medal counter determination table described above. This is a case where the transition mode of the target data does not match.

  As a result of the comparison, instead of determining that “the medal has passed” or “the medal has been guided to the medal chute 202” in the case of a perfect match, the degree of match is 80% or more, for example. In this case, it may be determined in consideration of a predetermined determination margin that “the medal has passed” or “the medal chute 202 has been guided”.

  In the medal position detection process, the medal edge detection process may be omitted. In this case, the medal count circuit 246 stores data “OFF” in the SRAM 243 for the determination area determined that the medal image does not exist, and “ON” for the determination area determined that the medal image exists. Is stored. Then, the mode of transition of “ON” and “OFF” data in each determination area is defined in the medal count determination table shown in FIG.

  Further, in the order determination process, instead of the comparison using the medal count determination table shown in FIG. 27, the order of the determination areas in which “ON” data is stored is defined in advance, and the predetermined order and the actual order are determined. It is also possible to determine the passage of medals by comparing the order of the determination areas in which the data “ON” is stored. In this case, the predetermined order is grouped into the determination areas A1 to A4 as the A area, the determination areas B1 to B4 as the B area, the determination areas C1 and C2 as the C area, and the determination areas D1 to D4 as the D area. It may be defined by For example, in a predetermined order, all of the A to D areas are “OFF”, then only the A area is “ON”, then the A area, the B area, and the C area are “ON”, and then the B area, the C area, and the D area. May be “ON”, then only the D region may be “ON”, and finally any of the A to D regions may be “OFF”. In this case, the A area is “ON” means that “ON” data is stored in any of the determination areas A1 to A4.

  Further, the number, shape, and arrangement location of the determination areas set on the gray scale image data can be set as appropriate according to the allowable determination required time and the accuracy of the determination to be obtained. For example, a determination region extending in the vertical direction from the upper end portion to the lower end portion of the grayscale image data G2 in FIGS. 22A to 22C, FIGS. 23D to 24F, and FIGS.

<Fisheye correction scaler circuit>
The fisheye correction scaler circuit 248 acquires the grayscale image data from the SRAM 243, and performs fisheye correction processing for correcting the acquired grayscale image data with fisheye.

  The fisheye correction scaler circuit 248 performs equalization processing on the grayscale image data that has been subjected to fisheye correction processing. In the equalization processing, the fisheye correction scaler circuit 248 creates reduced image data reduced to 1/2, 1/4, and 1/8.

  In addition, the fisheye correction scaler circuit 248 performs bilateral conversion processing on each of the created reduced image data in the equalization processing. In this embodiment, a Gaussian filter of a 3 × 3 kernel (a kernel in image processing, not a kernel indicating an OS function) shown in FIG. 28 is used to remove noise from reduced image data. However, the Gaussian filter has a drawback that the edges in the image data are not noticeable (blur). Therefore, in order to eliminate this drawback, a bilateral filter represented by the following Expression 3 is adopted as a processing algorithm for bilateral conversion processing. That is, the bilateral filter is a filter that removes noise of image data and performs edge correction and enhancement using a Gaussian filter kernel.

  In Equation 1, the array of image data before bilateral conversion processing is f (i, j), and the array of image data after processing is g (i, j). In addition, w represents a kernel size, σ represents a standard deviation, and d represents a difference in luminance value.

  Then, the fish-eye correction scaler circuit 248 stores the reduced image data subjected to equalization processing in the SRAM 243. The SRAM 243 is provided with a storage area capable of storing a predetermined number of reduced image data. When the number of reduced image data stored in the SRAM 243 reaches the upper limit, the stored order is overwritten from the old reduced image data.

<Image recognition DSP circuit>
When the reduced image data is stored in the SRAM 243, the host controller 241 instructs the image recognition DSP circuit to perform preprocessing.

  In the preprocessing, the image recognition DSP circuit 242 acquires reduced image data (in this embodiment, reduced image data reduced to ¼) from the SRAM 243, and detects a circular area from the acquired reduced image data. Processing and non-linear diffusion filter processing are performed to create an edge image and store it in the SRAM 243. The image recognition DSP circuit 242 performs various determination processes described later. In this embodiment, the image data reduced to ¼ is used. However, the present invention is not limited to this, and the setting for selecting the reduced image data to be used is stored in the flash memory 244, and according to the setting. Thus, the image data reduced to ½ or the image data reduced to ８ may be selected.

(1) Circle Area Detection Processing In the circle area detection process, the image recognition DSP circuit 242 generates a background difference image indicating a difference between the acquired reduced image data and reduced background grayscale image data corresponding to the reduced image data. To do. Here, the reduced background grayscale image data is image data obtained by performing fisheye correction processing and equalization processing by the fisheye correction scaler circuit 248 on the background grayscale image data stored in the SRAM 243. Is stored in the SRAM 243.

  Next, the image recognition DSP circuit 242 binarizes the generated background difference image. Then, as shown in FIG. 29, template matching is performed on the binary background difference image G3 using a binary outline template T1 indicating the outline of the medal. That is, the image recognition DSP circuit 242 specifies where in the background difference image G3 a region similar to the outer shape template T1 exists. In other words, the image recognition DSP circuit 242 specifies where in the background difference image G3 there is an area that matches the outline of the medal indicated by the outline template T1. Note that the outline template T1 is stored in the flash memory 244 in advance.

  In template matching, the outline template T1 is moved little by little (for example, one pixel (pixel) at a time) in the raster scan direction on the background difference image G3. In other words, the image recognition DSP circuit 242 raster scans the outer shape template T1 on the background difference image G3. At this time, the image recognition DSP circuit 242 generates an AND image of the outline template T1 and the partial region of the background difference image G3 that overlaps the outline template T1 at each position of the outline template T1. Thereby, a plurality of binary AND images are generated. Then, the image recognition DSP circuit 242 calculates the background difference of the outline template T1 used in generating the AND image having the largest number of pixels (high luminance pixels) having the pixel value “1” among the plurality of generated AND images. A position on the image G3 is specified. This position is a position where a region similar to the outline template T1 exists in the background difference image G3.

  Then, the image recognition DSP circuit 242 detects a partial area in the acquired reduced image data that exists at the same position as the specified position as a circular area. In other words, the image recognition DSP circuit 242 detects a partial region in the reduced image data that overlaps the outer shape template T1 as a circular region when the outer shape template T1 is arranged in the reduced image data at the same position as the specified position. . At this time, in the partial area, a circular area may be defined by setting the pixel value of each pixel outside the circle indicated by the outer shape template T1 above to zero. The circular area extracted by the image recognition DSP circuit 242 is a gray scale image. In the present embodiment, the outer shape of the circular region is a quadrangle, but may be another shape such as a circle.

  It should be noted that other methods may be employed as a method for extracting the circular area from the acquired reduced image data. For example, you may employ | adopt the extraction method using that the external shape of a medal is circular. In this extraction method, first, edge detection is performed on the acquired reduced image data to generate an edge image. As an edge image generation method, for example, Sobel method, Laplacian method, Canny method and the like are used. Next, a circular area is extracted from the generated edge image. For example, Hough transform is used as a method for extracting a circular region. A circular area in the acquired reduced image data that exists at the same position as the position of the circular area in the edge image is set as a circular area.

  Further, an extraction method for extracting a circular region from reduced image data acquired using the background difference method and labeling may be employed. In this extraction method, first, a background difference image indicating a difference between the acquired reduced image data and reduced background grayscale image data is generated, and the generated background difference image is binarized. Then, labeling such as 4-connection is performed on the binary background difference image. A partial area of the acquired reduced image data that exists at the same position as the connected area (independent area) obtained as a result of labeling in the binary background difference image is set as a circular area.

  When the circular area can be detected, the image recognition DSP circuit 242 associates “determination OK” as the determination result of the circular detection with the above-described image ID inherited by the data related to the determination and stores it in the SRAM 243. Let

(2) Filter processing The image recognition DSP circuit 242 performs filter processing after the circular area detection processing. The filter process includes a 3σ correction process and a non-linear diffusion filter process.
First, in the 3σ correction process, the image recognition DSP circuit 242 cuts out the image data of the circular area in the acquired reduced image data based on the circular area detected by the circular area detection process. Hereinafter, the cut-out image data may be referred to as circle area image data.

Next, the image recognition DSP circuit 242 creates a normal distribution (see FIG. 30) centering on the average value of the data in a certain range for the luminance value in the extracted circular area image data. Here, 3σ is three times the standard deviation, and almost all data belongs within the range of the average value ± 3σ (if the variation is a normal distribution, 99.7% of the data falls within this range. Belonging).
Then, the luminance of a pixel having a luminance value smaller than −3σ, for example, the luminance of a pixel of −4σ is replaced with a luminance value of −3σ. Further, the luminance of a pixel having a luminance value larger than 3σ, for example, the luminance of a pixel of 4σ is replaced with a luminance value of 3σ. By doing so, pixels that have extremely large luminance values (pixels that are too bright) or pixels that have extremely small luminance values (pixels that are too dark), which are irregular data, affect subsequent processing. Can be suppressed.

  Next, the image recognition DSP circuit 242 performs non-linear diffusion filter processing on the circular region image data after the 3σ correction processing, and generates an edge image X in the X (vertical) direction and an edge image Y in the Y (horizontal) direction. To do.

FIG. 31A schematically shows the circular area image data after the 3σ correction processing. In FIG. 31A, one square of the grid indicates a pixel. FIG. 31B shows edge image X coefficients. Here, when the luminance values of the pixels A1 to A8 and P in FIG. 31A are a1 to a8 and p, respectively, the luminance value of the pixel of interest P in the edge image X is as follows using the coefficient for the edge image X: It is calculated by the following formula 4.
P brightness (PX) = a1 × (−3) + a2 × 0 + a3 × 3 + a4 × (−10) + p × 0 + a5 × 10 + a6 × (−3) + a7 × 0 + a8 × 3 (4)

  The image recognition DSP circuit 242 creates the edge image X by calculating the luminance using the above equation 4 for all the pixels of the circular area image data after the 3σ correction process.

FIG. 31C shows the edge image Y coefficient. Here, assuming that the luminance values of the pixels A1 to A8 and P in FIG. 31A are a1 to a8 and p, respectively, the luminance value of the target pixel P in the edge image Y is as follows using the edge image Y coefficient. It is calculated by the following formula 5.
P brightness (PY) = a1 × (−3) + a2 × (−10) + a3 × (−3) + a4 × 0 + P × 0 + a5 × 0 + a6 × 3 + a7 × 10 + a8 × 3 (5)

  The image recognition DSP circuit 242 creates the edge image Y by calculating the luminance using the above equation 5 for all the pixels of the circular area image data after the 3σ correction processing.

  After creating the edge image X and the edge image Y, the image recognition DSP circuit 242 creates the edge image XY from both images. The luminance PXY of each pixel in the edge image XY is calculated by the following formula 6 when the luminance value of the pixel in the edge image X is PX and the luminance value of the pixel in the edge image Y at the same position is PY. be able to.

The image recognition DSP circuit 242 creates the edge image XY by calculating the luminance PXY using the above equation 6 for all the pixels of the edge image X and the edge image Y, and stores the created edge image XY in the SRAM 243. Let
Various determination processes performed by the image recognition DSP circuit 242 will be described later.

<Image recognition accelerator circuit>
The image recognition accelerator circuit 249 performs processing related to the gradient average image data, processing related to the edge gradient image, and fast Fourier transform (hereinafter sometimes referred to as “FFT transform”). Further, the image recognition accelerator circuit 249 performs a template generation process for creating various templates used for the marking determination process.

[Processing related to gradient average image data]
The process related to the gradient average image data includes a rotation image generation process and a gradient average image data generation process.

(1) Rotated Image Generation Processing In the rotated image generation processing, the image recognition accelerator circuit 249 acquires the edge image XY from the SRAM 243, rotates the acquired edge image XY in units of 1 degree, and generates a rotated image for 360 degrees. Generate.

(2) Gradient average image data generation processing In the gradient average image data generation processing, the image recognition accelerator circuit 249 cumulatively adds (superimposes) the 360-degree rotated images generated in the rotated image generation processing, and then calculates the gradient average. Generate image data. As an example of the gradient average image data, the average medal gradient average image data shown in FIG. 32A is shown in FIG. 32B. Then, the image recognition accelerator circuit 249 stores the generated gradient average image data in the SRAM 243.

[Processing related to edge gradient image]
The processing related to the edge gradient image includes polar coordinate conversion processing, Charrr conversion processing, and HOG conversion processing.

(1) Polar Coordinate Conversion Processing In the polar coordinate conversion processing, the image recognition accelerator circuit 249 acquires the edge image XY from the SRAM 243, converts the orthogonal coordinates into polar coordinates for the acquired edge image XY, and creates polar coordinate image data. Specifically, the image recognition accelerator circuit 249 displays polar coordinates (r, φ) representing the orthogonal coordinates (x, y) of each pixel of the edge image XY by the length r of the moving radius and the angle φ from the reference position. ). The relationship between polar coordinates (r, φ) and orthogonal coordinates (x, y) is expressed by the following equations 7 and 8.
x = r cos (φ) (7)
y = r sin (φ) (8)

  Then, the image recognition accelerator circuit 249 stores the created polar coordinate image data in the SRAM 243.

(2) Charr Conversion Processing In the Charr conversion processing, the image recognition accelerator circuit 249 obtains polar coordinate image data from the SRAM 243 and creates an edge polar coordinate image X in the X (vertical) direction and an edge polar coordinate image Y in the Y (horizontal) direction. To do. Therefore, the image recognition accelerator circuit 249 that performs the Charr conversion process constitutes a directional image separation unit that separates the polar coordinate image into a vertical image and a horizontal image.
In addition, since the aspect which creates the edge polar coordinate image X and the edge polar coordinate image Y in the Scherr transform process is the same as the aspect in which the edge image X and the edge image Y are created in the nonlinear diffusion filter process described above, The description is omitted here.

(3) HOG Conversion Processing In the HOG conversion processing, the image recognition accelerator circuit 249 creates an edge gradient image and performs HOG conversion on the created edge gradient image. Here, HOG (Histograms of Oriented Gradients) conversion is a histogram of the luminance gradient direction of a local region (cell) in image data. For image matching accompanied by HOG conversion, local shape change ( It has a feature that it is resistant to geometric transformation and is not easily influenced by fluctuations in illumination.

  Specifically, an edge gradient image is created from the edge polar coordinate image X and the edge polar coordinate image Y created by the Charrr conversion process. The brightness of each pixel in the edge gradient image, that is, the gradient strength, is expressed by the following formula 9 when the pixel brightness value in the edge polar coordinate image X is QX and the pixel brightness value in the edge polar coordinate image Y at the same position is QY. Can be calculated.

  In addition, the gradient angle of each pixel in the edge gradient image can be calculated by the following Expression 10.

  In FIG. 33, the created edge gradient image G4 is schematically shown. The image recognition accelerator circuit 249 creates a histogram of the luminance gradient direction in the local area for each local area, with the rectangular frame S indicated by the two-dot chain line in the created edge gradient image G4 as the local area (cell). . Then, the created histogram set (may be referred to as “HOG data” in the following description) is stored in the SRAM 243.

[FFT conversion processing]
In the FFT conversion process, the image recognition accelerator circuit 249 acquires the polar coordinate image data created by the above-described polar coordinate change process and stored in the SRAM 243, and performs the FFT conversion process on the acquired polar coordinate image data.

  Specifically, as shown in FIG. 34, the image recognition accelerator circuit 249 partitions the acquired polar coordinate image data into a plurality of regions, and calculates frequency and amplitude values for each partitioned region. In the drawing, an example is shown in which polar coordinate image data is partitioned for each predetermined angle, and values of frequency and amplitude are calculated for each of the partitioned regions.

  Then, the image recognition accelerator circuit 249 stores the calculated frequency and amplitude values (hereinafter sometimes referred to as “FFT data”) of the acquired polar coordinate image data in the SRAM 243.

[Template generation processing]
The image recognition accelerator circuit 249 executes template generation processing to generate this template. This template consists of a set of gradient average image data, HOG data, and FFT data. In the embodiment, a maximum of four types of book templates are generated. Further, this template is used in a determination process executed by an image recognition DSP circuit 242 described later. Details of the template generation process will be described later.

<Determination Processing by Image Recognition DSP Circuit>
Next, determination processing executed by the image recognition DSP circuit 242 will be described. The determination process is executed after the main template is generated and registered in the template generation process. The determination processing includes gradient average image template comparison processing, HOG template comparison processing, FFT template comparison processing, and three-dimensional determination processing.

(1) Gradient average image template comparison process In the gradient average image template comparison process, the image recognition DSP circuit 242 acquires, from the SRAM 243, gradient average image data generated by the image recognition accelerator circuit 249 for the inserted medal.

  Next, the image recognition DSP circuit 242 compares the acquired gradient average image data with the gradient average image data of each main template, and in the following description, a zero-mean normalized cross correlation (Zero-mean Normalized Cross Correlation) The evaluation value x of the similarity is calculated according to (sometimes referred to as “ZNCC”). The similarity evaluation value obtained by ZNCC is calculated in the range of −1.0000000 to 1.0000000, and 1.0000000 is the highest (similar) evaluation value.

(2) HOG Template Comparison Processing In the HOG template comparison processing, the image recognition DSP circuit 242 acquires HOG data of inserted medals. Next, the acquired HOG data is compared with the HOG data of each main template, and the similarity evaluation value y is calculated by ZNCC.

(3) FFT template comparison process In the FFT template comparison process, the image recognition DSP circuit 242 acquires the FFT data of the inserted medal. Next, the acquired FFT data and the FFT data of each main template are compared, and a similarity evaluation value z is calculated by ZNCC.

(4) Three-dimensional determination processing In the three-dimensional determination processing, the image recognition DSP circuit 242 has the following expression consisting of the evaluation values x, y, z calculated in the above processing and preset coefficients A, C, D. If it is established, it is determined that the inserted medal and this template are the same.
x + Ay + Cz ≧ D (11)

  In the present embodiment, a maximum of four types of this template are created. The image recognition DSP circuit 242 performs a three-dimensional determination process for each main template. If the above formula (11) does not hold for all the main templates, it is determined that the medal to be determined is not a regular medal. On the other hand, if there are one or more main templates that satisfy the above formula (11), the determination target medal is determined to be a regular medal. Then, the image recognition DSP circuit 242 stores “determination OK” indicating “regular medal” or “determination NG” indicating “illegal medal” in the SRAM 243 as a determination result. When the image recognition DSP circuit 242 stores the determination result, the image recognition DSP circuit 242 associates and stores the above-described image ID inherited by the data related to the determination and the determination result.

<GPIO>
The GPIO 250 (see FIG. 18) is a device for input / output between each device connected to the medal selector 201 and the control LSI 234. In addition, it is a device for input / output between the control LSI 234 and various devices constituting the medal selector 201.
For example, the LED control output PORT of the GPIO 250 is connected to the LED 233 so that the LED 233 can be turned on and off by the control LSI 234. Further, the notification LED control output PORT of the GPIO 250 is connected to the notification LED 206c, so that the notification LED 206c can be turned on and off by the control LSI 234. Further, the AE setting port of the GPIO 250 is connected to the CMOS image sensor 232 so that the control LSI 234 can control the exposure time setting mechanism of the CMOS image sensor 232 (setting of the exposure time).

  Further, the switch input PORT of the GPIO 250 is connected to the initialization switch 206d, the color switch 206e, and the marking switch 206f, and the control LSI 234 can acquire the switch state of the initialization switch 206d, the color switch 206e, and the marking switch 206f. ing.

<UART>
The UART 252 is a serial communication device for transmitting and receiving various commands to be described later between the medal selector 201 and the sub control circuit 101 including the sub control board 72. In FIG. 18, the sub-relay substrate 61 is not shown.

<Host controller>
The host controller 241 controls each device constituting the control LSI 234, for example, the medal count circuit 246, the color recognition circuit 247, the fisheye correction scaler circuit 248, the image recognition DSP circuit 242, the image recognition accelerator circuit 249, the GPIO 250, and the UART 252. .

  When the host controller 241 receives the determination result of the AE determination process from the ISP circuit 245, the host controller 241 first refers to an area in the SRAM 243 that stores the value of the stage of the exposure time. Next, when the stage of the exposure time is “25”, that is, when the exposure time is not set to the upper limit of 175 μsec, the exposure time setting mechanism of the CMOS image sensor 232 is connected to the AE setting PORT of the GPIO 250. A signal for instructing to increase the exposure time by one step is output. Then, 1 is added to the value of the area where the value of the stage of the exposure time is stored in the SRAM 243. In this embodiment, since the initial value of the exposure time is set to 70 μsec, the initial value stored in the area storing the value of the stage of the exposure time is set to 10. That is, in the present embodiment, the host controller 241 of the control LSI 234 constitutes an exposure time setting unit that sets the exposure time of the CMOS image sensor 232.

  On the other hand, when the stage of the exposure time is “25”, that is, the upper limit of the exposure time is set to 175 μsec, the host controller 241 instructs the notification LED 206c to be turned on via the notification LED control output PORT of the GPIO 250. Output a signal. In addition, the host controller 241 transmits a medal selector error command to the sub control board 72 (sub control circuit 101). The value DAT0 of the medal selector error command to be transmitted is set to “3” indicating “cleaning error”. Details of the medal selector error command will be described later.

  Further, the host controller 241 depresses an initialization switch (not shown) disposed on a switch board (not shown) provided at an arbitrary location of the medal selector 201 (for example, in the vicinity of the first board 230). Then, the stage of the exposure time is set to the initial value “10”, that is, the exposure time is set to 70 μsec. Thereby, for example, an employee of a game hall can reset the appropriate exposure time of the CMOS image sensor 232 by pressing the initialization switch after maintenance (cleaning, etc.) of the lens of the camera unit 209. Become.

In addition, the host controller 241 outputs a signal relating to a lighting instruction or a lighting instruction to the LED 233 via the GPIO 250.
The host controller 241 receives signals related to switch states from the initialization switch 206d, the color switch 206e, and the marking switch 206f via the GPIO 250.
Further, the host controller 241 transmits a medal selector error command to the sub-control circuit 101 when “abnormality has occurred” is stored in the SRAM 243 as the determination result related to the count process. The value DAT0 of the medal selector error command to be transmitted is set to “1” indicating “foreign object detection error”. Details of the medal selector error command will be described later.

  Further, the host controller 241 responds to the determination result of the circular detection, the determination result of the color determination, and the determination result of the stamp determination that are associated with the same image ID at the timing when the result of the stamp determination process is stored in the SRAM 243. A determination completion command is transmitted to the sub control circuit 101. Details of the determination completion command will be described later.

  The SRAM 243 is connected to a backup power source (not shown), and the contents stored in the SRAM 243 are retained for a certain period (for example, about one week) even when the power of the pachislot machine 1 is turned off.

<Flash memory>
In the flash memory 244, various devices constituting the control LSI 234, for example, a host controller 241, an image recognition DSP circuit 242, a fisheye correction scaler circuit 248, an image recognition accelerator circuit 249, parameters used for various processes and necessary for various processes. Data is stored. Further, the flash memory 244 is provided with an area for storing the value of the above-described exposure time stage. An area for storing the coefficients A, C, and D in Expression (11) is provided.

<Processing flow of control LSI>
Next, processing performed by the control LSI 234 will be described with reference to FIG. FIG. 35 is a processing flowchart for explaining the processing performed by the control LSI 234.
As shown in FIG. 35, the control LSI 234 roughly performs input processing, conversion processing, color determination processing, count processing, and marking determination processing.

<Input processing>
Input processing is performed by the ISI circuit 251. In the input process, as described above, the ISI circuit 251 converts the image data transmitted from the CMOS image sensor 232 by the LVDS method into an RGB Bayer image and outputs the RGB Bayer image to the ISP circuit 245.

<AE correction processing>
The AE correction process is performed by the ISP circuit 245 and the host controller 241 when the pachislot 1 is powered on. The AE correction process is performed in parallel with a conversion process, a color determination process, and a count process, which will be described later.

  In the AE correction process, the ISP circuit 245 determines whether the RGB Bayer image output from the ISI circuit 251 includes an image of the protrusion 210a (see FIG. 8) formed on the surface of the medal rail 210. AE determination processing is performed. Further, when the ISP circuit 245 determines that the output image does not include the image of the protruding portion 210 a, the ISP circuit 245 outputs the determination result of the AE determination process to the host controller 241.

  In the AE correction process, when the determination result of the AE determination process is output from the ISP circuit 245, the host controller 241 first refers to the area in the SRAM 243 that stores the value of the stage of the exposure time. Next, when the stage of the exposure time is “25”, that is, when the exposure time is not set to the upper limit of 175 μsec, the exposure time setting mechanism of the CMOS image sensor 232 is connected to the AE setting PORT of the GPIO 250. A control signal for instructing to increase the exposure time by one step (extend it by 7 μs) is output. Then, 1 is added to the value of the area where the value of the stage of the exposure time is stored in the SRAM 243.

  In this way, the image for which the ISP circuit 245 performs the AE determination processing next becomes an RGB Bayer image based on the image acquired by the CMOS image sensor 232 whose exposure time has increased by one stage. The AE correction process is repeatedly performed until the ISP circuit 245 determines in the AE determination process that the image of the protrusion 210a is included in the image, or until the exposure time is set to the upper limit of 175 μsec.

  When the ISP circuit 245 determines that the image output from the ISI circuit 251 includes the image of the ridge 210a in the AE determination process, the determination result of the AE determination process is not output to the host controller. Thereafter, the AE determination process is not performed on the image output from the ISI circuit 251. That is, the exposure time of the CMOS image sensor 232 is set to the exposure time when the ISP circuit 245 determines that the image of the protrusion 210a is included in the image output from the ISI circuit 251. When the ISP circuit 245 determines that the image of the protrusion 210a is included in the image first output from the ISI circuit 251 after the power is turned on, the exposure time of the CMOS image sensor 232 is the initial value. 70 μs (step 10).

  In the AE correction process, when the host controller 241 outputs the determination result of the AE determination process from the ISP circuit 245, the exposure time stage is set to “25”, that is, the exposure time is set to the upper limit of 175 μsec. The host controller 241 outputs a control signal instructing lighting to the notification LED 206 c via the notification LED control output PORT of the GPIO 250. In addition, the host controller 241 transmits a medal selector error command in which the value “3” indicating “cleaning error” is set to DAT 0 to the sub-control board 72.

  As described above, when the host controller 241 outputs the control signal instructing the notification LED 206c to turn on and transmits the medal selector error command to the sub control board 72, the exposure time is set to the upper limit value of 175 μsec. This is a case where the protrusion 210a of the medal rail 210 could not be imaged even if it was set. In such a case, it is considered that some kind of trouble (for example, dirt such as dust adheres to the lens) has occurred in the camera unit 209. For this reason, in this state, it is not possible to effectively detect the insertion of game medals and the detection of fraud using the camera unit 209, so the sub-control circuit 101 performs various processes for notifying the occurrence of the failure. In this embodiment, a later-described C1 error screen is displayed on the liquid crystal display device 11.

<Conversion processing>
The conversion process is performed by the ISP circuit 245. In the conversion process, the ISP circuit 245 performs an image correction process that performs a lens distortion correction process and a projective conversion (homography) process on the RGB Bayer image output from the ISI circuit 251. Next, the ISP circuit 245 performs color conversion processing for converting the corrected RGB Bayer image into YUV image data and outputting the grayscale image data to the medal count circuit 246. Further, the RGB Bayer image is converted into HSV image data, and color conversion processing for outputting the HSV image data to the color recognition circuit 247 is performed.

  After the conversion processing, the control LSI 234 performs color determination processing, count processing, and marking determination processing. These processes are executed in parallel at each executable timing because the circuits for executing the processes are configured as separate circuits.

<Color judgment processing>
The color determination process is performed by the color recognition circuit 247. The color determination processing includes medal detection processing, threshold determination processing, saturation / hue multiplication processing, color template generation processing, and color template comparison processing.

  First, the color recognition circuit 247 performs a medal detection process for determining whether or not a medal image is included in the HSV image data output from the ISP circuit 245. When it is determined that a medal image is included in the HSV image data, the color recognition circuit 247 performs a threshold determination process based on the HSV image data. In the threshold determination process, if the position on the threshold graph (see FIG. 21) based on the average saturation value and the average hue value is within the allowable region, the color determination process is continued. On the other hand, if it is within the non-permissible region, “threshold value determination impossible” is stored in the SRAM 243 as the determination result, and the color determination process is terminated.

  After the threshold determination processing, the color recognition circuit 247 performs saturation / hue multiplication processing to create color determination data. Then, the created color determination data is compared with the color template to determine whether they match or are similar to a predetermined degree, and the determination result is stored in the SRAM 243. As described above, when the color recognition result (“determination OK” or “determination NG”) is stored in the SRAM 243, the color recognition circuit 247 associates the determination-related data with the above-described image ID. Remember.

  It should be noted that the color template comparison process is not executed until the number of medals inserted after power-on reaches the specified initial insertion number, which is 50 in this embodiment, since no color template has been generated.

  Further, the color recognition circuit 247 determines that when the number of medals inserted after power-on reaches the prescribed initial insertion number of 50 and the number of color determination data stored in the color determination data storage area reaches 50, that is, 50 sheets. When the color determination data relating to the medal is created, a color template generation process is executed.

<Count processing>
The count process is performed by the medal count circuit 246. The count process includes a medal detection process and an order determination process. The medal detection process and the medal position detection process described above correspond to the medal detection process. In the medal detection process, the medal count circuit 246 determines whether the grayscale image data output from the ISP circuit 245 includes a medal image. Further, it is determined whether or not a medal image exists in a predetermined determination area in the grayscale image data output from the ISP circuit 245, and the determination results (“IN”, “OUT”, “ON”, “OFF”) are determined. Data) is stored in the SRAM 243.

  In the order determination process, the medal count circuit 246 determines that the transition mode of “IN”, “OUT”, “ON”, and “OFF” data for each determination area stored in the SRAM 243 is a predetermined transition mode. It is determined whether or not they match. Then, the determination result is stored in the SRAM 243 as “medal has passed”, “medal was guided to the medal chute 202”, or “abnormality has occurred”.

<Engraving process>
The marking determination processing includes fisheye correction processing and equalization processing performed by the fisheye correction scaler circuit 248. Also included are circle area detection processing, filtering processing, gradient average image template comparison processing, HOG template comparison processing, FFT template comparison processing, and three-dimensional determination processing performed by the image recognition DSP circuit 242. In addition, rotation image generation processing, gradient average image data generation processing, gradient average image template generation processing, polar coordinate conversion processing, Scherr conversion processing, HOG conversion processing, HOG template generation processing, FFT conversion processing performed by the image recognition accelerator circuit 249, FFT template generation processing is included.

  In the fisheye correction process, the fisheye correction scaler circuit 248 acquires the grayscale image data from the SRAM 243 and performs a fisheye correction process for correcting the acquired grayscale image data with a fisheye. Next, in the equalization processing, the fisheye correction scaler circuit 248 performs equalization processing on the grayscale image data that has been subjected to fisheye correction processing, creates reduced image data, and stores the reduced image data in the SRAM 243.

  The host controller 241 instructs the image recognition DSP circuit 242 and the image recognition accelerator circuit 249 to execute processing subsequent to the circle area detection processing in the marking determination processing on the reduced image data stored in the SRAM 243.

  In the circular area detection processing, the image recognition DSP circuit 242 acquires reduced image data from the SRAM 243 and detects a circular area from the reduced image data. As described above, when the circular area can be detected, the image recognition DSP circuit 242 associates “determination OK” as the determination result of the circular detection with the above-described image ID inherited by the data related to the determination. And stored in the SRAM 243. In the circular area detection process, when the circular area cannot be extracted (detected), the subsequent processes in the marking determination process are omitted.

  In the filter processing, the image recognition DSP circuit 242 performs non-linear diffusion filter processing on the detected circular area to create an edge image XY, and stores it in the SRAM 243.

  Next, in the rotation image generation process, the image recognition accelerator circuit 249 acquires the edge image XY from the SRAM 243 and generates a rotation image of 360 degrees from the edge image XY. In the gradient average image data generation process, the image recognition accelerator circuit 249 cumulatively adds (superimposes) 360-degree rotated images to generate gradient average image data, and stores the gradient average image data in the SRAM 243. Let

Next, when this template is registered, the image recognition DSP circuit 242 acquires the gradient average image data generated by the image recognition accelerator circuit 249 from the SRAM 243 in the gradient average image template comparison process. Then, the obtained gradient average image data is compared with the gradient average image data of each main template, and the similarity evaluation value x is calculated by ZNCC.
On the other hand, when this template is not registered, the image recognition accelerator circuit 249 performs gradient average image template generation processing described later.

  In parallel with the rotation image generation processing, the image recognition accelerator circuit 249 performs polar coordinate conversion processing. In the polar coordinate conversion process, the edge image XY (same as the edge image XY acquired in the rotation image generation process) is acquired from the SRAM 243, and the orthogonal coordinates of the acquired edge image XY are converted into polar coordinates to generate polar coordinate image data. The polar coordinate image data is stored in the SRAM 243.

  Next, in the Scherr transform process, the image recognition accelerator circuit 249 acquires polar coordinate image data from the SRAM 243, performs nonlinear diffusion filter processing, and creates an edge polar coordinate image X and an edge polar coordinate image Y.

  Next, in the HOG conversion process, the image recognition accelerator circuit 249 generates an edge gradient image based on the edge polar coordinate image X and the edge polar coordinate image Y, performs HOG conversion on the generated edge gradient image, and performs local region-by-local region. A histogram of the gradient direction of the brightness is created. The created histogram set (that is, HOG data) is stored in the SRAM 243.

Next, when the main template is registered, the image recognition DSP circuit 242 acquires the HOG data to be determined in the HOG template comparison process, and compares the acquired HOG data with the HOG data of each main template. , ZNCC calculates the similarity evaluation value y.
On the other hand, if this template is not registered, the image recognition accelerator circuit 249 performs HOG template generation processing described later.

  In parallel with the Scherr conversion process, the image recognition accelerator circuit 249 performs an FFT conversion process. In the FFT conversion processing, the image recognition accelerator circuit 249 acquires polar coordinate image data from the SRAM 243, and performs FFT conversion processing on the acquired polar coordinate image data.

Next, when the main template is registered, the image recognition DSP circuit 242 acquires the FFT data to be determined in the FFT template comparison process, and compares the acquired FFT data with the FFT data of each main template. , ZNCC calculates the similarity evaluation value z.
On the other hand, if this template is not registered, the image recognition accelerator circuit 249 performs an FFT template generation process described later.

  After the evaluation values x, y, and z are calculated as a result of the gradient average image template comparison process, the HOG template comparison process, and the FFT template comparison process, the image recognition DSP circuit 242 performs a three-dimensional determination process, and the determination result is stored in the SRAM 243. To remember. As described above, when the determination result is stored, the image recognition DSP circuit 242 stores the determination result in association with the above-described image ID inherited by the data related to the determination.

  When the determination result of the engraving determination is stored in the SRAM 243, the host controller 241 displays the determination result of the circular detection, the determination result of the color determination, and the determination result of the engraving determination associated with the same image ID stored in the SRAM 243. A corresponding determination completion command is transmitted to the sub-control circuit 101.

[Template generation processing]
Next, template generation processing performed by the image recognition accelerator circuit 249 will be described with reference to the flowcharts shown in FIGS. 36 and 37 are flowcharts showing an example of the template generation process. The template generation process is repeatedly executed at a predetermined cycle. Further, the template generation process includes a gradient average image template generation process, an HOG template generation process, and an FFT template generation process shown in FIG.

  First, the image recognition accelerator circuit 249 determines whether or not a medal has been inserted (S1). Specifically, the medal count circuit 246 confirms whether or not the grayscale image data output from the ISP circuit 245 determines that a medal image is included. That is, it is confirmed whether or not the medal counting circuit 246 has started the counting process. When it is determined that a medal has been inserted (when S1 is YES), the image recognition accelerator circuit 249 proceeds to step S2. On the other hand, when it is determined that no medal has been inserted (when S1 is NO), the image recognition accelerator circuit 249 ends the template generation process.

  In step S2, the image recognition accelerator circuit 249 holds a temporary stamp (S2). Specifically, the edge image created by the fisheye correction scaler circuit 248 and the image recognition DSP circuit 242 performing various processes on the grayscale image data that the medal count circuit 246 has determined to contain a medal image. Using XY, gradient average image data, HOG data, and FFT data of the inserted medals are generated. Then, the generated data set is stored in the SRAM 243.

  Next, the image recognition accelerator circuit 249 determines whether or not the medal count is OK (S3). Specifically, it is determined whether or not the determination result of the counting process by the medal counting circuit 246 confirmed to start in step S1 is “medal has passed” on the medal rail 210 (S3). In step S3, when the medal count is not OK (when the determination result is not “medal has passed”, that is, when S3 is NO), the image recognition accelerator circuit 249 discards the temporary stamp (S4). That is, the image recognition accelerator circuit 249 discards the gradient average image data, HOG data, and FFT data stored in the SRAM 243 in step S2. Then, the image recognition accelerator circuit 249 ends the template generation process.

  On the other hand, when the medal count is OK in step S3 (when the determination result is “medal has passed”, that is, when step S3 is YES), the image recognition accelerator circuit 249 determines whether there is a temporary template. Is determined (S5). Specifically, referring to the temporary template storage area of the SRAM 243, it is determined whether or not a temporary template (a set of gradient average image data, HOG data, and FFT data) is stored. Here, as the temporary template storage area in the present embodiment, the temporary template storage area No. 10 can be stored so that ten (set) temporary templates can be stored. 1-No. 10 is set.

  When determining that the temporary template is not stored (when S5 is NO), the image recognition accelerator circuit 249 uses the gradient average image data, HOG data, and FFT data stored in the SRAM 243 in step S2 as a temporary template. Temporary template storage area No. 1-No. 10 is stored in the empty area, and the value of the temporary counter of the temporary template corresponding to the empty area No is set to 1 (S6). In the following description, the temporary template storage area No. 1-No. 10 may be referred to as “temporary templates No. 1 to No. 10”. That is, for example, the temporary template storage area No. 1 may be referred to as “temporary template No. 1”.

  Next, the image recognition accelerator circuit 249 performs learning medal count (S7). Specifically, the image recognition accelerator circuit 249 adds 1 to the value of the learning medal counter provided in the SRAM 243.

  Next, the image recognition accelerator circuit 249 determines whether or not the value of the learning medal counter is 127 (S8). When the value of the learning medal counter is 127 (when S8 is YES), the image recognition accelerator circuit 249 shifts the processing to step S14 described later. On the other hand, when the value of the learning medal counter is not 127 (when S8 is NO), the image recognition accelerator circuit 249 determines whether or not the value of the learning medal counter is 259 (S9). When the value of the learning medal counter is 259 (when S9 is YES), the image recognition accelerator circuit 249 shifts the processing to step S16 described later. On the other hand, when the value of the learning medal counter is not 259 (when S9 is NO), the image recognition accelerator circuit 249 ends the template generation process.

  Here, the description returns to step S5, and when it is determined that the temporary template is stored (when S5 is YES), the image recognition accelerator circuit 249 stores the gradient average image data stored in the SRAM 243 in step S2, HOG data and FFT data are temporary template numbers. 1-No. It is determined whether it is the same as any one of 10 (S10). That is, the inserted medal is a temporary template No. 1-No. It is determined whether it is the same as any one of 10.

  In this comparison, the image recognition accelerator circuit 249 includes the gradient average image data, the HOG data, the FFT data, and the temporary template No. stored in the SRAM 243 in step S2. 1-No. 10 (gradient average image data, HOG data, FFT data) are compared with each other, and similarity evaluation values x, y, z are calculated. Specifically, the evaluation value x is calculated for the gradient average image data, the evaluation value y is calculated for the HOG data, and the evaluation value z is calculated for the FFT data by ZNCC. When the calculated evaluation values x, y, z and the above-described equation (11) composed of preset coefficients A, C, D are satisfied, the inserted medal and the temporary template are the same. Is determined.

  In step S10, the medal inserted in step S2 is the temporary template No. 1-No. When it is determined that it is the same as any one of 10 (when S10 is YES), the image recognition accelerator circuit 249 shifts the processing to step S11. In step S11, the image recognition accelerator circuit 249 performs cumulative count and update processing for the temporary template in which the above formula is satisfied (that is, determined to be the same as the inserted medal) (S11).

  Specifically, the image recognition accelerator circuit 249 stores the temporary template No. in the SRAM 243. 1-No. Among the cumulative counters provided for every ten, 1 is added to the cumulative counter value of the temporary template determined to be the same as the inserted medal in step S10. Further, regarding the gradient average image data, HOG data, and FFT data of the provisional template determined to be the same, each of these data and the inserted medal gradient average image data, HOG data, and FFT data stored in the SRAM 243 in step S2. Average and update each one. Then, the image recognition accelerator circuit 249 shifts the process to step S7.

  On the other hand, in step S10, equation (11) does not hold, and the inserted medal is a temporary template No. 1-No. When it is determined that they are not the same as any of 10 (when S10 is NO), the image recognition accelerator circuit 249 shifts the processing to step S12. In step S12, the image recognition accelerator circuit 249 determines whether there are ten temporary templates (S12). Specifically, the image recognition accelerator circuit 249 receives the temporary template storage area No. 1-No. 10, it is determined whether or not the temporary template is stored in all.

  Temporary template storage area No. 1-No. When the temporary template is not stored in all 10 (when S12 is NO), the image recognition accelerator circuit 249 shifts the process to step S6. In step S6, the temporary template storage area No. is stored using the gradient average image data, HOG data, and FFT data stored in the SRAM 243 in step S2 as temporary templates. 1-No. 10 is stored in an empty area.

  On the other hand, the temporary template storage area No. 1-No. When the temporary template is stored in all 10 (when S12 is YES), the image recognition accelerator circuit 249 shifts the processing to step S13. In step S13, the image recognition accelerator circuit 249 discards the gradient average image data, HOG data, and FFT data stored as the lowest temporary template. (S13). Also, the accumulated count value of the discarded temporary template No is set to zero. Then, the image recognition accelerator circuit 249 shifts the process to step S6. In step S6, the average gradient image data, HOG data, and FFT data stored in the SRAM 243 in step S2 are stored as temporary templates. That is, the gradient average image data, HOG data, and FFT data stored in the SRAM 243 in step S2 are stored so as to be replaced with the temporary template discarded in S13.

  Here, the description returns to step S8, and when the value of the learning medal counter is 127 (when S8 is YES), the image recognition accelerator circuit 249 has one or two temporary templates with a cumulative counter value of 10 or more. It is determined whether it is a type (S14). When it is determined that the temporary template having the cumulative counter value of 10 or more is not one type or two types (when the determination in step S14 is NO), the image recognition accelerator circuit 249 ends the template generation process. The case where the temporary template with the cumulative counter value of 10 or more is not one type or two types is the case where there are zero or three types of temporary templates with the cumulative counter value of 10 or more.

  On the other hand, when it is determined that there are one or two temporary templates having a cumulative counter value of 10 or more (when step S14 is YES), the image recognition accelerator circuit 249 selects a temporary template having a cumulative counter of 10 or more. The other temporary templates registered in the present template and stored in the temporary template storage area are discarded (S15). Here, “registered in the present template” means that a temporary template having a cumulative counter of 10 or more is stored in the present template storage area set in the SRAM 243, that is, the template generation is completed. Then, the image recognition accelerator circuit 249 ends the template generation process. In the following description, the temporary template stored in the template storage area may be referred to as a “main template”.

  Here, the description returns to step S9. When the value of the learning medal counter is 259 (when S9 is YES), the image recognition accelerator circuit 249 determines whether or not there are 0 types of temporary templates whose cumulative counter value is 10 or more. Is determined (S16). When it is determined that there are 0 types of temporary templates having a cumulative counter value of 10 or more (when S16 is YES), the image recognition accelerator circuit 249 proceeds to step S20 described later.

  On the other hand, when it is determined that there are not 0 types of temporary templates with a cumulative counter value of 10 or more (when S16 is NO), the image recognition accelerator circuit 249 has five or more types of temporary templates with a cumulative counter value of 10 or more. It is determined whether or not (S17). When it is determined that there are not five or more temporary templates having a cumulative counter value of 10 or more (when S17 is NO, that is, when there are 1 to 4 temporary templates of 10 or more), the image recognition accelerator circuit 249 performs the accumulation. A temporary template having a counter value of 10 or more is registered in this template, and other temporary templates stored in the temporary template storage area are discarded (S18). Then, the image recognition accelerator circuit 249 ends the template generation process.

  On the other hand, when it is determined that there are five or more types of temporary templates having a cumulative counter value of 10 or more (when S17 is YES), the image recognition accelerator circuit 249 has the cumulative counter values of the top 4 and the 5th. It is determined whether or not the cumulative counter values are equal for the temporary template (S19). When the cumulative counter values are not equal (when 19 is NO), the image recognition accelerator circuit 249 registers four types of temporary templates with the cumulative counter values from the top 1 to the 4th in this template. Other temporary templates stored in the template storage area are discarded (S21). Then, the image recognition accelerator circuit 249 ends the template generation process.

When it is determined in step S16 that there are 0 types of temporary templates having a cumulative counter value of 10 or more (when S16 is YES) and when it is determined in step S19 that the cumulative counter values are equal (S19 is YES). In the case of determination), the image recognition accelerator circuit 249 requests the host controller 241 to transmit a medal selector error command (S20). The host controller 241 transmits a medal selector error command in response to the request. The value DAT0 of this medal selector error command is set to “5” indicating “engraved template generation error”. Details of the medal selector error command will be described later.
Then, the image recognition accelerator circuit 249 ends the template generation process.

[This template update process]
Next, the template update process performed by the image recognition accelerator circuit 249 will be described with reference to FIG. FIG. 38 is a flowchart illustrating an example of the template update process. This template update process is executed each time the image recognition DSP circuit 242 performs a three-dimensional determination process.

  First, the image recognition accelerator circuit 249 determines whether or not the determination result of the three-dimensional determination process of the image recognition DSP circuit 242 is “regular medal”, that is, “determination OK” (S31). When the determination result is not “regular medal”, that is, when it is “determination NG” (when S31 is NO), the image recognition accelerator circuit 249 ends the template update process.

  On the other hand, when the determination result is “regular medal”, that is, “determination OK” (when S31 is YES), the image recognition accelerator circuit 249 sets the value of the regular medal counter set in the SRAM 243 to 1. Add (S32).

  Next, the image recognition accelerator circuit 249 determines whether or not the value of the regular medal counter is 4 (S33). When the value of the regular medal counter is not 4 (when S33 is NO), the image recognition accelerator circuit 249 ends the template update process.

  On the other hand, when the value of the regular medal counter is 4 (S33 is YES), the image recognition accelerator circuit 249 performs the template update process (S34). Specifically, the gradient average image data, HOG data of the inserted medals are added to the gradient average image data, HOG data, and FFT data of this template in which the expression (11) is established in the most recent three-dimensional determination process, respectively. Synthesize FFT data. In the present embodiment, the gradient average image data, HOG data, and FFT data of the inserted medals are combined with the gradient average image data, HOG data, and FFT data of this template by a weighted average of 1/256, respectively. It should be noted that the weight of the inserted medals on the gradient average image data, HOG data, and FFT data is not limited to 1/256, and can be arbitrarily set. In the present embodiment, the method of combining with a weighted average has been described. However, the present invention is not limited to this, and it may be combined with a simple average or an exponential average.

After step S34, the image recognition accelerator circuit 249 clears the regular medal counter and ends the template update process.
In addition, when there are a plurality of main templates that satisfy Expression (11), the main template related to the largest value calculated by x + Ay + Cz is updated. For example, when two templates A and B are registered as the main template, the value of x + Ay + Cz when the inserted medal is compared with the main template A is 2.4. When the value of x + Ay + Cz when compared with the template B is 2, the present template A is updated.

  For example, when two types of medals with different markings (patterns) on the front and back are used as regular medals by the template generation process (see FIGS. 36 and 37), the front and back of these two types of medals are used. Such four types of templates can be generated. When there is one type of regular medal, two types of templates related to the front and back of the regular medal can be generated.

[Coefficient update processing]
Next, coefficient update processing performed by the image recognition accelerator circuit 249 will be described with reference to FIG. FIG. 39 is a flowchart illustrating an example of the coefficient update process. The coefficient update process is a process for updating the values of the coefficients A, C, and D in Expression (11). The coefficient update process is executed every time the image recognition DSP circuit 242 performs a three-dimensional determination process.

  First, the image recognition accelerator circuit 249 determines whether or not the determination result of the three-dimensional determination process of the image recognition DSP circuit 242 is “determination OK” (S41). When the determination result is not “determination OK” (when S41 is NO), the image recognition accelerator circuit 249 ends the coefficient update process.

  On the other hand, when the determination result is “determination OK” (when S41 is YES), the image recognition accelerator circuit 249 adds 1 to the value of the update medal counter set in the SRAM 243 (S42).

  Next, the image recognition accelerator circuit 249 accumulates the results of template comparison (S43). Specifically, the average value and standard deviation of the evaluation values x, y, z when it is determined as “determination OK” in the three-dimensional determination process are calculated. Then, the calculated average value and standard deviation of x, y, z are stored in a predetermined area of the SRAM 243.

  Next, the image recognition accelerator circuit 249 determines whether or not the value of the update medal counter is a predetermined value (S44). In the present embodiment, the predetermined value is set to, for example, 500, 1000, and a multiple of 1000 (for example, 2000, 3000, 4000) thereafter.

  When the value of the update medal counter is not a predetermined value (when S44 is NO), the image recognition accelerator circuit 249 ends the coefficient update process. On the other hand, when the value of the update medal counter is a predetermined value (when S44 is YES), the image recognition accelerator circuit 249 updates the threshold value.

Here, the threshold value updating method will be described by taking as an example a case where the value of the update medal counter is 500, that is, when 500 regular medals inserted after template generation have been reached. First, paying attention to the evaluation value x and the evaluation value y, when x + Ay ≧ B holds, it is considered that the token is determined as a regular medal. In this case, for 500 medals that are inserted after template generation and are determined to be regular medals, the average of x is “μx”, the standard deviation is “σx”, the average of y is “μy”, and the standard deviation is “σy”. ”, The value of x on the threshold line when y = 1 is given by the following equation.
x1 = μx−σx × kx (12)

Further, the value of y on the threshold line when x = 1 is given by the following equation.
y1 = μy−σy × ky (13)
Note that k is a separately determined constant, for example, 12α.

The coefficients A and B can be obtained by the following equations using the above equations (12) and (13).
A = (x1-1) / (y1-1)
B = x1 + A

Next, using the coefficient A obtained above, the coefficients C and D in the equation (11) where x + Ay + Cz ≧ D are similarly obtained.
Here, when x + Ay = w and w + Cz ≧ D, for 500 medals inserted after template generation and determined as regular medals, the average z of “μz” is set, and the standard deviation of z is “σz”. Then, the value of z on the threshold line when w = 1 is given by the following equation.
z1 = μz−σz × kz (14)

Also, the value of w on the threshold line when z = 1 is given by the following equation.
w1 = μw−σw × kw (15)
Note that μw = μx + Aμy and σw = σx + Aσy.

From the above equations (14) and (15), C and D can be obtained by the following equations.
C = (w1-1) / (z1-1) (16)
D = w1 + C Formula (17)

  Here, in FIG. 40, x1, y1, and z1 are shown as a three-dimensional graph. In FIG. 40, a thick line connecting x1, y1, and z1 indicates the contour of the threshold plane. In FIG. 40, in the space surrounded by the threshold plane and the broken line, a portion far from the origin (the portion in front of FIG. 40, indicated by shading) is an evaluation value x, When the points indicated by y and z are included (that is, when the determination result is OK in the three-dimensional determination process), the inserted medal is determined as a regular medal. That is, in the present embodiment, the evaluation values x, y between the threshold plane formed by x1, y1, z1 calculated by the above formulas (12) to (14) and the determination reference coordinates (1, 1, 1). A determination method for determining whether y and z are included is referred to as a three-dimensional determination process. In FIG. 40, the space of coordinates (0, 0, 0) to (-1, -1, -1) is omitted for convenience.

  Next, the image recognition accelerator circuit 249 updates the coefficients A, C, D stored in the flash memory 244 to the calculated coefficients A, C, D (S46). Then, the image recognition accelerator circuit 249 ends the coefficient update process.

[Cover open detection processing]
Next, cover open detection processing performed by the medal count circuit 246 will be described.
As described above, the cover member 240 that covers the rear side in the front-rear direction of the pachislot 1 of the medal selector 201 is fixed to the medal selector 201 (see FIG. 7). When the cover member 240 is set in an open state in which the rear side in the front-rear direction of the pachislot 1 in the medal selector 201 is exposed, the cover member 240 is on the medal rail 210 compared to a case in which the cover member 240 is set in a closed state covering the rear side. In addition, extra light hits. As a result, the marking determination process performed by the medal selector 201 may be adversely affected and the determination accuracy may be reduced. Also, in normal operation, the cause of the cover member 240 being in the open state is a lack of attachment of the cover member 240 during maintenance of the medal selector 201 or a go-to action on the medal selector 201 (for example, a credit full goto) Can be considered.

  Therefore, the medal count circuit 246 of the present embodiment performs cover open detection processing for detecting that the cover member 240 is in the open state. Here, in the gray scale image, the change in luminance related to the passage of the medal may be similar to the change in luminance when extra light is shining on the medal rail 210. Therefore, in this process, the medal count circuit 246 determines that the determination result is “ON” in a plurality of determination areas, for example, the determination areas A1 to A4, B1 to B4, C1, C2, and D1 to D4 (see FIG. 22). When the state continues for a predetermined time (for example, 10 seconds), it is determined that the cover member 240 is open. Then, the determination result is output to the host controller 241. When the host controller 241 detects the determination result, it sends a medal selector error command to the sub control circuit 101. Note that “2” indicating “cover open error” is set in DAT0 of the medal selector error command. Details of the medal selector error command will be described later.

  The sub-control circuit 101 executes a medal selector error command and a cover opening error notification process in which “2” indicating “cover opening error” is set in DAT0. Here, the cover opening error notification process is a process of displaying a C1 error screen described later on the liquid crystal display device 11. Thereby, a person who sees the notification screen, for example, an employee of the game hall, can grasp that the cover member 240 is in an open state.

  In the present embodiment, in the cover open detection process, the determination result of the determination areas A1 to A4, B1 to B4, C1, C2, and D1 to D4 (see FIG. 22) continues to be “ON” for a predetermined time. In this case, the aspect of determining that the cover is open has been described. However, a plurality of determination areas to be focused on in the cover open detection process can be set as appropriate. However, in order to prevent the cover from being opened accidentally in the case of a clogged medal, an area (for example, A2 and D4) that does not become “ON” at the same time when one medal passes without any problem is included. It is desirable.

<Commands sent and received between medal selector and sub control circuit>
Here, with reference to FIG. 41, commands transmitted and received between the medal selector and the sub control circuit will be described. FIG. 41 is a list of commands transmitted and received between the medal selector and the sub control circuit.

[Command sent by medal selector]
First, a command that the medal selector 201 transmits to the sub control circuit 101 will be described. As shown in FIG. 41, the commands include an activation completion command, a determination completion command, a medal selector error command, a medal selector no operation command, an ACK command, and a NAK command. Each command includes a 2-byte transmission counter (CNT) and parameters including DAT0 to DAT6. In the present embodiment, DAT0 to DAT6 are each 1-byte data (bit 0 to bit 7). The data length of various commands is set to 9 bytes including the transmission counter, but this data length can be set as appropriate.

  As the initial value of the transmission counter (CNT) in the command transmitted by the medal selector 201, the number of activations of the medal selector 201 is set. The value of this transmission counter is incremented by 1 every time the medal selector 201 transmits a command to the sub control circuit 101.

[Startup completion command]
The activation completion command is transmitted after the medal selector 201 is turned on and the activation process is completed. The value of bit 0 of DAT0 of the start completion command indicates whether or not initialization has been performed. “0” indicates “no initialization”, and “1” indicates “initialization”. Here, when initialization is performed during energization, the control LSI 234 of the medal selector 201 sets “1” to the value of the startup initialization flag storage area of the flash memory 244. The control LSI 234 refers to the activation initialization flag storage area of the flash memory 244 when the power is turned on and transmits the activation completion command, and the activation completion command DAT0 of the activation completion command is determined according to the stored value. Set the value of bit 0. When the value of bit 0 of DAT0 of the activation completion command is “1”, that is, when the value of the activation initialization flag storage area at the time of activation is set to “1”, the medal selector 201 is connected from the sub control circuit 101. When receiving the ACK command for the activation completion command, the control LSI 234 sets “0” to the value of the activation initialization flag storage area.

  The value of bit 1 of DAT0 of the start completion command indicates whether color determination is valid or invalid at the time of command transmission. The value “0” indicates “color determination invalid”, and the value “1” indicates “color determination valid”. The case where “color determination is valid” is a case where a color template has been created at the time of command transmission and the color switch at the time of activation is in an ON state. In other cases, the color determination is invalid. Further, the value of bit 2 of DAT0 of the start completion command indicates whether the marking determination is valid or invalid at the time of command transmission. The value “0” indicates “invalidation of marking determination”, and the value “1” indicates “validation of marking determination”. The case where “the stamp determination is valid” is a case where the stamp template has been created at the time of command transmission and the stamp switch at the time of activation is in the ON state. In other cases, the stamp determination is invalid.

  The start completion command DAT1 indicates the ON / OFF state of various switches at the time of command transmission. The value of bit 0 indicates the ON / OFF state of the initialization switch, the value of bit 1 indicates the ON / OFF state of the color switch, and the value of bit 2 indicates the ON / OFF state of the marking switch. In any bit, “0” indicates “OFF state”, and “1” indicates “ON state”.

[Judgment completion command]
The determination completion command includes parameters indicating a transmission counter (CNT), a circular detection determination result, a color determination determination result, and a marking determination determination result. The value of DAT0 of the determination completion command indicates the determination result of circular detection, the value of DAT1 indicates the determination result of color determination, and the value of DAT2 indicates the determination result of marking determination. In any bit, “0” indicates “NG” (that is, “determination NG”), and “1” indicates “OK” (that is, “determination OK”).

[Medal selector error command]
The medal selector error command is transmitted when the medal selector 201 detects various errors. This command includes a transmission counter (CNT) and a parameter indicating the type of error that is occurring at the time of command transmission. The value of DAT0 of the medal selector error command is set to 0-6. “0” indicates “no error”, “1” indicates “foreign object detection error”, and “2” indicates “cover open error”. “3” indicates “cleaning error”, “4” indicates “color template generation error”, “5” indicates “engraved template generation error”, and “6” indicates “CMOS hard error” Is shown. When the control LSI 234 of the medal selector 201 detects various errors, the error contents (1 to 6) are stored in an error storage area (initial value “0”) provided in the SRAM 243. The content of the error stored in the SRAM 243 is deleted when the medal selector 201 receives an error release command (to be described later) from the sub control circuit 101 (an initial value “0” is stored).

[Medal selector no operation command]
The medal selector no-operation command is periodically transmitted from the medal selector 201 to the sub-control circuit 101. The medal selector non-operation command includes a transmission counter (CNT).
Further, the value of bit 0 of DAT0 of the medal selector no-operation command indicates whether or not initialization has been performed. “0” indicates “no initialization”, and “1” indicates “initialization”. Here, when initialization is performed during energization, the control LSI 234 of the medal selector 201 sets “1” to the value of the no-operation initialization flag storage area of the SRAM 243. When transmitting the medal selector no-operation command, the control LSI 234 refers to the no-operation initialization flag storage area of the SRAM 243, and according to the stored value, bit 0 of DAT0 of the medal selector no-operation command. Set the value of. When the value of bit 0 of DAT0 of the medal selector no-operation command is “1”, that is, when the value of the no-operation initialization flag storage area is set to “1”, the medal selector 201 is sent from the sub-control circuit 101. When receiving the ACK command for the medal selector no-operation command, the control LSI 234 sets “0” to the value of the no-operation initialization flag storage area.

  The other medal selector no-operation commands DAT0 and DAT1 are the same as the activation completion commands DAT0 and DAT1, and thus the description thereof is omitted here. Further, the content (any value from 0 to 6) of the error storage area of the SRAM 243 described above is set in the DAT3 of the medal selector no-operation command. The contents are the same as DAT0 of the medal selector error command.

  The values of DAT3 and DAT4 of the medal selector non-operation command indicate the number of activations of the medal selector 201. The number of activations is stored in the flash memory 244, and every time the medal selector 201 is activated, 1 is added to the number of activations. Specifically, the medal selector 201 has a control power management unit (not shown), and the control power management unit starts supplying power (turning on power) to the medal selector 201 and sets a preset voltage value. Is exceeded, a reset signal is output to the control LSI 234. The control LSI 234 adds 1 to the number of activations based on the input of the reset signal. The medal selector 201 (the control LSI 234) refers to the number of activations of the flash memory 244 when sending the medal selector no-operation command, and sets the values of DAT3 and DAT4. The number of activations is initialized to an initial value “0” by the initialization process performed by the control LSI 234 by the operation of the initialization switch 206d described above.

[ACK command, NAK command]
The ACK command is transmitted when the medal selector 201 can normally receive the command transmitted from the sub control circuit 101. The NAK command is transmitted when the medal selector 201 cannot normally receive the command transmitted from the sub control circuit 101. The ACK command and the NAK command include a transmission counter (CNT). Further, the values of DAT0 and DAT1 of the ACK command and the NAK command indicate values of transmission counters included in the command transmitted from the sub control circuit 101.

[Commands sent by the sub-control circuit]
Next, a command transmitted from the sub control circuit 101 to the medal selector 201 will be described. As shown in FIG. 41, the commands include an error cancel command, a submission state command, an ACK command, and a NAK command. Each command includes a 2-byte transmission counter (CNT) and parameters including DAT0 to DAT6. In the present embodiment, DAT0 to DAT6 are 1 byte (bit 0 to bit 7) data, respectively. The data length of various commands is set to 9 bytes including the transmission counter, but this data length can be set as appropriate.

  The initial value of the transmission counter (CNT) in the command transmitted by the sub control circuit 101 is set to a random number that is acquired when the command is transmitted for the first time after the sub control circuit 101 is activated. In order to generate this random number, a dedicated random number generation process (soft random number) for generating this random number, or a device may be provided, or random number generation for generating a random number used when determining the aspect of production Processing or a device may be used.

[Error cancel command]
The error cancel command is transmitted when a condition for canceling an error that has occurred in the medal selector 201 is satisfied in a medal selector command transmission process (see FIG. 59) described later. However, the satisfaction of the error cancellation condition is not whether or not the error that has occurred in the medal selector 201 is actually canceled, but whether or not the condition for transmitting the error cancellation command is satisfied.

[Submission status command]
The insertion state command is transmitted in a predetermined cycle or a medal selector command transmission process (see FIG. 59) described later. The value of DAT0 of the insertion state command indicates whether or not a medal can be accepted. “1” indicates “acceptable”, and “0” indicates “not acceptable”.

[ACK command, NAK command]
The ACK command is transmitted when the sub control circuit 101 can normally receive the command transmitted from the medal selector 201. The NAK command is transmitted when the sub control circuit 101 cannot normally receive the command transmitted from the medal selector 201. The ACK command and the NAK command include a transmission counter. The values of DAT0 and DAT1 of the ACK command and the NAK command indicate the value of the transmission counter included in the command transmitted from the medal selector 201.

<Command transmission / reception sequence between medal selector and sub-control circuit>
Next, an example of a command transmission / reception sequence between the medal selector and the sub control circuit will be described with reference to FIG. FIG. 42 is a diagram for explaining an example of a command transmission / reception sequence between the medal selector and the sub control circuit.

  When power is turned on to the pachislot 1 and the medal selector 201 and the sub control circuit 101 are activated, the medal selector 201 transmits an activation completion command to the sub control circuit 101. At this time, when the activation count stored in the flash memory 244 is “10”, the value of the transmission counter (CNT) included in the activation completion command is “10”.

  Subsequently, the sub control circuit 101 that has normally received the activation completion command transmits an ACK command to the medal selector 201. The value of the transmission counter included in the ACK command is a random number value acquired at the time of transmission, for example, “256”. Further, the values of DAT0 and DAT1 of this ACK command are “10” which is the value of the transmission counter included in the received activation completion command.

  Subsequently, in the example illustrated in FIG. 42, the medal selector 201 transmits a medal selector non-operation command to the sub-control circuit 101. The value of the transmission counter included in the medal selector no-operation command is “11” obtained by adding 1 to the initial value “10”.

  Subsequently, the sub control circuit 101 that has normally received the medal selector non-operation command transmits an ACK command to the medal selector 201. The value of the transmission counter included in the ACK command is “257” obtained by adding 1 to the initial value “256”. The values of DAT0 and DAT1 of this ACK command are “11” which is the value of the transmission counter included in the received medal selector no-operation command.

  Subsequently, in the example illustrated in FIG. 42, the sub control circuit 101 transmits the insertion state command to the medal selector 201. The value of the transmission counter included in this input state command is “258” obtained by adding 1 to “257”. Here, when the medal selector reboots (restarts) for some reason and transmits an ACK command corresponding to the insertion state command after the restart, the transmission counter included in the ACK command becomes the initial value again. In this case, since the activation count is “11”, the transmission counter included in the ACK command is “11”.

  In the present embodiment, when the sub control circuit 101 receives an ACK command from the medal selector 201, the value of the transmission counter included in the received ACK command was included in the command received from the medal selector 201 last time. It is determined whether or not it is equal to a value obtained by adding “1” to the value of the transmission counter. When it is determined that they are not equal, the error information history area provided in the sub-RAM 103 has “CMOS CNT” (hereinafter sometimes referred to as “ACK count error”) as the error content, and the current date as the occurrence date and time. And memorize the time.

In the example shown in FIG. 42, the value of the transmission counter included in the received ACK command is “11”. The value obtained by adding “1” to the value “11” of the transmission counter included in the medal selector no-operation command that is the command received from the medal selector 201 last time is “12”. Therefore, the sub CPU 102 determines that these values are not equal. Therefore, the sub CPU 102 stores “CMOS CNT” (ACK count error) as the error content and the current date and time as the occurrence date and time in the error information history area provided in the sub RAM 103.
Further, the medal selector 201 transmits a command to the sub control circuit 101 at a cycle of 500 msec. For example, in the example shown in FIG. 42, the medal selector no-operation command is transmitted to the sub control circuit 101 500 msec after the activation completion command is transmitted to the sub control circuit 101. It should be noted that the cycle for transmitting a command from the medal selector 201 to the sub control circuit 101 can be set as appropriate.

<Various processes performed by the sub-control circuit>
Next, various processes performed by the sub control circuit 101 (sub CPU 102) will be described with reference to FIGS.

[Power-on processing]
The power-on process will be described with reference to FIG. FIG. 43 is a flowchart illustrating an example of a power-on process. The sub CPU 102 performs power-on processing when the pachi-slot 1 is powered on.
In the power-on process, first, the sub CPU 102 performs an initialization process (S101). Specifically, the sub CPU 102 executes initialization of each driver and activation of a kernel (kernel or operating system).

Next, the sub CPU 102 adds 1 to the sub power-on counter (value) provided in the sub RAM 103 (S102). Specifically, the sub-control circuit 101 has a sub-control power management unit (not shown), and the sub-control power management unit starts supplying power voltage (turning on power) to the sub-control circuit 101 and sets it in advance. When the measured voltage value is exceeded, a reset signal is output to a reset terminal (not shown) of the sub CPU 102. The sub CPU 102 adds 1 to the sub power-on counter (value thereof) based on the input of the reset signal. When the medal selector 201 is initialized and the sub control circuit 101 receives an initialization completion command from the medal selector 201 (initialization is set to bit 0 of DAT0), the sub power-on counter receives the start completion command. Is cleared (set to 0).
Then, the sub CPU 102 ends the power-on process.

[Processing when no operation command is received]
The processing at the time of no-operation command reception will be described with reference to FIG. FIG. 44 is a flowchart illustrating an example of processing when a no-operation command is received. When the sub control circuit 101 receives a no-operation command from the main control circuit 91, the sub CPU 102 performs a no-operation command reception process.

  Here, the commands transmitted from the main control circuit 91 to the sub control circuit 101 include an error command, a start command, a winning action command, a medal insertion command, and a no-operation command.

  The error command is transmitted from the main control circuit 91 to the sub control circuit 101 when the main control circuit 91 detects an error. For example, the error command includes a parameter indicating the contents of various errors detected by the main control circuit 91. The start command is transmitted from the main control circuit 91 to the sub-control circuit 101 when the main control circuit 91 detects the player's operation of the start lever 23.

  The winning operation command is transmitted from the main control circuit 91 to the sub control circuit 101 at a predetermined timing. The winning operation command includes, for example, parameters indicating the type of display combination, a flag related to a lock effect, the number of medals to be paid out, and the like. The sub-control circuit 101 can recognize the symbol combination displayed along the winning determination line by receiving the winning action command, and can determine the timing for executing various effects. .

  The medal insertion command is transmitted from the main control circuit 91 to the sub-control circuit 101 when the re-game is activated or when the player performs an insertion operation (pressing the BET button 22 or inserting a medal into the medal insertion slot 21). The medal insertion command includes the number of medals inserted and a credit insertion counter described later.

  The no-operation command is transmitted when all commands other than the above-mentioned no-operation command are not transmitted in the interrupt process executed by the main CPU 93 every predetermined time (for example, 1.1173 ms). The no-operation command includes information indicating whether various buttons (BET button 22 and stop buttons 19L, 19C, 19R, etc.) are pressed and whether the medal solenoid 208 is set to an ON state or an OFF state. It is included. In addition, information indicating whether a reset switch (described later) is in an ON state or an OFF state is included.

  In the no-operation command reception process, the sub CPU 102 stores (stores) various parameters of the received no-operation command in the no-operation command storage area of the sub RAM 103 (S111). Thereby, the sub CPU 102 can execute various processes according to the stored various parameters. Then, the sub CPU 102 ends the no-operation command reception process.

[Medal selector communication task]
The medal selector communication task will be described with reference to FIG. FIG. 45 is a flowchart illustrating an example of the medal selector communication task. The sub CPU 102 executes the medal selector communication task after the power-on process.

  In the medal selector communication task, first, the sub CPU 102 performs a 10 msec cycle waiting process (S121). Specifically, the sub CPU 102 does not move the process to step S122 until 10 msec elapses after the process moves to step S121, and moves the process to step S122 after elapse of 10 msec. That is, the processing after step S122 of the medal selector communication task is performed every 10 msec.

  Next, the sub CPU 102 determines whether or not there is received data in the medal selector reception buffer (S122). The medal selector reception buffer is provided in the sub RAM 103 and temporarily stores various commands and data transmitted from the medal selector 201 to the sub control circuit 101.

  If it is determined in step S122 that there is no received data in the medal selector reception buffer (NO in S122), the sub CPU 102 shifts the process to step S121. On the other hand, if it is determined in step S122 that there is received data in the medal selector reception buffer (S122 is YES), the sub CPU 102 performs medal selector command reception processing (S123). In the medal selector command reception process, the sub CPU 102 executes various processes according to the command received from the medal selector 201. Details of the medal selector command reception process will be described later.

  Next, the sub CPU 102 performs a medal selector command transmission process (S124). In the medal selector command transmission process, the sub CPU 102 transmits various commands to the medal selector 201. Details of the medal selector command transmission process will be described later. After step S124, the sub CPU 102 shifts the process to step S121.

[Medal selector command reception processing]
The medal selector command reception process will be described with reference to FIG. FIG. 46 is a flowchart illustrating an example of medal selector command reception processing.
In the medal selector command reception process, first, the sub CPU 102 determines whether or not the command received from the medal selector 201 is an activation completion command (S131).

  If it is determined in step S131 that the received command is a startup completion command (S131 is YES), the sub CPU 102 performs a startup completion command reception process (S132). Details of the processing at the time of starting completion command reception will be described later. Thereafter, the sub CPU 102 ends the medal selector command reception process, and returns the process to step S124 of the medal selector communication task (see FIG. 45).

  On the other hand, if it is determined in step S131 that the received command is not a start completion command (S131 is NO), the sub CPU 102 determines whether or not the command received from the medal selector 201 is a determination completion command (S133). ).

  If it is determined in step S133 that the received command is a determination completion command (S133 is YES), the sub CPU 102 performs a determination completion command reception process (S134). Details of the determination completion command reception process will be described later. Thereafter, the sub CPU 102 ends the medal selector command reception process, and returns the process to step S124 of the medal selector communication task (see FIG. 45).

  On the other hand, if it is determined in step S133 that the received command is not the determination completion command (NO in S133), the sub CPU 102 determines whether or not the command received from the medal selector 201 is a medal selector error command ( S135).

  If it is determined in step S135 that the received command is a medal selector error command (YES in S135), the sub CPU 102 performs a medal selector error command reception process (S136). Details of the medal selector error command reception process will be described later. Thereafter, the sub CPU 102 ends the medal selector command reception process, and returns the process to step S124 of the medal selector communication task (see FIG. 45).

  On the other hand, if it is determined in step S135 that the received command is not a medal selector error command (S135 is NO), the sub CPU 102 determines whether the command received from the medal selector 201 is an ACK or NAK command. (S137).

  If it is determined in step S137 that the received command is an ACK or NAK command (YES in S137), the sub CPU 102 performs an ACK / NAK command reception process (S138). In the ACK / NAK command reception process, various processes are performed according to the received ACK / NAK command. Examples of the various processes include instructing the liquid crystal display device 11 to end the display of the C1 error screen (see FIG. 54) when an ACK command for an error release command described later is received from the medal selector 201. The above ACK count error may be registered in the error information history. Thereafter, the sub CPU 102 ends the medal selector command reception process, and returns the process to step S124 of the medal selector communication task (see FIG. 45).

  On the other hand, when it is determined in step S137 that the received command is not ACK or NAK (when S137 is NO), the sub CPU 102 determines whether or not the command received from the medal selector 201 is a medal selector no-operation command. (S139).

  If it is determined in step S139 that the received command is a medal selector no-operation command (S139 is YES), the sub CPU 102 performs a medal selector no-operation command reception process (S140). Details of the processing when the medal selector no-operation command is received will be described later. Thereafter, the sub CPU 102 ends the medal selector command reception process, and returns the process to step S124 of the medal selector communication task (see FIG. 45).

  On the other hand, if it is determined in step S139 that the received command is not a medal selector no-operation command (NO in S139), the sub CPU 102 ends the medal selector command reception process, and the process proceeds to the medal selector communication task (FIG. 45)).

[Processing upon receipt of startup completion command]
The process at the time of starting completion command reception will be described with reference to FIG. FIG. 47 is a flowchart illustrating an example of processing upon reception of a start completion command.
In the start completion command reception process, first, the sub CPU 102 acquires the setting information from the reception buffer and stores it (S141). Specifically, the sub CPU 102 sets the start completion command DAT0 (presence of initialization, validity / invalidity of color determination / marking determination) received from the medal selector 201 stored in the reception buffer as setting information. Store in the setting information storage area.

  Next, the sub CPU 102 determines whether or not the setting information saved in step S141 includes information indicating that there is initialization (S142). Specifically, the sub CPU 102 refers to the value of the setting information stored in the setting information storage area of the sub RAM 103 and determines whether the value of bit 0 is 1 (with initialization).

If it is determined in step S142 that the stored setting information does not include information indicating that there is initialization (when S142 is NO), the sub CPU 102 shifts the process to step S144 described later.
On the other hand, if it is determined in step S142 that the stored setting information includes information indicating that there is initialization (if S142 is YES), the sub CPU 102 issues an initialization error screen display request (S143). ). Specifically, the sub CPU 102 instructs the liquid crystal display device 11 to display an initialization error screen.

  Receiving the instruction, the liquid crystal display device 11 causes the display unit 11a to display an initialization error screen as shown in FIG. In the present embodiment, on the initialization error screen, a character string “selector has been initialized” is displayed in the lower right portion when the gaming machine is viewed from the front.

  If it is determined after step S143 or in step S142 that the stored setting information does not include information indicating that there is initialization (when S142 is NO), the sub CPU 102 performs the process of step S144. Do. In step S144, the sub CPU 102 acquires switch information from the reception buffer. Specifically, the sub CPU 102 acquires the activation completion command DAT1 (ON / OFF state of various switches) received from the medal selector 201 stored in the reception buffer.

  Next, the sub CPU 102 determines whether or not the switch information in the first switch information storage area matches the switch information acquired in step S144 (S145). Here, the first switch information storage area is allocated to the backup area of the sub RAM 103. In the first switch information storage area, when there is a change in the switch information at the previous activation and the switch information at the current activation in step S147 described later, the switch information at the current activation is stored. .

  If it is determined in step S145 that they match (if S145 is YES), the sub CPU 102 shifts the process to step S148 described later. On the other hand, if it is determined in step S145 that they do not match (S145 is NO), the sub CPU 102 issues a selector switch error screen display request (S146). Specifically, the sub CPU 102 instructs the liquid crystal display device 11 to display a selector switch error screen.

  Upon receiving the instruction, the liquid crystal display device 11 displays a selector switch error screen as shown in FIG. 49 on the display unit 11a. In the present embodiment, on the selector switch error screen, a character string “the selector switch has been changed” is displayed in the lower right portion when the gaming machine is viewed from the front. In addition, a character string indicating the ON / OFF state of the color switch and the stamp switch is displayed according to the switch information acquired in step S144. In the present embodiment, “COLOR SW: ON” and “MARK SW: ON” are displayed as character strings indicating the ON state of the color switch and the marking switch, as shown in the figure. In this case, the character string indicating the OFF state of the color switch is “COLOR SW: OFF”, and the character string indicating the OFF state of the marking switch is “MARK SW: ON”.

Next, the sub CPU 102 saves (overwrites) the switch information acquired in step S144 in the first switch storage area.
Next, the sub CPU 102 stores the switch information acquired in step S <b> 144 in the second switch information storage area of the sub RAM 103. Then, the sub CPU 102 ends the process at the time of starting completion command reception, and returns the process to step S124 of the medal selector communication task (see FIG. 45).

[Processing when a judgment completion command is received]
The determination completion command reception process will be described with reference to FIG. FIG. 50 is a flowchart illustrating an example of processing upon reception of a determination completion command.
In the determination completion command reception process, first, the sub CPU 102 registers a determination result in a queue (S151). Specifically, the sub CPU 102 determines the determination completion commands DAT0 (circle detection OK / NG), DAT1 (color determination OK / NG), and DAT2 (marking determination OK / NG) received from the medal selector 201 stored in the reception buffer. NG) value (data) is registered in the queue.

  Here, the DRAM of the sub-RAM 103 of this embodiment is provided with a queue as shown in FIG. The queue is an area in which data for 60 blocks of FIFO (First In, First Out) setting can be registered. One block of data is composed of data of DAT0 to DAT2 of a determination completion command. When the data D61 of the 61st block is registered in the queue in the state where the data for 60 blocks are registered in the queue, the data D1 registered in the queue first overflows from the queue and is discharged. Therefore, the determination result for the latest 60 medals is always registered in the queue. In the following description, the overflowing and discharging of data from the queue may be referred to as “queue overflow”.

  Next, the sub CPU 102 determines whether or not there is a queue overflow (S152). When determining that there is no queue overflow (when S152 is NO), the sub CPU 102 shifts the processing to step S157 described later. On the other hand, when it is determined that there is a queue overflow (S152 is YES), the sub CPU 102 performs a queue registration check process (S153). In the queue registration check process, the sub CPU 102 performs circular detection, color determination, and color determination among the data for 60 blocks registered in the queue (here, the data stored in one block is one data). The number of data including “0”, that is, “NG (determination NG)” is counted in any one of the determination results of the marking determination. That is, the number of data as the counting result is the number of medals that have become “determination NG”, that is, “illegal medal” in any one of the determination results of circular detection, color determination, and stamp determination.

  Next, the sub CPU 102 determines whether or not the number of data including the NG determination counted in step S153, that is, the number of illegal medals is equal to or greater than a threshold (in this embodiment, “5”) (S154). When determining that the number of data including NG determination is not equal to or greater than the threshold value (when S154 is NO determination), the sub CPU 102 shifts the processing to step S157 described later. On the other hand, when determining that the number of data including the NG determination is equal to or greater than the threshold value (when S154 is YES), the sub CPU 102 makes a C2 error screen display request (S155). Specifically, the sub CPU 102 instructs the liquid crystal display device 11 to display the C2 error screen.

  Receiving the instruction, the liquid crystal display device 11 displays a C2 error screen as shown in FIG. 52 on the display unit 11a. In the present embodiment, the C2 error screen has a character string “please call an attendant” at the center of the screen, and a plurality of square frames displayed in a horizontal row below the character string. In each of the plurality of square frames, an erase code consisting of two alphabets is displayed. In this embodiment, CC, CE, CO, CR, HE, HJ, DO, CA, C1, and C2 error codes are displayed in each of the square frames from the left side to the right side of the screen. A character string “ERROR CODE” and a character string indicating the contents of each error code are displayed below the plurality of square frames. For example, character strings “CC: inserted medal passage count error”, “C1: CMOS selector error 1”, and “C2: CMOS selector error 2” are displayed. Although not shown in the drawing, the square frame on which the C2 error code is displayed on the C2 error screen is highlighted to emit light in a manner distinguishable from the other square frames.

  Next, the sub CPU 102 registers the C2_1 error in the error information history (S156). Specifically, the sub CPU 102 stores “C2_1” as the error content and the current date and time as the occurrence date and time in the error information history area provided in the sub RAM 103.

  After step S156, when it is determined in step S152 that there is no queue overflow (when S152 is No), or when it is determined in step S154 that the number of data including NG determination is not equal to or greater than the threshold (S154 In the case of No determination), the sub CPU 102 performs the process of step S157. In step S157, the sub CPU 102 determines whether or not a medal can be accepted and the determination result is OK. Specifically, referring to the medal acceptance status flag setting area of the sub RAM 103, whether or not the medal acceptance status flag is set (the value is “1”), and the determination result registered in the queue in step S151 are: It is determined whether the determination is OK (all of the circular detection, the color determination, and the marking determination are “OK (determination OK)”).

  In step S157, when it is determined that the medal cannot be accepted or the determination result is not OK (when S157 is NO), the sub CPU 102 ends the determination completion command reception process, and the process proceeds to the medal selector communication task ( Return to step S124 of FIG.

  On the other hand, when it is determined in step S157 that the medal can be accepted and the determination result is OK (when S157 is YES), the sub CPU 102 adds 1 to the sub medal counter (value). The sub medal counter is provided in the sub RAM 103 and is cleared (set to 0) when the sub control circuit 101 receives a medal insertion command from the main control circuit 91.

  Next, the sub CPU 102 determines whether or not the value of the sub medal counter is greater than or equal to a predetermined value (S159). The predetermined value here is equal to or greater than the sum of the maximum number of medals that can be inserted into a unit game (three in the present embodiment) and the maximum number of medals that can be credited to the pachislot 1 (50 in the present embodiment). It can be set as appropriate. In the present embodiment, “55” is set as the predetermined value. If it is determined in step S159 that the sub medal counter (value) is not equal to or greater than the predetermined value (if S159 is NO), the sub CPU 102 ends the determination completion command reception process, and the process is the medal selector communication task. The process returns to step S124 (see FIG. 45).

  On the other hand, when the sub CPU 102 determines that the sub medal counter (value) is equal to or greater than the predetermined value (YES in S159), the sub CPU 102 makes a C2 error screen display request (S160). Specifically, the sub CPU 102 instructs the liquid crystal display device 11 to display a C2 error screen (see FIG. 52). Upon receiving the instruction, the liquid crystal display device 11 displays a C2 error screen on the display unit 11a.

Next, the sub CPU 102 registers the C2_2 error in the error information history (S161). Specifically, the sub CPU 102 stores “C2_2” as the error content and the current date and time as the occurrence date and time in the error information history area provided in the sub RAM 103. Then, the sub CPU 102 ends the determination completion command reception process, and returns the process to step S124 of the medal selector communication task (see FIG. 45).
Note that the threshold value in step S154 can be changed as appropriate. For example, a threshold setting menu may be provided in a menu that can be selected on the hall menu screen displayed on the liquid crystal display device 11 to be described later, and the threshold may be changed to an arbitrary value when the menu is selected. For example, the threshold value may be set in three stages “5”, “10”, and “15”, and values “1” to “99” may be arbitrarily set. Note that the above-described threshold “5” is a threshold set by default and is stored in the backup area of the sub-RAM 103.

[Process when receiving medal selector error command]
The medal selector error command reception process will be described with reference to FIG. FIG. 53 is a flowchart showing an example of processing upon receiving a medal selector error command.
In the medal selector error command reception process, first, the sub CPU 102 determines whether or not a C1 error is occurring (S171). Specifically, the sub CPU 102 checks whether or not the C1 error screen shown in FIG. 54 is displayed on the liquid crystal display device 11. If the C1 error screen is being displayed, the sub CPU 102 determines that an error has occurred and displays it. If not, it is determined that no error has occurred.

  In the C1 error screen shown in FIG. 54, compared to the above-described C2 error screen (see FIG. 52), the square frame to be highlighted is not the square frame in which the C2 error code is displayed, but the C1 error code. The screen is the same as the C2 error screen except that the square frame is displayed.

  Here, in the present embodiment, there are two types of errors relating to the medal selector: C1 error and C2 error. The C2 error is an error that is determined to have occurred by the sub control circuit 101 (sub CPU 102) (for example, the above-described C2_1, C2_2 error and C2_3 error, C2_4 error described later). A screen (see FIG. 52) is displayed.

  On the other hand, the C1 error is an error determined by the medal selector 201 (the control LSI 234) to have occurred. In the present embodiment, there are six types of C1 errors: foreign object detection error, cover opening error, cleaning error, color template generation error, stamp template generation error, and hardware error.

  If it is determined in step S171 that a C1 error has occurred (YES in S171), the sub CPU 102 ends the medal selector error command reception process, and the process is performed as a medal selector communication task (see FIG. 45). ) To step S124.

  On the other hand, when it is determined in step S171 that the C1 error is not occurring (NO in S171), the sub CPU 102 determines whether the error state of the reception buffer is 0 (S172). Specifically, the sub CPU 102 refers to the medal selector error command DAT0 or the medal selector no operation command DAT2 (see FIG. 41) stored in the reception buffer, that is, refers to data indicating an error state. Then, it is determined whether or not the value is “0” indicating “no error”.

  If it is determined in step S172 that the value of the data indicating the error state is “0” (S172 is YES), the sub CPU 102 ends the medal selector error command reception process, and the process proceeds to medal selector communication. The process returns to step S124 of the task (see FIG. 45).

  On the other hand, if it is determined in step S172 that the data value indicating the error state is not “0” (NO in S172), the sub CPU 102 issues a C1 error screen display request (S173). Specifically, the sub CPU 102 instructs the liquid crystal display device 11 to display a C1 error screen (see FIG. 54).

  Next, the sub CPU 102 registers the “C1_ *” error in the error information history (S174). Specifically, the sub CPU 102 stores, in the error information history area provided in the sub RAM 103, error contents (any one of “1” to “6”) corresponding to the error state in the command stored in the reception buffer. Register the current date and time as the occurrence date and time. For example, when the error state in the command stored in the reception buffer is “5” indicating “engraved template generation error”, “C1_5” is registered as the error content. Then, the sub CPU 102 ends the medal selector error command reception process, and returns the process to step S124 of the medal selector communication task (see FIG. 45).

[Processing when medal selector no-operation command is received]
The processing at the time of receiving the medal selector non-operation command will be described with reference to FIG. FIG. 55 is a flowchart illustrating an example of processing upon reception of a medal selector no-operation command.
In the process at the time of receiving the medal selector no-operation command, first, the sub CPU 102 determines whether or not the value of bit 0 of DAT0 of the medal selector no-operation command stored in the reception buffer is “1” indicating “with initialization”. Determination is made (S181). When determining that there is no initialization (when S181 is NO), the sub CPU 102 shifts the processing to step S183 described later.

  On the other hand, if it is determined that there is initialization (S181 is YES), the sub CPU 102 issues an initialization error screen display request (S182). Specifically, the sub CPU 102 instructs the liquid crystal display device 11 to display an initialization error screen. Upon receiving the instruction, the liquid crystal display device 11 displays an initialization error screen (see FIG. 48) on the display unit 11a.

  After step S182 or when it is determined in step S181 that there is no initialization (NO in S181), the sub CPU 102 performs a startup number determination process (S183). In the activation number determination process, the consistency between the number of power-on times counted by the medal selector 201 and the number of power-on times counted by the sub-control circuit 101 is confirmed, and if the difference between the two is equal to or greater than a preset threshold value, an error occurs. Is notified. The details of the activation number determination process will be described later.

  Next, the sub CPU 102 performs a switch state determination process (S184). In the switch state determination process, the state of various switches of the medal selector 201 is confirmed, and if there is a change, it is registered in the error information history. The details of the switch state determination process will be described later.

  Next, the sub CPU 102 performs the above-described medal selector error command reception process (see FIG. 53) (S185). As a result, even if some failure occurs and the sub control circuit 101 cannot receive the error command from the medal selector 201, the sub control circuit 101 receives the medal selector no-operation command. It is possible to appropriately detect and notify the error state in which the error occurs. Then, the sub CPU 102 ends the process when the medal selector no-operation command is received, and returns the process to step S124 of the medal selector communication task (see FIG. 45).

[Startup count judgment processing]
The activation number determination process will be described with reference to FIG. FIG. 56 is a flowchart illustrating an example of the activation number determination process.
In the activation number determination process, first, the sub CPU 102 obtains the activation number from the reception buffer, and calculates the difference between the activation number and the value of the sub power-on counter (S191). Specifically, the sub CPU 102 refers to the DAT 3, 4 (see FIG. 41) of the medal selector no-operation command received from the medal selector 201 stored in the reception buffer, acquires the number of times of activation, and sub power-on counter The absolute value of the difference between the values of is calculated.

  Next, it is determined whether or not the absolute value of the difference calculated in step S191 is greater than or equal to a preset threshold value (S192). In the present embodiment, “5” is set as the threshold value. The threshold value can be changed as appropriate. If it is determined in step S192 that the difference is not greater than or equal to the threshold (NO in step S192), the sub CPU 102 ends the activation number determination process, and the process is the process when the medal selector no-operation command is received (see FIG. 55). It returns to step S184.

  On the other hand, if it is determined in step S192 that the difference is greater than or equal to the threshold value (if S192 is YES), the sub CPU 102 issues a C2 error screen display request (S193). Specifically, the sub CPU 102 instructs the liquid crystal display device 11 to display the above-described C2 error screen (see FIG. 52). Upon receiving the instruction, the liquid crystal display device 11 displays a C2 error screen on the display unit 11a.

  Next, the sub CPU 102 registers the C2_3 error in the error information history (S194). Specifically, the sub CPU 102 stores “C2_3” as the error content and the current date and time as the occurrence date and time in the error information history area provided in the sub RAM 103. Then, the sub CPU 102 ends the activation number determination process, and returns the process to step S184 of the medal selector no-operation command reception process (see FIG. 55).

[Switch status judgment processing]
The switch state determination process will be described with reference to FIG. FIG. 57 is a flowchart illustrating an example of a switch state determination process.
In the switch state determination process, first, the sub CPU 102 acquires switch information from the reception buffer (S201). Specifically, the sub CPU 102 refers to the DAT1 (see FIG. 41) of the medal selector no-operation command received from the medal selector 201 stored in the reception buffer, and switches information, that is, the initialization switch 206d and the color switch 206e. And the state 206f (ON / OFF state) of the marking switch is acquired.

  Next, it is determined whether or not the switch information acquired in step S201 matches the switch information stored in the second switch information storage area (S202). Specifically, the sub CPU 102 switches the switch information stored in the second switch information storage area of the sub RAM 103 in step S148 of the start completion command reception process (see FIG. 47) or step S209 described later, and in step S201. It is determined whether or not the acquired switch information matches. When it is determined that they match (when S202 is YES), the sub CPU 102 ends the switch state determination process, and returns the process to step S185 of the medal selector no-operation command reception process (see FIG. 55).

  On the other hand, if it is determined in step 202 that the switch information acquired in step S201 does not match the switch information stored in the second switch information storage area (if S202 is NO), the sub CPU 102 The process proceeds to S203. In S203, the sub CPU 102 determines whether or not the marking determination is valid (S203). Specifically, the sub CPU 102 determines whether or not the value of bit 2 of the setting information stored in step S141 of the process at the time of reception of the start completion command (see FIG. 47) is 1 (marking determination valid).

  If it is determined in step S203 that the marking determination is not valid (S203 is NO determination), the sub CPU 102 shifts the process to step S206 described later. On the other hand, if it is determined in step S203 that the marking determination is valid (YES determination in S203), the sub CPU 102 shifts the process to step S204. In step 204, the sub CPU 102 switches the switch information (ON / OFF state) related to the stamp switch among the switch information acquired in step S201, and the switch information related to the stamp switch stored in the second switch information storage area. It is determined whether or not (ON / OFF state) matches (S204). When it is determined that they match (when S204 is YES), the sub CPU 102 shifts the processing to step S206 described later.

  On the other hand, when it is determined in step S205 that they do not match (when S204 is NO), "CMOS MARK *" is registered in the error information history (S205). Specifically, the sub CPU 102 stores “CMOS MARK *” as the error content and the current date and time as the occurrence date and time in the error information history area provided in the sub RAM 103. In the error content, “CMOS MARK ON” or “CMOS MARK OFF” is registered according to the switch information (ON / OFF state) related to the stamped switch in the switch information acquired in step S201. When the switch information related to the acquired stamp switch indicates “ON state”, “CMOS MARK ON” is registered as the error content, and the switch information related to the acquired stamp switch indicates “OFF state” Registers “CMOS MARK OFF” as the error content.

  After step S205, or if NO is determined in step S203, or if YES is determined in step S204, the sub CPU 102 shifts the process to step S206. In step S206, the sub CPU 102 determines whether or not the color determination is valid (S206). Specifically, the sub CPU 102 determines whether or not the value of bit 1 of the setting information stored in step S141 of the process at the time of activation completion command reception (see FIG. 47) is 1 (color determination valid).

  If it is determined in step S206 that the color determination is not valid (NO in step S206), the sub CPU 102 shifts the process to step S209 described later. On the other hand, if it is determined in step S206 that the color determination is valid (YES in S206), the sub CPU 102 shifts the process to step S207. In step 207, the sub CPU 102 switches the switch information (ON / OFF state) related to the color switch in the switch information acquired in step S201, and the switch information related to the color switch stored in the second switch information storage area. It is determined whether or not (ON / OFF state) matches (S207). When it is determined that they match (when S206 is YES), the sub CPU 102 shifts the processing to step S209 described later.

  On the other hand, if it is determined in step S207 that they do not match (NO in S207), “CMOS COL *” is registered in the error information history (S208). Specifically, the sub CPU 102 stores “CMOS COL *” as the error content and the current date and time as the occurrence date and time in the error information history area provided in the sub RAM 103. In the error content, “CMOS COL ON” or “CMOS COL OFF” is registered according to the switch information (ON / OFF state) related to the color switch in the switch information acquired in step S201. When the switch information related to the acquired color switch indicates “ON state”, “CMOS COL ON” is registered as the error content, and the switch information regarding the acquired color switch indicates “OFF state” Registers “CMOS COL OFF” as the error content.

  After step S208, or in the case of NO determination in step S206, or in the case of YES determination in step S207, the sub CPU 102 shifts the processing to step S209. In step S209, the sub CPU 102 saves the switch information acquired in step S201, that is, the state of the initialization switch, the color switch, and the stamp switch (ON / OFF state) in the second switch information storage area (overwriting). Remember). Then, the sub CPU 102 ends the switch state determination process, and returns the process to step S185 of the medal selector no-operation command reception process (see FIG. 55).

[Process when receiving medal insertion command]
The medal insertion command reception process will be described with reference to FIG. FIG. 58 is a flowchart showing an example of processing upon receiving a medal insertion command. When the sub control circuit 101 receives a medal insertion command from the main control circuit 91, the sub CPU 102 performs a process when receiving the insertion command.

  In the medal insertion command reception process, first, the sub CPU 102 determines whether or not the credit insertion counter of the reception buffer is 0 (S211). Here, as described above, the credit insertion counter is included in the parameters of the medal insertion command. The credit insertion counter is information for specifying the number of medals to bet from the number of medals credited. In other words, the value of the credit insertion counter in the medal insertion command is “0”, indicating that the insertion command is not transmitted because the credited medal is bet.

  In step S211, the sub CPU 102 refers to the medal insertion command stored in the reception buffer of the sub RAM 103, and determines whether or not the value of the credit insertion counter included in the medal insertion command is “0”. . When it is determined that the value of the credit insertion counter is not “0” (NO in S211), the sub CPU 102 ends the medal insertion command reception process.

  On the other hand, when it is determined that the value of the credit insertion counter is “0” (S211 is YES), the sub CPU 102 adds 1 to the value of the sub medal insertion counter (S212). The sub medal insertion counter is provided in the sub RAM 103, and the sub medal insertion counter is set to 0 (cleared) when the game starts, that is, when a start command is received, or when the game ends, that is, when a winning command is received.

  Next, the sub CPU 102 determines whether or not a determination completion command has been received from the medal selector 201 (S213). When determining that it has been received (when S213 is YES), the sub CPU 102 ends the medal insertion command reception process. On the other hand, if it is determined that no sub-medal has been received (NO in S213), it is determined whether or not the value of the sub medal insertion counter is equal to or greater than a predetermined value (S214). The predetermined value here can be set as appropriate. In the present embodiment, “3” is set as the predetermined value.

  If the sub CPU 102 determines in step S214 that the value of the sub medal insertion counter is not equal to or greater than the predetermined value (NO in S214), the sub CPU 102 ends the medal insertion command reception process. On the other hand, when it is determined that the value of the sub medal insertion counter is equal to or larger than the predetermined value (YES in S214), the sub CPU 102 issues a C2 error screen display request. Specifically, the sub CPU 102 instructs the liquid crystal display device 11 to display the above-described C2 error screen (see FIG. 52). Upon receiving the instruction, the liquid crystal display device 11 displays a C2 error screen on the display unit 11a.

  Next, the sub CPU 102 registers the C2_4 error in the error information history (S216). Specifically, the sub CPU 102 stores “C2_4” as the error content and the current date and time as the occurrence date and time in the error information history area provided in the sub RAM 103. Then, the sub CPU 102 ends the medal insertion command reception process.

[Medal selector command transmission processing]
The medal selector command transmission process will be described with reference to FIG. FIG. 59 is a flowchart illustrating an example of medal selector command transmission processing.
In the medal selector command transmission process, the sub CPU 102 first determines whether or not an ACK or NAK is received (S221). Specifically, the sub CPU 102 determines whether or not the command most recently received from the medal selector 201 is an ACK or NAK command. If it is determined that the ACK or NAK is received (S221 is YES), the sub CPU 102 shifts the process to step S223 described later.

  On the other hand, if it is determined in step S221 that the ACK or NAK is not received (S221 is NO), the sub CPU 102 performs ACK / NAK transmission processing (S222). In this process, the sub CPU 102 transmits an ACK or NAK command to the medal selector 201. Then, the sub CPU 102 ends the medal selector command transmission process.

  If it is determined in step S221 that an ACK or NAK has been received (YES in S221), the sub CPU 102 performs an error cancellation determination process (S223). In the error cancellation determination process, when the cancellation condition related to various errors is satisfied, the sub CPU 102 sets the cancellation condition flag related to the error for which the cancellation condition is satisfied (sets the value “1”). Details of the error cancellation determination process will be described later.

  Next, the sub CPU 102 determines whether or not the C1 error is occurring and the release condition flag is satisfied (S224). Specifically, the sub CPU 102 determines whether or not the C1 error is occurring based on whether or not the C1 error screen (see FIG. 54) is displayed on the liquid crystal display device 11. Further, the sub CPU 102 determines whether or not the release condition flag is satisfied based on whether or not “1” is set in the release condition flag storage area provided in the sub RAM 103. When determining that the C1 error is not occurring or that the release condition flag is not satisfied (when S224 is NO), the sub CPU 102 shifts the processing to step S226 described later.

  On the other hand, when it is determined in step S224 that the release condition flag is satisfied (S224 is YES), the sub CPU 102 performs an error release command transmission process (S225). In this process, the sub CPU 102 transmits an error cancellation command to the medal selector 201. Then, the sub CPU 102 ends the medal selector command transmission process. When the sub control circuit 101 receives an ACK command corresponding to the error cancel command from the medal selector 201, the sub CPU 102 performs liquid crystal display in the ACK / NAK reception process in step S138 of the medal selector command reception process (FIG. 46). The display device 11 is instructed to end the display of the C1 error screen.

  When it is determined in step S224 that the release condition flag is not satisfied (when S224 is NO), the sub CPU 102 determines whether or not the medal acceptance flag cannot be accepted (S226). The medal acceptance flag storage area is provided in the sub RAM 103. In the medal acceptance flag storage area, if the medal solenoid 208 is in the ON state based on the information on the medal solenoid 208 included in the no-operation command received from the main control circuit 91 in steps S229 and S232 described later. “1” (acceptable) is set in the OFF state, and “0” (not acceptable) is set. In step S226, when it is determined that the medal acceptance flag is not acceptable (can be accepted) (when S226 is NO), the sub CPU 102 shifts the processing to step S230 described later.

  If it is determined in step S226 that the medal acceptance flag indicates that the medal cannot be accepted (YES in S226), the sub CPU 102 determines whether or not the medal solenoid of the no-operation command is in an ON state (S227). Specifically, the sub CPU 102 refers to the no-operation command storage area in which the latest no-operation command received from the main control circuit 91 is stored, and the ON / OFF state of the medal solenoid 208 included in this no-operation command Based on this information, it is determined whether or not the medal solenoid is in an ON state. The no-operation command storage area is provided in the sub RAM 103 as described above.

  If it is determined in step S227 that the medal solenoid is not in the ON state (NO in S227), the sub CPU 102 ends the medal selector command transmission process. On the other hand, if it is determined in step S227 that the medal solenoid is in the ON state (YES in S227), the sub CPU 102 transmits an insertion state (possible) command (S228). Specifically, the sub CPU 102 transmits an insertion state command having a value of DAT0 “1” (acceptable) to the medal selector 201.

  Next, the sub CPU 102 sets the medal acceptance flag to the medal acceptance flag (S229). Specifically, the sub CPU 102 sets “1” (acceptance) in the medal acceptance flag storage area of the sub RAM 103. Then, the sub CPU 102 ends the medal selector command transmission process.

  If it is determined in step S226 that the medal acceptance flag indicates that the medal acceptance is not possible (when S226 is NO), the sub CPU 102 determines whether or not the medal solenoid of the no-operation command is in the OFF state (S230). Specifically, the sub CPU 102 refers to the no-operation command storage area in which the latest no-operation command received from the main control circuit 91 is stored, and the ON / OFF state of the medal solenoid 208 included in this no-operation command Based on the information, it is determined whether or not the medal solenoid is in an OFF state.

  If it is determined in step S230 that the medal solenoid is not in an OFF state (NO in S230), the sub CPU 102 ends the medal selector command transmission process. On the other hand, when it is determined in step S230 that the medal solenoid is in the OFF state (when S230 is YES), the sub CPU 102 transmits an insertion state (impossible) command (S231). Specifically, the sub CPU 102 transmits to the medal selector 201 an insertion state command in which the value of DAT0 is “0” (cannot be accepted).

  Next, the sub CPU 102 sets a medal acceptance flag to the medal acceptance flag (S232). Specifically, the sub CPU 102 sets “0” (cannot be accepted) in the medal acceptance flag storage area of the sub RAM 103. Then, the sub CPU 102 ends the medal selector command transmission process.

[Error cancellation judgment processing]
The error release determination process will be described with reference to FIG. FIG. 60 is a flowchart illustrating an example of the error cancellation determination process.
In the error cancellation determination process, the sub CPU 102 first determines whether the error that is occurring is a C1 or C2 error (S241). Specifically, the sub CPU 102 determines that the error that is occurring is a C1 or C2 error based on whether the C1 error screen (see FIG. 54) or the C2 error screen (see FIG. 52) is displayed on the liquid crystal display device 11. It is determined whether or not. When it is determined that the error in progress is not a C1 or C2 error (NO in S241), the sub CPU 102 shifts the process to step S248 described later.

  On the other hand, when it is determined in S241 that the current error is a C1 or C2 error (YES in S241), the sub CPU 102 determines whether or not the 24h door monitoring switch is open (S242). Here, the 24h door opening / closing monitoring switch is provided at a position above the door opening / closing monitoring switch 67 and is connected to the 24h door opening / closing monitoring unit 63, and detects opening / closing of the front door 2b. The sub CPU 102 determines whether it is in the open state (that is, whether the front door 2b is in the open state) based on the detection result of the 24h door open / close monitoring switch. When it is determined that the 24h door monitoring switch is not in the open state (when S242 is NO), the sub CPU 102 shifts the process to step S247 described later.

  On the other hand, when it is determined in S242 that the 24h door monitoring switch is in the open state (YES in S242), it is determined whether or not the reset switch for the no-operation command is in the ON state (S243). Here, the reset switch is a switch connected to the main control circuit 91, and when resetting various settings and error states of the pachislot machine 1 such as an administrator of the gaming machine (for example, an employee of the gaming hall) The ON state is set by a pressing operation. The reset switch is exposed when the front door 2b is in an open state, and can be set to an ON state by a pressing operation by a player's manager or the like. The non-operation command that the main control circuit 91 periodically transmits to the sub control circuit 101 includes information indicating whether the reset switch is in the ON state or the OFF state. Therefore, the sub CPU 102 refers to the no-operation command stored in the no-operation command storage area of the sub RAM 103 and determines whether or not the reset switch is in the ON state. When determining that the reset switch is not in the ON state (when S243 is NO), the sub CPU 102 shifts the processing to step S247 described later.

  On the other hand, when it is determined in S243 that the reset switch is in the ON state (YES in S243), the sub CPU 102 determines whether or not the error that is occurring is a C1 error (S244). Specifically, the sub CPU 102 determines whether or not the current error is a C1 error based on whether or not the C1 error screen (see FIG. 54) is displayed on the liquid crystal display device 11.

  In S244, when it is determined that the error in progress is a C1 error (S244 is YES), the release condition flag is set as established (S245). Specifically, the sub CPU 102 sets “1” (established) in the release condition flag storage area of the sub RAM 103. Then, the sub CPU 102 ends the error release determination process, and returns the process to step S224 of the medal selector command transmission process (see FIG. 59).

  If it is determined in S244 that the current error is not a C1 error (NO in S244, that is, if a C2 error has occurred), the sub CPU 102 issues a C2 error screen display end request (S246). Specifically, the sub CPU 102 instructs the liquid crystal display device 11 to end the display of the C2 error screen. Receiving the instruction, the liquid crystal display device 11 ends the display of the C2 error screen as shown in FIG. Then, the sub CPU 102 ends the error release determination process, and returns the process to step S224 of the medal selector command transmission process (see FIG. 59).

  When it is determined in step S242 that the 24h door monitoring switch is not in the open state (when S242 is NO), and when it is determined in step S243 that the reset switch for the no-operation command is not in the ON state (when S243 is NO) ) The sub CPU 102 shifts the process to step S247. In step S247, the sub CPU 102 sets the cancellation condition flag to not satisfied (S245). Specifically, the sub CPU 102 sets “0” (not established) in the release condition flag storage area of the sub RAM 103. Then, the sub CPU 102 ends the error release determination process, and returns the process to step S224 of the medal selector command transmission process (see FIG. 59).

  If it is determined in step S241 that the error that is occurring is not a C1 error or a C2 error (NO in S241), the sub CPU 102 determines whether the error that is occurring is an initialization error or a selector switch error (S248). Specifically, the sub CPU 102 initializes the error that is occurring based on whether the initialization error screen (see FIG. 48) or the selector switch error screen (see FIG. 49) is displayed on the liquid crystal display device 11. Determine whether the error or selector switch error. When it is determined that the error in progress is not an initialization error or a selector switch error (NO in S248), the sub CPU 102 ends the error release determination process, and the process is a medal selector command transmission process (see FIG. 59). It returns to step S224.

  On the other hand, when it is determined in step S248 that the error that has occurred is an initialization error or a selector switch error (when S248 is YES), the SELECT button 28 (see FIG. 2) provided on the base 12 has been pressed. It is determined whether or not (S249). A sensor that detects pressing of the SELECT button 28 is electrically connected to the sub-control circuit 101. For this reason, the sub CPU 102 can detect pressing of the SELECT button 28. If it is determined in step S249 that the SELECT button 28 has not been pressed (NO in S249), the sub CPU 102 ends the error release determination process, and the process is a step of a medal selector command transmission process (see FIG. 59). Return to S224.

  On the other hand, if it is determined in S249 that the SELECT button 28 has been pressed (YES in S247), the sub CPU 102 requests to display the initialization error screen (see FIG. 48) or the selector switch error screen (see FIG. 49). (S250). Specifically, the sub CPU 102 instructs the liquid crystal display device 11 to end the display of the initialization error screen (see FIG. 48) or the selector switch error screen (see FIG. 49) displayed on the liquid crystal display device 11. Upon receiving the instruction, the liquid crystal display device 11 ends the display of the initialization error screen or the selector switch error screen. Then, the sub CPU 102 ends the error release determination process, and returns the process to step S224 of the medal selector command transmission process (see FIG. 59).

<Error information history screen>
Next, an error information history screen displayed on the liquid crystal display device 11 by the sub-control circuit 101 when a predetermined operation is performed will be described with reference to FIG. FIG. 61 is a diagram showing an example of the error information history screen.

  In this embodiment, for example, when a manager of a gaming machine (for example, an employee of a gaming hall) operates the setting key switch 56, the main control circuit 91 transmits a predetermined command to the sub-control circuit 101. When the sub-control circuit 101 receives this predetermined command, it causes the liquid crystal display device 11 to display a hall menu screen (not shown). On the hall menu screen, various menus that can be selected by operating the SELECT button 28 and the enter button 29 provided on the pedestal 12 (see FIG. 2), a date setting change menu, and an error history menu are displayed.

  When the error history menu is selected, the sub control circuit 101 refers to the error information history area of the sub RAM 103 and displays an error information history screen (see FIG. 61) based on the error information stored in the area in the liquid crystal display device. 11 is displayed. On the error information history screen, the error information stored in the error information history area, that is, the error contents and the date and time (occurrence date and time) associated with the error contents are displayed in descending order.

  For example, the error information registered in S174 of the medal selector error command reception process (see FIG. 53) is the error content “C1_1” (“foreign object detection error”), and the date of occurrence is 0:00 on June 1, 2012. In the case of 9 minutes, the serial number is added to the error history screen shown in FIG. 61, the serial number is “1”, the error content is “C1_1”, and the occurrence date is “2012/06/01 00:10:09”. Is displayed. Therefore, a person viewing the screen can grasp that a foreign object detection error has occurred at 0: 10: 9 on June 1, 2012. The displayed error content changes according to the content of the medal selector error command received in the medal selector error command reception process (see FIG. 53), that is, the error that has occurred. For example, when a cover open error occurs, the displayed error content is “C1_2”.

  In addition, the person who views the screen displays the serial number “4”, the error content “C2_2”, and the date and time of occurrence “2012/05/30 15:23:17” from May 30, 2012 at 15:23. It can be understood that a C2_2 error has occurred in 17 seconds. When a C2_1 error, a C2_3 error, and a C2_4 error occur and information related to these errors is stored in the error information history area, the error history screen displays the same as when the above-described C2_2 error occurs. "C2_1", "C2_3", and "C2_4" are displayed as error contents. For this reason, a person viewing the screen can grasp that these errors have occurred.

  Further, the person who views the screen, from the display of serial number “16”, error content “CMOS CNT”, occurrence date and time “2012/05/26 08:30”, May 26, 2012, 8:30. It can be understood that an ACK count error has occurred at 00 minutes.

<First action>
In the pachi-slot 1 of the present embodiment, the sub control circuit 101 receives a determination completion command from the medal selector 201. For this reason, the result of the color determination processing performed by the color recognition circuit 247 based on the image data output from the CMOS image sensor 232 is “threshold determination impossible”, or does not match or similar to a predetermined degree to any of the four color templates. In other words, that is, in the case of “judgment NG” in which the color of the inserted medal does not match the color of the regular medal, the sub-control circuit 101 misidentifies that the regular gaming medium is used in the gaming machine and plays It can be detected that there has been a fraudulent act.

  In addition, when the result of the marking determination process (in this embodiment, the result of the three-dimensional determination) performed by the image recognition DSP circuit 242 based on the image data output from the CMOS image sensor 232 is “determination NG”, that is, input In the case where the stamp of the medal is different from the stamp of the regular medal, the sub-control circuit 101 can detect that there has been an illegal act of playing a game by misidentifying that the regular gaming medium is used in the gaming machine.

  In addition, when the result of the count process based on the image data output from the CMOS image sensor 232 is “abnormality has occurred”, the sub control circuit 101 indicates that a foreign object detection error has occurred from the medal selector 201. A medal selector error command having a value of “1” is received. For this reason, the sub-control circuit can recognize that there was an illegal act of playing a game by misidentifying that a regular gaming medium is used in the gaming machine.

  Therefore, the sub-control circuit 101 performs cheating performed by inserting a special instrument into the medal slot, or cheating performed using a medal that has the same diameter and color and stamp (pattern) as the regular medal. It can be detected with high accuracy.

<Second action>
Further, in the pachi-slot 1 of this embodiment, the control LSI 234 of the medal selector 201 passes medals that pass on the medal rail 210 until the number of inserted medals reaches the specified initial number of inserted coins, that is, 50 in this embodiment. A color template used for the color determination process is generated based on the image including.

  Therefore, when a medal used as a regular medal is changed at the amusement store, after the power is turned on, 50 regular medals after the change are continuously inserted, so that the color template related to the regular medal after the change is obtained. It can be easily generated. In addition, the regular medal is deteriorated due to, for example, insertion into a game machine, payout, or washing at a game store, and a color template corresponding to the current state of the regular medal can be generated. Accuracy can be maintained.

<Third action>
Further, in the pachi-slot 1 of the present embodiment, the main template used in the marking determination process is generated by the template generation process described above. Therefore, if a predetermined number of medals are inserted, the main template can be generated, so that the main template can be easily generated.

  Further, the present template is sequentially updated by the above-described present template update process. For this reason, this template can be updated according to the current state of the regular medals even if it is deteriorated due to, for example, being inserted into a game machine, paid out, or washed at a game store, and the stamp becomes inconspicuous from the beginning. . For this reason, the accuracy of the results of various determinations can be maintained.

  Further, the three-dimensional determination process can determine the marking for one determination target based on the results of three different types of template comparison processes. For this reason, the accuracy of determination is improved.

  In addition, since the coefficients A, C, and D in the above equation (11) used in the three-dimensional determination process are updated by the coefficient update process described above, the current status of the regular medal even when the marking is changed due to deterioration over time or the like. The coefficient can be updated according to the state. For this reason, the accuracy of the results of various determinations can be maintained.

<Fourth action>
In the pachislot machine 1 of this embodiment, the medal count circuit 246 of the control LSI 234 performs a count process based on the grayscale image data output from the ISP circuit 245. The medal count circuit 246 performs “IN”, “OUT”, and “ON” based on a change in luminance for a plurality (16 in the present embodiment) of determination areas stored in the SRAM 243 in the order determination process in the count process. , It is determined whether or not the transition mode of the “OFF” data matches the transition mode of the medal count determination table (see FIG. 27). If they match, it is determined that “medal has passed” on the medal rail 210 or “medal was guided to the medal chute 202”. Further, if any of the data “IN”, “OUT”, and “ON” is stored for the determination area E, it is determined that an abnormality has occurred.

  As described above, since the passage of medals is determined based on the change in luminance in the plurality of determination regions, the determination accuracy can be improved.

  In addition, the number of determination regions set on the grayscale image data can be set as appropriate according to the allowable determination required time and the accuracy of determination to be obtained. Therefore, for example, even when the number of determination regions is increased in order to further increase the accuracy of determination, it is not necessary to newly install components such as a photo sensor for medal counting. For this reason, the increase in manufacturing cost can be suppressed.

  In addition, when the determination result of the count process is “abnormality has occurred”, the sub-control circuit 101 has misconducted that the gaming machine misidentifies that a legitimate gaming medium is used and plays a game. Is detected. That is, an illegal act can be detected based on the determination result of the count process.

<Fifth action>
Also, in the pachislot machine 1 of the present embodiment, the ISP circuit 245 of the control LSI 234 performs image correction processing that performs lens distortion correction processing and projective transformation (homography) processing on the RGB Bayer image output from the ISI circuit 251.

  For this reason, it is possible to complement the RGB Bayer image so that the lens characteristics of the camera unit 209 and the displacement of the mounting position of the camera unit 209 do not affect the various determination / determination processes, thereby improving the accuracy of the various determination processes.

<Sixth action>
In the pachislot machine 1 of the present embodiment, the color recognition circuit 247 of the control LSI 234 performs threshold value determination processing. As a result, it is possible to suppress an erroneous determination that a hue or saturation value that is clearly different from a regular medal matches the color template or is similar to a predetermined degree. That is, in addition to the determination based on the degree of coincidence with the color template, it can be determined whether or not the determination target color itself is an effective color, so the accuracy of the determination result of the color determination process can be improved.

<Seventh action>
Further, in the pachislot machine 1 of the present embodiment, the fish-eye correction scaler circuit 248 of the control LSI 234 performs bilateral conversion processing on each of the created reduced image data in the equalization processing.
As a result, noise in the grayscale image data can be reduced, and edges in the grayscale image data can be emphasized. For this reason, the accuracy of the determination result in the marking determination process can be increased.

<Eighth action>
Further, in the pachislot machine 1 of the present embodiment, the image recognition accelerator circuit 249 of the control LSI 234 performs HOG conversion processing. In the marking determination process, the image recognition DSP circuit 242 evaluates the degree of coincidence between the determination target HOG data created by the HOG conversion process and the HOG data of this template, and calculates an evaluation value. Then, an imprint determination is performed using the calculated evaluation value.

  Therefore, the marking determination processing is performed by performing image matching with HOG conversion processing having strength in local shape change (geometric conversion) on the imaging data of the medal passing on the medal rail 210 while rotating. The accuracy of the determination result can be improved.

<Ninth action>
In the pachislot machine 1 of this embodiment, the image recognition accelerator circuit 249 of the control LSI 234 performs polar coordinate conversion processing before the HOG conversion processing.
As a result, the feature of the outer peripheral area of the regular medal is easily reflected in the set of histograms created by the HOG conversion process. Therefore, it is possible to improve the accuracy of the determination result of the subsequent stamp determination process for medals having a characteristic stamp (pattern) on the outer peripheral region.

<Tenth action>
In the pachislot machine 1 of this embodiment, the image recognition accelerator circuit 249 of the control LSI 234 performs FFT conversion processing. Further, in the marking determination process, the image recognition DSP circuit 242 evaluates the degree of coincidence between the FFT data to be determined created by the FFT conversion process and the FFT data of this template, and calculates an evaluation value. Then, an imprint determination is performed using the calculated evaluation value.

  For this reason, not only the comparison of the whole image but individual comparison in a predetermined angle unit can be facilitated. For this reason, it is possible to improve the accuracy of the determination result of the stamp determination process by omitting the determination on the portion (plane) where the medal stamp is difficult to feature and removing the noise component due to scratches or the like.

<Eleventh action>
In the pachislot machine 1 of this embodiment, the AE correction process is performed by the ISP circuit 245 and the host controller 241 of the control LSI 234. For this reason, the exposure time of the CMOS image sensor 232 can be set to an exposure time that allows the protrusion 210a of the medal rail 210 to capture an image. Accordingly, since an appropriate exposure time can be set, it is possible to ensure the accuracy of the color determination process, the marking determination process, and the count process based on the image captured by the camera unit 209 including the CMOS image sensor 232.

  Further, even if dust or the like adheres to the lens of the camera unit 209, the color determination process is performed while suppressing the shortening of the life of the LED 233 by extending the exposure time instead of increasing the brightness of the LED 233. The accuracy of the marking determination process and the count process can be ensured. In addition, since the frequency of removing dirt on the lens can be reduced, the work load of the game hall employees can be reduced.

<Twelfth action>
In the pachi-slot 1 of the present embodiment, when the determination result of the AE determination process is output from the ISP circuit 245 in the AE correction process, the host controller 241 notifies when the exposure time is set to the upper limit of 175 μsec. A signal instructing lighting to be output to the LED 206c is output, and the notification LED 206c is turned on. Accordingly, a person who views the notification LED 206c, for example, a manager of the game hall, can grasp that the camera unit 209 has some trouble (for example, dirt such as dust is attached to the lens). .

  In the AE correction process, when the determination result of the AE determination process is output from the ISP circuit 245, the host controller 241 determines that the sub-control board 72 (sub-control The medal selector error command with the value of DAT0 “3” indicating that a cleaning error has occurred is transmitted from the medal selector 201 to the circuit 101). Receiving this command, the sub control circuit 101 causes the liquid crystal display device 11 to display a C1 error screen (see FIG. 54). When a predetermined operation is performed, the sub control circuit 101 displays an error information history screen (see FIG. 61) on the liquid crystal display device. On the error information history screen, an error content “C1_3” and an occurrence date and time are displayed as a display indicating that a cleaning error has occurred. Accordingly, it is possible to make a person who sees the display know that a cleaning error has occurred, and to prompt the user to clean the camera unit 209 (for example, to remove lens dirt). Accordingly, it is possible to prevent the game from being performed in a state where the accuracy of the color determination process, the marking determination process, and the count process cannot be ensured, that is, the illegal act cannot be detected effectively.

  In the present embodiment, the mode in which the AE correction process is performed when the power of the pachislot machine 1 is turned on has been described. However, the execution timing of the AE correction process can be set as appropriate. For example, the AE correction process may be executed when the front door 2b is opened and the main control circuit 91 detects a security signal output from the door opening / closing monitoring switch 67. Further, the AE correction process may be executed when a predetermined time has elapsed since no operation on the pachislot 1 is detected. Further, the AE correction process may be executed every elapse of a predetermined time, for example, 1 hour.

<13th action>
In the present embodiment, the sub control circuit 101 (the sub CPU 102 thereof) registers the determination result of the received determination completion command in a queue provided in the sub RAM 103 in the determination completion command reception process (see FIG. 50) (steps). S151). Next, when a queue overflow occurs, the number of “determination NG” in the determination results registered in the queue is counted, and whether or not the value is equal to or greater than a threshold value (“5” in the present embodiment). Is determined (steps S152 to S154).

  If it is equal to or greater than the threshold value, the sub CPU 102 displays a C2 error screen (see FIG. 52) on the liquid crystal display device 11 (see step S155). Further, the sub CPU 102 stores the error content “C2_1” and the occurrence date and time in the error information history area of the sub RAM 103 (see step S156). Then, the sub control circuit 101 causes the liquid crystal display device 11 to display an error information history screen (see FIG. 61) based on the error information stored in the error information history area in accordance with a predetermined operation. As a result, the person viewing the error information history screen can grasp that the C2_1 error has occurred.

  Therefore, the number of “determination NG” in the determination results registered in the queue is equal to or greater than the threshold value, that is, the number of illegal medals in the last 60 inserted medals exceeds a predetermined amount. Detection and notification can be made when the queue overflows. In order to use the queue overflow, it is not necessary to add a process for specially specifying the timing for the detection and notification, and it is possible to efficiently detect and notify that the number of illegal medals inserted exceeds a predetermined amount. can do.

<14th action>
In the present embodiment, the sub control circuit 101 (the sub CPU 102) receives the medal insertion command from the main control circuit 91 in the medal insertion command reception process (see FIG. 58), but the medal selector. If it is determined that a determination completion command has not been received from 201 for a predetermined number of times during the unit game, a C2 error screen (see FIG. 52) is displayed on the liquid crystal display device 11 (see step S215). Further, the sub CPU 102 stores the error content “C2_4” and the occurrence date and time in the error information history area of the sub RAM 103 (see step S216). Then, the sub control circuit 101 causes the liquid crystal display device 11 to display an error information history screen (see FIG. 61) for displaying the error information stored in the error information history area in accordance with a predetermined operation. As a result, the person viewing the error information history screen can grasp that the C2_4 error has occurred.

  Here, if the determination completion command is not received from the medal selector 201 even though the medal insertion command is received from the main control circuit 91, an illegal act outside the imaging range of the imaging means or image processing is performed. It is possible that an illegal act that cannot be determined by In the present embodiment, the C2 error screen is displayed on the liquid crystal display device 11 in the above case, and an error information history screen based on error information including “C2_4” and the occurrence date and time is displayed according to a predetermined operation. The image is displayed on the liquid crystal display device 11. Accordingly, it is possible to recognize that an illegal act outside the imaging range of the imaging unit or an illegal act that cannot be determined by image processing has occurred.

<15th action>
In the present embodiment, the sub control circuit 101 (the sub CPU 102) determines that the value of the sub medal counter is a predetermined value in the state where the medal can be accepted (see step S157) in the determination completion command reception process (see FIG. 50). It is determined whether or not this is the case (see step S159). The predetermined value is set to be equal to or greater than the sum of the maximum number of medals that can be credited to the pachislot 1 (50 in this embodiment) to the maximum number of medals that can be inserted into the unit game (three in this embodiment).

  If it is determined that the value is equal to or greater than the predetermined value, the sub CPU 102 displays a C2 error screen (see FIG. 52) on the liquid crystal display device 11 (see step S160). Further, the sub CPU 102 stores the error content “C2_2” and the occurrence date and time in the error information history area of the sub RAM 103 (see step S161). Then, the sub control circuit 101 causes the liquid crystal display device 11 to display an error information history screen (see FIG. 61) based on the error information stored in the error information history area in accordance with a predetermined operation. As a result, the person viewing the error information history screen can grasp that the C2_2 error has occurred.

  Here, the state where the value of the sub medal counter is equal to or greater than the predetermined value set as described above is an abnormal state in which medals exceeding the creditable number are inserted in the pachislot 1. In the present embodiment, when the above-described state occurs, a C2 error screen is displayed on the liquid crystal display device 11, and an error based on error information including “C2_4” and the occurrence date and time is displayed according to a predetermined operation. An information history screen is displayed on the liquid crystal display device 11. That is, the sub control circuit 101 can detect the abnormal state and notify the occurrence thereof. Accordingly, it is possible to recognize the occurrence of an illegal act that increases the credit without inserting a medal that is considered to cause the above abnormal state into the medal slot.

<Sixteenth action>
In the present embodiment, the sub control circuit 101 (the sub CPU 102 thereof) calculates the difference between the number of activations included in the medal selector no-operation command and the sub power-on counter in the activation number determination process (see FIG. 56) (steps). (See S192). If the difference is greater than or equal to the threshold, the sub CPU 102 displays a C2 error screen (see FIG. 52) on the liquid crystal display device 11 (see step S193). Further, the sub CPU 102 stores the error content “C2_3” and the occurrence date and time in the error information history area of the sub RAM 103 (see step S194). Then, the sub control circuit 101 causes the liquid crystal display device 11 to display an error information history screen (see FIG. 61) based on the error information stored in the error information history area in accordance with a predetermined operation. As a result, the person viewing the error information history screen can grasp that the C2_3 error has occurred.

  Here, the value of the sub power-on counter is incremented by 1 each time the power-on process (see FIG. 43) is performed, that is, every time it is activated (see step S102). The number of activations (see FIG. 41) included in the medal selector no-operation command is incremented by 1 every time the medal selector 201 is activated. Normally, when power is turned on to the pachislot machine 1, both the sub-control circuit 101 and the medal selector 201 are turned on and started together, so that they are included in the value of the sub power-on counter and the medal selector no-operation command. The number of activations is equal. Therefore, when these are not equal, it is possible that an illegal act accompanied by restarting either the sub-control circuit 101 or the medal selector 201 independently occurred.

  In the present embodiment, in the above case, the C2 error screen is displayed on the liquid crystal display device 11, and an error information history screen based on error information including “C2 — 3” and the occurrence date and time is displayed according to a predetermined operation. The image is displayed on the liquid crystal display device 11. This makes it possible to recognize fraudulent actions involving restart.

  Further, in the present embodiment, since the difference is not simply generated but when the difference is equal to or larger than a threshold that can be set as appropriate, a process of displaying a C2 error screen on the liquid crystal display device 11 is performed. When the error occurs spontaneously, it is possible to prevent an error screen from being displayed. For this reason, either the sub-control circuit 101 or the medal selector 201 is intentionally restarted independently by displaying the C2 error screen or the error information history screen based on the error information including “C2_3” and the occurrence date and time. That is, it is possible to reliably recognize that an illegal act accompanied by restart has been performed.

<Seventeenth action>
In this embodiment, when initialization is performed during energization, the control LSI 234 of the medal selector 201 sets “1” indicating “initialized” to the value of the startup initialization flag storage area of the flash memory 244. . Then, when the power is turned on, the control LSI 234 refers to the startup initialization flag storage area of the flash memory 244 and transmits a startup completion command including information indicating “initialized” to the sub-control circuit 101. Further, when initialization is performed during energization, the control LSI 234 of the medal selector 201 sets “1” indicating “initialization” to the value of the non-operation initialization flag storage area of the SRAM 243. Then, the control LSI 234 refers to the no-operation initialization flag storage area and transmits a medal selector no-operation command including information indicating “initialized” to the sub-control circuit 101.

  Further, when the sub control circuit 101 (the sub CPU 102) receives a start completion command including information indicating “initialized”, an initialization error screen (FIG. 48) is displayed in the start completion command reception process (see FIG. 47). (See) is displayed on the liquid crystal display unit 11 (display unit 11a thereof) (see step S143).

  When the sub-control circuit 101 (the sub CPU 102) receives a medal selector no-operation command including information indicating “initialized”, an initialization error occurs in the medal selector no-operation command reception process (see FIG. 47). A screen (see FIG. 48) is displayed on the liquid crystal display unit 11 (display unit 11a thereof) (see step S182).

  Therefore, when the initialization process is performed, the initialization error screen is immediately displayed in the medal selector no operation command, so that the occurrence of the initialization process can be recognized immediately. Also, at the time of startup, if the initialization process was performed during the previous energization, the initialization error screen will be displayed in the process when the startup completion command is received, so the initialization process was performed during the previous energization I can recognize that. That is, since it can be surely recognized that the initialization process has been performed, it is possible to recognize an illegal act involving the initialization process.

<Eighteenth action>
In the present embodiment, the sub control circuit 101 (the sub CPU 102) switches the color switch 206e for enabling / disabling the color determination and the validity / invalidity of the marking determination in the process at the time of receiving the start completion command (see FIG. 47). The switch information including the state when the stamp switch 206f is activated is stored in the first switch information storage area (see step S147). In addition, the sub-control circuit 101 compares the previous switch information stored in the first switch information storage area with the switch information included in the activation completion command received this time in the same process, and if they do not match, A selector switch error screen (see FIG. 49) is displayed on the liquid crystal display device 11 (display unit 11a thereof) (step S146).

  Further, the sub control circuit 101 (the sub CPU 102) obtains the switch information included in the medal selector no operation command and the switch information stored in the second switch information storage area in the switch state determination process (see FIG. 57). Compare (see steps S202, S204, and S207). If they do not match, the fact is registered in the error information history area of the sub RAM 103 (see steps S205 and S207). Then, the sub control circuit 101 (the sub CPU 102 thereof) causes the liquid crystal display device 11 to display an error information history screen (see FIG. 61) for displaying information stored in the error information history area in accordance with a predetermined operation.

  Therefore, the presence or absence of switch operation can be recognized from the error information history screen (see FIG. 61). Further, at the time of activation, the selector switch error screen (see FIG. 49) is displayed on the liquid crystal display device 11 (display unit 11a thereof) in the process upon reception of the activation completion command, so that the switch is operated during the previous energization. I can recognize that. In other words, since it is possible to recognize whether or not the switch for switching between valid / invalid of the color determination and the marking determination is operated, it is possible to recognize an illegal act accompanied by an unauthorized operation of the switch.

<19th action>
In the command transmission / reception sequence (see FIG. 42) between the medal selector 201 and the sub control circuit 101 of this embodiment, when the sub control circuit 101 (the sub CPU 102) receives an ACK command from the medal selector 201, the received ACK It is determined whether or not the value of the transmission counter included in the command is equal to the value obtained by adding “1” to the value of the transmission counter included in the command received from the medal selector 201 last time. When it is determined that they are not equal, “CMOS CNT” (ACK count error) is stored as the error content and the current date and time are stored as the occurrence date and time in the error information history area provided in the sub RAM 103.

  Further, the sub control circuit 101 causes the liquid crystal display device 11 to display an error information history screen (see FIG. 61) based on the error information stored in the error information history area of the sub RAM 103 in accordance with a predetermined operation. As a result, a person viewing the error information history screen can grasp that an ACK count error has occurred.

  Here, in the determination of the sub-control circuit 101, if there is a discrepancy in value, it is considered that an illegal act involving restarting either the sub-control circuit 101 or the medal selector 201 has occurred. It is done. In this embodiment, a person viewing the error information history screen can grasp that an ACK count error has occurred. For this reason, it is possible to recognize fraudulent acts involving restart.

<20th action>
When the C1 error occurs, the medal selector 201 of the present embodiment transmits a medal selector error command (see DAT0 of the medal selector error command in FIG. 41) including information indicating the content of the error that has occurred. Further, the medal selector no-operation command periodically transmitted from the medal selector 201 includes information indicating the contents of the error that has occurred (see DAT2 of the medal selector no-operation command in FIG. 41). Receiving these commands, the sub-control circuit 101 displays the C1 error screen (see FIG. 54) on the liquid crystal display device 11 and displays the error information history screen (see FIG. 61) according to a predetermined operation. .

  For this reason, even if some trouble occurs in the transmission / reception of commands between the medal selector 201 and the sub control circuit 101, even if the sub control circuit 101 cannot properly receive the medal selector error command from the medal selector 201, it is periodically transmitted. With the medal selector non-operation command, the medal selector 201 can notify the sub-control circuit 101 that an error has occurred and the details of the error. Thus, when an error occurs in the medal selector 201, the error can be reliably recognized.

<Modification>
The gaming machine according to one embodiment of the present invention has been described above including the effects thereof. However, the gaming machine of the present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the gist of the present invention described in the claims. In the following description of the modification, the description of the same or similar components as those in the above-described embodiment will be omitted, and the same reference numerals will be given in the drawings.

<Modification 1>
For example, a medal selector 301 having a hole at a position corresponding to the determination region shown in FIGS. 22 to 24 may be used.
The configuration of the medal selector 301 according to the first modification will be described with reference to FIG. FIG. 62 is a diagram for explaining a medal selector in the first modification. In FIG. 62, illustration of the cancel shooter 206 and the camera unit 209 (see FIG. 7) of the medal selector 301 is omitted.

  A medal rail 310 is formed in the base plate portion 304 of the medal selector 301 so as to be recessed forward of the pachi-slot 1 and is substantially L-shaped. A plurality of protrusions 310 a are formed on the surface of the medal rail 310.

  Further, in the medal rail 310, a determination area AB hole 310b having the same shape as the combined shape of the determination areas is formed at positions corresponding to the determination areas A1 to A4 and the determination areas B1 to B4 shown in FIGS. Has been. Similarly, determination region C holes 310c having the same shape are formed at positions corresponding to the determination regions C1 and C2, and determination regions D310d holes having the same shape are formed at positions corresponding to the determination regions D1 to D4. . Although not shown in the drawings, a determination region F hole 310e is formed in the base plate portion 304 at a position corresponding to the determination region F shown in FIGS.

As shown in FIG. 63, a determination region F hole 305a is formed in the sub plate 305 of the medal selector 301 at a position corresponding to the determination region F shown in FIGS. The determination region F hole 305a formed in the sub plate 305 and the determination region F hole 310e formed in the base plate portion 304 communicate with each other in the front-rear direction.
Since the other points of the medal selector 301 are the same as those of the medal selector 201, description thereof is omitted.

  In this modification, holes (determination area AB hole 310b, determination area C hole 310c, and determination area D310d are provided at positions corresponding to determination areas A1 to A4, B1 to B4, C1, C2, D1 to D4, and F, respectively. Holes and determination area F holes 310e, 305a) were provided. Therefore, the luminance value at the position corresponding to each determination area of the background grayscale image data (grayscale image data not including the medal image) used in the medal position detection process performed by the medal count circuit 246 is determined by these values. Compared with the case where no hole is provided, the value is lower (because the light of the LED 233 for the light source does not reflect to the CMOS image sensor 232 by passing through the hole). For this reason, even when a medal having a luminance close to the surface of the medal rail 310 is used, the difference between the luminance in each determination region of the background grayscale image data and the luminance of the medal image in the grayscale image data to be processed (For example, if the luminance value of the surface of the medal rail 310 is 50 and the luminance value of the hole portion is 22, the value of 28 is calculated as the difference). Therefore, in a medal position detection process, a medal having a brightness close to the surface of the medal rail 310 (a medal whose surface is processed into black, gray, or brown colors, or a medal whose surface is deteriorated or dirty and does not reflect light sufficiently) Etc.) can be accurately detected. Similarly, the accuracy of the medal edge detection process performed by the medal count circuit 246 can be improved. That is, in this modification, the medal count circuit 246 that performs the medal position detection process constitutes an object presence / absence detection means.

  In the medal rail 310, holes having the same shape may be provided at positions corresponding to the determination area E shown in FIGS. Further, since other points of the present modification are the same as those of the above-described embodiment, description thereof is omitted.

<Modification 2>
Next, a gaming machine of Modification 2 will be described with reference to FIGS. 63 and 64. FIG.
FIG. 63 is a block diagram showing a circuit configuration example of the medal selector in the gaming machine of the second modification. FIG. 64 is a block diagram showing a circuit configuration example of a control LSI in the gaming machine of the second modification.
In the following description of the gaming machine according to the modified example 2, the description of the configuration and functions common to the pachislot machine 1 in the above-described embodiment will be omitted.

  As shown in FIGS. 63 and 64, the control LSI 234 and the medal solenoid 208 in the medal selector 401 of Modification 2 are electrically connected. Therefore, the control LSI 234 can set the medal solenoid 208 to the ON state or the OFF state. Specifically, the control LSI 234 outputs a control signal for setting the medal solenoid 208 to the ON state or the OFF state to the medal solenoid 208 from the output PORT assigned to the GPIO 250 via the GPIO 250.

  As with the medal selector 201 described above, the host controller 241 of the medal selector 401 in this modification example creates the reduced image data and stores it in the SRAM 243 when the fisheye correction scaler circuit 248 creates the reduced image data. For the data, the image recognition DSP circuit 242 and the image recognition accelerator circuit 249 are instructed to execute the processing after the circular area detection processing in the marking determination processing. In the circular area detection process, when the circular area cannot be extracted, the subsequent processes in the marking determination process are omitted.

  Thus, before the object moving on the medal rail 210 reaches the upper exposed hole 219 or the lower exposed hole 220 (see FIG. 8) of the medal rail 210, the image recognition DSP circuit 242 The determination result (three-dimensional determination result) of the stamp determination process can be stored in the SRAM 243.

  The host controller 241 that has acquired the result of the marking determination outputs a control signal for setting the medal solenoid 208 to the OFF state to the medal solenoid 208 when the acquired determination result is “determination NG”. In this case, the object to be determined can be pushed out by the after medal pressure 218 protruding from the upper exposure hole 219 or the medal stopper 227 protruding from the lower exposure hole 220 and discharged toward the cancel shooter 206.

  In addition, the host controller 241 of the medal selector 401 in this modification example performs the color determination associated with the same image ID at the timing when the result of the engraving determination process is stored in the SRAM 243, similarly to the medal selector 201 described above. The determination result is acquired from the SRAM 243, and a control signal for setting the medal solenoid 208 to the ON state or the OFF state is output to the medal solenoid 208 according to the determination result of the color determination process.

  For this reason, in this modification, before the object moving on the medal rail 210 reaches the upper exposed hole 219 or the lower exposed hole 220 (see FIG. 8) of the medal rail 210, the determination result of the color determination process for this object Accordingly, the medal solenoid 208 can be set to an ON state or an OFF state.

  Specifically, the host controller 241 stores “threshold determination impossible” as the determination result of the acquired threshold determination processing, or “not determined” as the color determination result, that is, “determination” In the case of “NG”, a control signal for setting the medal solenoid 208 to the OFF state is output to the medal solenoid 208. In this case, the object to be determined can be pushed out by the after medal pressure 218 protruding from the upper exposure hole 219 or the medal stopper 227 protruding from the lower exposure hole 220 and discharged toward the cancel shooter 206.

  On the other hand, when the result of the color determination and the result of the marking determination are “determination OK”, the host controller 241 keeps the medal solenoid 208 in the ON state. In this case, the object to be determined is guided to the hopper device 51.

  The host controller 241 of the medal selector 401 in the modification example is a control signal for setting the medal solenoid 208 to the ON state when the circle area cannot be detected in the circle area detection process performed on the reduced image data stored in the SRAM 243. Is output to the medal solenoid 208. In this way, when the next thrown object is a regular medal, this medal can be appropriately guided to the hopper device 51. That is, the control LSI 234 constitutes drive control means for controlling the drive of the medal solenoid 208.

  In this modification, the main control circuit 91 (main control board 71) outputs a medal insertion signal to the medal selector. Specifically, the main control circuit 91 outputs to the medal selector 401 a medal insertion signal indicating that the pachislot 1 cannot be inserted when the pachislot 1 is not in a medal insertion permission state.

  Here, when the pachislot 1 is not in the medal insertion permission state where the medal can be inserted, for example, after the start lever 23 is operated by the player in the unit game, the credit counter is set to the maximum value (for example, 50). At the time.

  When a medal insertion signal with a content that cannot be inserted is output from the main control circuit 91, the host controller 241 of the medal selector 401 sets the medal solenoid 208 to an OFF state.

Further, the main control circuit 91 outputs a medal insertion signal indicating the insertion permission to the medal selector 401 when the pachislot 1 is in a medal insertion permission state in which a medal can be inserted. Note that the host controller 241 sets the medal solenoid 208 to the ON state when the medal insertion signal indicating the insertion permission is output from the main control circuit 91.
Since other points of the present modification are the same as those in the above-described embodiment, description thereof is omitted.

In the pachislot machine 1 of this modification, the marking determination process and the color determination process are performed on the object passing on the medal rail 210, and the medal solenoid 208 is operated based on the result. Therefore, the object to be determined can be appropriately guided to the cancel shooter 206 or the hopper device 51 based on the determination result.
Note that the main control circuit 91 may directly set the medal solenoid 208 to the ON state or the OFF state without using the host controller 241.

<Modification 3>
The pachislot of the third modification includes a medal selector 501. When the medal selector 501 stores “medal has passed” in the SRAM 243 as the determination result of the count process, the host controller 241 transmits a medal count command to that effect to the sub-control circuit 101. When the sub-control circuit 101 receives the medal count command, the sub-control circuit 101 uses a sub-insertion number counter and sub-credit count provided on the sub RAM 103 separately from the insertion-number counter and credit counter of the main control circuit 91. Similar to 91, the number of inserted coins and the number of credited medals are managed.

  Since the circuit configuration of the medal selector 501 in the third modification is the same as the circuit configuration of the medal selector 201 (see FIG. 17), the illustration is omitted. Further, since the circuit configuration of the control LSI of the medal selector 501 is the same as the circuit configuration of the control LSI of the medal selector 201, the illustration is omitted. Regarding the medal selector 501, the installation of the initialization switch 206d, the color switch 206e, and the marking switch 206f provided in the medal selector 201 may be omitted.

<Difference number notification function>
Further, in the pachislot of the third modification, the counted number of medals managed by the main control circuit 91 and the counted number of medals managed by the sub control circuit 101 are compared at a predetermined timing. You may provide the difference number alerting | reporting function of alert | reporting when the predetermined number is exceeded. The difference number notification function will be described in detail below.

  The main CPU 93 of the main control circuit 91 detects the medal detection signal input from the second photo sensor 504 within a predetermined time after detecting the medal detection signal input from the first photo sensor 503 of the double photo sensor 502. When detected, the number of inserted medals is incremented by 1 to the inserted number counter or the credit count value, which is a counter provided for the main CPU 93 to count, and the value of the main count number storage area provided in the main RAM 95. Add 1 to. The main count number storage area is composed of a 2-byte storage area. That is, the value of the main count number storage area can be changed in the range of 0 to 65535. When adding 1 to the value of the main count number storage area, if the value of the main count number storage area is 65535, the main CPU 93 sets the value of the main count number storage area to 0.

  In this modification, when the main control circuit 91 (the main CPU 93) transmits the no-operation command to the sub-control circuit 101, the value of the main count number storage area at that time is included in the no-operation command as a parameter. .

  When the sub control circuit 101 receives a medal count command from the medal selector 501, the sub CPU 102 adds 1 to the value of the sub count number storage area provided in the sub RAM 103. The sub-count number storage area is a 2-byte storage area. That is, the value of the subcount number storage area can be changed in the range of 0 to 65535. When adding 1 to the value of the sub-count number storage area and the value of the sub-count number storage area is 65535, the sub CPU 102 sets the value of the sub-count number storage area to 0.

When the sub-control circuit 101 receives the no-operation command from the main control circuit 91, the sub CPU 102 refers to the sub-count number storage area, and determines the main count number included in the no-operation command from the value of the sub-count number storage area. The storage area value is subtracted. Then, the sub CPU 102 determines whether or not the absolute value of the subtraction result is 5 or more. When the determination result is 5 or more, the sub CPU 102 displays a predetermined display (for example, “CC”) on the sub 7-segment display (not shown) and notifies an error. On the other hand, when the determination result is not 5 or more, the sub CPU 102 does not display a predetermined display (for example, “CC”) on the sub 7-segment display.
The predetermined display on the sub 7-segment display is replaced with “CC”, and the count number of medals managed by the main control circuit 91 (value of the main count number storage area) and the sub control circuit 101 manage the medal count. To make it easy to recognize that an error has occurred in which the difference between the number of medals counted (the value of the sub-count number storage area) is a predetermined number or more (5 or more in this modification) For example, “CE” may be displayed. The predetermined number can be set as appropriate. For example, you may set 10 sheets or 20 sheets.

  In a pachislot equipped with a difference number notification function, if the difference between the count number of medals managed by the main control circuit 91 and the count number of medals managed by the sub control circuit 101 is a predetermined number or more, This can be notified by displaying a predetermined display on the 7-segment display. In this modification, the value of the sub-count number storage area and the value of the main count number storage area are subtracted, and when the absolute value of the result is 5 or more, an error is notified on the sub 7-segment display. Explained. However, the error notification mode is not limited to this. For example, instead of displaying a predetermined display on the sub 7-segment display, an error screen may be displayed on the liquid crystal display device 11 (see FIG. 14). In addition to displaying a predetermined display on the sub 7-segment display, a warning sound may be output from all or any of the speakers 58, 64, 65L, and 65R (see FIG. 14). The notification using the sub 7-segment display described above, the notification using the liquid crystal display device 11, and the notification using the speakers 58, 64, 65L, and 65R may be appropriately combined for notification.

  Here, when the difference between the counted number of medals managed by the main control circuit 91 and the counted number of medals managed by the sub control circuit 101 is equal to or larger than a predetermined number, the double photo sensor 502 is used. When the medal detection signal is not properly output due to a failure, or when the control LSI 234 of the medal selector 501 has a failure, the control LSI 234 (the medal count circuit 246) appropriately performs the medal count process. There may be cases where you do not know.

  For this reason, when there is a notification related to the difference number notification function, the administrator of the gaming machine (for example, an employee of the gaming hall) checks the behavior of the double photo sensor 502 or the control LSI 234, thereby causing a failure. Can be recognized and obstacles can be removed. For this reason, since various processes can be performed in the absence of a failure, the reliability of the medal count process in the main control circuit 91 based on the medal detection signal output from the double photosensor 502 is improved. Further, the reliability of various processes including the medal count process performed by the control LSI 234 is improved.

  Although an example in which a parameter indicating the value of the main count is included in the no-operation command has been described, the command including this parameter is not limited to this. For example, the parameter is included in a winning action command or a medal insertion command. You may not.

<Selector monitoring function>
Further, in the pachislot machine of this modification, it is determined whether or not the select plate 207 has moved to the guide position or the discharge position in accordance with an instruction from the main control circuit 91, and the select plate in accordance with an instruction from the main control circuit 91. When it is determined that 207 has not moved, a selector monitoring function for notifying an error may be provided. Various processes performed by the main control circuit 91, the sub control circuit 101, and the medal selector 501 (control LSI 234) relating to the selector monitoring function described below are performed in parallel with the various processes performed by the above-described devices. .

  In a pachislot machine having a selector monitoring function, when the main control circuit 91 transmits a no-operation command to the sub-control circuit 101, is the medal solenoid 208 set to the ON state or the OFF state at that time? Is included in the no-operation command. Specifically, when the signal line between the main control circuit 91 and the medal solenoid 208 is set to the ON state, the main control circuit 91 sets a parameter indicating that the medal solenoid 208 is set to the ON state. On the other hand, the main control circuit 91 sets the medal solenoid 208 to the OFF state when the signal line between the main control circuit 91 and the medal solenoid 208 is set to the OFF state. A parameter indicating that is included in the no-operation command. That is, the main control circuit 91 controls the medal solenoid 208 to move the select plate 207 to the guide position (set to the ON state) or to move to the discharge position. Information indicating whether it is set to the OFF state is included in the no-operation command and output.

  When the sub-control circuit 101 receives the no-operation command, the sub-control circuit 101 is based on the parameter indicating whether the medal solenoid 208 included in the received no-operation command is set to the ON state or the OFF state. An insertion state command is transmitted to the medal selector 501.

  The control LSI 234 performs position determination processing when there is a change between the acceptance state (“acceptance acceptable” or “acceptance not permitted”) indicated by the input state command received last time and the reception state indicated by the input state command received this time. . In this modification, the control LSI 234 that performs position determination processing constitutes position determination means.

  In the position determination process, the control LSI 234 is generated by the ISP circuit 245 performing a color conversion process for converting the RGB Bayer image after the lens distortion correction process and the projective conversion process into various formats, and is stored in the SRAM 243. Get newest grayscale image data.

  Next, the control LSI 234 analyzes the acquired gray scale image data and determines whether the select plate 207 is at the guide position or the discharge position. Specifically, the control LSI 234 determines the width of the medal rail 210 in the direction orthogonal to the direction of movement of the medal (the direction of arrow A in FIG. 65) in the grayscale image data (hereinafter, sometimes simply referred to as “rail width”). Based on this, it is determined whether it is in the guide position or the discharge position.

  In FIG. 65, the select plate 207 at the guide position is indicated by a solid line, and the end of the plate body 224 (the portion extending along the direction of movement of the medal) on the select plate 207 at the discharge position is indicated by a chain line. . As shown in FIG. 65, the rail width W1 when the select plate 207 is at the guide position is narrower than the rail width W2 when the select plate 207 is at the discharge position. The control LSI 234 compares the rail width when the guide position is set in advance based on experiments and simulations with the rail width in the grayscale image data. If they match, the select plate 207 is at the guide position. judge. On the other hand, if the rail width in the grayscale image data is wider, it is determined that the select plate 207 is at the discharge position.

  Note that as a method for determining whether the select plate 207 is at the guide position or the discharge position, a method other than the method described above can be appropriately employed. For example, the control LSI 234 compares the shape data of the select plate 207 when it is at a preset guide position based on experiments and simulations with the shape of the select plate 207 in the grayscale image data. If it is determined that the select plate 207 is at the guide position and they do not match, it may be determined that the select plate 207 is at the discharge position.

Next, when the received insertion state command indicates “acceptable”, the control LSI 234 determines that the select plate 207 is at the discharge position (not at the guide position) in the position determination process, and a medal selector indicating that fact. An error command is transmitted to the sub control circuit 101. On the other hand, if it is determined in this case that the select plate 207 is at the guide position, the position determination process is terminated.
If the received insertion state command indicates “unacceptable” and the position determination process determines that the select plate 207 is at the guide position, the control LSI 234 sends a medal selector error command indicating that to the sub-control circuit. 101. On the other hand, if it is determined in this case that the select plate 207 is at the guide position, the position determination process is terminated.

  When the sub control circuit 101 receives the medal selector error command, the sub control circuit 101 notifies that the control error has occurred using the liquid crystal display device 11 or the like.

  In the pachislot of this modification, the select plate 207 is at the discharge position even though the main control circuit 91 sets the medal solenoid 208 to the ON state (outputs a medal insertion signal indicating that the medal can be inserted). An error is reported when not in the guide position. In addition, when the main control circuit 91 sets the medal solenoid 208 to the OFF state (outputs a medal insertion signal that cannot be inserted), the select plate 207 is at the guide position (not at the discharge position). An error is reported. That is, an error can be notified when the select plate 207 is not moved in accordance with an instruction from the main control circuit 91.

As a case where the select plate 207 does not move in response to an instruction from the main control circuit 91, for example, a case where the medal solenoid 208 is out of order can be considered. Further, for example, there may be a case where a foreign object exists on the medal rail 210 and prevents the select plate 207 from moving to the guide position. In this modification, the manager of the gaming machine (for example, an employee of the gaming hall) can grasp the failure of the medal solenoid 208 and the presence of foreign matter on the medal rail 210 by notifying the error, so that these deficiencies It can respond early.
Since the other points of the medal selector 501 are the same as those of the medal selector 201, description thereof is omitted.

<Modification 4>
Next, a gaming machine of Modification 4 will be described with reference to FIG.
FIG. 66 is a block diagram showing a circuit configuration example of the medal selector in the gaming machine of the fourth modification.
In the following description of the gaming machine according to the modification example 4, the description of the configuration and functions common to the pachislot machine 1 in the above-described embodiment will be omitted.

As shown in FIG. 66, in the medal selector 601 of the present modified example, the control LSI 234 and the medal solenoid 208 are electrically connected in the same manner as the medal selector 401 according to the modified example 2 described above. Therefore, the control LSI 234 can set the medal solenoid 208 to the ON state or the OFF state.
Further, the control LSI 234 in the present modification performs the marking determination process and the color determination process on the object moving on the medal rail 210, and controls the operation of the medal solenoid 208 according to the result, as in the above-described modification. .

  That is, in the present modified example, as in the modified example 2, before the object moving on the medal rail 210 reaches the upper exposed hole 219 or the lower exposed hole 220 of the medal rail 210, the image recognition DSP circuit 242 of the control LSI 234. Stores the marking determination process for this object in the SRAM 243. The host controller 241 that has acquired the result of the marking determination outputs a control signal for setting the medal solenoid 208 to the OFF state to the medal solenoid 208 when the acquired determination result is “determination NG”.

  In addition, the host controller 241 of the medal selector 401 in this modification example performs the color determination associated with the same image ID at the timing when the result of the engraving determination process is stored in the SRAM 243, similarly to the medal selector 201 described above. The determination result is acquired from the SRAM 243, and a control signal for setting the medal solenoid 208 to the ON state or the OFF state is output to the medal solenoid 208 according to the determination result of the color determination process.

  Accordingly, the object to be determined whose determination result of the engraving determination and the color determination is “determination NG” is pushed out to the after medal pressure 218 protruding from the upper exposure hole 219 or the medal stopper portion 227 protruding from the lower exposure hole 220. Then, it can be discharged toward the cancel shooter 206.

  In addition, the main control circuit 91 configured by the main control board 71 in the present modified example is operated when the start lever 23 is operated by the player in the unit game, for example, when the pachislot 1 is not in the medal insertion permission state in which the medal can be inserted. After that, when the credit counter is at the maximum value, a medal insertion command indicating that the medal cannot be inserted is transmitted to the sub-control circuit 101 configured by the sub-control board 72. When the pachi-slot 1 is in a medal insertion permission state in which a medal can be inserted, a medal insertion command indicating the insertion permission is transmitted to the sub-control circuit 101.

  The sub control circuit 101 receives the medal insertion command transmitted from the main control circuit 91 via the door relay terminal board 68 and the sub relay board 61. Receiving the medal insertion command, the sub-control circuit 101 transmits an insertion state command (“acceptable” or “not acceptable”) corresponding to the content of the received medal insertion command to the medal selector 601.

  When the medal selector 601 receives the unacceptable content input state command output from the sub-control circuit 101, the host controller 241 of the control LSI 234 sets the medal solenoid 208 to the OFF state. In other words, in this modification, the host controller 241 inputs the input state command of the contents that cannot be received from the sub-control circuit 101 when the determination result of the color determination or the marking determination for the most recently input object is “determination NG”. Is received, the medal solenoid 208 is set to the OFF state.

In this modified example, the main control circuit 91 detects a retrograde error or a medal clogging error based on the medal detection signal output from the double photo sensor 502, and forcibly plays a game when these errors are detected. To finish.
Since the other points of the medal selector 601 are the same as those of the medal selector 401 described in the second modification, the description thereof is omitted.

  In this modification, when the pachi-slot 1 is not in the above-described medal insertion permission state, the main control circuit 91 transmits a medal insertion command with a content that cannot be inserted, and the sub-control circuit 101 that has received the medal insertion command has the same content ( Send the input status command that cannot be accepted. Then, the medal selector 601 sets an unacceptable insertion state command and the medal solenoid 208 to the OFF state, and discharges the medal toward the cancel shooter 206. Even in the medal insertion permission state, the control LSI 234 of the medal selector 601 sets the medal solenoid 208 to the OFF state when the determination result of the color determination or the marking determination is “determination NG”, and cancels the medal. Eject to 206. Therefore, the inserted medals can be counted appropriately. Further, the inserted medal can be appropriately guided to the cancel shooter 206 or the hopper device 51.

<Modification 5>
Next, a gaming machine of Modification 5 will be described with reference to FIG. 67 and FIG.
FIG. 67 is a rear view of the medal selector in the gaming machine of the fifth modification. In FIG. 67, illustration of the sub plate 205, cancel shooter 206, and reference marker 260 of the medal selector 701 is omitted.
FIG. 68 is a block diagram showing a circuit configuration example of the medal selector in the gaming machine of the fifth modification.
In the following description of the gaming machine according to the modified example 5, the description of the configuration and functions common to the pachislot machine 1 in the above-described embodiment will be omitted.

  As shown in FIG. 67, the medal selector 701 of this modification includes two select plates, a select plate 707a, and a select plate 707b. As shown in FIG. 68, the medal selector 701 includes two medal solenoids, a first medal solenoid 708a and a second medal solenoid 708b. The first medal solenoid 708a and the second medal solenoid 708b include a solenoid body (not shown) and a movable plate (not shown) similar to the medal solenoid 208 (see FIG. 9).

  As shown in FIG. 67, the select plate 707a is composed of a plate-shaped plate body 724a and a pair of bearing portions (not-fit) formed by bending both left and right ends of the plate body 724a forward of the pachislot 1. (Shown). A flange portion 726a is formed on the upper portion of the plate main body 724a. The flange portion 726a is formed by bending the pachislot 1 forward and bending the rear end portion upward.

  The select plate 707a is rotatably supported by a shaft portion (not shown) provided on the front surface 204a of the base plate portion 204. The shaft portion is provided with a coil spring, and urges the flange portion 726 a forward of the pachislot 1. The flange portion 726a is in contact with one end portion of the movable plate portion of the first medal solenoid 708a. When the first medal solenoid 708a is in the ON state, the flange portion 726a is pressed against one end of the movable plate portion of the first medal solenoid 708a and moves to the rear of the pachislot 1 against the biasing force of the coil spring. The rotation position of the select plate 707a at this time is referred to as a “guide position”. The distance between the plate main body 724a of the select plate 707a in the guide position and the medal rail 210 is set to a predetermined distance that can guide the medal to the medal outlet 204c (see FIG. 8) without discharging the medal to the cancel shooter 206. Has been.

  When the first medal solenoid 708a is in the OFF state, the flange portion 726a is released from the pressing of the first medal solenoid 708a and moves forward of the pachislot 1 by the biasing force of the coil spring. The rotation position of the select plate 707a at this time is referred to as a “discharge position”. The distance between the plate body 724a of the select plate 707a at the discharge position and the medal rail 210 is set to a distance longer than a predetermined distance.

  When the medal moving on the medal rail 210 satisfies the standard size, the select plate 707a at the guide position contacts the upper part of the moving medal, and the medal is positioned on the medal outlet portion 204c (see FIG. 8) side (right side in FIG. 67). Guide to move to). When the medal is guided by the select plate 707a, the medal pressure 213 is pressed forward of the pachislot 1.

  On the other hand, the select plate 707a at the discharge position allows the medal to be removed from the medal exit because the distance between the plate main body 724a and the medal rail 210 is long even if the medal moving on the medal rail 210 satisfies the standard dimension. It cannot guide to the part 204c (refer FIG. 8) side. The medal is pushed out by the medal pressure 213 and discharged toward the cancel shooter 206 (see FIG. 7).

  Further, when the medal moving on the medal rail 210 has a smaller diameter than the standard dimension, even if the select plate 707a is at the guide position, the medal is not guided to the select plate 707a but pushed out to the medal pressure 213, and the cancel shooter 206 It is discharged toward

  As shown in FIG. 67, the select plate 707b is provided downstream of the select plate 707a in the direction in which the medal moves on the medal rail 210. The select plate 707b has a plate-shaped plate main body 724b and a pair of bearing portions (not shown) formed by bending both ends in the left-right direction of the plate main body 724b forward of the pachislot 1. ing. A flange portion 726b is formed on the upper portion of the plate body 724b. The flange portion 726b is formed by bending the pachislot 1 forward and bending the rear end portion upward. One bearing portion is formed with a medal stopper portion 727b extending downward.

  The select plate 707b is rotatably supported by a shaft portion (not shown) provided on the front surface 204a of the base plate portion 204. The shaft portion is provided with a coil spring, and urges the flange portion 726b forward of the pachi-slot 1. The flange portion 726b is in contact with one end portion of the movable plate portion of the second medal solenoid 708b. When the second medal solenoid 708b is in the ON state, the flange portion 726a is pressed against one end of the movable plate portion of the second medal solenoid 708b and moves to the rear of the pachislot 1 against the biasing force of the coil spring. The rotation position of the select plate 707b at this time is referred to as a “guide position”. The distance between the plate main body 724b of the select plate 707b at the guide position and the medal rail 210 is set to a predetermined distance that allows the medal to be guided to the medal outlet 204c side without being discharged to the cancel shooter 206 side. At this time, the medal stopper portion 727 b does not protrude from the lower exposure hole 220.

  When the second medal solenoid 708b is in the OFF state, the flange portion 726b is released from the pressing of the second medal solenoid 708b, and moves forward of the pachislot 1 by the biasing force of the coil spring. The rotation position of the select plate 707b at this time is referred to as a “discharge position”. The distance between the plate main body 724b of the select plate 707b at the discharge position and the medal rail 210 is set to be longer than a predetermined distance. At this time, one end of the movable plate portion of the second medal solenoid 708b moves forward of the pachislot 1 by being pressed by the flange portion 726b moving forward of the pachislot 1. Accordingly, the other end portion of the movable plate portion of the second medal solenoid 708b moves to the rear of the pachislot 1 and presses the front end portion of the after medal pressure 218 (see FIG. 8). As a result, the after medal pressure 218 rotates and the rear end of the after medal pressure 218 is exposed from the upper exposure hole 219. In addition, the medal stopper portion 727 b protrudes from the lower exposure hole 220.

  When the medal moving on the medal rail 210 satisfies the standard dimension, the select plate 707b at the guide position contacts the upper part of the moving medal, and the medal is positioned on the medal outlet portion 204c (see FIG. 8) side (right side in FIG. 67). )

  On the other hand, the select plate 707b at the discharge position removes the medal from the medal exit because the distance between the plate main body 724b and the medal rail 210 is long even if the medal moving on the medal rail 210 satisfies the standard dimension. It cannot guide to the part 204c (refer FIG. 8) side. Further, the medal is pushed out to the after medal pressure 218 protruding from the upper exposure hole 219 or the medal stopper portion 727 b protruding from the lower exposure hole 220 and discharged toward the cancel shooter 206.

  As shown in FIG. 68, the medal selector 701 includes a double photosensor 502 including a first photosensor 503 and a second photosensor 504. The double photo sensor 502 is connected to the main control board 71 via the door relay terminal board 68.

Similar to the above embodiment, the first photosensor 503 of the double photosensor 502 is provided in the vicinity of the medal outlet 204c (see FIG. 8), and the second photosensor 504 is more medal than the first photosensor 503. It is provided downstream on the rail 210. For this reason, the first photosensor 503 and the second photosensor 504 detect the medal moving to the medal outlet 204c (see FIG. 8) side while the select plate 707b is at the guide position, but the select plate 707a or the select plate. 707b is at the discharge position, and the medal guided to the medal chute 202 (see FIG. 6) is not detected.
Further, the main control circuit based on other configurations and functions of the double photosensor 502 of the present modification and medal detection signals output from the double photosensor 502 (the first photosensor 503 and the second photosensor 504). Since the manner of managing the values of the inserted number counter and the credit counter at 91 has been described above, the description thereof is omitted here.

  The first medal solenoid 708a is connected to the main control board 71 through the door relay terminal board 68. Therefore, the main control circuit 91 configured by the main control board 71 can set the first medal solenoid 708a to the ON state or the OFF state.

  When the pachislot 1 is not in a medal insertion permission state where the medal can be inserted, for example, after the start lever 23 is operated by the player in the unit game, or when the credit counter is at the maximum value, The first medal solenoid 708a is set to the OFF state. Further, when the pachislot 1 is in a medal insertion permission state in which a medal can be inserted, the first medal solenoid 708a is set to the ON state.

As shown in FIG. 68, the control LSI 234 and the second medal solenoid 708b in the medal selector 701 are electrically connected. Therefore, the control LSI 234 can set the second medal solenoid 708b to the ON state or the OFF state.
Further, the control LSI 234 in this modification example performs the marking determination process and the color determination process on the object moving on the medal rail 210 in the same manner as the control LSI 234 of the medal selector 401 in the modification example 2 described above, and according to the determination result. The second medal solenoid 708b is controlled.

  That is, in this modified example, as in the modified example 2, the determination result of the color determination and the marking determination is performed before the object moving on the medal rail 210 reaches the upper exposed hole 219 or the lower exposed hole 220 of the medal rail 210. Based on the above, the ON / OFF state of the second medal solenoid 708b can be controlled.

  For this reason, when the determination result of the marking determination or the color determination is “determination NG”, a control signal for setting the second medal solenoid 708b to the OFF state is output to the second medal solenoid 708b. In this case, the object to be determined can be pushed out by the after medal pressure 218 protruding from the upper exposure hole 219 or the medal stopper portion 727 b protruding from the lower exposure hole 220 and discharged toward the cancel shooter 206.

  The host controller 241 of the medal selector 701 in the modified example turns on the second medal solenoid 708b when the circle area cannot be detected in the circle area detection process performed on the reduced image data stored in the SRAM 243. A control signal to be set is output to the second medal solenoid 708b.

As shown in FIG. 68, the control LSI 234 of the camera unit 209 in the medal selector 701 is connected to the sub control board 72 via the sub relay board 61. Accordingly, various commands are transmitted and received between the sub-control circuit 101 and the medal selector 701 as in the above-described embodiments and modifications.
Further, the sub control circuit 101 can set the second medal solenoid 708b to the ON state or the OFF state via the host controller 241 in the control LSI 234 of the medal selector 701. Specifically, when the sub control circuit 101 detects the above-described medal count command output from the host controller 241 of the medal selector 701, the sub control circuit 101 adds 1 to the value of the inserted number counter provided in the sub RAM 103. When the value of the inserted number counter in the sub RAM 103 is the maximum value (for example, 3), the value of the credit counter that is a counter provided in the sub RAM 103 so that the sub CPU 102 counts the number of credited medals. Add 1 to. After the start lever 23 is operated by the player in the unit game (when the start command is received), and when the credit counter of the sub RAM 103 is the maximum value (for example, 50), the sub control circuit 101 The medal solenoid 708b is set to the OFF state via the host controller 241 of the medal selector 701. In addition, when the pachislot is in a medal insertion permission state in which a medal can be inserted, the second medal solenoid 708b is set to the ON state via the host controller 241.

The main control circuit 91 detects a retrograde error or a medal clogging error based on the medal detection signal output from the double photo sensor 502, and forcibly ends the game when these errors are detected. . Further, the main control circuit 91 transmits an error command corresponding to the detected error content to the sub control circuit 101.
When the sub control circuit 101 receives an error command relating to a retrograde error or a medal jam error from the main control circuit 91, the sub control circuit 101 turns off the second medal solenoid 708 b via the host controller 241 in the control LSI 234 of the medal selector 701. Set to state.

  In the present modification, when the pachi-slot 1 is not in the medal insertion permission state described above, the main control circuit 91 sets the first medal solenoid 708a to the OFF state and discharges the medal toward the cancel shooter 206. Even if the first medal solenoid 708a is in the ON state, the control LSI 234 of the medal selector 701 sets the second medal solenoid 708b in the OFF state when the determination result of the color determination or the marking determination is “determination NG”. The medals are discharged toward the cancel shooter 206. Therefore, the inserted medals can be counted appropriately. Further, the inserted medal can be appropriately guided to the cancel shooter 206 or the hopper device 51.

<Modification 6>
Next, a gaming machine of Modification 6 will be described with reference to FIG.
FIG. 69 is a block diagram showing a circuit configuration example of the medal selector in the gaming machine of the sixth modification.
In the following description of the gaming machine according to the modified example 6, the description of the configuration and functions common to the pachislot machine 1 in the above-described embodiment will be omitted.

  Similar to the medal selector 701 in the fifth modification, the medal selector 801 in the present modification includes two select plates, a select plate 707a, and a select plate 707b (see FIG. 67).

  69, the second medal solenoid 708b in the medal selector 801 and the sub control board 72 are electrically connected via the sub relay board 61. Therefore, the sub control circuit 101 configured by the sub control board 72 can set the second medal solenoid 708b to the ON state or the OFF state. On the other hand, the control LSI 234 and the second medal solenoid 708b are not electrically connected. This is the difference from the fifth modification. Below, this difference is demonstrated and description is abbreviate | omitted about the point which is common in the modification 5. FIG.

  As shown in FIG. 69, as in the fifth modification, the control LSI 234 of the camera unit 209 in the medal selector 801 is connected to the sub control board 72 via the sub relay board 61. Therefore, the above-described various commands can be transmitted and received between the sub control circuit 101 and the medal selector 801.

  In this modified example, before the object moving on the medal rail 210 reaches the upper exposed hole 219 or the lower exposed hole 220 of the medal rail 210, a determination completion command based on the determination result of the color determination and the marking determination is sub-controlled. Transmit to the circuit 101.

  Then, when the determination result of the color determination or the marking determination in the received determination completion command is “determination NG”, the sub control circuit 101 sends a control signal for setting the second medal solenoid 708b to the OFF state. Output to. In this case, the object to be determined can be pushed out by the after medal pressure 218 protruding from the upper exposure hole 219 or the medal stopper portion 727 b protruding from the lower exposure hole 220 and discharged toward the cancel shooter 206.

  On the other hand, when the determination result of the color determination and the marking determination in the received determination completion command is “determination OK”, the sub control circuit 101 maintains the second medal solenoid 708b in the ON state. In this case, the object to be determined is guided to the medal outlet 204c side, that is, guided to the hopper device 51.

  Further, when the circle area cannot be detected in the circle area detection process performed on the reduced image data stored in the SRAM 243, the host controller 241 of the medal selector 801 in the modified example outputs a command indicating that effect. Upon receiving this command, the sub control circuit 101 (the sub CPU 102) outputs a control signal for setting the second medal solenoid 708b to the ON state to the second medal solenoid 708b.

  In the present modification, when the pachi-slot 1 is not in the medal insertion permission state described above, the main control circuit 91 sets the first medal solenoid 708a to the OFF state and discharges the medal toward the cancel shooter 206. In addition, even when the first medal solenoid 708a is in the ON state, the second control circuit 101 receives the determination completion command from the medal selector 701 that has the determination result of the color determination or the stamp determination as “determination NG”. The medal solenoid 708b is set to the OFF state, and the medal is discharged toward the cancel shooter 206. Therefore, the inserted medals can be counted appropriately. Further, the inserted medal can be appropriately guided to the cancel shooter 206 or the hopper device 51.

<Other variations>
In the above-described embodiment, a mode in which a maximum of four color templates and the main template are generated has been described. However, the number of these templates can be set as appropriate according to the allowable determination required time and the required determination accuracy.

  In the above embodiment, the color template and the main template stored in the SRAM 243 are deleted when the initialization switch is pressed when the gaming machine is turned on. However, instead of this, an arbitrary operation may be set in order to delete various templates stored in the SRAM 243. For example, various templates in the SRAM 243 may be deleted in conjunction with a change in the setting of the gaming machine.

  Further, in the order determination process when medals cannot be inserted, the data transition mode in each determination region of the four gray scale image data stored in the SRAM 243 and E1 to E1 defined in the medal count determination table. When the data transition mode corresponding to E4 does not match, it may be determined that “abnormality has occurred” and the determination result may be stored in the SRAM 243.

  In the embodiment described above, the host controller 241 has described an aspect in which when the reduced image is stored in the SRAM 243, the image recognition DSP circuit 242 is instructed to execute preprocessing. However, instead of this, the host controller 241 triggers that the medal count circuit 246 determines that “the medal has passed” on the medal rail 210, which is a predetermined time before the determination (that is, before the predetermined frame). The image recognition DSP circuit may be instructed to perform preprocessing using the reduced image data. Note that the predetermined time is set in advance based on experiments and simulations so that a reduced image before the predetermined time always includes a medal image. In this case, after passing the medal, it is determined whether or not the passed medal is a regular medal afterwards.

  Further, the threshold determination process in the color determination process may be omitted. Further, the color recognition circuit 247 may perform the following color determination processing based on the data relating to the hue and saturation output from the ISP circuit 245. In this color determination process, the color recognition circuit 247 first expresses an integrated value of data relating to hue and saturation near the center of the image data as a vector (vector conversion), and calculates the angle of the vector in a three-dimensional space. calculate. Next, the color recognition circuit 247 compares the calculated vector angle with a predetermined color threshold value, and determines whether or not the color matches the color of the regular medal. The predetermined threshold is a predetermined threshold based on the vector angle calculated by the same method as the above-described processing for the image data related to the regular medal (for example, in the three-dimensional space related to the regular medal to be compared). Within ± 10 degrees of the angle on the individual coordinates (XYZ) of the vector.

  In the above embodiment, the timing at which the color template is generated (when 50 medals are inserted after power-on) and the timing at which this template is generated (the value of the learning medal counter is 127 or 259) are different. . For this reason, the color determination process may not be performed until this template is generated. Alternatively, color determination processing may be performed during the generation of this template, and data relating to medals for which the determination result of the color determination processing is “threshold determination impossible” or “no” is not used for generation of this template. Good.

Further, the present invention may be employed in other gaming machines that use gaming media, such as pachinko machines.
Moreover, although the aspect which uses the double photosensor 502 as an example of the proximity sensor which detects the object which moves on the medal rail 210 was demonstrated, it is not restricted to this, The approach of an object and the presence or absence of the detection target of a vicinity are detected non-contactingly Other possible proximity sensors (inductive, capacitive, ultrasonic, photoelectric, magnetic proximity switches) may be used.

[Application 1 of an embodiment of the present invention]
Next, a gaming apparatus 1500 according to application example 1 of the embodiment of the present invention will be described.
The gaming apparatus 1500 is a medal counting machine installed in a hall, and is provided, for example, at an end of an island where a plurality of pachislots 1 are arranged. The gaming apparatus 1500 includes any one of the above-described medal selectors 201, 301, 401, 501, 601, 701, and 801. In the following description, a gaming apparatus 1500 including the medal selector 201 will be described.

  FIG. 70 is a plan view of a gaming device 1500 according to Application 1 of the embodiment of the present invention as seen from above. As shown in FIG. 70, the gaming apparatus 1500 includes a hopper 1543 (game medium storage means) formed with a mortar-shaped recess for storing inserted medals (game media). At the bottom of the hopper 1543, there is provided a rotating plate 1526 with a receiving hole for dropping each inserted medal into the medal receiving hole 1524 and rotating the medal receiving hole 1524 eccentrically. The turntable 1526 with a receiving hole starts its rotation when the count start switch 1541 is pressed. The medal that has entered the medal receiving hole 1524 of the rotating plate 1526 with the receiving hole is discharged from the lower portion of the one hopper 543 along with the rotation of the rotating plate 1526 with the receiving hole, and flows into the medal selector 201 provided below the hopper 1543. To do. Based on the detection result of the double photo sensor 502 of the medal selector 201, the medal detection unit (not shown) and the counter control means (not shown) of the counter 1549 (game medium counting means) detect, count, and store. The The counter control means includes a processing device and various memories, and controls various processes (including game media counting processes) performed by the counter.

  On the upper surface of the gaming apparatus 1500, a number-of-inserts display unit 1540a that displays the number of inserted medals is counted, and is pressed when setting the number of printed medals on a receipt (one form of recording medium). A receipt print number setting switch 1534r to be set, a receipt print number display unit 1540b for displaying the set receipt print number, and the number of stored medal to be recorded on a stored medal card (one form of a recording medium) among the inserted medals. A card recording number setting switch 1534c that is pressed when the card recording is performed, and a card recording number display unit 1540c that displays the set number of card recordings.

  Also, on the upper surface of the gaming apparatus 1500, a number switch from 0 to 9 (one form of the input means 1534) is used to set the number of medals to be printed on a receipt and the number of stored medals to be recorded on a stored medals card. ) And a BS switch for deleting the numerical value input immediately before it is pressed when correcting the input number of sheets. On the upper surface of the gaming apparatus 1500, an entry switch 1534e is arranged for instructing execution of processing for printing on a receipt and processing for recording on a stored medal card after setting the number of medals.

  Further, the gaming device 1500 reads / writes the number of stored medals from a magnetic recording type or IC card with a built-in IC tag, or reads a card reader / writer 1537 that reads unique identification information (card ID) for identifying a player. (One form of recording medium control means), and a receipt printing means 1539 (one form of recording medium control means) that prints and outputs the number of medals, a barcode, or a QR code (registered trademark) on a receipt sheet. A medal tray 1517 for storing medals detected as medals that are not regular medals.

  According to the gaming apparatus 1500 including such a medal selector, the same operational effects as the above-described embodiment or the above-described modification can be obtained. That is, it is possible to detect fraudulent acts that misunderstand that a legitimate game medium is used.

For example, as described above, the medal selector 201 is employed, and the gaming apparatus 1500 is provided with a liquid crystal display device capable of displaying the above-described various screens (see FIGS. 48, 49, 52, 54, and 61). Or by connecting the gaming device 1500 to the liquid crystal display device, it is possible to detect an illegal act such as an act of misidentifying that a regular gaming medium is used. In this case, the various operations performed by the sub-control circuit 101 to display various screens may be performed by the counter control means, or separately provided with control means similar to the sub-control circuit 101 and performed by the control means. May be.
Further, when the control LSI 234 employs a medal selector (for example, medal selectors 401, 601, 701 of the modified examples 2, 4, and 5) that can set the medal solenoid to an ON state or an OFF state, a double photo sensor Since only the regular medals can be detected in 502, only the regular medals are detected, counted, and stored in the medal detection unit and the counter control unit of the counter 1549 (game medium counting unit). Instead of the detection result of the double photo sensor 502, the counter control means may count only regular medals based on a determination completion command (see FIG. 41) from the medal selector.

[Application 2 of one embodiment of the present invention]
Next, a gaming apparatus 1600 according to an application example of one embodiment of the present invention will be described.
The gaming device 1600 is a medal counting machine that is provided adjacent to each pachislot 1 in the hall, is installed corresponding to the adjacent pachislot 1, and is communicably connected to the corresponding pachislot 1. The gaming device 1600 includes any one of the above-described medal selectors 201, 301, 401, 501, 601, 701, and 801. In the following description, a gaming apparatus 1600 including the medal selector 201 will be described.

  FIG. 71 is a perspective view showing an internal configuration of a gaming device 1600 according to application example 2 of the embodiment of the present invention. As shown in FIG. 71, an LED (light emitting diode) portion 1631, a card insertion slot 1632, a bill insertion slot 1633 into which a bill can be inserted, and a touch panel LCD (liquid crystal display) are provided on the front surface portion 1621 of the gaming apparatus 1600. An operation unit 1634, a camera 1635, a non-contact IC card reader / writer 1636, a medal (game medium) payout tray 1637, a speaker cover 1638, a medal (game medium) counting slot 1639, and the like are provided. The card insertion slot 1632 is an insertion slot that can accept an information card issued by a card issuing machine (not shown) in a hall, for example. The LED portion 1631 includes a full color LED 1631A and an infrared LED (infrared light emitting diode) 1631B.

  A player can receive a medal as a game medium necessary for a game by inserting an information card or a predetermined amount of banknotes into the card insertion slot 1632 or the banknote insertion slot 1633. Further, the player can receive a medal required for the game by holding the non-contact IC card over the non-contact IC card reader / writer 1636.

  When the gaming device 1600 receives input of a value medium such as an information card, a banknote, and an IC card, the gaming device 1600 receives a number of medals corresponding to the amount of the inserted value medium in a payout hopper (first count). Part) 1651 is counted and paid out from the medal payout tray 1637. The player can play a game in the pachislot slot 1 by inserting the medals paid out from the medal payout tray 1637 into the medal slot 21 of the pachislot slot 1 (see FIG. 2).

  In the pachi-slot 1, medals are paid out to the medal tray unit 34 in accordance with the game result. The player can pick up the medal from the medal tray unit 34 and insert it into the medal counting slot 1639 of the gaming apparatus 1600 so that the gaming apparatus 1600 can count the medal. The gaming apparatus 1600 counts medals inserted from the medal counting insertion port 1639 by a counting hopper (second counting unit) provided therein.

  The counted results are recorded on a card inserted from the card insertion slot 1632 or stored in a storage unit provided in the hall computer.

  The medals counted by the counting hopper are discharged from the discharge port provided on the bottom surface of the gaming apparatus 1600 to the conveyor and collected. In a place where no conveyor is provided, a storage box for storing medals may be installed in the lower part of the gaming apparatus 1600, and the medals may be discharged into the storage box.

  The gaming apparatus 1600 includes an identification unit (information card reader, banknote identification apparatus 1661, IC card reader / writer, etc.) for identifying a value medium such as an information card, a banknote, and a non-contact IC card, and a power source inside the housing 1622. A first storage space AR11 for storing the unit 1665 is provided. Further, below the first storage space AR11, there is a second storage space AR13 for storing the dispensing hopper 1651 and the counting hopper 1671 side by side. In the first storage space AR11, identification means (information card reader, bill recognition device 1661, IC card reader / writer, etc.) is stored in the upper part, and a power supply unit 1665 is stored in the lower part. That is, the lower part of the first storage space AR11 forms a power supply unit storage space AR12 for storing the power supply unit 1665.

  The payout hopper 1651 stored in the second storage space AR13 below the first storage space AR11 is removed from the hole through a replenishment opening 1652 provided on the back surface of the housing 1622 at the upper part. Medals are replenished through the replenishment path. A replenishment passage 1653 is provided between the replenishment opening 1652 and the payout hopper 1651, and medals replenished from the replenishment opening 1652 fall into the payout hopper 1651 through the replenishment passage 1653. To do.

  On the other hand, an introduction passage 1672 is provided between the medal counting insertion port 1639 and the counting hopper 1671 provided on the front surface portion 1621 of the housing 1622, and the medal inserted from the medal counting insertion port 1639. Falls to the counting hopper 1671 through this introduction passage 1672 (arrow a). The counting hopper 1671 is provided with a medal selector 201 and counting means for counting medals. The medals inserted from the medal counting insertion port 1639 flow into the medal selector 201, are counted by the counting means, and are discharged from the discharge port 1673 provided on the bottom surface portion of the housing 1622 to the conveyor (arrow b). Collected.

  A front panel 1623 is provided on the front portion 1621 of the gaming apparatus 1600, and a speaker cover 1638 is provided on the front panel 1623. The speaker cover 1638 has a plurality of transmission ports through which sound from a speaker provided on the back side of the front panel 1623 (speaker cover 1638) is transmitted forward.

  FIG. 72 is a cross-sectional view of a counting hopper 1671 according to Application Example 2 of the embodiment of the present invention. As shown in FIG. 72, an opening 1675 for receiving medals is provided in the front part of the medal passage 1676 of the counting hopper 1671, and a medal for inserting medals from the outside is provided in the opening 1675. A counting slot 1639 (see FIG. 71) is attached. Thereby, the medal inserted into the medal counting slot 1639 is guided to the counting hopper 1671 through the opening 1675 and the medal passage 1676. The medal guided to the counting hopper 1671 flows into the medal selector 201. And it counts by a counting means based on the detection result of the double photo sensor 502 of the medal selector 201, and passes through the discharge port 1673 of the casing 1622 (see FIG. 71) from the discharge port 1694 provided on the bottom surface of the counting hopper 1671. And discharged to the conveyor. The discharge port 1694 of the counting hopper 1671 is provided with guide portions 1684A and 1684B for guiding the medals to be discharged. The guide portions 1684A and 1684B can make the medals discharge direction oblique. As a result, the discharge direction of medals discharged from the discharge port of the counting hopper 1671 (that is, medals discharged from the discharge port 1673 of the housing 1622 (FIG. 71)) is arranged in the lower vicinity of the gaming apparatus 1600. It can be in the direction of the conveyor.

  Incidentally, the sizes of the opening 1675 of the counting hopper 1671 and the medal counting slot 1639 (see FIG. 71) are set so that a player's hand is difficult to enter. A plate-shaped medal guide member 1629 (see FIG. 71) is fixed to the medal counting insertion port 1639 in addition to the front panel 1623 (see FIG. 71). This makes it difficult for the player's hand to enter from the medal counting slot 1639.

  In addition, a photo sensor (not shown) is provided in the opening 1675 so that it is detected when a player's hand enters. Thereby, when a player's hand is inserted by mistake or when a hand is inserted by fraud, it can be detected by the photo sensor and the operation of the counting hopper 1671 can be stopped. The photo sensor is attached at a position where a medal inserted through the medal counting slot 1639 (see FIG. 71) and the opening 1675 is not erroneously detected. For example, by providing only the state of the upper part of the opening 1675, it is possible to detect only the player's hand entering the upper part of the opening 1675 without detecting a medal that slides below the opening 1675. it can. Incidentally, the counting hopper 1671 is also provided with a sensor (not shown) for detecting insertion of medals.

  According to the gaming apparatus 1600 including such a medal selector, the same operational effects as the above-described embodiment or modification can be obtained. That is, it is possible to detect fraudulent acts that misunderstand that a legitimate game medium is used.

For example, as described above, the medal selector 201 is employed, and the gaming apparatus 1600 is provided with a liquid crystal display device capable of displaying the above-described various screens (see FIGS. 48, 49, 52, 54, and 61). Or by connecting the gaming device 1600 to a liquid crystal display device, it is possible to detect an illegal act such as an act of misidentifying that a regular gaming medium is used. In this case, various operations performed by the sub-control circuit 101 to display various screens may be performed by the counting unit, or may be performed by separately providing a control unit similar to the sub-control circuit 101.
Further, when the control LSI 234 employs a medal selector (for example, medal selectors 401, 601, 701 of the modified examples 2, 4, and 5) that can set the medal solenoid to an ON state or an OFF state, a double photo sensor Since only regular medals can be detected in 502, the counting means of the gaming apparatus 1600 counts only regular medals. Instead of the detection result of the double photo sensor 502, the counting means may count only regular medals based on a determination completion command (see FIG. 41) from the medal selector.

[Application 3 of an embodiment of the present invention]
Next, a gaming apparatus 1700 according to application example 3 of the embodiment of the present invention will be described.
The gaming apparatus 1700 includes any one of the above-described medal selectors 201, 301, 401, 501, 601, 701, and 801. In the following description, a gaming apparatus 1700 including the medal selector 201 of Modification 2 will be described. In addition, the gaming device 1700 may be a stand-alone device that selects only gaming media, or is connected to a device for counting the number of gaming media (so-called jet counter, each counter). It may be built in or may be built in a gaming machine. Note that, in the medal selector 201 of this application example 3, as with the medal selector 401, the control LSI 234 can set the medal solenoid to an ON state or an OFF state.

FIG. 73 is a perspective view showing an example of the internal structure of the gaming apparatus 1700 according to the application example 3 of the embodiment of the present invention.
As shown in FIG. 73, the gaming apparatus 1700 is disposed inside the housing M2, the housing M2 provided on the upper side of the housing M2, and housing medals to be selected, and the housing M2. Hopper device M20 as a sending-out unit that sends out inserted medals one by one, medal selector 201 for selecting medals, and a first guide unit that receives medals sent out from hopper device M20 and guides them to the medal selector And a guide member M40. As described above, in the third application example, two medal selectors 201 are provided. In other words, the hopper device M20 is configured to supply medals to the two medal selectors 201 via the two guide members M40 and M40, respectively. In addition, the gaming device 700 has a power supply unit M10 on the lower rear side inside the housing M2. Although not shown, the power supply unit M10 is electrically connected so as to supply power to the hopper device M20 and the medal selector 201.

  Also, below the two medal selectors 201, a first discharge passage M50 that guides medals detected by the two medal selectors 201 as regular medals to the discharge port is disposed. Also, below the two medal selectors 201, second discharge passages M8 and M8, which are passages for guiding medals determined to be not legitimate by the two medal selectors 201 to the lower plate, are respectively disposed. ing. Further, second discharge ports M11 and M11 are formed on the bottom surface in the housing M2 at positions corresponding to the second discharge passages M8 and M8.

  According to the gaming apparatus 1700 including such a medal selector, the same operational effects as those of the above embodiment or the above modification can be obtained. That is, it is possible to detect fraudulent acts that misunderstand that a legitimate game medium is used.

  The modification examples and application examples 1 to 3 of the present embodiment have been described above. However, the configurations of the embodiment, the configurations of the modification examples, and the application examples 1 to 3 are arbitrarily combined as long as there is no contradiction. be able to.

  The embodiment, various modifications, and application examples of the gaming machine according to the present invention have been described above, but the present invention is not limited to this, and the configurations of the above embodiment and various modifications may be combined as appropriate.

<Summary>
[Difference number notification function]
Based on the first control unit that counts the game media based on the detection result of the proximity sensor provided in the game medium detection means, and the image data obtained by imaging the object passing through the passage by the passage determination means provided in the game medium detection means And a second control unit that performs a counting process for counting game media when it is determined that an object has passed through the passage, an improvement in the reliability of the counting process performed by the first control unit is desired. Yes. In addition, it is desired to improve the reliability of various processes performed by the second control unit.

  The present invention has been made to solve the first problem, and a first object of the present invention is to improve the reliability of the count processing performed by the first control unit and the second control unit. is there.

  In order to solve the first problem, the present invention provides a first gaming machine having the following configuration.

A slot (for example, medal slot 21) into which a game medium is inserted;
Game medium detecting means (for example, medal selector 501) for detecting a game medium inserted from the insertion slot;
A first control unit (for example, a main control circuit 91) that executes control related to a game;
A second control unit (for example, the sub-control circuit 101) that executes control related to the effect of the game;
A storage device (for example, a hopper device 51) for storing a game medium,
The game medium detection means includes
A passage forming section (for example, medal rail 210) that forms a passage through which game media pass, a proximity sensor (for example, double photosensor 502) that detects an object moving through the passage,
Imaging means for imaging the passage (for example, camera unit 209);
Passage determination means (for example, control LSI 234) for determining whether or not an object has passed through the passage based on image data obtained through the imaging means;
When the passage determination means determines that an object has passed through the passage, passage determination notification means (for example, control LSI 234) for notifying the second control unit to that effect;
Game medium determination means (for example, a color recognition circuit 247 and an image recognition DSP circuit 242 of the control LSI 234) for determining whether or not an object that has passed through the passage is a regular game medium based on the image data;
Guide means (for example, select plate 207) provided movably between a guide position for guiding an object passing through the passage to the storage means and a discharge position for discharging the object to the outside of the gaming machine;
Drive means (for example, medal solenoid 208) for driving the guide means,
The first controller is
Based on the detection result of the proximity sensor, count the object moving in the passage,
When the game medium is allowed to be inserted, the drive means is controlled to move the guide means to the guide position,
When the game medium is not allowed to be inserted, the driving means is controlled to move the guide means to the discharge position,
The second control unit counts an object that has passed through the passage based on a notification from the passage determination notification unit,
An gaming machine, wherein an error is notified when a difference between a value counted by the first control unit and a value counted by the second control unit is equal to or greater than a predetermined value.

The proximity sensor includes a first sensor (for example, a first photosensor 503) and a second sensor (for example, a second photosensor 504) that output a detection result when an object passing through the passage is detected.
The first control unit may count objects moving through the passage when the output order of the detection result of the first sensor and the output result of the detection result of the second sensor are in a predetermined order. Good.

First count storage means (for example, main RAM 95) for storing a value counted by the first control unit;
Second count storage means (for example, sub-RAM 103) for storing the value counted by the second control unit,
Each of the first count storage unit and the second count storage unit may be configured by a 2-byte storage area.

In the first gaming machine of the present invention configured as described above, an error is notified when the difference between the value counted by the first control unit and the value counted by the second control unit is equal to or greater than a predetermined value.
Here, as a case where the difference between the value counted by the first control unit and the value counted by the second control unit is equal to or larger than a predetermined value, it is considered that a failure has occurred in the proximity sensor or the passage determination unit. .

  For this reason, if there is an error notification, the manager of the gaming machine (for example, an employee of the gaming hall) may recognize the failure that has occurred by checking the behavior of the proximity sensor and the passage determining means. And remove the obstacle. For this reason, since various processes can be performed in the absence of a failure, the reliability of the count process performed by the first control unit can be improved. In addition, the reliability of various processes performed by the second control unit can be improved.

[Selector monitoring function]
It is desired to quickly grasp and deal with deficiencies such as failure of the driving means for driving the guide means for guiding the game medium and the presence of foreign objects on the passage through which the game medium passes.

  The present invention has been made to solve the above second problem, and a second object of the present invention is a failure of drive means for driving guide means for guiding game media, or passing of game media. An object of the present invention is to provide a gaming machine that can notify the presence of a foreign object on a passage.

  In order to solve the second problem, the present invention provides a second gaming machine having the following configuration.

A slot (for example, medal slot 21) into which a game medium is inserted;
Game medium detecting means (for example, medal selector 501) for detecting a game medium inserted from the insertion slot;
A first control unit (for example, a main control circuit 91) that executes control related to a game;
A second control unit (for example, the sub-control circuit 101) that executes control related to the effect of the game;
A storage device (for example, a hopper device 51) for storing a game medium,
The game medium detection means includes
A passage forming section (for example, medal rail 210) that forms a passage through which game media pass, a proximity sensor (for example, double photosensor 502) that detects an object moving through the passage,
Imaging means for imaging the passage (for example, camera unit 209);
Based on the image data obtained through the image pickup means, game medium determination means for determining whether or not the object passing through the passage is a regular game medium (for example, the color recognition circuit 247 of the control LSI 234 and the image recognition) DSP circuit 242),
Guide means (for example, select plate 207) provided movably between a guide position for guiding an object passing through the passage to the storage means and a discharge position for discharging the object to the outside of the gaming machine;
Drive means (for example, medal solenoid 208) for driving the guide means,
The first controller is
Based on the detection result of the proximity sensor, the game medium is counted,
When the game medium is allowed to be inserted, the drive means is controlled to move the guide means to the guide position,
When the game medium is not allowed to be inserted, the driving means is controlled to move the guide means to the discharge position,
Output control content information indicating whether the drive means is controlled to move the guide means to the guide position or the discharge position;
The game medium detection means includes
The guide means is at the guide position when the control content information indicates that the guide means is controlled to move to the guide position based on image data obtained via the imaging means. And when the control content information indicates that the guide means is controlled to move to the discharge position, it is determined whether the guide means is at the discharge position. Position determining means to perform,
When the position determination means determines that the guide means is not in the guide position, or when the position determination means determines that the guide means is not in the discharge position, an error is notified to the second control unit. An error notification means,
The gaming machine, wherein the second control unit notifies an error notified from the error notification means.

Further, in the image data obtained through the imaging means, the width of the passage is narrower when the guide means is at the guide position than when the guide means is at the discharge position,
The position determination means determines whether the guide means is at the guide position based on the width of the passage (for example, rail widths W1, W2) in the image data obtained through the imaging means, or It may be determined whether or not the guide means is at the discharge position.

  In addition, the position determination unit may determine whether the guide unit is at the guide position based on image data obtained by converting color image data obtained via the imaging unit into grayscale data, or the guide unit. It may be determined whether or not is at the discharge position.

  In the second gaming machine of the present invention configured as described above, when the first control unit controls the drive means so that the guide means moves to the guide position, the guide means is not at the guide position. An error is reported. Further, an error is notified when the guide means is not at the discharge position even though the first control unit controls the drive means so that the guide means moves to the discharge position. That is, an error can be notified when the guide means does not move in response to an instruction from the first control unit.

  As a case where the guide unit does not move in response to an instruction from the first control unit, for example, a case where the drive unit is out of order can be considered. In addition, for example, there may be a case where a foreign object exists on a passage through which a game medium passes and prevents the guide means from moving to the guide position. In this modification, the manager of the gaming machine (for example, an employee of the gaming hall) can grasp the failure of the driving means and the presence of foreign objects on the passage through which the game medium passes by notifying the error. Can be handled early.

[Template generation processing]
Whether the object that has passed through the passage is a legitimate game medium based on whether the image data obtained by imaging the object passing through the passage and the template data match or are similar to a predetermined degree In the case of determining whether or not it is provided with a template generation means for generating template data, it is possible to suppress generation of template data based on illegal medals mixed in the majority of regular medals. It is hoped that.

  The present invention has been made to solve the above third problem, and a third object of the present invention is to generate a template based on illegal medals mixed in the majority of regular medals. An object of the present invention is to provide a gaming machine that can suppress the occurrence of the above.

  In order to solve the third problem, the present invention provides a third gaming machine having the following configuration.

A slot (for example, medal slot 21) into which a game medium is inserted;
A gaming machine detecting means (for example, medal selector 201) for detecting gaming media thrown from the slot,
The game medium detection means includes
A passage forming portion (for example, medal rail 210) that forms a passage through which game media pass, and an imaging means (for example, camera unit 209) that images the passage;
Based on image data picked up by the image pickup means, game medium determination means (for example, a color recognition circuit 247 of the control LSI 234 and a game medium determination means for performing a determination process for determining whether or not the object passing through the passage is a regular game medium) An image recognition DSP circuit 242);
Template generating means (for example, a color recognition circuit 247 and an image recognition accelerator circuit 249 of the control LSI 234) for generating template data used for the determination process;
The game medium determination means determines whether or not an object that has passed through the passage is a regular game medium based on whether the image data matches the template data or is similar to a predetermined degree. And
The template generation means groups a plurality of the image data into groups of the same or predetermined similar image data, and the groups within the upper predetermined order in descending order of the number of the image data belonging to the same group Among these, the template data is generated based on the image data belonging to each group for each of the groups in which the number of the image data belonging belongs to a predetermined number or more.

  Further, when the number of the image data cannot be generated by the template generation means before the number of game media inserted from the insertion slot exceeds a specific number (for example, 259). May include template abnormality notification means (for example, control LSI 234) for notifying a template abnormality.

The template generation means includes
When the number of game media inserted from the insertion slot is a first specified number (for example, 127), the number of the groups in which the number of the image data is the predetermined number or more is the first number of groups (for example, 1 In the case of 2), or when the number of game media loaded from the slot is a second specified number (for example, 259), the number of the image data is equal to or greater than the predetermined number. In the case of 2 groups (for example, 1 to 4), the template data may be generated.

  In the third gaming machine of the present invention configured as described above, template data is not generated based on a group in which the number of belonging data is less than a predetermined number. For this reason, it can suppress that template data will be generated based on the illegal medal mixed in the majority of regular medals.

[FFT engraving judgment]
Conventionally, two medal detection proximity sensors are provided in the medal passage, and a device such as a plate-like body is determined by determining whether or not a game medal has passed through the medal passage based on the output of each proximity sensor. There is known a slot machine that detects fraudulent acts using the above (see, for example, JP-A-2002-342814). There is also known a slot machine that uses a CCD camera to determine an improper medal inserted (illegal medal) (see, for example, JP-A-2006-271462).
A fourth object of the present invention is to improve the accuracy of detecting fraudulent acts that misidentify that a legitimate game medium is used.

  In order to achieve the above object, the present invention provides a fourth gaming machine or gaming device having the following configuration.

An insertion slot (for example, a medal insertion slot 21 described later) for inserting a game medium;
Game medium detecting means (for example, a medal selector 201 described later) for detecting a game medium inserted from the insertion slot,
The game medium detection means includes
A passage forming portion (for example, a medal rail 210 described later) that forms a passage through which game media pass;
Imaging means for imaging the passage (for example, a camera unit 209 described later);
Game medium determination means (for example, control LSI 234 described later) for determining whether or not an object passing through the passage is a regular game medium based on image data obtained through the imaging means; ,
The game medium determining means is
First image conversion means (for example, an ISP circuit 245 that performs color conversion processing described later) that converts the image data into first image data that is orthogonal coordinate image data and is a grayscale image;
Second image conversion means (for example, an image recognition accelerator circuit 249 that performs polar coordinate conversion processing described later) for converting the first image data into second image data that is polar image data;
A third image conversion means (for example, an image recognition accelerator circuit 249 for performing an FFT conversion process described later) for Fourier transforming the second image data in a predetermined angle unit to convert the second image data into third image data;
A comparison result deriving unit (for example, an image recognition DSP circuit 242 that performs an FFT template comparison process described later) for comparing the template data generated in advance with the third image data and deriving a comparison result;
Based on the comparison result, it is determined whether or not an object passing through the passage is a regular game medium.

A game medium detecting means for detecting the game medium;
The game medium detection means includes
A passage forming section for forming a passage through which game media pass;
Imaging means for imaging the passage;
Game medium determination means for determining whether an object passing through the passage is a regular game medium based on image data obtained through the imaging means;
The game medium determining means is
First image conversion means for converting the image data into first image data which is orthogonal coordinate image data and is a grayscale image;
Second image conversion means for converting the first image data into second image data which is polar coordinate image data;
A third image conversion means for Fourier transforming the second image data in a predetermined angle unit to convert the second image data into third image data;
A comparison result deriving means for comparing the template data generated in advance with the third image data and deriving a comparison result;
Based on the comparison result, it is determined whether or not an object passing through the passage is a regular game medium.

  In the fourth gaming machine or gaming device of the present invention configured as described above, not only comparison of the entire image but also individual comparison in units of angles can be easily performed, so that it is misunderstood that a regular gaming medium is used. Increases the accuracy of fraud detection.

[Three-dimensional determination]
In order to achieve the fourth object, the present invention provides a fifth gaming machine or gaming device having the following configuration.

An insertion slot (for example, a medal insertion slot 21 described later) for inserting a game medium;
Game medium detecting means (for example, a medal selector 201 described later) for detecting a game medium inserted from the insertion slot,
The game medium detection means includes
A passage forming portion (for example, a medal rail 210 described later) that forms a passage through which game media pass;
Imaging means for imaging the passage (for example, a camera unit 209 described later);
Game medium determination means (for example, control LSI 234 described later) for determining whether or not an object passing through the passage is a regular game medium based on image data obtained through the imaging means; ,
The game medium determining means is
The image data is converted into different first image data (for example, gradient average image data to be described later), second image data (for example, HOG data to be described later), and third image data (for example, FFT data to be described later). Image conversion means (for example, an image recognition accelerator circuit 249 described later);
First comparison result deriving means for comparing first template data generated in advance with the first image data and deriving a first comparison result (for example, an image recognition DSP circuit 242 that performs gradient average image template comparison processing described later) )When,
A second comparison result deriving unit (for example, an image recognition DSP circuit 242 that performs a HOG template comparison process described later) that compares the second template data generated in advance with the second image data and derives a second comparison result; ,
A third comparison result deriving unit (for example, an image recognition DSP circuit 242 for performing an FFT template comparison process described later) that compares the third template data generated in advance with the third image data and derives a third comparison result; Have
Determining whether or not an object passing through the passage is a regular game medium based on the first comparison result, the second comparison result, the third comparison result, and a predetermined determination threshold value; A gaming machine characterized by

A game medium detecting means for detecting the game medium;
The game medium detection means includes
A passage forming section for forming a passage through which game media pass;
Imaging means for imaging the passage;
Game medium determination means for determining whether an object passing through the passage is a regular game medium based on image data obtained through the imaging means;
The game medium determining means is
Image converting means for converting the image data into different first image data, second image data, and third image data;
First comparison result deriving means for comparing first template data generated in advance with the first image data and deriving a first comparison result;
A second comparison result deriving means for comparing the second template data generated in advance with the second image data and deriving a second comparison result;
A third comparison result deriving unit for comparing the third template data generated in advance with the third image data and deriving a third comparison result;
Determining whether or not an object passing through the passage is a regular game medium based on the first comparison result, the second comparison result, the third comparison result, and a predetermined determination threshold value; A gaming device characterized by the above.

  Further, the first image data is gradient average image data accumulated by rotating the image data, and the second image data is HOG data obtained by converting the image data into HOG (Histograms of Oriented Gradients), The third image data may be Fourier transform data obtained by Fourier transforming the image data.

  According to the sixth gaming machine or the gaming apparatus of the present invention having the above-described configuration, it is possible to determine the marking on one determination target based on the results of three different types of template comparison processes. For this reason, the accuracy of the determination is improved, and the accuracy of detecting fraud that misidentifies that a legitimate game medium is used is increased.

[Coefficient update processing]
In order to achieve the fourth object, the present invention provides a sixth game machine or game device having the following configuration.

An insertion slot (for example, a medal insertion slot 21 described later) for inserting a game medium;
Game medium detecting means (for example, a medal selector 201 described later) for detecting a game medium inserted from the insertion slot,
The game medium detection means includes
A passage forming portion (for example, a medal rail 210 described later) that forms a passage through which game media pass;
Imaging means for imaging the passage (for example, a camera unit 209 described later);
Game medium determination means (for example, control LSI 234 described later) for determining whether or not an object passing through the passage is a regular game medium based on image data obtained through the imaging means; ,
The game medium determining means is
The image data is converted into different first image data (for example, gradient average image data to be described later), second image data (for example, HOG data to be described later), and third image data (for example, FFT data to be described later). Image conversion means (for example, an image recognition accelerator circuit 249 described later);
First comparison result deriving means for comparing first template data generated in advance with the first image data and deriving a first comparison result (for example, an image recognition DSP circuit 242 that performs gradient average image template comparison processing described later) )When,
A second comparison result deriving unit (for example, an image recognition DSP circuit 242 that performs a HOG template comparison process described later) that compares the second template data generated in advance with the second image data and derives a second comparison result; ,
A third comparison result deriving unit (for example, an image recognition DSP circuit 242 for performing an FFT template comparison process described later) that compares the third template data generated in advance with the third image data and derives a third comparison result; Have
Based on the first comparison result, the second comparison result, the third comparison result, and a preset determination threshold (for example, coefficient D described later), the object passing through the passage is a normal game medium. Determine if there is,
The gaming machine, wherein the determination threshold value is updated based on an average and a deviation of each of the first comparison result, the second comparison result, and the third comparison result.

A game medium detecting means for detecting the game medium;
The game medium detection means includes
A passage forming section for forming a passage through which game media pass;
Imaging means for imaging the passage;
Game medium determination means for determining whether an object passing through the passage is a regular game medium based on image data obtained through the imaging means;
The game medium determining means is
Image converting means for converting the image data into different first image data, second image data, and third image data;
First comparison result deriving means for comparing first template data generated in advance with the first image data and deriving a first comparison result;
A second comparison result deriving means for comparing the second template data generated in advance with the second image data and deriving a second comparison result;
A third comparison result deriving unit for comparing the third template data generated in advance with the third image data and deriving a third comparison result;
Based on the first comparison result, the second comparison result and the third comparison result, and a predetermined determination threshold, it is determined whether or not the object passing through the passage is a regular game medium,
The game apparatus, wherein the determination threshold is updated based on an average and a deviation of each of the first comparison result, the second comparison result, and the third comparison result.

  The game medium determination means may update the determination threshold when determining that the object passing through the passage is a regular game medium a predetermined number of times.

  According to the seventh gaming machine or the gaming device of the present invention having the above-described configuration, even if a change occurs in the stamp due to aged deterioration or the like, various types including threshold values used for determination according to the current state of the regular medal The coefficient can be updated. For this reason, the accuracy of the results of various determinations can be maintained. Therefore, it is possible to improve the accuracy of detecting an illegal act that misidentifies that a regular game medium is used.

[Template update processing]
In order to achieve the fourth object, the present invention provides a seventh gaming machine or gaming device having the following configuration.

An insertion slot (for example, a medal insertion slot 21 described later) for inserting a game medium;
Game medium detecting means (for example, a medal selector 201 described later) for detecting a game medium inserted from the insertion slot,
The game medium detection means includes
A passage forming portion (for example, a medal rail 210 described later) that forms a passage through which game media pass;
Imaging means for imaging the passage (for example, a camera unit 209 described later);
Game medium determination means (for example, control LSI 234 described later) for determining whether or not an object passing through the passage is a regular game medium based on image data obtained through the imaging means; ,
The game medium determining means is
The image data is converted into different first image data (for example, gradient average image data to be described later), second image data (for example, HOG data to be described later), and third image data (for example, FFT data to be described later). Image conversion means (for example, an image recognition accelerator circuit 249 described later);
Template generating means for generating first template data, second template data, and third template data corresponding to each of the first image data, the second image data, and the third image data;
A first comparison result deriving unit (for example, an image recognition DSP circuit 242 for performing a gradient average image template comparison process described later) that compares the first template data with the first image data and derives a first comparison result;
A second comparison result deriving unit (for example, an image recognition DSP circuit 242 for performing a HOG template comparison process described later) for comparing the second template data with the second image data and deriving a second comparison result;
A third comparison result deriving unit (for example, an image recognition DSP circuit 242 that performs an FFT template comparison process described later) that compares the third template data with the third image data and derives a third comparison result; And
Based on the first comparison result, the second comparison result, the third comparison result, and a preset determination threshold (for example, coefficient D described later), the object passing through the passage is a normal game medium. Determine if there is,
The template generation means includes the first image data, the second image data, the third image data, the first template data, the second template data, and the second game data, which are determined as regular game media. A game machine characterized by performing a template update process for synthesizing the third template data.

A game medium detecting means;
The game medium detection means includes
A passage forming section for forming a passage through which game media pass;
Imaging means for imaging the passage;
Game medium determination means for determining whether an object passing through the passage is a regular game medium based on image data obtained through the imaging means;
The game medium determining means is
Image converting means for converting the image data into different first image data, second image data, and third image data;
Template generating means for generating first template data, second template data, and third template data corresponding to each of the first image data, the second image data, and the third image data;
First comparison result deriving means for comparing the first template data with the first image data and deriving a first comparison result;
A second comparison result deriving means for comparing the second template data with the second image data and deriving a second comparison result;
A third comparison result deriving unit for comparing the third template data with the third image data and deriving a third comparison result;
Based on the first comparison result, the second comparison result and the third comparison result, and a predetermined determination threshold, it is determined whether or not the object passing through the passage is a regular game medium,
The template generation means includes the first image data, the second image data, the third image data, the first template data, the second template data, and the second game data, which are determined as regular game media. A game device characterized by performing a template update process for combining the third template data.

  In addition, the template generation unit may include the first image data relating to the game medium determined to be a regular game medium every time the game medium determination unit reaches a predetermined number of game media determined to be a regular game medium, A template update process for weighted averaging each of the second image data and the third image data, and combining the weighted average with the first template data, the second template data, and the third template data. You may go.

  According to the seventh gaming machine or gaming device of the present invention configured as described above, the template is updated sequentially. For this reason, for example, even if it is deteriorated due to insertion into a gaming machine, paying out, washing at a gaming store, or the like, and the stamp becomes inconspicuous from the beginning, the template can be updated according to the current state of the regular medal. For this reason, the accuracy of the results of various determinations can be maintained. Therefore, the accuracy of detection of fraud that misidentifies that a regular game medium is used is increased.

[Cover open detection]
Conventionally, there has been known a slot machine that uses a CCD camera to determine an inserted inappropriate medal (illegal medal) (see, for example, JP-A-2006-271462).
However, in the slot machine described above, if unnecessary light hits the location picked up by the CCD camera of the medal selector, the inserted medal or the CCD camera itself, the inserted medal based on the captured image is a regular medal. There is a possibility that the accuracy of such determination may be reduced. For this reason, if a sensor or the like for detecting unnecessary light is provided, the number of parts of the medal selector increases and the manufacturing cost increases.
A fifth object of the present invention is to provide a gaming machine or a gaming device that can suppress the manufacturing cost and prevent the accuracy of determination as to whether or not it is a regular medal.
In order to achieve the fifth object, the present invention provides an eighth gaming machine or gaming device having the following configuration.

An insertion slot (for example, a medal insertion slot 21 described later) for inserting a game medium;
Game medium detecting means (for example, a medal selector 201 described later) for detecting a game medium inserted from the insertion slot,
The game medium detection means includes
A passage forming portion (for example, a medal rail 210 described later) that forms a passage through which game media pass;
Imaging means for imaging the passage (for example, a camera unit 209 described later);
Game medium determining means (for example, control LSI 234 described later) for determining whether an object passing through the passage is a regular game medium based on image data obtained through the imaging means;
The presence / absence of a game medium is determined for a plurality of passage determination areas set in advance in the image data, and a change mode of the presence / absence of a game medium in the plurality of passage determination areas in the plurality of image data continuous in time series is provided. Counting means (for example, a medal counting circuit 246 described later) that counts game media when it matches a predetermined mode;
At a predetermined position of the game medium detection means, a light shielding means (for example, a cover member 240 described later) that blocks light unnecessary for the determination by the game medium determination means is disposed.
The counting means includes a light shielding determining means for determining whether or not the light shielding means is disposed at a predetermined position;
The light shielding determination means detects an abnormality in which the light shielding means is not disposed at a predetermined position when a change in luminance of the predetermined passage determination area is detected for a predetermined time or longer (for example, a cover opening detection process described later). )
A gaming machine characterized by that.

A game medium detecting means;
The game medium detection means includes
A passage forming section for forming a passage through which game media pass;
Imaging means for imaging the passage;
Game medium determination means for determining whether or not an object passing through the passage is a regular game medium based on image data obtained through the imaging means;
The presence / absence of a game medium is determined for a plurality of passage determination areas set in advance in the image data, and a change mode of the presence / absence of game media in the plurality of passage determination areas in the plurality of image data continuous in time series is provided. Counting means for counting game media when it matches a predetermined mode,
At a predetermined position of the game medium detection means, a light blocking means for blocking light unnecessary for the determination by the game medium determination means is arranged,
The counting means includes a light shielding determining means for determining whether or not the light shielding means is disposed at a predetermined position;
The gaming apparatus according to claim 1, wherein the light shielding determining means detects an abnormality in which the light shielding means is not arranged at a predetermined position when a change in luminance of the predetermined passage determination area is detected for a predetermined time or longer.

According to the eighth gaming machine or the gaming device of the present invention having the above-described configuration, it is possible to prevent the accuracy of the determination as to whether or not it is a regular medal from decreasing without increasing the manufacturing cost. That is, since it is possible to prevent unnecessary light from being applied to the determination, the accuracy of the determination result can be maintained. Therefore, the accuracy of detection of fraud that misidentifies that a regular game medium is used is increased.
Further, since it is determined whether or not the light shielding means is arranged at a predetermined position based on the image data obtained through the imaging means, it is not necessary to attach another sensor for the determination. For this reason, the number of parts can be reduced, and an increase in manufacturing cost can be suppressed. In addition, since the determination is based on the image data, the determination condition can be easily changed as compared with the case where a dedicated sensor is provided.

Incidentally, Japanese Patent Application Laid-Open No. 2006-271462 describes a slot machine that uses a CCD camera to determine an improper medal inserted (illegal medal). In addition, this slot machine notifies an error when the storage amount of improper medals (illegal medals) reaches a predetermined amount.
However, there is a demand for a gaming machine capable of notifying that the number of illegal medals inserted exceeds a predetermined amount more efficiently than the slot machine described in the above publication.
A sixth object of the present invention is to provide a gaming machine and a gaming device that can efficiently notify that the number of illegal medals inserted exceeds a predetermined amount.
In order to achieve the sixth object, a gaming machine and a gaming device having the following configurations are provided.

Control means (for example, a sub-control circuit 101 described later);
Display means for displaying various images (for example, a liquid crystal display device 11 described later);
An insertion slot (for example, a medal insertion slot 21 described later) for inserting a game medium;
Game medium detecting means (for example, a medal selector 201 described later) for detecting a game medium inserted from the insertion slot,
The game medium detection means includes
A passage forming portion (for example, a medal rail 210 described later) that forms a passage through which game media pass;
Passing object detection means (for example, a camera unit 209 described later) for detecting an object passing through the passage;
Game medium determination means (for example, control LSI 234 described later) for determining whether or not an object passing through the passage is a regular game medium based on data obtained through the passing object detection means;
Determination result output means for outputting the determination result of the game medium determination means to the control means,
The control means includes
A storage unit (for example, a later-described sub-RAM 103) having a determination result storage area (for example, a later-described queue) that stores a predetermined storable number of the determination results output from the determination result output unit;
When the latest determination result is stored in the determination result storage area, if the determination result storage area stores the storable number of determination results, the determination stored in the determination result storage area is stored. A determination result storage means for outputting the oldest determination result of the results from the determination result storage area and storing the latest determination result;
When the determination result storage means outputs the oldest determination result, it is not a regular game medium included in the determination result of the storable number stored in the determination result storage area. It is determined whether the number of determination results is equal to or greater than a predetermined number, and when it is determined that the number is equal to or greater than the predetermined number, occurrence of an abnormality is notified by the display unit (for example, steps S152 to S155 of determination completion command reception processing described later)
A gaming machine characterized by that.

Control means;
Game medium detecting means for detecting a game medium;
With
The game medium detection means includes
A passage forming section for forming a passage through which game media pass;
Passing object detection means for detecting an object passing through the passage;
Game medium determining means for determining whether or not the object passing through the passage is a regular game medium based on data obtained through the passing object detecting means;
Determination result output means for outputting the determination result of the game medium determination means to the control means,
The control means includes
A storage unit having a determination result storage area for storing a predetermined storable number of the determination result output from the determination result output unit;
When the latest determination result is stored in the determination result storage area, if the determination result storage area stores the storable number of determination results, the determination stored in the determination result storage area is stored. A determination result storage means for outputting the oldest determination result of the results from the determination result storage area and storing the latest determination result;
When the determination result storage means outputs the oldest determination result, it is not a regular game medium included in the determination result of the storable number stored in the determination result storage area. It is determined whether or not the number of determination results is equal to or greater than a predetermined number, and when it is determined that the number is equal to or greater than the predetermined number, occurrence of abnormality is notified.

  The gaming machine or gaming device having the above-described configuration can efficiently notify that the number of illegal medals inserted exceeds a predetermined amount.

Incidentally, Japanese Patent Application Laid-Open No. 2006-271462 describes a slot machine that uses a CCD camera to determine an improper medal inserted (illegal medal).
However, in the slot machine described in the above publication, it is not possible to recognize the occurrence of an illegal act that is performed outside the imaging range of the CCD camera (imaging means) or an illegal act that cannot be determined by image processing.
A seventh object of the present invention is to provide a gaming machine capable of recognizing the occurrence of an illegal act performed outside the imaging range of the imaging means and an illegal act that cannot be determined by image processing.
In order to achieve the seventh object, a gaming machine having the following configuration is provided.

Display means for displaying various images (for example, a liquid crystal display device 11 described later);
First control means (for example, a main control circuit 91 described later);
Second control means (for example, a sub-control circuit 101 described later);
An insertion slot (for example, a medal insertion slot 21 described later) for inserting a game medium;
Game medium detecting means (for example, a medal selector 201 described later) for detecting a game medium inserted from the insertion slot,
The game medium detection means includes
A passage forming portion (for example, a medal rail 210 described later) that forms a passage through which game media pass;
Imaging means for imaging the passage (for example, a camera unit 209 described later);
Game medium determining means (for example, control LSI 234 described later) for determining whether an object passing through the passage is a regular game medium based on image data obtained through the imaging means;
Determination result output means for outputting the determination result of the game medium determination means to the second control means;
Object detection means (for example, a double photo sensor 502 described later) for detecting that an object has passed through the passage;
Detection result output means for outputting the detection result of the object detection means to the first control means,
The first control means includes detection result transmission means for transmitting the detection result output from the detection result output means to a second control means,
The second control means includes
Determination result counting means for counting the number of the game media based on the determination result received from the determination result output means;
Detection result counting means for counting the number of game media based on the detection result transmitted from the detection result transmission means,
When the difference between the number counted by the determination result counting means and the number counted by the detection result counting means is equal to or greater than a predetermined value, the display means notifies the occurrence of an abnormality (for example, when receiving a medal insertion command described later) Processing steps S214, S215)
A gaming machine characterized by that.

  According to the gaming machine configured as described above, it is possible to recognize the occurrence of an illegal act performed outside the imaging range of the imaging unit or an illegal act that cannot be determined by image processing.

Incidentally, Japanese Patent Application Laid-Open No. 2006-271462 describes a slot machine that uses a CCD camera to determine an improper medal inserted (illegal medal).
However, in the slot machine described in the above publication, it has not been possible to recognize the occurrence of fraudulent acts (so-called clemantote) that increase credits without actually inserting medals into the medal slot.
An eighth object of the present invention is to provide a gaming machine capable of recognizing the occurrence of an illegal act that increases credits without inserting medals into the medal slot.
In order to achieve the eighth object, a gaming machine having the following configuration is provided.

Display means for displaying various images (for example, a liquid crystal display device 11 described later);
First control means (for example, a main control circuit 91 described later);
Second control means (for example, a sub-control circuit 101 described later);
An insertion slot (for example, a medal insertion slot 21 described later) for inserting a game medium;
Game medium detecting means (for example, a medal selector 201 described later) for detecting a game medium inserted from the insertion slot;
Storage means (for example, a hopper device 51 to be described later) for storing the inserted game media;
Return storage means (for example, a medal tray unit 34 to be described later) for returning the inserted game media to the player and storing the game media;
The game medium detection means includes
A passage forming portion (for example, a medal rail 210 described later) that forms a passage through which game media pass;
Passing object detection means (for example, a camera unit 209 described later) for detecting an object passing through the passage;
Game medium determination means (for example, control LSI 234 described later) for determining whether or not an object passing through the passage is a regular game medium based on data obtained through the passing object detection means;
Determination result output means for outputting the determination result of the game medium determination means to the second control means;
Conversion means (for example, medal solenoid 208 described later) for changing the path for guiding the game medium to either the storage means or the return storage means,
The first control means includes
Conversion control means (for example, a main CPU 93 described later) for controlling the conversion means;
Control state transmission means (for example, main CPU 93 described later) for transmitting the control state controlled by the conversion control means to the second control means,
The second control means includes
Counting means (for example, a sub-CPU 102 described later) for counting the number of determination results as a regular game medium among the determination results output from the determination result output means;
When the control state transmitted from the control state transmitting unit is controlled by the storage unit and the number counted by the counting unit exceeds a predetermined number, an abnormality notifying unit for notifying the abnormality by the display unit (for example, And a sub-CPU 102) that performs steps S157, S159, and S160 of a determination completion command reception process described later.

  According to the gaming machine configured as described above, it is possible to recognize the occurrence of an illegal act that increases credits without inserting medals into the medal slot.

Incidentally, Japanese Patent Application Laid-Open No. 2006-271462 describes a slot machine that uses a CCD camera to determine an improper medal inserted (illegal medal).
In a gaming machine such as the slot machine described in the above publication, for an illegal act related to an imaging unit including a CCD camera, rebooting (rebooting) one of the imaging unit and various units connected to the imaging unit is required. There are accompanying cheating. However, in the slot machine described in the above publication, it has been difficult to recognize fraudulent acts involving restart.
A ninth object of the present invention is to provide a gaming machine and a gaming apparatus capable of recognizing fraudulent actions involving restart.
In order to achieve the ninth object, a gaming machine and a gaming apparatus having the following configurations are provided.

Display means for displaying various images (for example, a liquid crystal display device 11 described later);
Control means (for example, a sub-control circuit 101 described later);
An insertion slot (for example, a medal insertion slot 21 described later) for inserting a game medium;
Game medium detecting means (for example, a medal selector 201 described later) for detecting a game medium inserted from the insertion slot,
The game medium detection means includes
A passage forming portion (for example, a medal rail 210 described later) that forms a passage through which game media pass;
Passing object detection means (for example, a camera unit 209 described later) for detecting an object passing through the passage;
Game medium determination means (for example, control LSI 234 described later) for determining whether or not an object passing through the passage is a regular game medium based on data obtained through the passing object detection means;
A first activation number storage unit (e.g., SRAM 243 described later) for storing a first number of times that the game medium detection unit is activated;
Transmission means (for example, control LSI 234 described later) for transmitting the first number stored in the first activation number storage means to the control means;
The control means includes
A second activation number storage unit (for example, a sub-RAM 103 described later) that stores a second number of times that the control unit has been activated;
When the difference between the first number transmitted by the transmitting unit and the second number stored in the second activation number storage unit exceeds a threshold value, the display unit notifies the occurrence of an abnormality ( For example, the sub CPU 102 that performs steps S192 and S193 of the number-of-starts determination process described later)
A gaming machine characterized by that.

Control means;
A game medium detecting means for detecting a game medium,
The game medium detection means includes
A passage forming section for forming a passage through which game media pass;
Passing object detection means for detecting an object passing through the passage;
Game medium determining means for determining whether or not the object passing through the passage is a regular game medium based on data obtained through the passing object detecting means;
First activation number storage means for storing a first number of times that the game medium detection means has been activated;
Transmission means for transmitting the first number stored in the first activation number storage means to the control means;
The control means includes
A second activation number storage means for storing a second number of times that the control means has been activated;
The occurrence of an abnormality is notified when a difference between the first number transmitted by the transmission unit and the second number stored in the second activation number storage unit exceeds a threshold value. Game equipment.

  According to the gaming machine and the gaming device having the above-described configuration, it is possible to recognize an illegal act involving restart.

In Japanese Laid-Open Patent Publication No. 2006-271462, a slot machine is described that uses a CCD camera to determine an improper medal inserted (illegal medal).
In a gaming machine such as the slot machine described in the above publication, an illegal act related to an imaging unit including a CCD camera includes an illegal act involving an initialization process that is a process for resetting various settings of the imaging unit. However, in the slot machine described in the above publication, it is difficult to recognize fraudulent actions involving initialization processing.
A tenth object of the present invention is to provide a gaming machine and a gaming device capable of recognizing fraudulent actions involving initialization processing.
In order to achieve the tenth object, a gaming machine and a gaming apparatus having the following configurations are provided.

Display means for displaying various images (for example, a liquid crystal display device 11 described later);
Control means (for example, a sub-control circuit 101 described later);
An insertion slot (for example, a medal insertion slot 21 described later) for inserting a game medium;
Game medium detecting means (for example, a medal selector 201 described later) for detecting a game medium inserted from the insertion slot,
The game medium detection means includes
A passage forming portion (for example, a medal rail 210 described later) that forms a passage through which game media pass;
Passing object detection means (for example, a camera unit 209 described later) for detecting an object passing through the passage;
Game medium determination means (for example, control LSI 234 described later) for determining whether or not an object passing through the passage is a regular game medium based on data obtained through the passing object detection means;
Medium storage means (for example, SRAM 243 described later) capable of storing information under the control of the game medium determination means;
Initialization operation means (for example, an initialization switch described later) for performing an operation for initializing a predetermined area of the medium storage means,
The medium storage means has an initialization information storage area,
The game medium determining means is
Based on the operation of the initialization operation means, an initialization process of a predetermined area of the medium storage means is performed, and initialization information indicating that the initialization process has been performed is sent to the medium storage means. Initialization processing means for storing in the initialization information storage area;
First transmission means for transmitting information including the initialization information stored in the initialization information storage area of the medium storage means to the control means (for example, a control LSI 234 for transmitting an activation completion command described later);
Second transmission means for transmitting information including the initialization information stored in the initialization information storage area of the medium storage means to the control means at the time of activation (for example, control for transmitting a medal selector non-operation command described later) LSI 234), and
When the initialization information is included in the information received from the first transmission means or the second transmission means, the control means initializes a predetermined area in the medium storage means by the display means. (For example, the sub CPU 102 that performs step S143 in the process of receiving an activation completion command described later and step S182 of the process in receiving a medal selector non-operation command)
A gaming machine characterized by that.

Control means;
A slot for gaming media;
A game medium detecting means for detecting a game medium,
The game medium detection means includes
A passage forming section for forming a passage through which game media pass;
Passing object detection means for detecting an object passing through the passage;
Game medium determining means for determining whether or not the object passing through the passage is a regular game medium based on data obtained through the passing object detecting means;
Medium storage means controlled by the game medium determination means and capable of storing information;
Initialization operation means for performing an operation for initializing a predetermined area of the medium storage means,
The medium storage means has an initialization information storage area,
The game medium determining means is
Based on the operation of the initialization operation means, an initialization process of a predetermined area of the medium storage means is performed, and initialization information indicating that the initialization process has been performed is sent to the medium storage means. Initialization processing means for storing in the initialization information storage area;
First transmission means for transmitting information including the initialization information stored in the initialization information storage area of the medium storage means to the control means;
A second transmission unit configured to transmit information including the initialization information stored in the initialization information storage area of the medium storage unit to the control unit at startup;
When the initialization information is included in the information received from the first transmission unit or the second transmission unit, the control unit has initialized a predetermined area in the medium storage unit A game device characterized by notifying of

  According to the gaming machine and the gaming device having the above-described configuration, it is possible to recognize an illegal act involving an initialization process.

  Incidentally, Japanese Patent Application Laid-Open No. 2006-271462 describes a slot machine that uses a CCD camera to determine an improper medal inserted (illegal medal).

In a gaming machine such as the slot machine described in the above publication, an illegal act relating to an imaging unit including a CCD camera includes an illegal act accompanied by an illegal operation of a switch for switching valid / invalid of various settings relating to the imaging unit. . However, in the slot machine described in the above publication, it has been difficult to recognize such an unauthorized act involving an unauthorized operation.
An eleventh object of the present invention is to provide a gaming machine and a gaming apparatus capable of recognizing an illegal act accompanied by an illegal operation of a switch for switching between valid / invalid of various settings.
In order to achieve the eleventh object, a gaming machine and a gaming device having the following configurations are provided.

Display means for displaying various images (for example, a liquid crystal display device 11 described later);
Control means (for example, a sub-control circuit 101 described later);
An insertion slot (for example, a medal insertion slot 21 described later) for inserting a game medium;
Game medium detecting means (for example, a medal selector 201 described later) for detecting a game medium inserted from the insertion slot,
The game medium detection means includes
A passage forming portion (for example, a medal rail 210 described later) that forms a passage through which game media pass;
Passing object detection means (for example, a camera unit 209 described later) for detecting an object passing through the passage;
Game medium determination means (for example, control LSI 234 described later) for determining whether or not an object passing through the passage is a regular game medium based on data obtained through the passing object detection means;
A selection unit (for example, a color determination switch and an engraving determination switch described later) for selecting whether the determination by the game medium determination unit is valid or invalid;
State transmission means (for example, control LSI 234 described later) for transmitting the selection state of the selection means to the control means,
The control means includes
First state storage means (for example, a first switch information storage area described later) for storing the selection state of the selection means at the time of previous power-on;
The selection state stored in the first state storage means and the selection state received from the state transmission means are compared, and a selection state comparison means for judging whether they match (for example, processing at the time of starting completion command reception described later) Sub-CPU 102) that performs step S145 of
When the selection state comparison unit determines that the selection state stored in the first state storage unit and the selection state received from the state transmission unit do not match, the determination result is notified by the display unit. (E.g., the sub CPU 102 that performs step S146 of a process at the time of receiving a start completion command described later)
A gaming machine characterized by that.

Control means;
A game medium detecting means for detecting a game medium,
The game medium detection means includes
A passage forming section for forming a passage through which game media pass;
Passing object detection means for detecting an object passing through the passage;
Game medium determining means for determining whether or not the object passing through the passage is a regular game medium based on data obtained through the passing object detecting means;
A selection means for selecting the determination by the game medium determination means as valid or invalid;
State transmission means for transmitting the selection state of the selection means to the control means,
The control means includes
First state storage means for storing the selection state of the selection means at the previous power-on;
A selection state comparison unit that compares the selection state stored in the first state storage unit with the selection state received from the state transmission unit and determines whether they match,
When the selection state comparison unit determines that the selection state stored in the first state storage unit and the selection state received from the state transmission unit do not match, a determination result is notified. A gaming device.

  According to the gaming machine and the gaming device having the above-described configuration, it is possible to recognize an illegal act accompanied by an illegal operation of a switch for switching between valid / invalid of various settings.

Incidentally, Japanese Patent Application Laid-Open No. 2006-271462 describes a slot machine that uses a CCD camera to determine an improper medal inserted (illegal medal).
In a gaming machine such as the slot machine described in the above publication, for an illegal act related to an imaging unit including a CCD camera, rebooting (rebooting) one of the imaging unit and various units connected to the imaging unit is required. There are accompanying cheating. However, in the slot machine described in the above publication, it has been difficult to recognize fraudulent acts involving restart.
A twelfth object of the present invention is to provide a gaming machine and a gaming apparatus capable of recognizing fraudulent actions involving restart.
In order to achieve the twelfth object, a gaming machine and a gaming apparatus having the following configurations are provided.

Display means for displaying various images (for example, a liquid crystal display device 11 described later);
Control means (for example, a sub-control circuit 101 described later);
An insertion slot (for example, a medal insertion slot 21 described later) for inserting a game medium;
Game medium detecting means (for example, a medal selector 201 described later) for detecting a game medium inserted from the insertion slot,
The game medium detection means includes
A passage forming portion (for example, a medal rail 210 described later) that forms a passage through which game media pass;
Passing object detection means (for example, a camera unit 209 described later) for detecting an object passing through the passage;
Game medium determining means (for example, control LSI 234 described later) for determining whether or not an object passing through the passage is a regular game medium based on data obtained through the passing object detecting means. ,
The game medium determining means is
Command transmission means for transmitting various commands to the control means;
Transmission command number counting means for cumulatively counting the number of commands transmitted to the control means after activation,
The various commands include an ACK command indicating that the command has been normally received when a predetermined command is received from the control means,
The command transmission means transmits the various commands to be transmitted to the control means, including count information indicating the count value cumulatively counted by the transmission command number counting means,
The control means includes
Count information storage means (for example, a sub RAM 103 described later) for storing the count information included in the received various commands;
The value obtained by adding 1 to the count information included in the previously received count information stored in the count information storage means matches the value indicated by the count information included in the various commands received this time Determination means for determining whether or not to perform (for example, a sub-CPU 102 described later),
When it is determined that the determination means do not match, an abnormality is notified by the display means.

Control means;
A game medium detecting means for detecting a game medium,
The game medium detection means includes
A passage forming section for forming a passage through which game media pass;
Passing object detection means for detecting an object passing through the passage;
Game medium determination means for determining whether an object passing through the passage is a regular game medium based on data obtained via the passing object detection means,
The game medium determining means is
Command transmission means for transmitting various commands to the control means;
Transmission command number counting means for cumulatively counting the number of commands transmitted to the control means after activation,
The various commands include an ACK command indicating that the command has been normally received when a predetermined command is received from the control means,
The command transmission means transmits the various commands to be transmitted to the control means, including count information indicating the count value cumulatively counted by the transmission command number counting means,
The control means includes
Count information storage means for storing the count information included in the received various commands;
The value obtained by adding 1 to the count information included in the previously received count information stored in the count information storage means matches the value indicated by the count information included in the various commands received this time Determining means for determining whether to do,
An abnormality is notified when it determines with the said determination means not matching. The game device characterized by the above-mentioned.

  According to the gaming machine and the gaming device having the above-described configuration, it is possible to recognize an illegal act involving restart.

Incidentally, Japanese Patent Application Laid-Open No. 2006-271462 describes a slot machine that uses a CCD camera to determine an improper medal inserted (illegal medal).
In an amusement machine such as the slot machine described in the above publication, when an error occurs in an imaging unit equipped with a CCD camera, that is, a unit that determines whether or not a inserted medal is a regular medal, the error is reliably detected. It is hoped that it will be recognized.
A thirteenth object of the present invention is to provide a gaming machine and a gaming apparatus capable of reliably recognizing an error that has occurred in a unit that determines whether or not an inserted medal is a regular medal.
In order to achieve the thirteenth object, a gaming machine and a gaming device having the following configurations are provided.

Display means for displaying various images (for example, a liquid crystal display device 11 described later);
Control means (for example, a sub-control circuit 101 described later);
An insertion slot (for example, a medal insertion slot 21 described later) for inserting a game medium;
Game medium detecting means (for example, a medal selector 201 described later) for detecting a game medium inserted from the insertion slot,
The game medium detection means includes
A passage forming portion (for example, a medal rail 210 described later) that forms a passage through which game media pass;
Passing object detection means (for example, a camera unit 209 described later) for detecting an object passing through the passage;
Game medium determination means (for example, control LSI 234 described later) for determining whether or not an object passing through the passage is a regular game medium based on data obtained through the passing object detection means;
Medium storage means (for example, SRAM 243 described later) capable of storing information under the control of the game medium determination means,
The game medium determining means is
An abnormality detecting means for detecting an abnormality of the game medium detecting means and storing abnormality information indicating the detected abnormality in the medium storage means;
First transmission means for transmitting abnormality information stored in the medium storage means to the control means based on detection of abnormality by the abnormality detection means (for example, a control LSI 234 for transmitting a medal selector error command described later); ,
Second transmission means for transmitting the abnormality information stored in the medium storage means to the control means at a predetermined cycle (for example, a control LSI 234 for transmitting a medal selector no-operation command described later),
The control means includes
Abnormality information receiving means (for example, a sub CPU 102 described later) for receiving abnormality information transmitted from the first transmission means or the second transmission means;
Release information transmitting means (for example, a sub CPU 102 described later) for transmitting abnormality release information to the game medium detecting means when a predetermined operation is performed;
When the abnormality information is received, a suggestion notification (for example, display of a C1 error screen described later) is performed by the display means to suggest cancellation of the abnormality,
The game medium determination means deletes the abnormality information stored in the medium storage means when the abnormality detected by the abnormality detection means cannot be detected after receiving the release information. Machine.

Control means;
A game medium detecting means for detecting a game medium,
The game medium detection means includes
A passage forming section for forming a passage through which game media pass;
Passing object detection means for detecting an object passing through the passage;
Game medium determining means for determining whether or not the object passing through the passage is a regular game medium based on data obtained through the passing object detecting means;
Medium storage means controlled by the game medium determination means and capable of storing information;
The game medium determining means is
An abnormality detecting means for detecting an abnormality of the game medium detecting means and storing abnormality information indicating the detected abnormality in the medium storage means;
First transmission means for transmitting abnormality information stored in the medium storage means to the control means based on detection of abnormality by the abnormality detection means;
Second transmission means for transmitting abnormality information stored in the medium storage means to the control means at a predetermined cycle;
The control means includes
Abnormal information receiving means for receiving abnormal information transmitted from the first transmitting means or the second transmitting means;
Release information transmitting means for transmitting abnormality release information to the game medium detecting means when a predetermined operation is performed,
When the abnormality information is received, a suggestion notification that suggests the cancellation of the abnormality is performed,
The game medium determination means deletes the abnormality information stored in the medium storage means when the abnormality detected by the abnormality detection means cannot be detected after receiving the release information. Equipment.

  According to the gaming machine and the gaming device configured as described above, it is possible to reliably recognize an error that has occurred in the unit that determines whether or not the inserted medal is a regular medal.

  DESCRIPTION OF SYMBOLS 1 ... Pachislot, 3L ... Left reel, 3C ... Middle reel, 3R ... Right reel, 4 ... Reel display window, 21 ... Medal insertion slot, 23 ... Start lever, 32 ... Medal paying exit, 51 ... Hopper device, 71 ... Main Control board 72 ... Sub control board 79 ... Start switch 80 ... Stop switch board 91 ... Main control circuit 101 ... Sub control circuit 140 ... Cancel shooter 201 ... Medal selector 202 ... Medal chute 203 ... Slope 204 ... Base plate part 205 ... Sub plate 206 ... Cancel shooter 207 ... Select plate 208 ... Medal solenoid 209 ... Camera unit 210 ... Medal rail 211 ... Medal entrance part 212 ... Central hole 213 ... Medal pressure, 217 ... Magnet, 218: After medal pressure, 227: Medal stopper unit, 230: First substrate, 231 ... Second substrate, 232 ... CMOS image sensor, 233 ... LED, 234 ... Control LSI, 235 ... Leg, 241 ... Host controller 242 ... Image recognition DSP circuit 243 ... SRAM 244 ... Flash memory 245 ... ISP circuit 246 ... Medal count circuit 247 ... Color recognition circuit 248 ... Fisheye correction scaler circuit 249 ... Image recognition accelerator circuit 250 ... GPIO, 251 ... ISI circuit

Claims (1)

Display means for displaying various images;
First control means;
A second control means;
A slot for gaming media;
A game medium detecting means for detecting a game medium thrown from the slot,
The game medium detection means includes
A passage forming section for forming a passage through which game media pass;
Imaging means for imaging the passage;
Game medium determination means for determining whether or not an object passing through the passage is a regular game medium based on image data obtained through the imaging means;
Determination result output means for outputting the determination result of the game medium determination means to the second control means;
Object detection means for detecting that an object has passed through the passage;
Detection result output means for outputting the detection result of the object detection means to the first control means,
The first control means includes detection result transmission means for transmitting the detection result output from the detection result output means to a second control means,
The second control means includes
Determination result counting means for counting the number of the game media based on the determination result received from the determination result output means;
Detection result counting means for counting the number of game media based on the detection result transmitted from the detection result transmission means,
A gaming machine, wherein the display means notifies the occurrence of an abnormality when the difference between the number counted by the determination result counting means and the number counted by the detection result counting means is a predetermined value or more.

Images