JP2018182012A - Multilayer printed wiring board and manufacturing method therefor - Google Patents

Multilayer printed wiring board and manufacturing method therefor Download PDF

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JP2018182012A
JP2018182012A JP2017077967A JP2017077967A JP2018182012A JP 2018182012 A JP2018182012 A JP 2018182012A JP 2017077967 A JP2017077967 A JP 2017077967A JP 2017077967 A JP2017077967 A JP 2017077967A JP 2018182012 A JP2018182012 A JP 2018182012A
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substrate
hole
diameter portion
multilayer printed
wiring board
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貴弘 八木
Takahiro Yagi
貴弘 八木
清 小池
Kiyoshi Koike
清 小池
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Oki Printed Circuits Co Ltd
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  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a multilayer printed wiring board which can reduce the influence of a through-hole stub with the reduction of cost and a manufacturing period.SOLUTION: The multilayer printed wiring board, having at least one signal wiring layer 11, at least one ground layer and one power layer and at least one electronic component provided on a substrate 10, includes a through hole 14 which makes conduction among a surface of the substrate 10 on which the electronic component is mounted, a back face opposite to the surface and the signal wiring layer 11 formed internally of the substrate 10. The through hole 14 includes a large diameter part 14A which contributes to signal transmission from the surface of the substrate 10 to the signal wiring layer 11, and a small diameter part 14B having a diameter smaller than the large diameter part 14A not contributing to signal transmission.SELECTED DRAWING: Figure 1

Description

本発明は、特に高速信号を伝送するスルーホールのスタブによる特性劣化を低減することができる多層プリント配線板に関するものである。   In particular, the present invention relates to a multilayer printed wiring board capable of reducing characteristic deterioration due to stubs of through holes for transmitting high speed signals.

近年、データ通信の高速・大容量化により、デジタル信号の高速化が進み、プリント配線板においても高速信号を伝送するための特性確保が重要な課題となっている。サーバー、ルーターなどの通信装置では２５Ｇｂｐｓから、さらに次世代は５６Ｇｂｐｓ伝送規格の策定が進んでいる。特に、多層プリント基板に設けたスルーホールに高速信号を伝送する際、スルーホールの信号伝送に寄与しない分岐（スタブ）に起因する特性劣化が問題となっている。   In recent years, with the increase in speed and capacity of data communication, speeding up of digital signals has progressed, and securing of characteristics for transmitting high-speed signals also in printed wiring boards has become an important issue. From 25 Gbps for communication devices such as servers and routers, and for the next generation, 56 Gbps transmission standards are being formulated. In particular, when transmitting a high-speed signal to a through hole provided in a multilayer printed circuit board, there is a problem of characteristic deterioration due to a branch (stub) that does not contribute to the signal transmission of the through hole.

図３に図示した従来例１のように、スルーホール14を有する多層プリント配線板においては、高速信号をコネクタ16のプレスフィットピン17からスルーホール14を介して信号配線層11に伝送する際、信号伝送に寄与しない分岐したスタブ19部分で容量性によるインピーダンス不整合が生じたり、そのスタブ長に起因する周波数で信号伝搬特性が著しく劣化したりすることが知られている。   In the multilayer printed wiring board having the through holes 14 as in the prior art 1 shown in FIG. 3, when transmitting a high speed signal from the press-fit pins 17 of the connector 16 through the through holes 14 to the signal wiring layer 11 It is known that capacitive impedance mismatching occurs in a branched stub 19 that does not contribute to signal transmission, or that signal propagation characteristics are significantly degraded at a frequency due to the stub length.

このような問題に対して、例えば、特許文献１では対策として、接続に寄与しないスタブをドリル切削加工により除去するバックドリル加工を施している。具体的には、図４に図示した従来例２のように、スルーホール14形成後、部品実装面15の裏面からバックドリル加工領域20を切削することでスタブ19部分を除去している。なお、図３，４中、符号10は基板、12はグランド層または電源層、13は絶縁体である。   In order to solve such a problem, for example, in Patent Document 1, back drilling is performed in which stubs that do not contribute to connection are removed by drill cutting. Specifically, as in the conventional example 2 illustrated in FIG. 4, after the through holes 14 are formed, the stub 19 area is removed by cutting the back drill processing area 20 from the back surface of the component mounting surface 15. In FIGS. 3 and 4, reference numeral 10 denotes a substrate, 12 denotes a ground layer or a power supply layer, and 13 denotes an insulator.

この際、ドリルによる切削深さが深過ぎると信号配線層との導通がなくなってしまうため、スタブを除去する信号配線層までの加工深さを緻密に制御する必要があるが、機械精度と基板厚のばらつきに高度な精度が必要とされ、２５Ｇｂｐｓを超える用途では精度確保が困難になりつつある。また、加工対象のスルーホールが増加するとデータ作成や加工時間が増加し、コストが上昇するという課題もある。加えて、バックドリル加工は削除するスルーホール径よりも大径ドリルを用いて加工を行う都合上、バックドリル用クリアランス21を確保するために、スルーホールのバックドリル加工による削除対象部分と周囲の導体との間隙をあらかじめ広く設定しておくなどの設計対応が必要となる場合もあり、周囲の配線収容性を悪化させるという問題もある。   At this time, if the cutting depth by the drill is too deep, the continuity with the signal wiring layer will be lost, so it is necessary to precisely control the processing depth up to the signal wiring layer where the stubs are removed. Variations in thickness require a high degree of accuracy, making it difficult to ensure accuracy in applications exceeding 25 Gbps. In addition, when the number of through holes to be processed increases, data creation and processing time increase, and there is a problem that the cost increases. In addition, in order to secure the clearance 21 for back drilling for the convenience of carrying out processing using a drill with a larger diameter than the diameter of the through hole to be back drilled, the portion to be removed by back drilling of the through hole and the surrounding In some cases, it may be necessary to design in advance, for example, by setting a wide gap with the conductor in advance, and there is also a problem of deteriorating the wiring accommodation in the surrounding area.

また、特許文献２には、バックドリルを使わずに短いスルーホールを貼り合わせることでスタブ長を短くする技術が記載されている。この技術では全体板厚で生じるスタブ長よりは影響を軽減できるものの、スタブ長は貼り合わせ基板厚以下にすることは出来ないため、スルーホール長さと使用信号配線層位置によってはスタブが残ってしまい高速伝送信号には適さないという問題がある。   Further, Patent Document 2 describes a technique for shortening a stub length by bonding short through holes without using a back drill. Although this technique can reduce the effect more than the stub length that occurs with the overall thickness, the stub length can not be made less than the bonded substrate thickness, so stubs may remain depending on the through hole length and the signal wiring layer position used. There is a problem that it is not suitable for high speed transmission signals.

特開２００３−１５８３８１号公報Unexamined-Japanese-Patent No. 2003-158381 特開２００９−１５８８１５号公報JP, 2009-158815, A

本発明は、上記課題を解決すべくなされたものであり、高速信号を伝送する多層プリント配線板において、特にスルーホールのスタブの影響を軽減し、コストおよび製造期間を軽減することができる多層プリント配線板を提供するものである。   The present invention has been made to solve the above-mentioned problems, and in a multilayer printed wiring board for transmitting high-speed signals, in particular, a multilayer print which can reduce the influence of stubs of through holes and reduce cost and manufacturing period. A wiring board is provided.

添付図面を参照して本発明の要旨を説明する。   The subject matter of the present invention will be described with reference to the accompanying drawings.

基板10に、少なくとも１つの信号配線層11と、少なくとも１つのグランド層または電源層と、少なくとも１つの電子部品とが設けられた多層プリント配線板であって、前記電子部品が実装される基板10の表面と、この表面の反対側の裏面と、前記基板10の内部に形成された前記信号配線層11とを導通するスルーホール14を有し、このスルーホール14は、前記基板10の表面から前記信号配線層11までの信号伝送に寄与する大径部14Ａと、前記信号伝送に寄与しない前記大径部14Ａより径小な小径部14Ｂとを有することを特徴とする多層プリント配線板に係るものである。   A multilayer printed wiring board in which at least one signal wiring layer 11, at least one ground layer or power supply layer, and at least one electronic component are provided on a substrate 10, the substrate 10 on which the electronic component is mounted. And a through hole 14 for conducting the signal wiring layer 11 formed in the inside of the substrate 10, and the through hole 14 is formed from the surface of the substrate 10 A multilayer printed wiring board characterized by having a large diameter portion 14A contributing to signal transmission to the signal wiring layer 11 and a small diameter portion 14B smaller in diameter than the large diameter portion 14A not contributing to the signal transmission. It is a thing.

また、前記スルーホール14と前記グランド層または電源層とが導通しないために設けたクリアランス18が、前記スルーホール14の前記小径部14Ｂの位置において前記大径部14Ａの位置におけるクリアランス18以上の寸法に設定されていることを特徴とする請求項１に記載の多層プリント配線板に係るものである。   Further, the clearance 18 provided for preventing conduction between the through hole 14 and the ground layer or the power supply layer is equal to or larger than the clearance 18 at the position of the large diameter portion 14A at the position of the small diameter portion 14B of the through hole 14 The multi-layered printed wiring board according to claim 1, wherein

また、基板10に、少なくとも１つの信号配線層11と、少なくとも１つのグランド層または電源層と、少なくとも１つの電子部品とが設けられた多層プリント配線板であって、前記基板10の表面側には、前記電子部品が実装される基板10の表面と、前記基板10の内部に形成された前記信号配線層11とを導通するスルーホール14が設けられ、前記基板10の裏面側には、前記スルーホール14と連通し、このスルーホール14より径小なノンスルーホール23が設けられていることを特徴とする多層プリント配線板に係るものである。   A multilayer printed wiring board in which at least one signal wiring layer 11, at least one ground layer or power supply layer, and at least one electronic component are provided on a substrate 10, and the surface side of the substrate 10 is provided. A through hole 14 is provided for electrically connecting the surface of the substrate 10 on which the electronic component is mounted and the signal wiring layer 11 formed inside the substrate 10, and the back surface side of the substrate 10 The present invention relates to a multilayer printed wiring board characterized in that a non-through hole 23 smaller in diameter than the through hole 14 is provided in communication with the through hole 14.

また、前記スルーホール14と前記グランド層または電源層とが導通しないために設けたクリアランス18が、前記ノンスルーホール23の位置において前記スルーホール14の位置におけるクリアランス18以上の寸法に設定されていることを特徴とする請求項３に記載の多層プリント配線板に係るものである。   Further, the clearance 18 provided for preventing conduction between the through hole 14 and the ground layer or the power supply layer is set to a dimension equal to or larger than the clearance 18 at the position of the through hole 14 at the position of the non through hole 23. It concerns on the multilayer printed wiring board of Claim 3 characterized by the above-mentioned.

また、前記スルーホール14は複数近接して配置され、差動信号を伝送する差動対を含むように構成されていることを特徴とする請求項１〜４のいずれか１項に記載の多層プリント配線板に係るものである。   5. The multilayer according to any one of claims 1 to 4, wherein a plurality of the through holes 14 are arranged in close proximity and configured to include a differential pair for transmitting differential signals. It relates to a printed wiring board.

また、基板10に、少なくとも１つの信号配線層11と、少なくとも１つのグランド層または電源層と、少なくとも１つの電子部品とが設けられた多層プリント配線板の製造方法であって、前記電子部品が実装される基板10の表面と、この表面の反対側の裏面と、前記基板10の内部に形成された前記信号配線層11とを導通し、且つ、前記基板10の表面から前記信号配線層11までの信号伝送に寄与する大径部14Ａと前記信号伝送に寄与しない前記大径部14Ａより径小な小径部14Ｂとを有するスルーホール14を形成した後、この小径部14Ｂを切削加工により除去することで、前記大径部14Ａより径小なノンスルーホール23を形成することを特徴とする多層プリント配線板の製造方法に係るものである。   A method of manufacturing a multilayer printed wiring board in which at least one signal wiring layer 11, at least one ground layer or power supply layer, and at least one electronic component are provided on the substrate 10, wherein the electronic component is The surface of the substrate 10 to be mounted, the back surface opposite to the surface, and the signal wiring layer 11 formed inside the substrate 10 are conducted, and the signal wiring layer 11 is viewed from the surface of the substrate 10 After forming the through hole 14 having the large diameter portion 14A contributing to the signal transmission up to and the small diameter portion 14B smaller in diameter than the large diameter portion 14A not contributing to the signal transmission, the small diameter portion 14B is removed by cutting This is related to the method of manufacturing a multilayer printed wiring board characterized by forming the non-through holes 23 smaller in diameter than the large diameter portion 14A.

本発明は上述のように構成したから、スルーホールのスタブの影響を軽減し、コストおよび製造期間を軽減することができる多層プリント配線板となる。   Since this invention was comprised as mentioned above, it becomes a multilayer printed wiring board which can reduce the influence of the stub of a through hole, and can reduce a cost and a manufacture period.

本実施例の概略説明端面図である。It is a schematic explanatory end view of a present Example. 別例の概略説明端面図である。It is a schematic explanatory end view of another example. 従来例１の概略説明端面図である。FIG. 10 is a schematic explanatory end view of Conventional Example 1; 従来例２の概略説明端面図である。FIG. 10 is a schematic explanatory end view of Conventional Example 2; 実験結果を示すグラフである。It is a graph which shows an experimental result.

好適と考える本発明の実施形態を、図面に基づいて本発明の作用を示して簡単に説明する。   The preferred embodiments of the present invention will be briefly described by showing the operation of the present invention based on the drawings.

スルーホール14の伝送特性に寄与しないスタブ部分が小径となり、寄生容量をそれだけ小さくすることができ、スタブ長による共振周波数を高周波側にシフトすることができる。従って、小径部14Ｂの径を調整することで、スタブによる共振周波数を伝送信号の周波数の高次高調波に重ならない周波数にシフトさせることが可能となり、バックドリル加工なしでもスタブ対策が可能となる。   The stub portion which does not contribute to the transmission characteristics of the through hole 14 has a small diameter, and the parasitic capacitance can be reduced accordingly, and the resonance frequency by the stub length can be shifted to the high frequency side. Therefore, by adjusting the diameter of the small diameter portion 14B, it is possible to shift the resonant frequency by the stub to a frequency not overlapping with the higher harmonics of the frequency of the transmission signal, and the stub countermeasure is possible without back drilling. .

また、更に良好な特性を得るためにバックドリル加工を施す場合（例えば小径部14Ｂ部分を削除してノンスルーホールとする場合）には、ドリル径を大径部14Ａより小径にすることで、ドリルによる加工深さが深すぎた場合でも、大径部14Ａが削除されることを防止することが可能となり、精密に加工深さを制御せずとも、バックドリル加工がそれだけ容易に行えることになる。   In addition, in the case where back drilling is to be performed to obtain better characteristics (for example, in the case where the small diameter portion 14B is removed to form a non-through hole), the drill diameter is made smaller than the large diameter portion 14A. Even if the processing depth by the drill is too deep, it is possible to prevent the large diameter portion 14A from being removed, and back drilling can be performed so easily without precisely controlling the processing depth. Become.

本発明の具体的な実施例について図面に基づいて説明する。   Specific embodiments of the present invention will be described based on the drawings.

本実施例は、基板10に、少なくとも１つの信号配線層11と、少なくとも１つのグランド層または電源層12と、少なくとも１つの電子部品とが設けられた多層プリント配線板であって、前記電子部品が実装される基板10の表面と、この表面の反対側の裏面と、前記基板10の内部に形成された前記信号配線層11とを導通するスルーホール14を有し、このスルーホール14は、前記基板10の表面から前記信号配線層11までの信号伝送に寄与する大径部14Ａと、前記信号伝送に寄与しない前記大径部14Ａより径小な小径部14Ｂとを有するものである。   The present embodiment is a multilayer printed wiring board in which at least one signal wiring layer 11, at least one ground layer or power supply layer 12, and at least one electronic component are provided on a substrate 10, and the electronic component And a back surface opposite to the front surface, and the signal wiring layer 11 formed in the inside of the substrate 10, and the through hole 14 has the following structure. A large diameter portion 14A contributing to signal transmission from the surface of the substrate 10 to the signal wiring layer 11 and a small diameter portion 14B smaller in diameter than the large diameter portion 14A not contributing to the signal transmission are provided.

具体的には、本実施例は図１に図示したように、少なくとも１つの信号配線層11と、少なくとも１つのグランド層または電源層12が、絶縁体13を介して積層されているプリント配線基板10である。図１では、基板10の電子部品の実装面15にコネクタ16が実装され、プレスフィットピン17を挿入しコネクタ16と信号配線層11に高速信号を伝搬するためにスルーホール14が設けられている。また、スルーホール14は複数近接して配置され、差動信号を伝送する差動対を含むように構成されている。   Specifically, as illustrated in FIG. 1, the printed wiring board according to the present embodiment has at least one signal wiring layer 11 and at least one ground layer or power supply layer 12 laminated via an insulator 13. 10 In FIG. 1, the connector 16 is mounted on the mounting surface 15 of the electronic component of the substrate 10, and the through holes 14 are provided for transmitting high-speed signals to the connector 16 and the signal wiring layer 11 by inserting the press fit pins 17. . A plurality of through holes 14 are disposed in close proximity to each other and configured to include a differential pair for transmitting differential signals.

スルーホール14は、実装面15（表面）から信号配線層11まで形成された大径部14Ａと、信号配線層11から実装面15の他方の面（裏面）まで形成された信号伝搬に寄与しない相対的に小径の小径部14Ｂとを有する。なお、小径部14Ｂの終端位置は、信号配線層11またはプレスフィットピン17の長さの何れか、実装面15から大きい方を目安に決定する（裏面から信号配線層11若しくはプレスフィットピン17のいずれか近い方に至らないように小径部14Ｂを設ける。）。大径部14Ａと小径部14Ｂとの間は、両者を接続する小径部側ほど窄まる漏斗状の接続部14Ｃに設定されている。   Through hole 14 does not contribute to signal propagation formed from large diameter portion 14A formed from mounting surface 15 (front surface) to signal wiring layer 11 and from signal wiring layer 11 to the other surface (rear surface) of mounting surface 15 And a relatively small diameter portion 14B. The end position of the small diameter portion 14B is determined based on either the signal wiring layer 11 or the length of the press-fit pin 17 or the larger one from the mounting surface 15 (from the back surface of the signal wiring layer 11 or the press-fit pin 17). The small diameter portion 14B is provided so as not to reach any closer one). Between the large diameter portion 14A and the small diameter portion 14B, a funnel-shaped connecting portion 14C which is narrowed toward the small diameter portion connecting the both is set.

スルーホール14とグランド層または電源層12との間には、スルーホール14とグランド層または電源層12とが導通しないためのクリアランス（間隙）18が夫々設けられている。このクリアランスサイズは大径部14Ａに対する適切な寸法を適宜設定し、小径部14Ｂにも同一サイズを適用する。   Between the through holes 14 and the ground layer or the power supply layer 12, clearances (gaps) 18 are provided for preventing the conduction between the through holes 14 and the ground layer or the power supply layer 12, respectively. As the clearance size, an appropriate size for the large diameter portion 14A is appropriately set, and the same size is applied to the small diameter portion 14B.

上記構成により、小径部14Ｂとグランド層または電源層12との間隙は、大径部14Ａとグランド層または電源層12との間隙よりも大きくなるため、スタブ部の寄生容量を小さくすることでスタブ長による共振周波数を高周波にシフトすることが出来る。このため、小径部14Ｂの径を調整することでスタブによる共振周波数を伝送信号の周波数の高次高調波に重ならない周波数にシフトさせることで、バックドリル加工無しでスタブ対策が可能となる。   With the above configuration, the gap between the small diameter portion 14B and the ground layer or the power supply layer 12 is larger than the gap between the large diameter portion 14A and the ground layer or the power supply layer 12, thereby reducing the parasitic capacitance of the stub portion The resonant frequency due to the length can be shifted to a high frequency. Therefore, by adjusting the diameter of the small diameter portion 14B, the resonant frequency of the stub is shifted to a frequency not overlapping with the higher harmonics of the frequency of the transmission signal, so that the stub countermeasure can be taken without back drilling.

大径部14Ａの穴径は、プレスフィットピン17を挿入できる径に適宜設計され、小径部14Ｂの穴径は、プリント基板メーカーが製造可能なアスペクト比（＝板厚／穴径）の範囲内で共振周波数を計算し適宜設定する。小径部14Ｂは小径になる程、寄生容量が低減するため効果は大きくなる。   The hole diameter of the large diameter portion 14A is appropriately designed so that the press fit pin 17 can be inserted, and the hole diameter of the small diameter portion 14B is within the range of the aspect ratio (= plate thickness / hole diameter) which the printed circuit board manufacturer can produce. Calculate the resonance frequency and set appropriately. The smaller the diameter of the small diameter portion 14B is, the smaller the parasitic capacitance is.

例えば、コネクタピッチ１．５ｍｍ、プレスフィットコネクタ実装スルーホール径φ０．７、板厚４．０ｍｍの場合、小径部14Ｂの径はφ０．１５〜０．２程度に設定できる。   For example, in the case of a connector pitch of 1.5 mm, a press fit connector mounting through hole diameter φ0.7, and a plate thickness of 4.0 mm, the diameter of the small diameter portion 14B can be set to about φ0.15 to 0.2.

図５は、従来例（スタブ有）と、バックドリル加工と、本実施例の構成に係る実験例における挿入損失を比較した図である。この結果より、スルーホールの信号伝搬に寄与しないスタブ部分のみを小径にすることで、スタブによる共振周波数が高周波にシフトしており、２５Ｇｂｐｓの基本周波数１２．５ＧＨｚにおいては、従来（スタブ有）に対して−５ｄＢ改善がみられ、バックドリルに近い効果が得られることが確認できる。   FIG. 5: is the figure which compared the insertion loss in the experiment example which concerns on the structure of a prior art example (stub existence), back drilling process, and a present Example. From this result, by making only the stub portion that does not contribute to the signal propagation of the through hole small in diameter, the resonant frequency by the stub is shifted to a high frequency, and at 25 Gbps fundamental frequency 12.5 GHz, On the other hand, an improvement of -5 dB is observed, and it can be confirmed that an effect close to back drill is obtained.

なお、上述した図１の構成において図２に図示した別例のように更にバックドリル加工を施しても良い。即ち、スタブの長さによっては寄生容量低減のみでは十分な効果が得られない恐れがあることから、上述のスルーホール14を設けた後、バックドリル加工を更に施すことで小径部14Ｂを切削除去し、小径部14Ｂ部分を電気的に接続されないノンスルーホール23とする構成としても良い。別例は、スルーホール14を加工するバックドリルの深さ制御を容易にする技術である。   In the configuration of FIG. 1 described above, back drilling may be further performed as shown in another example shown in FIG. That is, depending on the length of the stub, there is a possibility that a sufficient effect can not be obtained only by reducing the parasitic capacitance. Therefore, after providing the above-mentioned through hole 14, the small diameter portion 14B is removed by back drilling. Alternatively, the small diameter portion 14B may be configured as a non-through hole 23 which is not electrically connected. Another example is a technique that facilitates depth control of a back drill that processes through holes 14.

具体的には、図１に示した小径部14Ｂ部分をバックドリル加工により削除する際、図２に図示したように、ドリル22の径を小径部14Ｂの径以上（小径部14Ｂの表面の導電部を削除できる径）、大径部14Ａの径未満とすることで、バックドリルによる裏面からの加工深さが信号配線層11に達した場合でも、信号配線層11との導通を確実に確保することが可能となり、板厚ばらつきを含めた加工深さの制御が容易となる。   Specifically, when the small diameter portion 14B shown in FIG. 1 is removed by back drilling, as shown in FIG. 2, the diameter of the drill 22 is equal to or larger than the diameter of the small diameter portion 14B (conductivity on the surface of the small diameter portion 14B By making the diameter smaller than the diameter of the large diameter portion 14A, continuity with the signal wiring layer 11 can be assuredly ensured even when the processing depth from the back surface by the back drill reaches the signal wiring layer 11 It becomes possible to control the processing depth including the thickness variation.

例えば、大径部14Ａの径がφ０．７、小径部14Ｂの径がφ０．２の場合、ドリル径はφ０．５程度に設定できる。   For example, when the diameter of the large diameter portion 14A is φ0.7 and the diameter of the small diameter portion 14B is φ0.2, the drill diameter can be set to approximately φ0.5.

従って、別例は、基板10の表面側にはスルーホール14（の大径部14Ａ）が設けられ、裏面側にはスルーホール14（大径部14Ａ）より径小なノンスルーホール23が設けられた構成となる。   Therefore, in another example, (the large diameter portion 14A of the through hole 14 is provided on the surface side of the substrate 10, and the non-through hole 23 having a diameter smaller than the through hole 14 (the large diameter portion 14A) is provided on the back side. Configuration.

なお、本発明は、本実施例に限られるものではなく、各構成要件の具体的構成は適宜設計し得るものである。   The present invention is not limited to the present embodiment, and the specific configuration of each component can be designed as appropriate.

10 基板
11 信号配線層
14 スルーホール
14Ａ 大径部
14Ｂ 小径部
18 クリアランス
23 ノンスルーホール 10 substrates
11 signal wiring layer
14 through holes
14A large diameter part
14B Small diameter part
18 clearance
23 non-through holes

Claims (6)

基板に、少なくとも１つの信号配線層と、少なくとも１つのグランド層または電源層と、少なくとも１つの電子部品とが設けられた多層プリント配線板であって、前記電子部品が実装される基板の表面と、この表面の反対側の裏面と、前記基板の内部に形成された前記信号配線層とを導通するスルーホールを有し、このスルーホールは、前記基板の表面から前記信号配線層までの信号伝送に寄与する大径部と、前記信号伝送に寄与しない前記大径部より径小な小径部とを有することを特徴とする多層プリント配線板。   A multilayer printed wiring board provided with at least one signal wiring layer, at least one ground layer or power supply layer, and at least one electronic component on a substrate, the surface of the substrate on which the electronic component is mounted And a through hole electrically connecting the back surface opposite to the front surface and the signal wiring layer formed in the substrate, and the through hole is a signal transmission from the surface of the substrate to the signal wiring layer. A multilayer printed wiring board characterized by comprising: a large diameter portion contributing to the above and a small diameter portion smaller in diameter than the large diameter portion not contributing to the signal transmission. 前記スルーホールと前記グランド層または電源層とが導通しないために設けたクリアランスが、前記スルーホールの前記小径部の位置において前記大径部の位置におけるクリアランス以上の寸法に設定されていることを特徴とする請求項１に記載の多層プリント配線板。   A clearance provided for preventing conduction between the through hole and the ground layer or the power supply layer is set to a dimension larger than the clearance at the position of the large diameter portion at the position of the small diameter portion of the through hole. The multilayer printed wiring board according to claim 1, wherein 基板に、少なくとも１つの信号配線層と、少なくとも１つのグランド層または電源層と、少なくとも１つの電子部品とが設けられた多層プリント配線板であって、前記基板の表面側には、前記電子部品が実装される基板の表面と、前記基板の内部に形成された前記信号配線層とを導通するスルーホールが設けられ、前記基板の裏面側には、前記スルーホールと連通し、このスルーホールより径小なノンスルーホールが設けられていることを特徴とする多層プリント配線板。   A multilayer printed wiring board in which at least one signal wiring layer, at least one ground layer or power supply layer, and at least one electronic component are provided on a substrate, and the electronic component is provided on the surface side of the substrate. And a through hole for electrically connecting the surface of the substrate on which the chip is mounted and the signal wiring layer formed inside the substrate, and the back surface side of the substrate is in communication with the through hole, and A multilayer printed wiring board characterized by having small non-through holes. 前記スルーホールと前記グランド層または電源層とが導通しないために設けたクリアランスが、前記ノンスルーホールの位置において前記スルーホールの位置におけるクリアランス以上の寸法に設定されていることを特徴とする請求項３に記載の多層プリント配線板。   A clearance provided for the conduction between the through hole and the ground layer or the power supply layer is set to a dimension larger than the clearance at the position of the through hole at the position of the non through hole. The multilayer printed wiring board according to 3. 前記スルーホールは複数近接して配置され、差動信号を伝送する差動対を含むように構成されていることを特徴とする請求項１〜４のいずれか１項に記載の多層プリント配線板。   The multilayer printed wiring board according to any one of claims 1 to 4, wherein a plurality of the through holes are arranged in close proximity and configured to include a differential pair for transmitting differential signals. . 基板に、少なくとも１つの信号配線層と、少なくとも１つのグランド層または電源層と、少なくとも１つの電子部品とが設けられた多層プリント配線板の製造方法であって、前記電子部品が実装される基板の表面と、この表面の反対側の裏面と、前記基板の内部に形成された前記信号配線層とを導通し、且つ、前記基板の表面から前記信号配線層までの信号伝送に寄与する大径部と前記信号伝送に寄与しない前記大径部より径小な小径部とを有するスルーホールを形成した後、この小径部を切削加工により除去することで、前記大径部より径小なノンスルーホールを形成することを特徴とする多層プリント配線板の製造方法。   A method of manufacturing a multilayer printed wiring board in which at least one signal wiring layer, at least one ground layer or power supply layer, and at least one electronic component are provided on a substrate, the substrate on which the electronic component is mounted And a large diameter that contributes to signal transmission from the surface of the substrate to the signal wiring layer, and electrically connects the surface of the substrate, the back surface opposite to the surface, and the signal wiring layer formed inside the substrate. After forming a through hole having a portion and a small diameter portion smaller in diameter than the large diameter portion not contributing to the signal transmission, the small diameter portion is removed by cutting to form a non-through smaller in diameter than the large diameter portion. The manufacturing method of the multilayer printed wiring board characterized by forming a hole.
JP2017077967A 2017-04-11 2017-04-11 Multilayer printed wiring board and manufacturing method therefor Pending JP2018182012A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117750624A (en) * 2022-09-21 2024-03-22 慧与发展有限责任合伙企业 Power via resonance suppression

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117750624A (en) * 2022-09-21 2024-03-22 慧与发展有限责任合伙企业 Power via resonance suppression

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