JP2018180705A - Abnormality detecting system, semiconductor device manufacturing system, and manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an abnormality detecting system capable of reducing a work load to an engineer, etc.SOLUTION: An algorithm storing unit ADB stores a detecting algorithm AL corresponding to identification information DI on an object to be detected. An abnormality detecting unit EDT detects, using the corresponding detecting algorithm AL in the algorithm storing unit ADB, an abnormality of a to-be-detected-object signal TS acquired from a monitoring signal MS for the object to be detected. A to-be-detected-object identifying unit TGR determines whether or not the detecting algorithm AL corresponding to the identification information DI on the object to be detected is stored in the algorithm storing unit ADB, and issues a generation request GR when not stored. An algorithm generating unit ALG generates, using the corresponding to-be-detected-object signal TS, the detecting algorithm AL in response to the generation request GR.SELECTED DRAWING: Figure 1

Description

  The present invention relates to an abnormality detection system, a manufacturing system and a manufacturing method of a semiconductor device, and, for example, to a technology for detecting an abnormality in a manufacturing apparatus and the like.

  For example, Patent Document 1 shows an abnormality detection system capable of avoiding erroneous detection of abnormality of a processing device. In the abnormality detection system, the abnormality detection server detects an abnormality of the processing apparatus using the basic algorithm having a plurality of parameters or the provisional algorithm excluding the parameter temporarily changing with the maintenance operation with respect to the basic algorithm. Do.

JP, 2006-278547, A

  In recent years, with the fourth industrial revolution, in manufacturing systems, in order to improve manufacturing efficiency, utilization of technologies such as artificial intelligence (AI) and Internet of Things (IoT) is in progress. When such a manufacturing system is used, for example, various sensors can monitor the processing status of the manufacturing apparatus in real time, and detect abnormality of the manufacturing apparatus at an early stage based on the monitoring result.

  At the time of detection of this abnormality, for example, as shown in Patent Document 1, a plurality of detection algorithms are registered in advance in a storage device, and one of them is appropriately selected, and one of detection targets is selected based on the selected detection algorithm. A scheme that detects an abnormality can be used. However, in such a method, for example, when a new detection algorithm is required due to a new detection target, an engineer or the like usually performs trial production of a product or the like using a manufacturing apparatus separated from the mass production line. It is necessary to define the detection algorithm repeatedly and to register it in the storage device.

  The embodiment to be described later is made in view of the foregoing, and other problems and novel features will be apparent from the description of the present specification and the accompanying drawings.

  The abnormality detection system according to one embodiment includes an algorithm storage unit, an abnormality detection unit, a detection target identification unit, and an algorithm generation unit. The algorithm storage unit stores a detection algorithm corresponding to identification information of a detection target. The abnormality detection unit detects an abnormality of the detection target signal obtained from the monitor signal of the detection target using a corresponding detection algorithm in the algorithm storage unit. The detection target identification unit determines whether the detection algorithm corresponding to the detection target identification information is stored in the algorithm storage unit, and issues a generation request if the detection algorithm is not stored. The algorithm generation unit generates a detection algorithm using the corresponding detection target signal in response to the generation request.

  According to the embodiment, it is possible to reduce the workload of the engineer or the like.

FIG. 1 is a schematic view showing a configuration example of a main part in an abnormality detection system according to a first embodiment of the present invention. It is a flowchart which shows an example of the processing content of the detection target identification part in FIG. It is a flowchart which shows an example of the processing content of the abnormality detection part in FIG. It is a flowchart which shows an example of the processing content of the algorithm production | generation part in FIG. FIG. 5 is a supplementary view of FIG. 4; The abnormality detection system by Embodiment 2 of this invention WHEREIN: It is the schematic which shows the structural example of a principal part. FIG. 7 is a view showing an example of the structure of a main part of a packet transmitted and received by a data identification unit in the abnormality detection system of FIG. It is a supplementary diagram of FIG. It is a figure which shows the example of the packet based on FIG. 7 and FIG. FIG. 16 is a schematic view showing an example of a configuration of a main part in a semiconductor device manufacturing system according to a third embodiment of the present invention. It is a timing chart which shows typically an example of the manufacturing method of the semiconductor device using the manufacturing system of FIG. It is a timing chart following FIG. 11A. It is the schematic which shows the structural example of the principal part of the abnormality detection system used as the comparative example of this invention.

  In the following embodiments, when it is necessary for the sake of convenience, it will be described by dividing into a plurality of sections or embodiments, but unless specifically stated otherwise, they are not mutually unrelated, one is the other Some or all of the variations, details, supplementary explanations, etc. are in a relation. Further, in the following embodiments, when referring to the number of elements (including the number, numerical value, quantity, range, etc.), it is particularly pronounced and clearly limited to a specific number in principle. Except for the specific number, it is not limited to the specific number, and may be more or less than the specific number.

  Furthermore, in the following embodiments, the constituent elements (including element steps and the like) are not necessarily essential unless explicitly stated or considered to be obviously essential in principle. Needless to say. Similarly, in the following embodiments, when referring to the shapes, positional relationships and the like of components etc., the shapes thereof are substantially the same unless particularly clearly stated and where it is apparently clearly not so in principle. It is assumed that it includes things that are similar or similar to etc. The same applies to the above numerical values and ranges.

  Hereinafter, embodiments of the present invention will be described in detail based on the drawings. In all the drawings for describing the embodiments, the same reference numeral is attached to the same member in principle, and the repetitive description thereof will be omitted.

Embodiment 1
<< Configuration of anomaly detection system >>
FIG. 1 is a schematic view showing a configuration example of a main part in an abnormality detection system according to a first embodiment of the present invention. The abnormality detection system (an abnormality detection apparatus) shown in FIG. 1 includes a signal input unit IIF, a target signal selection unit SS, an abnormality detection unit EDT, a detection target identification unit TGR, an algorithm generation unit ALG, and an algorithm storage unit ADB. And Here, as an example of the abnormality detection system, it is assumed that an abnormality in a manufacturing apparatus in a semiconductor device manufacturing system is detected. However, the present invention is not necessarily limited to this, and it is possible to apply the abnormality detection system as a system for detecting an abnormality of various production devices in various production systems.

  The signal input unit IIF receives the monitor signal MS from the detection target, performs predetermined signal processing, and then transmits the signal to the target signal selection unit SS. The monitor signal MS is, for example, a signal representing the processing status of the manufacturing apparatus, and is a sensor signal from various sensors provided in the manufacturing apparatus or added to the manufacturing apparatus. The various sensors include, for example, a flow rate sensor that monitors the flow rate of gas, a pressure sensor that monitors the pressure of the chamber, a power sensor that monitors the RF power of plasma, and an EPD (End Point Detector) that monitors the progress of etching. Etc., and others may be various.

  In a semiconductor device manufacturing system, transmission and reception of sensor signals between devices can be performed using a communication protocol called SECS (SEMI Equipment Communications Standard). RS232C and Ethernet (registered trademark) are used as physical interfaces of SECS. The signal input unit IIF bears, for example, such a SECS communication interface. In this case, the signal input unit IIF receives, for example, a sensor signal transmitted from the sensor using SECS. In addition, the signal input unit IIF may include, for example, an analog-to-digital conversion circuit. In this case, the signal input unit IIF directly receives an analog signal from the sensor as the monitor signal MS without using SECS, converts it into a digital signal, and transmits it to the target signal selection unit SS.

  The target signal selection unit SS determines a detection target signal TS to be detected from the monitor signals MS received via the signal input unit IIF, and stores the detection target signal TS in the detection target signal buffer SBF. The target signal selection unit SS transmits the detection target signal TS stored in the detection target signal buffer SBF to the abnormality detection unit EDT and the algorithm generation unit ALG. For example, when the sensor operates at all times, the monitor signal MS also includes a signal of an unnecessary section (for example, an idle section in which the manufacturing apparatus is not performing a substantial operation). The target signal selection unit SS determines, from the monitor signal MS, a detection target section which is a section in which the manufacturing apparatus is substantially operating, and extracts a signal of the section as a detection target signal TS. Specifically, for example, when the monitor signal MS becomes 0 V in the idle period, the target signal selection unit SS defines the detection target period as a period in which the voltage level of the monitor signal MS is 0.1 V or more.

  The algorithm storage unit ADB stores a plurality of detection algorithms AL [1] to AL [n] corresponding to the identification information DI to be detected. In the specification, a plurality of detection algorithms AL [1] to AL [n] are collectively referred to as a detection algorithm AL. The abnormality detection unit EDT detects an abnormality of the detection target signal TS using a detection algorithm AL corresponding to the identification information DI stored in the algorithm storage unit ADB, and transmits an output signal OUT as a detection result. When an abnormality is detected, an alarm display on a monitor or the like, notification of abnormality to another control device, lighting of a light notifying an abnormality, and the like are performed based on the output signal OUT.

  The detection algorithm AL includes an algorithm based on AI, an algorithm based on a statistical method, and the like. In the algorithm based on AI, for example, a model of a neural network or the like in which the features of the detection target signal TS have been learned is used. The model receives the detection target signal TS, for example, and reflects an learned feature on the detection target signal TS to generate an expected value signal (in other words, an ideal detection target signal). The abnormality detection unit EDT determines the presence or absence of abnormality of the detection target signal TS depending on whether the error between the detection target signal TS and the expected value signal is within the allowable range. On the other hand, in an algorithm based on a statistical method, a normal distribution model reflecting various statistical values of the detection target signal TS, a multivariate analysis model, or the like is used. The abnormality detection unit EDT detects presence / absence of abnormality of the detection target signal TS according to whether the variation of the detection target signal TS or the like can be determined statistically (theoretically) as normal using these models. judge.

  The detection target identification unit TGR receives the identification information DI of the detection target, and determines whether the detection algorithm AL corresponding to the identification information DI is stored in the algorithm storage unit ADB. When the detection algorithm AL is stored in the algorithm storage unit ADB, the detection target identification unit TGR sends selection information SI to the abnormality detection unit EDT. The selection information SI is information for specifying a detection algorithm AL corresponding to the identification information DI. The abnormality detection unit EDT acquires a detection algorithm AL corresponding to the identification information DI from the algorithm storage unit ADB based on the selection information SI and stores it in the detection algorithm buffer ABF, whereby an abnormality based on the detection algorithm AL Perform detection.

  On the other hand, when the detection algorithm AL corresponding to the identification information DI is not stored in the algorithm storage unit ADB, the detection target identification unit TGR sends a non-correspondence notification NN to the abnormality detection unit EDT, and sends it to the algorithm generation unit ALG. Issue a generation request GR. The generation request GR includes, for example, identification information DI. When the abnormality detection unit EDT receives the non-correspondence notification NN, the abnormality detection unit EDT does not detect an abnormality of the detection target signal TS.

  In response to the generation request GR, the algorithm generation unit ALG generates a detection algorithm AL corresponding to the identification information DI contained therein using the detection target signal TS from the target signal selection unit SS. When generation of the detection algorithm AL is completed, the algorithm generation unit ALG issues a generation completion notification ED, and stores the generated detection algorithm AL in the algorithm storage unit ADB. For example, the engineer or the like can recognize that the abnormality detection based on the detection algorithm AL becomes possible by the abnormality detection unit EDT by receiving the generation completion notification ED by an electronic mail or the like.

  For example, in a semiconductor device manufacturing system, the management apparatus can transmit identification information DI including a recipe ID to a manufacturing apparatus or the like using SECS or the like. The recipe ID is an ID that distinguishes manufacturing conditions by the manufacturing apparatus. The recipe ID distinguishes detailed process conditions such as, for example, the type of gas used, the flow rate of the gas, and the processing time. The identification information DI includes, in addition to the recipe ID, a plurality of condition parameters such as information of a semiconductor device (product) to be processed and information of a manufacturing apparatus.

  The detection target identification unit TGR specifies a detection algorithm AL by appropriately combining a plurality of condition parameters in the identification information DI by a predetermined method, for example, and performs processing such as transmitting selection information SI. In this case, basically, the detection target identification unit TGR issues the generation request GR when one of the plurality of condition parameters included in the predetermined combination changes. However, in this combination, not only AND conditions of plural condition parameters but OR conditions, don't care conditions, etc. can be used, and it is necessarily generated request GR even if any value changes. Not exclusively. Generally, the detection algorithm AL and the recipe ID often correspond on a one-to-one basis, but depending on the condition setting, one detection algorithm AL may correspond to a plurality of recipe IDs.

  In FIG. 1, the signal input unit IIF is implemented by a dedicated circuit, program processing by a CPU (Central Processing Unit), or a combination thereof. The target signal selection unit SS, the abnormality detection unit EDT, the detection target identification unit TGR, and the algorithm generation ALG are mainly implemented by program processing by the CPU. The detection target signal buffer SBF and the detection algorithm buffer ABF are configured by a RAM (Random Access Memory). The algorithm storage unit ADB is configured of a storage device such as a non-volatile memory or a hard disk drive (HDD). However, the implementation form of each part is not necessarily limited to this, and may be hardware, software, or a combination of hardware and software.

  In addition, the abnormality detection system (an abnormality detection device) illustrated in FIG. 1 can be configured by, for example, one component (for example, a wiring board or the like) on which a microcomputer including a CPU or the like is mounted. That is, each unit of FIG. 1 may be mounted in one microcomputer, or the algorithm storage unit ADB may be separated and mounted on an external component (for example, a flash memory etc.) of the microcomputer. It is possible. Moreover, the said abnormality detection system may be provided 1 to 1 with respect to a manufacturing apparatus, for example, and may be provided 1 piece with respect to several manufacturing apparatuses. When provided one-to-one with respect to a manufacturing apparatus, the said abnormality detection system may be mounted, for example in the manufacturing apparatus, or may be installed as an external component of a manufacturing apparatus.

<< Detailed operation of each part >>
FIG. 2 is a flowchart showing an example of processing contents of the detection target identification unit in FIG. In FIG. 2, as long as the detection target identification unit TGR is in the enabled state, the following processing is repeatedly executed (step S101). The detection target identification unit TGR continues to wait for the identification information DI of the detection target to be updated (step S102). Here, the manufacturing apparatus performs processing of sequentially input semiconductor devices (semiconductor wafers) based on currently set identification information DI unless the management apparatus updates the identification information DI. Along with this, every time processing of each semiconductor wafer is performed, a detection target section of the monitor signal MS is generated. The target signal selection unit SS extracts the monitor signal MS of the detection target section as the detection target signal TS every time the processing of each semiconductor wafer is performed, and transmits the extracted detection target signal TS.

  When the identification information DI is updated in step S102, the detection target identification unit TGR determines whether the detection algorithm AL corresponding to the identification information DI is already stored in the algorithm storage unit ADB (step S103). If it is already stored in the algorithm storage unit ADB, the detection target identification unit TGR transmits selection information SI corresponding to the updated identification information DI to the abnormality detection unit EDT (step S104). On the other hand, if not stored in the algorithm storage unit ADB, the detection target identification unit TGR transmits the non-correspondence notification NN to the abnormality detection unit EDT (step S105), and issues a generation request GR to the algorithm generation unit ALG (step S105). S106).

  FIG. 3 is a flow chart showing an example of processing contents of the abnormality detection unit in FIG. In FIG. 3, as long as the abnormality detection unit EDT is in the enabled state, the following processing is repeatedly performed (step S201). When the abnormality detection unit EDT receives the non-correspondence notification NN from the detection target identification unit TGR (step S202), the abnormality detection unit EDT validates the non-correspondence flag and returns to step S201 (step S203). On the other hand, when the abnormality detection unit EDT receives the selection information SI from the detection target identification unit TGR (step S204), the abnormality detection unit EDT invalidates the non-correspondence flag (step S205), and detects the detection algorithm AL instructed by the selection information SI. After copying from the algorithm storage unit ADB to the detection algorithm buffer ABF, the process returns to step S201 (step S206).

  Next, the abnormality detection unit EDT returns to step S201 if the non-correspondence flag is valid, and proceeds to step S208 if it is invalid (step S207). In step S208, the abnormality detection unit EDT waits for reception of the detection target signal TS from the target signal selection unit SS while responding to the update of the non-correspondence notification NN (step S202) and the selection information SI (step S204). . When the abnormality detection unit EDT receives the detection target signal TS, the abnormality detection unit EDT determines whether there is an abnormality in the detection target signal TS based on the detection algorithm AL in the detection algorithm buffer ABF (step S209). When the abnormality detection unit EDT detects an abnormality in step S209 (step S210), the abnormality detection unit EDT transmits an output signal OUT including the abnormality detection result (step S211).

  FIG. 4 is a flowchart showing an example of processing contents of the algorithm generation unit in FIG. FIG. 5 is a supplementary view of FIG. In FIG. 4, as long as the algorithm generation unit ALG is in the enabled state, the following process is repeatedly performed (step S301). First, the algorithm generation unit ALG continues waiting for a generation request GR from the detection target identification unit TGR (step S302). When receiving the generation request GR, the algorithm generation unit ALG receives the detection target signal TS from the target signal selection unit SS (step S303), and generates a detection algorithm AL while reflecting the detection target signal TS (step S303) S304). The algorithm generation unit ALG repeatedly executes steps S303 and S304 until generation of the detection algorithm AL is completed (step S305).

  For example, in the case of performing abnormality detection using deep learning, which is a type of AI, the network structure or weight of a neural network, the value of a bias, or the like is generated as a detection algorithm AL. In deep learning, while the detection target signal TS is sequentially input to the neural network, the error between the predicted value and the expected value by the neural network is calculated as a loss value, and the loss value is fed back to the weight and bias so as to reduce the loss value. Learning process is repeatedly performed. Therefore, it can be determined whether the generation of the detection algorithm AL has been completed based on the degree of convergence of the loss value.

  For example, FIG. 5 shows an example of the relationship between the number of times of learning and the loss value, and a threshold Lth for determining whether the generation of the detection algorithm AL has been completed is provided for the loss value. . The algorithm generation unit ALG can determine that the generation of the detection algorithm AL is completed when the loss value becomes equal to or less than the threshold Lth. When the detection algorithm AL based on the statistical method is used, the algorithm generation unit ALG detects the detection algorithm AL depending on, for example, whether or not the number of receptions of the detection target signal TS (that is, the number of parameters) reaches a predetermined number. It may be determined whether the generation has been completed.

  When the generation of the detection algorithm AL is completed, the algorithm generation unit ALG stores the generated detection algorithm AL in the algorithm storage unit ADB (step S306). At this time, the detection algorithm AL is stored, for example, in the algorithm storage unit ADB in a manner linked to the identification information DI included in the generation request GR. Further, the algorithm generation unit ALG issues a generation completion notification ED (step S307).

<< Main effects of Embodiment 1 >>
FIG. 12 is a schematic view showing a configuration example of a main part of an abnormality detection system which is a comparative example of the present invention. As shown in FIG. 12, in the abnormality detection system according to the comparative example, abnormality detection is performed using an abnormality detection server installed in the manufacturing system. That is, each monitor signal from a plurality of manufacturing apparatuses in the manufacturing system is collected to the abnormality detection server via the communication network, and abnormality detection is performed there. The abnormality detection server includes a data storage device MEM in which a plurality of detection algorithms AL '[1] and AL' [2] are stored, and a CPU. The CPU includes an abnormality detection unit EDT 'implemented by program processing. The abnormality detection unit EDT 'detects an abnormality of the monitor signal while appropriately selecting one of the plurality of detection algorithms AL' [1] and AL '[2].

  When using the abnormality detection system of such a comparative example, the case where a new detection target (for example, combination of a manufacturing apparatus and a product) arises is assumed. In this case, the engineer etc. downloads the monitor signal of that period to, for example, his own PC (Personal Computer) etc. while sequentially injecting the semiconductor device (semiconductor wafer) for trial manufacture into the manufacturing apparatus to be detected. Then, the engineer or the like generates a new detection algorithm for detecting an abnormality of the monitor signal using his own PC or the like, and registers the new detection algorithm in the data storage device MEM.

  However, in this case, the workload of the engineer etc. becomes heavy. Also, when such a semiconductor device for prototyping is to be introduced, a procedure different from the batch processing procedure for mass production lines is generally required when introducing semiconductor devices for mass production. A state (in other words, exclusive use of the manufacturing apparatus) may occur in which the manufacturing apparatus to be detected is disconnected from the mass production line. As a result, the manufacturing efficiency may be reduced.

  Furthermore, for example, in the case where the detection algorithm AL '[1], AL' [2] is a detection algorithm based on AI, how much the semiconductor device (semiconductor wafer) for prototyping is as shown by FIG. It is difficult to clearly know if the detection algorithm can be generated if it is input. As a result, the generation of the detection algorithm is performed in a grooving state, which may cause a cost loss due to excessive introduction of the semiconductor device for trial manufacture, or a time loss etc. due to repeated introduction in the groping state. .

  On the other hand, when a new detection target is generated using the abnormality detection system of FIG. 1, for example, the algorithm generation unit ALG is automatically generated by inserting a semiconductor device for trial manufacture into a manufacturing apparatus to be detected. A detection algorithm AL is generated and automatically registered in the algorithm storage unit ADB. As a result, it is possible to reduce the workload of engineers and the like. Further, the abnormality detection system of FIG. 1 has a mechanism that can be introduced without making a distinction between such a semiconductor device for prototyping and a semiconductor device for mass production in which the detection algorithm AL has been generated. For example, the abnormality detection unit EDT can switch whether to perform abnormality detection according to the selection information SI and the non-correspondence notification NN. As a result, as in the case of FIG. 12, the exclusive use of the manufacturing apparatus does not occur, and a decrease in manufacturing efficiency can be suppressed.

  Furthermore, since the abnormality detection system of FIG. 1 issues the generation completion notification ED when the generation of the detection algorithm AL is completed, the generation completion notification ED is issued, for example, when the detection algorithm AL is generated. The semiconductor device for trial manufacture may be continuously introduced in a form mixed with the semiconductor device for mass production. When the production completion notification ED is issued, it is possible to manually stop the loading of the semiconductor device for prototyping or stop the loading of the semiconductor device for prototyping by automatic processing using a management apparatus or the like. As a result, the above-described cost loss and time loss can be reduced.

  As described above, the abnormality detection system of FIG. 1 can also be associated with manufacturing apparatuses on a one-on-one basis as an abnormality detection apparatus. In this case, it is possible to perform abnormality detection more quickly than in the case of aggregating on the abnormality detection server as shown in FIG.

Second Embodiment
<< Configuration of anomaly detection system (application example) >>
FIG. 6 is a schematic view showing a configuration example of a main part in the abnormality detection system according to the second embodiment of the present invention. The abnormality detection system (an abnormality detection device) shown in FIG. 6 includes an abnormality detection execution device DEVE, an algorithm generation device DEVG, and a communication network NW connecting the abnormality detection execution device DEVE and the algorithm generation device DEVG. The abnormality detection execution device DEVE is configured of, for example, one device (for example, a wiring board) including a microcomputer and the like, and the algorithm generation device DEVG is configured of a device different from the one device. The algorithm generation device DEVG is, for example, a computer system such as a PC.

  The abnormality detection execution device DEVE includes a portion excluding the algorithm generation unit ALG from the configuration example of FIG. 1, and further includes a data identification unit DR1. On the other hand, the algorithm generation device DEVG includes an algorithm generation unit ALG from the configuration example of FIG. 1, and further includes a data identification unit DR2. The data identification units DR1 and DR2 bear an interface of the communication network NW, and communicate with each other via the communication network NW. The communication network NW is, for example, an Ethernet (registered trademark) network.

  The data identification unit DR1 receives the identification information DI from the communication network NW, and transmits the identification information DI to the detection target identification unit TGR. Further, the data identification unit DR1 transmits the generation request GR, the detection target signal TS, and the output signal OUT from the detection target identification unit TGR, the target signal selection unit SS, and the abnormality detection unit DET to the communication network NW. Furthermore, the data identification unit DR1 receives a detection algorithm (detection parameter) AL from the communication network NW (algorithm generation device DEVG), and stores it in the algorithm storage unit ADB.

  The data identification unit DR2 receives the generation request GR and the detection target signal TS from the communication network NW (the abnormality detection execution device DEVE), and transmits the reception request GR and the detection target signal TS to the algorithm generation unit ALG. Further, the data identification unit DR2 transmits the detection algorithm (detection parameter) AL generated by the algorithm generation unit ALG and the generation completion notification ED to the abnormality detection execution device DEVE via the communication network NW. A plurality of algorithm generation units ALG may be provided, and the plurality of algorithm generation units ALG may be configured to simultaneously generate different detection algorithms AL.

<< Structure of communication format >>
FIG. 7 is a view showing an example of the structure of a main part of a packet transmitted and received by the data identification unit in the abnormality detection system of FIG. 6, and FIG. 8 is a supplement of FIG. As shown in FIG. 7, the packet transmitted and received by the data identification units DR1 and DR2 includes three elements of a packet type TYP, a size SZ, and a payload PLD. The packet type TYP stores one of the numbers shown in FIG. The detection target signal TS, the output signal (detection result) OUT, the detection target identification information DI, the detection algorithm generation request GR, and the detection algorithm (detection parameter) AL are distinguished by this number. The data size of the payload PLD is stored in the size SZ. For example, when the data size of the payload PLD is 8 bytes, the value '8' is stored in the size SZ. Data corresponding to the packet type TYP is stored in the payload PLD.

  FIG. 9 is a diagram showing a specific example of the packet based on FIG. 7 and FIG. When transmitting the detection target signal TS to the communication network NW, the data identification unit DR1 generates and transmits a packet PK1. In the packet PK1, the packet type TYP is '1', the size SZ is '80', and the payload PLD is 80 bytes of “1, 2, 7, 10,. Each data is stored. The data identification unit DR2 receives the packet PK1 and transmits data of the payload PLD to the algorithm generation unit ALG.

  The data identification unit DR1 generates and transmits the packet PK2 when transmitting the output signal (detection result) OUT to the communication network NW. In the packet PK2, “2” is stored in the packet type TYP, “2” is stored in the size SZ, and the character code “OK” is stored in the payload PLD to indicate that no abnormality is detected. The packet PK2 is received by, for example, SCADA (Supervisory Control And Data Acquisition) (not shown) that performs system monitoring.

  The data identification unit DR1 receives, for example, a packet PK3 including identification information DI generated by a MES (Manufacturing Execution System) (not shown) or the like that manages a manufacturing process via the communication network NW. In the packet PK3, “3” is stored in the packet type TYP, “7” is stored in the size SZ, and the character code “Recipe 1” which is the identification information DI is stored in the payload PLD. As described in FIG. 1, the identification information DI may include various other condition parameters in some cases, but here, for convenience of explanation, the identification information DI is assumed to be a recipe ID. The data identification unit DR1 transmits the data of the payload PLD to the detection target identification unit TGR.

  When transmitting the generation request GR to the communication network NW, the data identification unit DR1 generates and transmits a packet PK4. In the packet PK4, “4” is stored in the packet type TYP, “7” is stored in the size SZ, and the character code “Recipe 1” which is the identification information DI corresponding to the generation request GR is stored in the payload PLD. . The data identification unit DR2 receives the packet PK4 and issues, to the algorithm generation unit ALG, a generation request GR associated with the identification information DI. In the case where a plurality of algorithm generation units ALG are provided, the data identification unit DR2 performs detection algorithm in parallel by the different algorithm generation units ALG when the packet PK4 including different identification information DI is received within a predetermined period. It is possible to cause generation.

  When transmitting the detection algorithm (detection parameter) AL generated by the algorithm generation unit ALG to the communication network NW, the data identification unit DR2 generates and transmits a packet PK5. The packet PK5 includes two sets of combinations of size SZ and payload PLD. '5' is stored in the packet type TYP. '7' is stored in the first set of size SZ, and the character code of “Recipe 1” which is the identification information DI corresponding to the generated detection algorithm AL is stored in the first set of payload PLD.

  'XX' is stored in the second set of sizes SZ, and the detection parameters of the detection algorithm AL (for example, the network structure and weight of the neural network, values of bias, etc.) are stored in the second set of payload PLD. Ru. The data identification unit DR1 receives the packet PK5, associates the detection algorithm (detection parameter) AL with the identification information DI, and registers the identification information DI in the algorithm storage unit ADB. In the packet PK5, for example, a packet from which the second set of the size SZ and the payload PLD are deleted can be used as the generation completion notification ED illustrated in FIG.

<< Main effects of Embodiment 2 >>
The same effect as that of the first embodiment can be obtained by using the abnormality detection system of the second embodiment. Furthermore, in the second embodiment, by separately mounting the abnormality detection system of FIG. 1 into the abnormality detection execution device DEVE and the algorithm generation device DEVG, a configuration suitable for actual operation can be obtained. For example, it is possible to use a PC or the like with high computing ability assuming deep learning etc. for the algorithm generation device DEVG, and use a small microcomputer with low power consumption etc. for the abnormality detection execution device DEVE.

  As described above, the low-power-consumption abnormality detection execution device DEVE, which operates constantly with abnormality detection, and the algorithm generation device DEVG, which operates only when an unknown detection target occurs, combine as a whole system. Power consumption can be reduced. Moreover, when an unknown detection target arises, the time required to calculate a detection parameter can be shortened. Furthermore, by configuring the abnormality detection execution device DEVE using a small microcomputer or the like instead of a large one such as a PC, the possibility of installation can be increased even if the installation space is limited. The communication format is not necessarily limited to those shown in FIGS. 7 and 8, and the same function can be realized using SECS.

Third Embodiment
<< Configuration of semiconductor device manufacturing system >>
FIG. 10 is a schematic diagram showing an example of configuration of a main part in a semiconductor device manufacturing system according to a third embodiment of the present invention. The manufacturing system shown in FIG. 10 includes a plurality of abnormality detection execution devices DEVEa and DEVEb, a plurality of manufacturing devices (detection target devices) MEa and MEb, an algorithm generation device DEVG, a MES (Manufacturing Execution System), and a SCADA (Supervisory). Control & Data Acquisition), and a communication network NW connecting these.

  Each of the abnormality detection execution devices DEVEa and DEVEb has the same configuration as that of the abnormality detection execution device DEVE shown in FIG. 6, and executes the same operation. The algorithm generation device DEVG also has the same configuration as that in the case of FIG. 6 and performs the same operation. Here, however, as described in the second embodiment, the algorithm generation device DEVG includes a plurality of (here, two) algorithm generation units ALG [1] and ALG [2].

  SCADA is a monitoring device for the entire manufacturing system. MES is a management apparatus of the manufacturing process, and when the semiconductor devices (semiconductor wafers) are introduced into the manufacturing apparatuses MEa and MEb, the identification information DI including the recipe ID representing the manufacturing conditions of the manufacturing apparatuses MEa and MEb is used as a communication network. Send to NW. The manufacturing apparatuses MEa and MEb process the semiconductor wafer under the manufacturing conditions based on the recipe ID from the MES, and output a monitor signal MS indicating the status of the processing. Here, the manufacturing devices MEa and MEb output monitor signals MS to the abnormality detection execution devices DEVEa and DEVEb, respectively. As the manufacturing apparatuses MEa and MEb, for example, a plasma CVD (Chemical Vapor Deposition) apparatus that performs processing associated with a film forming process, an exposure apparatus that performs processing associated with a patterning process, and processing associated with an etching process The plasma etching apparatus etc. which are performed are mentioned.

<< Method of Manufacturing Semiconductor Device >>
11A is a timing chart schematically showing an example of a method of manufacturing a semiconductor device using the manufacturing system of FIG. 10, and FIG. 11B is a timing chart following to FIG. 11A. In step S401 of FIG. 11A, the MES transmits a packet PK31 to the communication network NW. The packet PK31 is a packet for notifying the manufacturing device MEa and the abnormality detection execution device DEVEa of the identification information DI of “Recipe1”. Here, the identification information DI actually includes a plurality of condition parameters, but as in the case of the second embodiment, for convenience of explanation, it is assumed that it is a recipe ID. In this example, in the abnormality detection execution device DEVEa, the detection algorithm AL corresponding to “Recipe 1” has already been stored in the algorithm storage unit ADB. In this case, the packet PK31 means a construction instruction using a semiconductor wafer for mass production.

  The manufacturing apparatus MEa processes the semiconductor wafer for mass production, which is sequentially input, using “Recipe 1”, and outputs the monitor signal MS in the process of the processing. The abnormality detection execution device DEVEa sequentially extracts detection target signals TS1 and TS2 from the monitor signal MS each time processing is performed on semiconductor wafers sequentially input. The abnormality detection execution device DEVEa detects an abnormality of the manufacturing apparatus MEa by determining the presence or absence of an abnormality of the detection target signals TS1 and TS2 based on the detection algorithm AL corresponding to “Recipe1”. As a result, when the abnormality detection execution device DEVEa determines that the detection target signal TS1 is normal, it transmits a packet PK21 representing the detection result of “OK” to SCADA, and when it determines that the detection target signal TS2 is abnormal, “NG” A packet PK22 representing the detection result is sent to SCADA.

  Subsequently, in step S402, the MES transmits the packet PK32 to the communication network NW. The packet PK32 is a packet for notifying the manufacturing device MEa and the abnormality detection execution device DEVEa of the identification information DI of “Recipe 2”. In this example, in the abnormality detection execution device DEVEa, the detection algorithm AL corresponding to “Recipe 2” is not stored in the algorithm storage unit ADB. In this case, the packet PK32 means a construction instruction using a semiconductor wafer for trial manufacture.

  The abnormality detection execution device DEVEa receives the identification information DI of “Recipe 2”, and transmits a packet PK 41 representing a generation request GR of the detection algorithm AL corresponding to “Recipe 2” to the algorithm generation device DEVG. In response to this, the algorithm generation device DEVG starts generation of the detection algorithm AL corresponding to “Recipe 2”, and waits for a detection target signal necessary for generation.

  The manufacturing apparatus MEa processes the input semiconductor wafer for prototyping using “Recipe 2”, and outputs the monitor signal MS in the process of the processing. The abnormality detection execution device DEVEa extracts a detection target signal TS3 from the monitor signal MS. The abnormality detection execution device DEVEa does not detect an abnormality with respect to the detection target signal TS3, and transmits a packet PK11 including the detection target signal TS3 to the algorithm generation device DEVG. The algorithm generation device DEVG reflects the detection target signal TS3 to generate a detection algorithm AL. Here, for convenience of explanation, it is assumed that the generation of the detection algorithm AL is completed only by the detection target signal TS3.

  When the generation of the detection algorithm AL corresponding to “Recipe 2” is completed, the algorithm generation device DEV transmits, for example, the packet PK51 to the MES. The packet PK51 is a packet using the packet PK5 as the generation completion notification ED, as described in FIG. By receiving the packet PK51, the MES recognizes that the semiconductor wafer for mass production corresponding to “Recipe 2” can be introduced. Further, the algorithm generation device DEVG transmits a packet PK52 including “Recipe 2” and a detection algorithm (detection parameter) AL to the abnormality detection execution device DEVEa. The abnormality detection execution device DEVEa stores the detection algorithm AL corresponding to “Recipe 2” in the algorithm storage unit ADB according to the packet PK52.

  Thereafter, in step S403 in FIG. 11B, the MES transmits the packet PK33 to the communication network NW. The packet PK33 is a packet for notifying the manufacturing device MEa and the abnormality detection execution device DEVEa of the identification information DI of “Recipe 3”. In this example, in the abnormality detection execution device DEVEa, the detection algorithm AL corresponding to “Recipe 3” is not stored in the algorithm storage unit ADB as in the case of step S402. In this case, as in the case of step S402, the packet PK33 means a construction instruction using a semiconductor wafer for trial manufacture.

  The abnormality detection execution device DEVEa transmits a packet PK42 representing a generation request GR of the detection algorithm AL corresponding to “Recipe 3” to the algorithm generation device DEVG. The algorithm generation device DEV starts generation of the detection algorithm AL corresponding to “Recipe 3” according to the packet PK42, and waits for a detection target signal necessary for generation. At this time, if the algorithm generation unit ALG [1] in the algorithm generation device DEVG is generating the detection algorithm AL accompanying the above-described step S402, the algorithm generation unit ALG [2] The generation of the detection algorithm AL corresponding to Recipe 3 ′ ′ is started.

  The manufacturing apparatus MEa processes the semiconductor wafer for prototyping input using “Recipe 3”, and the abnormality detection execution apparatus DEVEa extracts the detection target signal TS4 from the monitor signal MS accompanying the processing. The abnormality detection execution device DEVEa does not detect an abnormality with respect to the detection target signal TS4, and transmits a packet PK12 including the detection target signal TS4 to the algorithm generation device DEVG. The algorithm generation device DEVG reflects the detection target signal TS4 to generate a detection algorithm AL. In this example, generation of the detection algorithm AL is not completed, and the algorithm generation device DEVG continues to wait for a detection target signal associated with the process of “Recipe 3”.

  Thereafter, in step S404, the MES transmits the packet PK34 to the communication network NW. The packet PK 34 is a packet for notifying the manufacturing device MEa and the abnormality detection execution device DEVEa of the identification information DI of “Recipe 2”. Here, in the abnormality detection execution device DEVEa, the detection algorithm AL corresponding to “Recipe 2” is stored in the algorithm storage unit ADB along with the above-described step S402. Therefore, the packet PK 34 means a construction instruction using a semiconductor wafer for mass production.

  The manufacturing device MEa processes the input semiconductor wafer for mass production using “Recipe 2”, and the abnormality detection execution device DEVEa extracts the detection target signal TS5 from the monitor signal MS accompanying the processing. The abnormality detection execution device DEVEa detects an abnormality of the manufacturing device MEa by determining the presence or absence of an abnormality of the detection target signal TS5 based on the detection algorithm AL corresponding to “Recipe 2”. As a result, when the abnormality detection execution device DEVEa determines that the detection target signal TS5 is normal, it transmits a packet PK23 representing the detection result of “OK” to the SCADA.

  After that, in step S405, the same processing as in the case of step S401 is performed. That is, the same processing as “Recipe 1” as in the case of the packet PK31 described above is performed by the packet PK35, and as a detection result at that time, the packet PK24 similar to the packet PK21 described above is transmitted. Although illustration is omitted, when a packet similar to the packet PK33 in step S403 is transmitted by the MES after that, the algorithm generation device DEVG performs detection corresponding to “Recipe 3” based on the subsequent detection target signal Resume generation of the algorithm AL.

<< Main effects of Embodiment 3 >>
As described above, even by using the abnormality detection system according to the third embodiment, the same effects as the various effects described in the first and second embodiments can be obtained. In particular, as shown in FIGS. 11A and 11B, without separating the manufacturing apparatus MEa from the mass production line, for example, between steps S401 and S405 (ie, between batch processing for mass production lines), steps S402 and S403. It is possible to generate a detection algorithm AL such as Also, as shown in steps S402 and S404, when the generation of the detection algorithm AL is completed, mass production using it can be quickly started. As a result, the manufacturing efficiency can be improved.

  Further, as shown in FIG. 10, by making the manufacturing apparatuses MEa and MEb correspond to the abnormality detection execution apparatuses DEVEa and DEVEb on a one-to-one basis, it becomes possible to detect an abnormality early. That is, as in the case of FIG. 12, instead of aggregating the monitor signals MS from the manufacturing apparatuses MEa and MEb to the abnormality detection server coupled to the communication network NW, the abnormality detection is individually performed for each of the manufacturing apparatuses MEa and MEb. By doing this, the processing load and communication load (i.e. resources) are distributed, and as a result, it is possible to detect an abnormality early. As described above, the abnormality detection execution devices DEVEa and DEVEb are configured by, for example, small wiring boards, and can be mounted in the manufacturing devices MEa and MEb or installed as external parts of the manufacturing devices MEa and MEb. It is also possible.

  As mentioned above, although the invention made by the present inventor was concretely explained based on an embodiment, the present invention is not limited to the above-mentioned embodiment, and can be variously changed in the range which does not deviate from the gist. For example, the above-described embodiments are described in detail in order to explain the present invention in an easy-to-understand manner, and are not necessarily limited to those having all the described configurations. Also, part of the configuration of one embodiment can be replaced with the configuration of another embodiment, and the configuration of another embodiment can be added to the configuration of one embodiment. . In addition, with respect to a part of the configuration of each embodiment, it is possible to add, delete, and replace other configurations.

ADB algorithm storage unit AL detection algorithm ALG algorithm generation unit DEVE error detection execution device DEVG algorithm generation device DI identification information DR data identification unit ED generation completion notification EDT error detection unit GR generation request IIF signal input unit ME manufacturing device MS monitor signal NN not Correspondence notification NW communication network PK packet SI selection information SS target signal selection unit TGR detection target identification unit TS detection target signal

Claims (18)

An abnormality detection system which receives identification information of a detection target and a detection target signal obtained from a monitor signal of the detection target and detects an abnormality of the detection target signal,
An algorithm storage unit storing a detection algorithm corresponding to the identification information;
An abnormality detection unit which detects an abnormality of the detection target signal using a detection algorithm corresponding to the identification information stored in the algorithm storage unit;
A detection target identification unit that determines whether the detection algorithm corresponding to the identification information is stored in the algorithm storage unit and issues a generation request if the detection algorithm is not stored;
An algorithm generation unit configured to generate the detection algorithm corresponding to the identification information using the detection target signal in response to the generation request;
Have
Anomaly detection system. In the abnormality detection system according to claim 1,
The algorithm generation unit issues a generation completion notification when the generation of the detection algorithm is completed.
Anomaly detection system. In the abnormality detection system according to claim 1,
The algorithm generation unit stores the generated detection algorithm in the algorithm storage unit when the generation of the detection algorithm is completed.
Anomaly detection system. In the abnormality detection system according to claim 1,
When the detection algorithm corresponding to the identification information is stored in the algorithm storage unit, the detection target identification unit sends selection information for identifying the detection algorithm corresponding to the identification information to the abnormality detection unit. If not transmitted, the notification of non-correspondence is transmitted to the abnormality detection unit;
The abnormality detection unit does not detect an abnormality of the detection target signal when the non-correspondence notification is received.
Anomaly detection system. In the abnormality detection system according to claim 1,
The abnormality detection unit and the detection target identification unit are mounted on a microcomputer.
Anomaly detection system. In the abnormality detection system according to claim 1,
The detection algorithm is an algorithm based on AI (Artificial Intelligence),
Anomaly detection system. In the abnormality detection system according to claim 6,
The algorithm storage unit, the abnormality detection unit, and the detection target identification unit are mounted on a first device including a microcomputer.
The algorithm generation unit is mounted on a second device different from the first device,
The first device and the second device are coupled in a communication network,
Anomaly detection system. What is claimed is: 1. A manufacturing system of a semiconductor device comprising a manufacturing apparatus coupled with a communication network, an abnormality detection apparatus, and a management apparatus,
The management apparatus transmits identification information including a recipe ID representing manufacturing conditions of the manufacturing apparatus to the communication network.
The manufacturing apparatus processes a semiconductor device under the manufacturing conditions based on the recipe ID from the management apparatus, and outputs a monitor signal representing the status of the processing.
The abnormality detection device is
A target signal selection unit that determines a detection target signal to be detected from among the monitor signals;
An algorithm storage unit storing a detection algorithm corresponding to the identification information;
An abnormality detection unit which detects an abnormality of the detection target signal using the detection algorithm corresponding to the identification information stored in the algorithm storage unit;
A detection target identification unit that determines whether the detection algorithm corresponding to the identification information is stored in the algorithm storage unit and issues a generation request if the detection algorithm is not stored;
An algorithm generation unit that generates the detection algorithm corresponding to the identification information using the detection target signal in response to the generation request, and stores the generated detection algorithm in the algorithm storage unit;
Have
Semiconductor device manufacturing system. In the semiconductor device manufacturing system according to claim 8,
The algorithm generation unit issues a generation completion notification when the generation of the detection algorithm is completed.
Semiconductor device manufacturing system. In the semiconductor device manufacturing system according to claim 8,
The algorithm generation unit stores the generated detection algorithm in the algorithm storage unit when the generation of the detection algorithm is completed.
Semiconductor device manufacturing system. In the semiconductor device manufacturing system according to claim 8,
When the detection algorithm is stored in the algorithm storage unit, the detection target identification unit transmits selection information for specifying the detection algorithm corresponding to the identification information to the abnormality detection unit and is stored. If there is not, the non-correspondence notification is sent to the abnormality detection unit,
The abnormality detection unit does not detect an abnormality of the detection target signal when the non-correspondence notification is received.
Semiconductor device manufacturing system. In the semiconductor device manufacturing system according to claim 8,
The detection algorithm is an algorithm based on AI (Artificial Intelligence),
Semiconductor device manufacturing system. In the semiconductor device manufacturing system according to claim 12,
The algorithm storage unit, the abnormality detection unit, and the detection target identification unit are mounted on a first device including a microcomputer.
The algorithm generation unit is mounted on a second device coupled to the first device by the communication network.
Semiconductor device manufacturing system. In the semiconductor device manufacturing system according to claim 13,
Having a plurality of said manufacturing devices,
The first device is provided for each of the plurality of manufacturing devices.
Semiconductor device manufacturing system. A manufacturing method of a semiconductor device using a manufacturing apparatus coupled with a communication network, an abnormality detection apparatus, and a management apparatus,
The management apparatus transmits identification information including a recipe ID representing manufacturing conditions of the manufacturing apparatus to the communication network.
The manufacturing apparatus processes a semiconductor device under the manufacturing conditions based on the recipe ID from the management apparatus, and outputs a monitor signal representing the status of the processing.
The abnormality detection device is
A target signal selection unit that determines a detection target signal to be detected from among the monitor signals;
An algorithm storage unit storing a detection algorithm corresponding to the identification information;
An abnormality detection unit which detects an abnormality of the detection target signal using the detection algorithm corresponding to the identification information stored in the algorithm storage unit;
A detection target identification unit that determines whether the detection algorithm corresponding to the identification information is stored in the algorithm storage unit and issues a generation request if the detection algorithm is not stored;
In response to the generation request, the detection algorithm corresponding to the identification information is generated using the detection target signal, a generation completion notification is issued when the generation is completed, and the generated detection algorithm is used as the algorithm An algorithm generation unit stored in the storage unit;
Have
The manufacturing method is
A first step of processing the semiconductor device to be mass-produced using a first recipe ID;
A second step of the abnormality detection device detecting an abnormality of the manufacturing apparatus associated with the first step;
A third process in which the manufacturing apparatus processes the semiconductor device to be prototyped using a second recipe ID;
The abnormality detection device receives the identification information including the second recipe ID and issues the generation request, and generates the detection algorithm corresponding to the identification information in response to the generation request. When,
A fifth step in which the manufacturing apparatus processes the semiconductor device to be mass-produced using the second recipe ID after the abnormality detection device issues the generation completion notification according to the fourth step. When,
A sixth step of the abnormality detection device detecting an abnormality of the manufacturing apparatus associated with the fifth step;
Have
Semiconductor device manufacturing method. In the method of manufacturing a semiconductor device according to claim 15,
When the detection algorithm is stored in the algorithm storage unit, the detection target identification unit transmits selection information for specifying the detection algorithm corresponding to the identification information to the abnormality detection unit and is stored. If there is not, the non-correspondence notification is sent to the abnormality detection unit,
The abnormality detection unit does not detect an abnormality of the detection target signal when the non-correspondence notification is received.
Semiconductor device manufacturing method. In the method of manufacturing a semiconductor device according to claim 15,
Furthermore, a seventh step of processing the semiconductor device to be mass-produced between the fourth step and the fifth step using a recipe ID different from the second recipe ID between the fourth step and the fifth step Have
Semiconductor device manufacturing method. In the method of manufacturing a semiconductor device according to claim 15,
The detection algorithm is an algorithm based on AI (Artificial Intelligence),
Semiconductor device manufacturing method.

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