JP2018159758A - Liquid crystal display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a liquid crystal display device constituted of plural display panels laminated each other capable of preventing degradation of display quality due to a difference in responce characteristics of liquid crystals.SOLUTION: The liquid crystal display device includes: a first display panel having a first pixel and a first liquid crystal which has a response characteristic of first response speed; and a second display panel having a second pixel and a second liquid crystal which has a response characteristic of second response speed different from the first response speed. The first writing timing of a first data voltage on the first pixel and the second writing timing of a second data voltage on the second pixel are different from each other.SELECTED DRAWING: Figure 9

Description

  The present invention relates to a liquid crystal display device.

  Conventionally, as a technique for improving the contrast of a liquid crystal display device, a technique has been proposed in which two display panels are overlapped and an image is displayed on each display panel based on an input video signal (for example, Patent Document 1). reference). Specifically, for example, a color image is displayed on the front (observer side) display panel among the two display panels arranged at the front and back, and a monochrome image is displayed on the rear (backlight side) display panel. Thus, the contrast is improved.

WO2007 / 040139

  In the above-described liquid crystal display device, the rear (backlight side) display panel is easily subjected to the heat of the backlight, and thus is likely to have a higher temperature than the front (observer side) display panel. Since the liquid crystal is easily affected by temperature changes, if the temperature environment of the two display panels is different, for example, the response speed of the liquid crystal of each of the two display panels is different, and the target display brightness cannot be obtained and the display quality is degraded. Problem arises.

  The present invention has been made in view of the above circumstances, and an object of the present invention is to suppress a reduction in display quality due to a difference in response characteristics of liquid crystals in a liquid crystal display device configured by overlapping a plurality of display panels. There is.

  In order to solve the above problems, a liquid crystal display device according to the present invention is a display device in which a plurality of display panels are arranged to overlap each other and display an image on each of the display panels. A first display panel including a first liquid crystal having a response characteristic of one response speed; a second pixel; and a second liquid crystal having a response characteristic of a second response speed different from the first response speed. A first write timing of the first data voltage for the first pixel and a second write timing of the second data voltage for the second pixel are different from each other. .

  In the liquid crystal display device according to the present invention, the first display panel further includes a first gate line and a first source line, and the second display panel further includes a second gate line and a second source line. When the first response speed is faster than the second response speed, the scan timing of the first gate line may be later than the scan timing of the second gate line.

  The liquid crystal display device according to the present invention may further include a backlight, and the first display panel may be disposed closer to the backlight than the second display panel.

  The liquid crystal display device according to the present invention further includes an image processing unit that generates the first image data for the first display panel and the second image data for the second display panel based on an input video signal. The image processing unit further includes a first overdrive processing unit that generates a first image data by executing a first overdrive process for enhancing gradation based on the input video signal, and the first overdrive processing unit. The second image data is generated by executing a first overdrive table that is referred to in the drive process and in which a first correction value is set, and a second overdrive process that emphasizes gradation based on the input video signal. A second overdrive processing unit, and a second overdrive table which is referred to in the second overdrive process and in which a second correction value is set, and the first correction value Serial may be different from each other and the second correction value.

  The liquid crystal display device according to the present invention further includes a backlight and a backlight scan process in which a part of the backlight is temporarily turned off sequentially in accordance with a write timing of the data voltage to the pixel, and the image processing The unit is configured such that the peak timing at which the maximum transmittance of each of the first pixel and the second pixel is obtained is within a period in which the backlight area overlapping the first pixel and the second pixel is lit. The first write timing and the second write timing may be adjusted.

  In order to solve the above problems, a liquid crystal display device according to the present invention is a display device in which a plurality of display panels are arranged to overlap each other and display an image on each of the display panels. A first display panel including a first liquid crystal having a response characteristic of one response speed; a second pixel; and a second liquid crystal having a response characteristic of a second response speed different from the first response speed. A second display panel; and an image processing unit that generates first image data for the first display panel and second image data for the second display panel based on an input video signal, and The image processing unit further includes: a first overdrive processing unit that generates a first image data by executing a first overdrive process that emphasizes gradation based on the input video signal; and the first overdrive process. Referenced A first overdrive table in which one correction value is set, and a second overdrive processing unit that executes the second overdrive process for emphasizing gradation based on the input video signal and generates the second image data. A second overdrive table that is referred to in the second overdrive process and in which a second correction value is set, wherein the first correction value and the second correction value are different from each other. .

  In the liquid crystal display device according to the present invention, when the first response speed is faster than the second response speed, the gradation change of the second image data is larger than the gradation change of the first image data. A first correction value and the second correction value may be set.

  In the liquid crystal display device according to the present invention, the first liquid crystal may be a positive liquid crystal, and the second liquid crystal may be a negative liquid crystal.

  In the liquid crystal display device according to the present invention, only the second overdrive process may be executed without executing the first overdrive process.

  In the liquid crystal display device according to the present invention, the image processing unit further includes a first gamma processing unit that executes a first gamma process based on the input video signal, and a second gamma process based on the input video signal. A second gamma processing unit that executes, the first overdrive processing unit executes the first overdrive processing after the first gamma processing, and the second overdrive processing unit includes the second gamma processing unit The second overdrive process may be executed after the gamma process.

  In the liquid crystal display device according to the present invention, the first gamma processing unit performs the first gamma processing based on a first gamma characteristic for the first display panel, and the second gamma processing unit includes the first gamma processing unit. The second gamma processing may be executed based on a second gamma characteristic for the second display panel that is different from the 1 gamma characteristic.

  In order to solve the above problems, a liquid crystal display device according to the present invention is a display device in which a plurality of display panels are arranged to overlap each other and display an image on each of the display panels. A first display panel including a first liquid crystal having a response characteristic of one response speed; a second pixel; and a second liquid crystal having a response characteristic of a second response speed lower than the first response speed. A second display panel; and an image processing unit that generates first image data for the first display panel and second image data for the second display panel based on an input video signal, and The image processing unit is referred to in the second overdrive processing, a second overdrive processing unit that executes a second overdrive process that enhances gradation based on the input video signal and generates the second image data. Second correction There includes a second overdrive table which is set, and features that.

  In the liquid crystal display device according to the present invention, the first liquid crystal may be a positive liquid crystal, and the second liquid crystal may be a negative liquid crystal.

  According to the liquid crystal display device according to the present invention, in a liquid crystal display device configured by superimposing a plurality of display panels, it is possible to suppress deterioration in display quality due to a difference in response characteristics of liquid crystals.

1 is a perspective view illustrating a schematic configuration of a liquid crystal display device according to Embodiment 1. FIG. 1 is a plan view showing a schematic configuration of a liquid crystal display device according to Embodiment 1. FIG. 1 is a plan view showing a schematic configuration of a display panel 100 according to Embodiment 1. FIG. 3 is a plan view illustrating a schematic configuration of a display panel 200 according to Embodiment 1. FIG. It is AA 'sectional drawing of FIG.3 and FIG.4. 12 is a plan view illustrating another example of the pixel arrangement of the display panel 100 and the display panel 200. FIG. 2 is a block diagram illustrating a specific configuration of an image processing unit according to the first embodiment. FIG. 4 is a graph showing gamma characteristics for the display panel 200. It is a timing chart which shows the writing timing of a pixel. 6 is a timing chart showing backlight scanning timing and pixel writing timing. FIG. 10 is a block diagram illustrating a specific configuration of an image processing unit according to a second embodiment. It is a figure which shows an example of 1st LUT. It is a figure which shows an example of a 2nd LUT. FIG. 10 is a block diagram illustrating another configuration of the image processing unit according to the second embodiment.

  Embodiments of the present invention will be described below with reference to the drawings. The liquid crystal display device of the present invention includes a plurality of display panels for displaying images, a plurality of drive circuits (a plurality of source drivers and a plurality of gate drivers) for driving the respective display panels, and a plurality of control circuits for controlling the respective drive circuits. A timing controller, an image processing unit that performs image processing on an input video signal input from the outside, and outputs image data to each timing controller, and a backlight that emits light from the back side to a plurality of display panels And. The number of display panels is not limited and may be two or more. The plurality of display panels are arranged so as to overlap each other in the front-rear direction as viewed from the observer side, and each displays an image. Hereinafter, the liquid crystal display device 10 including two display panels will be described as an example.

[Embodiment 1]
FIG. 1 is a perspective view illustrating a schematic configuration of a liquid crystal display device 10 according to the first embodiment. As shown in FIG. 1, the liquid crystal display device 10 includes a display panel 100 disposed at a position (front side) close to the observer, and a display panel 200 disposed at a position (rear side) farther from the observer than the display panel 100. An adhesive layer 400 that bonds the display panel 100 and the display panel 200, a backlight 500 disposed on the back side of the display panel 200, and a front chassis 600 that covers the display panel 100 and the display panel 200 from the display surface side. Contains.

  FIG. 2 is a plan view illustrating a schematic configuration of the liquid crystal display device 10 according to the first embodiment. As shown in FIG. 2, the display panel 100 includes a first source driver 120 and a first gate driver 130, and the display panel 200 includes a second source driver 220 and a second gate driver 230. The liquid crystal display device 10 includes a first timing controller 140 that controls the first source driver 120 and the first gate driver 130, a second timing controller 240 that controls the second source driver 220 and the second gate driver 230, and a second timing controller 240. And an image processing unit 300 that outputs image data to the first timing controller 140 and the second timing controller 240. For example, the display panel 100 displays a color image corresponding to the input video signal in the first image display area 110, and the display panel 200 displays a black and white image corresponding to the input video signal in the second image display area 210. The image processing unit 300 receives an input video signal Data transmitted from an external system (not shown), performs image processing (described later), and then outputs first image data DAT1 to the first timing controller 140. The second image data DAT2 is output to the second timing controller 240. The image processing unit 300 outputs control signals CS1 and CS2 (see FIGS. 3 and 4) such as synchronization signals to the first timing controller 140 and the second timing controller 240. The first image data DAT1 is image data for displaying a color image, and the second image data DAT2 is image data for displaying a monochrome image. A specific configuration of the image processing unit 300 will be described later.

  FIG. 3 is a plan view showing a schematic configuration of the display panel 100, and FIG. 4 is a plan view showing a schematic configuration of the display panel 200. FIG. 5 is a cross-sectional view taken along the line AA ′ of FIGS. 3 and 4.

  The configuration of the display panel 100 will be described with reference to FIGS. As shown in FIG. 5, the display panel 100 includes a thin film transistor substrate 101 disposed on the backlight 500 side, a counter substrate 102 disposed on the viewer side and facing the thin film transistor substrate 101, and the thin film transistor substrate 101 and the counter substrate 102. And a liquid crystal layer 103 disposed between the two. A polarizing plate 104 is disposed on the backlight 500 side of the display panel 100, and a polarizing plate 105 is disposed on the viewer side.

  As shown in FIG. 3, the thin film transistor substrate 101 has a plurality of source lines 111 extending in a first direction (for example, the column direction) and a second direction (for example, the row direction) different from the first direction. A plurality of gate lines 112 are formed, and a thin film transistor 113 is formed in the vicinity of each intersection of the plurality of source lines 111 and the plurality of gate lines 112. When the display panel 100 is viewed in plan, a region surrounded by two adjacent source lines 111 and two adjacent gate lines 112 is defined as one pixel 114, and the pixel 114 is arranged in a matrix (row). In the direction and column direction). The plurality of source lines 111 are arranged at equal intervals in the row direction, and the plurality of gate lines 112 are arranged at equal intervals in the column direction. In the thin film transistor substrate 101, a pixel electrode 115 is formed for each pixel 114, and one common electrode (not shown) common to the plurality of pixels 114 is formed. The drain electrode included in the thin film transistor 113 is electrically connected to the source line 111, the source electrode is electrically connected to the pixel electrode 115, and the gate electrode is electrically connected to the gate line 112.

  As shown in FIG. 5, the counter substrate 102 has a plurality of colored portions 102 a corresponding to the respective pixels 114. Each colored portion 102a is surrounded by a black matrix 102b that blocks light transmission, and is formed in a rectangular shape, for example. The plurality of colored portions 102a are formed of a red (R color) material and transmit a red portion that transmits red light, and a green portion that is formed of a green (G color) material and transmits green light. And a blue portion that is formed of a blue (B color) material and transmits blue light. The red portion, the green portion, and the blue portion are repeatedly arranged in this order in the row direction, the colored portions 102a of the same color are arranged in the column direction, and a black matrix is formed at the boundary portion between the colored portions 102a adjacent in the row direction and the column direction. 102b is formed. As shown in FIG. 3, the plurality of pixels 114 corresponding to each coloring portion 102a includes a red pixel 114R corresponding to the red portion, a green pixel 114G corresponding to the green portion, and a blue pixel 114B corresponding to the blue portion. And. In the display panel 100, red pixels 114R, green pixels 114G, and blue pixels 114B are repeatedly arranged in this order in the row direction, and pixels 114 of the same color are arranged in the column direction.

  The first timing controller 140, based on the first image data DAT1 received from the image processing unit 300 and the first control signal CS1 (clock signal, vertical synchronization signal, horizontal synchronization signal, etc.), A first timing signal (data start pulse DSP1, data clock DCK1, gate start pulse GSP1, gate clock GCK1) for controlling driving of the first source driver 120 and the first gate driver 130 is generated (see FIG. 3). . The first timing controller 140 outputs the first image data DA1, the data start pulse DSP1, and the data clock DCK1 to the first source driver 120, and outputs the gate start pulse GSP1 and the gate clock GCK1 to the first gate driver 130. Output. A specific configuration of the first timing controller 140 will be described later.

  The first source driver 120 outputs a data signal (data voltage, gradation voltage) corresponding to the first image data DA1 to the source line 111 based on the data start pulse DSP1 and the data clock DCK1. The first gate driver 130 outputs a gate signal (gate voltage) to the gate line 112 based on the gate start pulse GSP1 and the gate clock GCK1.

  Each source line 111 is supplied with a data voltage from the first source driver 120, and each gate line 112 is supplied with a gate voltage from the first gate driver 130. A common voltage Vcom is supplied to the common electrode from a common driver (not shown). When the gate voltage (gate-on voltage) is supplied to the gate line 112, the thin film transistor 113 connected to the gate line 112 is turned on, and the data voltage is supplied to the pixel electrode 115 through the source line 111 connected to the thin film transistor 113. (Pixel writing). An electric field is generated by the difference between the data voltage supplied to the pixel electrode 115 and the common voltage Vcom supplied to the common electrode. The liquid crystal is driven by this electric field to control the light transmittance of the backlight 500 to display an image. In the display panel 100, color image display is performed by supplying a desired data voltage to the source line 111 connected to the pixel electrode 115 of each of the red pixel 114R, the green pixel 114G, and the blue pixel 114B.

  Next, the configuration of the display panel 200 will be described with reference to FIGS. As shown in FIG. 5, the display panel 200 includes a thin film transistor substrate 201 disposed on the backlight 500 side, a counter substrate 202 disposed on the viewer side and facing the thin film transistor substrate 201, and the thin film transistor substrate 201 and the counter substrate 202. And a liquid crystal layer 203 disposed between the two. A polarizing plate 204 is disposed on the backlight 500 side of the display panel 200, and a polarizing plate 205 is disposed on the viewer side. An adhesive layer 400 is disposed between the polarizing plate 104 of the display panel 100 and the polarizing plate 205 of the display panel 200.

  As shown in FIG. 4, a plurality of source lines 211 extending in the column direction and a plurality of gate lines 212 extending in the row direction are formed on the thin film transistor substrate 201, and the plurality of source lines 211 and the plurality of gate lines 212 are formed. Thin film transistors 213 are formed in the vicinity of each intersection with the gate line 212. When the display panel 200 is viewed in plan, a region surrounded by two adjacent source lines 211 and two adjacent gate lines 212 is defined as one pixel 214, and the pixel 214 is arranged in a matrix (row). In the direction and column direction). The plurality of source lines 211 are arranged at equal intervals in the row direction, and the plurality of gate lines 212 are arranged at equal intervals in the column direction. In the thin film transistor substrate 201, a pixel electrode 215 is formed for each pixel 214, and one common electrode (not shown) common to the plurality of pixels 214 is formed. The drain electrode included in the thin film transistor 213 is electrically connected to the source line 211, the source electrode is electrically connected to the pixel electrode 215, and the gate electrode is electrically connected to the gate line 212.

  As shown in FIG. 5, a black matrix 202 b that blocks light transmission is formed on the counter substrate 202 at a position corresponding to the boundary portion of each pixel 214. In the region 202a surrounded by the black matrix 202b, no colored portion is formed, and for example, an overcoat film is formed. Note that the black matrix 202b may be formed in a lattice shape so as to surround each pixel 214, or may be formed in an island shape so as to cover each thin film transistor 213.

  The second timing controller 240, based on the second image data DAT2 received from the image processing unit 300 and the second control signal CS2 (clock signal, vertical synchronization signal, horizontal synchronization signal, etc.), A second timing signal (data start pulse DSP2, data clock DCK2, gate start pulse GSP2, gate clock GCK2) for controlling driving of the second source driver 220 and the second gate driver 230 is generated (see FIG. 4). . The second timing controller 240 outputs the second image data DA2, the data start pulse DSP2, and the data clock DCK2 to the second source driver 220, and outputs the gate start pulse GSP2 and the gate clock GCK2 to the second gate driver 230. Output. A specific configuration of the second timing controller 240 will be described later.

  The second source driver 220 outputs a data voltage corresponding to the second image data DA2 to the source line 211 based on the data start pulse DSP2 and the data clock DCK2. The second gate driver 230 outputs a gate voltage to the gate line 212 based on the gate start pulse GSP2 and the gate clock GCK2.

  Each source line 211 is supplied with a data voltage from the second source driver 220, and each gate line 212 is supplied with a gate voltage from the second gate driver 230. A common voltage Vcom is supplied to the common electrode from a common driver. When the gate voltage (gate-on voltage) is supplied to the gate line 212, the thin film transistor 213 connected to the gate line 212 is turned on, and the data voltage is supplied to the pixel electrode 215 through the source line 211 connected to the thin film transistor 213. (Pixel writing). An electric field is generated by the difference between the data voltage supplied to the pixel electrode 215 and the common voltage Vcom supplied to the common electrode. The liquid crystal is driven by this electric field to control the light transmittance of the backlight 500 to display an image. On the second display panel 200, monochrome image display is performed.

  Each pixel 114 of the display panel 100 and each pixel 214 of the display panel 200 are arranged in a one-to-one relationship with each other and overlap each other in plan view. For example, each of the red pixel 114R, the green pixel 114G, and the blue pixel 114B illustrated in FIG. 3 overlaps each of the three pixels 214 illustrated in FIG. As shown in FIG. 6, three pixels 114 (red pixel 114R, green pixel 114G, blue pixel 114B) (see FIG. 6A) of the display panel 100 and one pixel 214 of the display panel 200 are displayed. (See FIG. 6B) may overlap with each other in plan view. FIG. 6 shows common wirings 116 and 216 for supplying a common voltage Vcom to the common electrode.

  FIG. 7 is a block diagram illustrating a specific configuration of the image processing unit 300 according to the first embodiment. The image processing unit 300 includes a first gamma processing unit 311, a first image output unit 312, a black and white image generation unit 321, a second gamma processing unit 322, a second image output unit 323, and a temperature determination unit 331. The control signal generation unit 332 and the control signal output unit 333 are included. The image processing unit 300 performs the following image processing based on the input video signal Data, and performs first image data DAT1 (for example, color image data) for the display panel 100 and second image data DAT2 (for example, for the display panel 200). Monochrome image data). In addition, the image processing unit 300 generates a control signal SS for controlling the operation of the display panels 100 and 200 according to the state (for example, temperature environment) of the liquid crystal display device 10.

  Specifically, when the image processing unit 300 receives an input video signal Data transmitted from an external system, the image processing unit 300 transfers the input video signal Data to the first gamma processing unit 311 and the monochrome image generation unit 321. The input video signal Data includes, for example, luminance information (gradation information) and color information. The color information is information for specifying a color. For example, when the input video signal Data is 8 bits, each color including R color, G color, and B color is represented by a value of 0 to 255. Can do. The plurality of colors include at least R, G, and B colors, and may further include W (white) color and / or Y (yellow) color. In the following, as an example, the case where the plurality of colors are R color, G color, and B color is given, and color information of the input video signal Data is expressed as “RGB value” ([R value, G value, B value]). Call it. For example, when the color corresponding to the input video signal Data is “white”, the R color value (R value) is represented by [255], the G color value (G value) is represented by [255], and B The color value (B value) is represented by [255]. That is, the “RGB value” is represented by [255, 255, 255]. When the color corresponding to the input video signal Data is “red”, the “RGB value” is represented by [255, 0, 0]. When the color is “black”, the “RGB value” is [0, 0]. , 0].

  When the black and white image generation unit 321 acquires the input video signal Data, the maximum value (R) among the values of each color indicating the color information of the input video signal Data (here, RGB values: [R value, G value, B value]) Value, G value or B value) to generate monochrome image data corresponding to the monochrome image. Specifically, the monochrome image generation unit 321 generates monochrome image data by setting a maximum value among the RGB values corresponding to each pixel 214 to the value of the pixel 214. The black and white image generation unit 321 outputs the generated black and white image data to the second gamma processing unit 322.

  The second gamma processing unit 322 executes gamma processing (second gamma processing) of the monochrome image displayed on the display panel 200 based on the monochrome image data acquired from the monochrome image generation unit 321. For example, the second gamma processing unit 322 determines the gradation of the monochrome image based on the gamma characteristic for the display panel 200. For example, as shown in FIG. 8, the gamma characteristic for the display panel 200 has a characteristic that the output gradation becomes 256 gradations when the input gradation is higher than a predetermined gradation (64 gradations). The second gamma processing unit 322 outputs the monochrome image data subjected to the second gamma processing to the first gamma processing unit 311 and the second image output unit 323.

  The first gamma processing unit 311 performs gamma processing on a color image displayed on the display panel 100 based on the black and white image data acquired from the second gamma processing unit 322 with respect to the input video signal Data received from the external system ( First gamma processing) is executed. For example, the first gamma processing unit 311 sets the gamma value of the color image so that the combined gamma value of the display image obtained by combining the monochrome image and the color image is 2.2. The first gamma processing unit 311 outputs the color image data subjected to the first gamma processing to the first image output unit 312.

  The first image output unit 312 outputs the color image data as the first image data DAT1 to the first timing controller 140, and the second image output unit 323 sets the monochrome image data as the second image data DAT2 to the second timing controller 240. Output to.

  The temperature determination unit 331 determines whether or not the difference (temperature difference) between the temperature of the display panel 100 and the temperature of the display panel 200 exceeds a predetermined threshold, and outputs the determination result to the control signal generation unit 332. To do. For example, the temperature sensor 700 provided in the liquid crystal display device 10 individually measures the temperature of the display panel 100 and the temperature of the display panel 200, and the temperature determination unit 331 receives each measurement data from the temperature sensor 700. . The temperature determination unit 331 calculates the temperature difference based on the received measurement data, and when the temperature difference exceeds a threshold value, outputs a determination result DR (H) indicating that to the control signal generation unit 332. To do. Further, when the temperature is equal to or lower than the threshold value, the temperature determination unit 331 outputs a determination result DR (L) indicating that to the control signal generation unit 332.

  When the control signal generation unit 332 receives the determination result DR from the temperature determination unit 331, based on the determination result DR, the control signal generation unit 332 writes the data voltage (grayscale voltage) to the pixels 114 of the display panel 100 (hereinafter referred to as first write). And a control signal SS for controlling a data voltage (grayscale voltage) write timing (hereinafter referred to as a second write timing) to the pixel 214 of the display panel 200, and the control signal SS. Is transferred to the control signal output unit 333. For example, when receiving the determination result DR (H) from the temperature determination unit 331, the control signal generation unit 332 transfers the control signal SS (H) to the control signal output unit 333, and the determination result DR (L ), The control signal SS (L) is transferred to the control signal output unit 333. The control signal output unit 333 outputs the control signal SS received from the control signal generation unit 332 to the first timing controller 140 and the second timing controller 240.

  The image processing unit 300 outputs the first control signal CS1 to the first timing controller 140, and outputs the second control signal CS2 to the second timing controller 240 (FIGS. 3 and 4).

  In addition to the above configuration, the image processing unit 300 detects and emphasizes a boundary (edge) where the luminance changes greatly for black and white image data, and all pixels in each frame. Alternatively, an expansion filter process for expanding a high luminance area with a common filter size, a smoothing process for performing smoothing using an average filter common to all pixels in each frame, or the like may be executed.

  The first timing controller 140 and the second timing controller 240 have a function of adjusting the first write timing and the second write timing in addition to the above-described configuration. Specifically, when the first timing controller 140 and the second timing controller 240 receive the control signal SS (L) from the control signal output unit 333 of the image processing unit 300, the first writing timing and the second writing timing are the same. A timing signal is generated and output so that For example, the first timing controller 140 outputs the first timing signal to the first source driver 120 and the first gate driver 130, and the second timing controller 240 synchronizes with the output timing of the first timing signal, The timing signal is output to the second source driver 220 and the second gate driver 230. Accordingly, the plurality of gate lines 112 of the display panel 100 and the plurality of gate lines 212 of the display panel 200 are sequentially scanned at the same timing, and the same for each of the pixels 114 of the display panel 100 and the pixels 214 of the display panel 200. The data voltage is written at the timing.

  Here, since the display panel 200 is disposed at a position closer to the backlight 500 than the display panel 100, the temperature is likely to be higher than that of the display panel 100. For this reason, the response speed of the liquid crystal of the display panel 200 may be faster than the response speed of the liquid crystal of the display panel 100. In this case, when data voltages are written to the pixels 114 of the display panel 100 and the pixels 214 of the display panel 200 at the same timing, as shown in FIG. The arrival time (arrival timing) to the halftone is faster than the arrival time (arrival timing) to the target luminance (for example, halftone) in the display panel 100. If there is a large difference in the arrival time to the target luminance in this way, the target display luminance (display image) cannot be obtained, and the display quality is deteriorated.

  Therefore, when the first timing controller 140 and the second timing controller 240 receive the control signal SS (H) from the control signal output unit 333 of the image processing unit 300 because the temperature difference exceeds the threshold, FIG. As shown in FIG. 9B, the second writing timing in the pixel 214 of the high temperature side display panel 200 (t2 in FIG. 9B) is the first writing timing in the pixel 114 of the low temperature side display panel 100 (FIG. 9). A timing signal is generated and output so as to be later than t1) of (b). For example, after the first timing controller 140 outputs the first timing signal to the first source driver 120 and the first gate driver 130, the second timing controller 240 outputs the second timing signal to the second source driver 220 and the second source driver 220. Output to the gate driver 230. Thereby, the scanning timing of each of the plurality of gate lines 212 of the display panel 200 becomes later than the scanning timing of each of the plurality of gate lines 112 of the display panel 100, and the second writing timing (t2 in FIG. 9B) is It is later than the first write timing (t1 in FIG. 9B). Accordingly, as shown in FIG. 9B, the arrival time (arrival timing) to the target luminance (for example, halftone) in the display panel 100 and the arrival time (arrival to the target luminance (for example, halftone) in the display panel 200 ( Approach timing). Therefore, since the difference in arrival time to the target luminance can be reduced, the deterioration in display quality can be suppressed.

  In addition to the configuration described above, the liquid crystal display device 10 according to the first embodiment may further execute a backlight scan process. The backlight scanning process is a process for improving moving image performance by temporarily turning off part of the backlight (LED) sequentially in accordance with the scanning timing of the video signal (data voltage writing timing to the pixel). In general, when the backlight scan process is executed, the problem of a shift in response characteristics becomes significant. Therefore, the image processing unit 300 according to the first embodiment is configured to adjust the first write timing and the second write timing in accordance with the backlight scan timing. Specifically, as shown in FIG. 10, the backlight area where the peak timing of the maximum transmittance of each of the pixel 114 of the display panel 100 and the pixel 214 of the display panel 200 overlaps the pixel 114 and the pixel 214 is turned on. The first write timing and the second write timing are adjusted so as to exist within the period.

[Embodiment 2]
Embodiment 2 of the present invention will be described below with reference to the drawings. For convenience of explanation, the same reference numerals are given to the constituent elements shown in the first embodiment and the description thereof will be omitted. In addition, the terms defined in the first embodiment are used in accordance with the definitions in the present embodiment unless otherwise specified. The same applies to each embodiment described later.

  FIG. 11 is a block diagram illustrating a specific configuration of the image processing unit 300 according to the second embodiment. The image processing unit 300 according to the second embodiment further includes a first overdrive processing unit 313, a first memory 314, and a first overdrive look, in addition to the image processing unit 300 according to the first embodiment (see FIG. 7). An up table (first LUT) 315, a second overdrive processing unit 324, a second memory 325, and a second overdrive lookup table (second LUT) 326 are added.

  The first overdrive processing unit 313 executes a first overdrive process on the color image data that has been subjected to the first gamma processing by the first gamma processing unit 311. The first memory 314 (frame memory) stores color image data of the previous (immediately preceding) frame. The first LUT 315 includes a gradation corresponding to the color image data of the current frame (current frame), a gradation corresponding to the color image data of the previous frame (previous frame), and the color image data of the current frame. A correction value to be added to the gradation is associated. FIG. 12 is a diagram illustrating an example of the first LUT 315. For example, when the first overdrive processing unit 313 acquires the color image data of the current frame from the first gamma processing unit 311, the first overdrive processing unit 313 acquires the color image data of the previous frame from the first memory 314, and refers to the first LUT 315. And the correction value is added to the gradation of the color image data of the current frame. The correction value of the first LUT 315 is set to a positive value when the change in gradation (gradation transition) of the current frame with respect to the gradation of the previous frame is an increase change (rise response), and the gradation transition changes downward. In the case of (decay response), a negative value is set. The first overdrive processing unit 313 outputs the color image data subjected to the first overdrive process to the first image output unit 312.

  The second overdrive processing unit 324 executes the second overdrive processing on the monochrome image data on which the second gamma processing unit 322 has performed the second gamma processing. The second memory 325 (frame memory) stores monochrome image data of the previous (immediately preceding) frame. The second LUT 326 is associated with the gradation of the monochrome image data of the current frame, the gradation of the monochrome image data of the previous frame, and the correction value to be added to the gradation of the monochrome image data of the current frame. FIG. 14 is a diagram illustrating an example of the second LUT 326. For example, when the second overdrive processing unit 324 acquires the black and white image data of the current frame from the second gamma processing unit 322, the second overdrive processing unit 324 acquires the black and white image data of the previous frame from the second memory 325 and refers to the second LUT 326 as desired. And the correction value is added to the gradation of the monochrome image data of the current frame. The correction value of the second LUT 326 is set to a positive value when the change in gradation (gradation transition) of the current frame with respect to the gradation of the previous frame is an increase change (rise response), and the gradation transition changes downward. In the case of (decay response), a negative value is set. The second overdrive processing unit 324 outputs the monochrome image data subjected to the second overdrive process to the second image output unit 323.

  Here, the correction value of the first LUT 315 (see FIG. 12) and the correction value of the second LUT 326 (see FIG. 13) are set to different values. For example, when the temperature of the display panel 200 is higher than the temperature of the display panel 100 and the response speed of the liquid crystal of the display panel 200 is faster than the response speed of the liquid crystal of the display panel 100, the gradation of the color image data for the display panel 100 The correction values of the first LUT 315 and the second LUT 326 are set so that the change is larger than the gradation change of the monochrome image data for the display panel 200 (see FIGS. 12 and 13). Thereby, since the response speed of the liquid crystal of the display panel 100 can be increased, the difference in arrival time to the target luminance in the display panel 100 and the display panel 200 can be reduced, and the deterioration of display quality can be suppressed. .

  The configuration shown in FIG. 11 includes a configuration that outputs control signals SS (H) and SS (L) according to the temperatures of the display panel 100 and the display panel 200, as in the image processing unit 300 according to the first embodiment. Yes. That is, the configuration shown in FIG. 11 has a function of the overdrive process and a function of adjusting the first write timing and the second write timing in accordance with the temperature difference. By using these functions in combination, the difference in arrival time to the target luminance in the display panel 100 and the display panel 200 can be further reduced, and the deterioration in display quality can be suppressed.

  The liquid crystal display device 10 according to the second embodiment is not limited to the above configuration. For example, in the liquid crystal display device 10 according to the second embodiment, the function of adjusting the first write timing and the second write timing may be omitted.

  Further, as shown in FIG. 14, the control signal generation unit 332 may output the control signals SS (H) and SS (L) to the first overdrive processing unit 313 and the second overdrive processing unit 324. Good. In this configuration, for example, when the temperature of the display panel 200 is higher than the temperature of the display panel 100 and the temperature difference between the display panel 100 and the display panel 200 exceeds a threshold value, the response speed of the liquid crystal of the display panel 100 is displayed. The first overdrive processing unit 313 executes the first overdrive processing and the second overdrive processing unit 324 does not execute the second overdrive processing in order to match the response speed of 200 liquid crystals. On the other hand, when the temperature difference does not exceed the threshold, the first overdrive processing unit 313 executes the first overdrive processing, and the second overdrive processing unit 324 executes the second overdrive processing. To do. As a result, the response speed of the liquid crystal can be adjusted by executing overdrive processing according to the temperature difference.

  Further, the liquid crystal display device 10 according to the second embodiment executes only the first overdrive process corresponding to the display panel 100 having a slow response speed of liquid crystal, and the second overdrive corresponding to the display panel 200 having a fast response speed of liquid crystal. A configuration may be adopted in which drive processing is not executed. In this configuration, the second overdrive processing unit 324, the second memory 325, and the second LUT 326 may be omitted.

  In addition, the liquid crystal display device 10 according to the second embodiment measures the absolute temperature of the display panel 100 and the absolute temperature of the display panel 200, and the overdrive amount (correction value of the first LUT 315) of the display panel 100 according to each temperature. ) And the amount of overdrive of the display panel 200 (correction value of the second LUT 326) may be determined.

  In the liquid crystal display device 10 according to the first embodiment, the time difference between the first write timing and the second write timing may be set according to the temperature difference or the absolute temperature of each of the display panels 100 and 200. Further, the liquid crystal display device 10 according to the second embodiment includes a plurality of first LUTs 315 having different correction values and a plurality of second LUTs 326 having different correction values, which are selected according to the temperature difference. The first overdrive process and the second overdrive process may be executed by the first LUT 315 and the second LUT 326.

  In each of the embodiments described above, attention is paid to the difference in the response speed of the liquid crystal due to the temperature change of the display panel 100 and the display panel 200, but the response speed of the liquid crystal can also be changed by other factors. For example, negative liquid crystals generally have a slower response speed than positive liquid crystals. Therefore, for example, when a positive liquid crystal is used for the display panel 100 and a negative liquid crystal is used for the display panel 200, the liquid crystal of the display panel 100 is always in an environment where there is no temperature difference between the display panel 100 and the display panel 200. Is faster than the response speed of the liquid crystal of the display panel 200. In such a case, for example, in the liquid crystal display device 10 according to Embodiment 1 (see FIG. 7), the first writing timing in the pixels 114 of the display panel 100 is later than the second writing timing in the pixels 114 of the display panel 200. The timing signals (data start pulses DSP1, DSP2, data clocks DCK1, DCK2, gate start pulses GSP1, GSP2, gate clocks GCK1, GCK2) may be generated so that For example, in the liquid crystal display device 10 according to the second embodiment (see FIG. 11), the gradation change of the monochrome image data for the display panel 200 is larger than the gradation change of the color image data for the display panel 100. The correction values for the first LUT 315 and the second LUT 326 may be set. For example, in the liquid crystal display device 10 according to the second embodiment, only the second overdrive process corresponding to the display panel 200 using negative liquid crystal may be executed. In this case, the first overdrive processing unit 313, the first memory 314, and the first LUT 315 may be omitted.

  Further, the liquid crystal display device 10 according to each of the above embodiments is not limited to the configuration in which the display panel 100 and the display panel 200 are bonded to each other, and the configuration members of the display panel 100 and the display panel 200 are stacked on each other. Also good. For example, in the liquid crystal display device 10 illustrated in FIG. 5, the thin film transistor substrate 101 and the counter substrate 202 may be formed using a single substrate.

  In the liquid crystal display device 10 according to each of the above embodiments, for example, in the display panel 200 shown in FIG. 5, the thin film transistor substrate 201 may be disposed on the viewer side, and the counter substrate 202 may be disposed on the backlight side.

  As mentioned above, although embodiment of this invention was described, this invention is not limited to said each embodiment, The form suitably changed by those skilled in the art from said each embodiment within the range which does not deviate from the meaning of this invention. Needless to say, it is included in the technical scope of the present invention.

  DESCRIPTION OF SYMBOLS 10 Liquid crystal display device, 100 Display panel, 120 1st source driver, 130 1st gate driver, 140 1st timing controller, 200 Display panel, 220 2nd source driver, 230 2nd gate driver, 240 2nd timing controller, 300 Image processing unit, 311 first gamma processing unit, 312 first image output unit, 313 first overdrive processing unit, 314 first memory, 315 first overdrive look-up table (first LUT), 321 monochrome image generation unit 322 second gamma processing unit, 323 second image output unit, 324 second overdrive processing unit, 325 second memory, 326 second overdrive lookup table (second LUT), 331 temperature determination unit, 332 control signal Generation unit, 333 control signal Output unit, 400 an adhesive layer, 500 a backlight, 600 front chassis.

Claims (13)

A display device in which a plurality of display panels are arranged to overlap each other and displays an image on each of the display panels,
A first display panel including a first pixel and a first liquid crystal having a response characteristic of a first response speed;
A second display panel comprising: a second pixel; and a second liquid crystal having a response characteristic of a second response speed different from the first response speed;
Including
A first writing timing of the first data voltage for the first pixel and a second writing timing of the second data voltage for the second pixel are different from each other;
A liquid crystal display device characterized by the above. The first display panel further includes a first gate line and a first source line,
The second display panel further includes a second gate line and a second source line,
When the first response speed is faster than the second response speed, the scan timing of the first gate line is slower than the scan timing of the second gate line,
The liquid crystal display device according to claim 1. Further including a backlight,
The first display panel is disposed closer to the backlight than the second display panel.
The liquid crystal display device according to claim 2. And an image processing unit that generates first image data for the first display panel and second image data for the second display panel based on an input video signal,
The image processing unit further includes a first overdrive processing unit that executes a first overdrive process for enhancing gradation based on the input video signal to generate the first image data; and the first overdrive process And a second overdrive process in which a first overdrive table in which a first correction value is set and a second overdrive process for enhancing gradation based on the input video signal is executed to generate the second image data. An overdrive processing unit, and a second overdrive table that is referred to in the second overdrive process and in which a second correction value is set,
The first correction value and the second correction value are different from each other.
The liquid crystal display device according to claim 1. Furthermore, the backlight, and a backlight scan process for temporarily turning off a part of the backlight in accordance with the write timing of the data voltage to the pixel,
In the image processing unit, the peak timing for obtaining the maximum transmittance of each of the first pixel and the second pixel exists within a period in which the backlight area overlapping the first pixel and the second pixel is lit. Adjusting the first write timing and the second write timing,
The liquid crystal display device according to claim 1. A display device in which a plurality of display panels are arranged to overlap each other and displays an image on each of the display panels,
A first display panel including a first pixel and a first liquid crystal having a response characteristic of a first response speed;
A second display panel comprising: a second pixel; and a second liquid crystal having a response characteristic of a second response speed different from the first response speed;
An image processing unit for generating first image data for the first display panel and second image data for the second display panel based on an input video signal;
Including
The image processing unit further includes a first overdrive processing unit that executes a first overdrive process for enhancing gradation based on the input video signal to generate the first image data; and the first overdrive process And a second overdrive process in which a first overdrive table in which a first correction value is set and a second overdrive process for enhancing gradation based on the input video signal is executed to generate the second image data. An overdrive processing unit, and a second overdrive table that is referred to in the second overdrive process and in which a second correction value is set,
The first correction value and the second correction value are different from each other.
A liquid crystal display device characterized by that. When the first response speed is faster than the second response speed, the first correction value and the second correction are set such that the gradation change of the second image data is larger than the gradation change of the first image data. Value is set,
The liquid crystal display device according to claim 6. The first liquid crystal is a positive liquid crystal, and the second liquid crystal is a negative liquid crystal.
The liquid crystal display device according to claim 6. Executing only the second overdrive process without executing the first overdrive process;
The liquid crystal display device according to claim 8. The image processing unit further includes a first gamma processing unit that executes a first gamma process based on the input video signal, a second gamma processing unit that executes a second gamma process based on the input video signal, Including
The first overdrive processing unit executes the first overdrive processing after the first gamma processing, and the second overdrive processing unit executes the second overdrive processing after the second gamma processing. To
The liquid crystal display device according to claim 6. The first gamma processing unit executes the first gamma processing based on a first gamma characteristic for the first display panel;
The second gamma processing unit performs the second gamma processing based on a second gamma characteristic for the second display panel different from the first gamma characteristic;
The liquid crystal display device according to claim 10. A display device in which a plurality of display panels are arranged to overlap each other and displays an image on each of the display panels,
A first display panel including a first pixel and a first liquid crystal having a response characteristic of a first response speed;
A second display panel comprising: a second pixel; and a second liquid crystal having a response characteristic with a second response speed slower than the first response speed;
An image processing unit for generating first image data for the first display panel and second image data for the second display panel based on an input video signal;
Including
The image processing unit executes a second overdrive process that enhances gradation based on the input video signal to generate the second image data, and is referred to in the second overdrive process And a second overdrive table in which a second correction value is set,
A liquid crystal display device characterized by that. The first liquid crystal is a positive liquid crystal, and the second liquid crystal is a negative liquid crystal.
The liquid crystal display device according to claim 12.

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