JP2018148241A - Junction structure between flexible multilayer substrate and circuit board, manufacturing method of flexible multilayer substrate, and junction method between flexible multilayer substrate and circuit board - Google Patents

Junction structure between flexible multilayer substrate and circuit board, manufacturing method of flexible multilayer substrate, and junction method between flexible multilayer substrate and circuit board Download PDF

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JP2018148241A
JP2018148241A JP2018122728A JP2018122728A JP2018148241A JP 2018148241 A JP2018148241 A JP 2018148241A JP 2018122728 A JP2018122728 A JP 2018122728A JP 2018122728 A JP2018122728 A JP 2018122728A JP 2018148241 A JP2018148241 A JP 2018148241A
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interlayer connection
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multilayer substrate
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circuit board
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JP6569780B2 (en
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邦明 用水
Kuniaki Yosui
邦明 用水
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Murata Manufacturing Co Ltd
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Abstract

PROBLEM TO BE SOLVED: To provide a multilayer board capable of easily forming a metal film in a through portion such as a through hole or a cut.SOLUTION: A flexible cable 10 as one example of a multilayer board includes a laminate 16, a through hole 12A, and an interlayer connection conductor 13A. The laminate 16 is formed by laminating an insulating layer 11A and an insulating layer 11B. The through hole 12A has a through hole 17 penetrating the laminate 16 in a lamination direction. In the through hole 12A, a plating film 15 is formed on a sidewall of the through hole 17 so as to interconnect a conductor foil 14A and a conductor foil 14B located on both principal surfaces of the laminate 16. The interlayer connection conductor 13A is formed in the vicinity of the through hole 12A, and penetrates the insulating layer 11A and the insulating layer 11B in the lamination direction. The conductor foil 14A and the conductor foil 14B located on both principal surfaces of the laminate 16 are interconnected via the interlayer connection conductor 13A.SELECTED DRAWING: Figure 4

Description

本発明は、フレキシブル多層基板と回路基板の接合構造、フレキシブル多層基板の製造方法、およびフレキシブル多層基板と回路基板の接合方法に関する。   The present invention relates to a joint structure between a flexible multilayer board and a circuit board, a method for manufacturing the flexible multilayer board, and a joint method between the flexible multilayer board and the circuit board.

従来の多層基板として、例えば、特許文献1に記載のビルドアップ基板がある。このビルドアップ基板では、上層の銅箔と下層の配線パターンとを導通させるメッキ層が形成されている。このメッキ層は次のように製造される。まず、片面に銅箔が形成された絶縁層に、銅箔側からレーザを照射することで、内層の配線パターンに達するビアホールを形成する。次に、銅箔上およびビアホール内に無電解メッキを施し、さらにその上に電解メッキを施す。   As a conventional multilayer substrate, for example, there is a build-up substrate described in Patent Document 1. In this build-up substrate, a plating layer is formed to connect the upper copper foil and the lower wiring pattern. This plated layer is manufactured as follows. First, a via hole reaching an inner wiring pattern is formed by irradiating a laser from the copper foil side onto an insulating layer having a copper foil formed on one side. Next, electroless plating is performed on the copper foil and in the via hole, and electrolytic plating is further performed thereon.

特許第4122159号公報Japanese Patent No. 4122159

特許文献1に記載のビルドアップ基板では、電解メッキを施すための前処理として、メッキ層の成長が遅い無電解メッキを行う必要がある。このため、ビアホール内にメッキ層を形成する際、手間と時間がかかる。   In the build-up substrate described in Patent Document 1, it is necessary to perform electroless plating with a slow growth of a plating layer as a pretreatment for performing electrolytic plating. For this reason, it takes time and effort to form a plating layer in the via hole.

本発明の目的は、貫通孔や切欠部のような貫通部分内に金属膜を容易に形成することが可能なフレキシブル多層基板と回路基板の接合構造、そのフレキシブル多層基板の製造方法、および、そのフレキシブル多層基板と回路基板の接合方法を提供することにある。   An object of the present invention is to provide a flexible multilayer board-circuit board bonding structure capable of easily forming a metal film in a through portion such as a through hole or a notch, a method for manufacturing the flexible multilayer board, and the An object of the present invention is to provide a method for joining a flexible multilayer board and a circuit board.

本発明のフレキシブル多層基板と回路基板の接合構造は、フレキシブル多層基板および回路基板を備え、前記フレキシブル多層基板は、複数の絶縁層を積層してなる積層体と、前記積層体を積層方向に貫通する貫通部分を有し、前記積層体の両主面に位置する導体箔を互いに接続するように前記貫通部分の側壁に金属膜が形成された層間接続貫通部と、ビアホールに充填された導電ペーストが硬化することで形成されている、層間接続導体と、を備え、前記層間接続貫通部の近傍に前記層間接続導体は前記層間接続貫通部に対して直接接しないように形成され、前記層間接続導体は、平面視で前記貫通部分に沿って複数形成され、前記積層体の両主面に位置する前記導体箔は、前記層間接続導体を介して互いに接続され、前記フレキシブル多層基板と前記回路基板とは、前記層間接続貫通部内に侵入している半田を介して接合されている。   The joint structure of a flexible multilayer board and a circuit board according to the present invention includes a flexible multilayer board and a circuit board, and the flexible multilayer board is formed by laminating a plurality of insulating layers, and penetrates the laminate in the laminating direction. A conductive paste filled with a via hole, and an interlayer connection through part in which a metal film is formed on the side wall of the through part so as to connect the conductive foils located on both main surfaces of the laminate to each other An interlayer connection conductor formed by curing, and the interlayer connection conductor is formed in the vicinity of the interlayer connection penetration so as not to directly contact the interlayer connection penetration, and the interlayer connection A plurality of conductors are formed along the penetrating portion in plan view, and the conductor foils located on both main surfaces of the multilayer body are connected to each other via the interlayer connection conductor, The substrate and the circuit board are joined via the solder is penetrated into the interlayer connection through portion.

本発明のフレキシブル多層基板の製造方法は、加熱加圧時に、複数の絶縁基材を圧着し、かつ、前記絶縁基材の孔に充填された導電性ペーストを硬化させることで複数の層間接続導体を形成する第1の工程と、前記第1の工程の後に、前記圧着された複数の絶縁基材の貫通部分の側壁に金属膜が形成されてなる層間接続貫通部を、前記層間接続貫通部に対して直接接せずに前記層間接続貫通部に沿って前記複数の層間接続導体が位置するように形成する第2の工程と、を有する。   The method for producing a flexible multilayer substrate according to the present invention includes a plurality of interlayer connection conductors by pressing a plurality of insulating bases and curing a conductive paste filled in the holes of the insulating bases during heating and pressing. Forming an interlayer connection through part formed by forming a metal film on a side wall of a through part of the plurality of pressure-bonded insulating bases after the first step, and forming the interlayer connection through part A second step of forming the plurality of interlayer connection conductors so as to be positioned along the interlayer connection through portion without being in direct contact with each other.

本発明のフレキシブル多層基板と回路基板の接合方法は、加熱加圧時に、複数の絶縁基材を圧着し、かつ、前記絶縁基材の孔に充填された導電性ペーストを硬化させることで複数の層間接続導体を形成する第1の工程と、前記第1の工程の後に、前記圧着された複数の絶縁基材の貫通部分の側壁に金属膜が形成されてなる層間接続貫通部を、前記層間接続貫通部に対して直接接せずに前記層間接続貫通部に沿って前記複数の層間接続導体が位置するように形成し、フレキシブル多層基板を形成するの第2の工程と、回路基板の電極の上面に半田と前記層間接続貫通部とが重なるように前記半田と前記層間接続貫通部を配置し、加熱により前記半田を溶融させ、前記層間接続貫通部に前記半田を濡れ広がらせる第3の工程と、を有する。   The method for bonding a flexible multilayer substrate and a circuit board according to the present invention includes a plurality of insulating base materials that are pressure-bonded at the time of heating and pressurizing, and a plurality of conductive pastes filled in the holes of the insulating base material are cured. A first step of forming an interlayer connection conductor, and an interlayer connection through portion formed by forming a metal film on a side wall of a through portion of the plurality of pressure-bonded insulating bases after the first step; A second step of forming a flexible multilayer substrate by forming the plurality of interlayer connection conductors so as to be positioned along the interlayer connection through portion without directly contacting the connection through portion, and an electrode of the circuit board The solder and the interlayer connection through part are arranged so that the solder and the interlayer connection through part overlap with each other, and the solder is melted by heating, and the solder is wetted and spread in the interlayer connection through part. And a process.

本発明によれば、フレキシブル多層基板の貫通部分内に金属膜を容易に形成することができる。   According to the present invention, the metal film can be easily formed in the penetrating portion of the flexible multilayer substrate.

第1の実施形態に係るフレキシブルケーブルの端部付近を示す外観斜視図である。It is an external appearance perspective view which shows the edge part vicinity of the flexible cable which concerns on 1st Embodiment. 第1の実施形態に係るフレキシブルケーブルの端部付近を示す分解斜視図である。It is a disassembled perspective view which shows the edge part vicinity of the flexible cable which concerns on 1st Embodiment. 第1の実施形態に係るフレキシブルケーブルの端部付近を示す分解平面図である。It is a disassembled plan view which shows the edge part vicinity of the flexible cable which concerns on 1st Embodiment. 第1の実施形態に係るフレキシブルケーブルの模式的A−A断面図である。It is typical AA sectional view of the flexible cable concerning a 1st embodiment. 第1の実施形態に係るフレキシブルケーブルの製造方法を示す模式的断面図である。It is typical sectional drawing which shows the manufacturing method of the flexible cable which concerns on 1st Embodiment. 第1の実施形態に係るフレキシブルケーブルの製造方法を示す模式的断面図である。It is typical sectional drawing which shows the manufacturing method of the flexible cable which concerns on 1st Embodiment. 第1の実施形態に係るフレキシブルケーブルと回路基板との接合方法を示す模式的断面図である。It is typical sectional drawing which shows the joining method of the flexible cable and circuit board which concern on 1st Embodiment. 第2の実施形態に係る多層基板の模式的断面図である。It is a typical sectional view of a multilayer substrate concerning a 2nd embodiment. 第2の実施形態に係る多層基板の製造方法を示す模式的断面図である。It is typical sectional drawing which shows the manufacturing method of the multilayer substrate which concerns on 2nd Embodiment. 第2の実施形態に係る多層基板の製造方法を示す模式的断面図である。It is typical sectional drawing which shows the manufacturing method of the multilayer substrate which concerns on 2nd Embodiment. 第3の実施形態に係る多層基板の端部付近を示す分解平面図である。It is a disassembled plan view which shows the edge part vicinity of the multilayer substrate which concerns on 3rd Embodiment.

《第1の実施形態》
本発明の第1の実施形態に係るフレキシブルケーブル10について説明する。フレキシブルケーブル10は本発明の多層基板の一例である。図1は、フレキシブルケーブル10の端部付近を示す外観斜視図である。図2は、フレキシブルケーブル10の端部付近を示す分解斜視図である。図3は、フレキシブルケーブル10の端部付近を示す分解平面図である。
<< First Embodiment >>
A flexible cable 10 according to a first embodiment of the present invention will be described. The flexible cable 10 is an example of the multilayer board of the present invention. FIG. 1 is an external perspective view showing the vicinity of the end of the flexible cable 10. FIG. 2 is an exploded perspective view showing the vicinity of the end of the flexible cable 10. FIG. 3 is an exploded plan view showing the vicinity of the end of the flexible cable 10.

フレキシブルケーブル10は、矩形平板状であり、長手方向に長く延伸している。フレキシブルケーブル10は、絶縁層11Aおよび絶縁層11Bを積層してなる積層体16を備える。フレキシブルケーブル10では、絶縁層11Bの上面に絶縁層11Aが積層されている。フレキシブルケーブル10の端部の上面には、外部電極21Aおよび外部電極21Bが形成されている。フレキシブルケーブル10には、絶縁層11A、絶縁層11B、外部電極21Aおよび線状導体22Aを積層方向に貫通するスルーホール12Aが形成され、絶縁層11A、絶縁層11B、外部電極21Bおよび線状導体22Bを積層方向に貫通するスルーホール12Bが形成されている。スルーホール12Aおよびスルーホール12Bは本発明の層間接続貫通部の一例である。   The flexible cable 10 has a rectangular flat plate shape and extends long in the longitudinal direction. The flexible cable 10 includes a laminate 16 formed by laminating an insulating layer 11A and an insulating layer 11B. In the flexible cable 10, the insulating layer 11A is laminated on the upper surface of the insulating layer 11B. An external electrode 21A and an external electrode 21B are formed on the upper surface of the end portion of the flexible cable 10. The flexible cable 10 has a through hole 12A that penetrates the insulating layer 11A, the insulating layer 11B, the external electrode 21A, and the linear conductor 22A in the stacking direction. The insulating layer 11A, the insulating layer 11B, the external electrode 21B, and the linear conductor A through hole 12B penetrating 22B in the stacking direction is formed. The through hole 12A and the through hole 12B are examples of the interlayer connection through portion of the present invention.

絶縁層11Aおよび絶縁層11Bは、矩形平板状であり、長手方向に長く延伸している。絶縁層11Aおよび絶縁層11Bは液晶(LCP)やポリイミド(PI)のような熱可塑性樹脂等を材料とする。外部電極21Aおよび外部電極21Bは、矩形平板状であり、その長辺が絶縁層11Aの長辺に沿うように、絶縁層11Aの長手方向に並んで配置されている。   The insulating layer 11A and the insulating layer 11B have a rectangular flat plate shape and extend long in the longitudinal direction. The insulating layer 11A and the insulating layer 11B are made of a thermoplastic resin such as liquid crystal (LCP) or polyimide (PI). The external electrode 21A and the external electrode 21B have a rectangular flat plate shape, and are arranged side by side in the longitudinal direction of the insulating layer 11A so that the long side is along the long side of the insulating layer 11A.

絶縁層11Bの下面には、線状導体22Aおよび線状導体22Bが形成されている。線状導体22Aは、絶縁層11Bの長手方向に延伸するように形成されている。スルーホール12Aは線状導体22Aの端部を貫通している。線状導体22Bは、線状導体22Aに対して平行に延伸するように形成されている。線状導体22Bの一部は、絶縁層11Bの端部で絶縁層11Bの短手方向に延伸している。スルーホール12Bは線状導体22Bの端部を貫通している。絶縁層11Bの下面には、線状導体22Aおよび線状導体22Bを保護するためのレジスト(図示せず)が形成されている。   A linear conductor 22A and a linear conductor 22B are formed on the lower surface of the insulating layer 11B. The linear conductor 22A is formed so as to extend in the longitudinal direction of the insulating layer 11B. The through hole 12A penetrates the end of the linear conductor 22A. The linear conductor 22B is formed to extend parallel to the linear conductor 22A. A part of the linear conductor 22B extends in the lateral direction of the insulating layer 11B at the end of the insulating layer 11B. The through hole 12B penetrates the end of the linear conductor 22B. A linear conductor 22A and a resist (not shown) for protecting the linear conductor 22B are formed on the lower surface of the insulating layer 11B.

外部電極21Aと線状導体22Aとは、8つの層間接続導体13Aにより接続されている。層間接続導体13Aは、積層方向に向けて絶縁層11Aおよび絶縁層11Bを貫通している。層間接続導体13Aは、平面視で、スルーホール12Aを囲むように複数形成され、外部電極21Aおよび線状導体22Aに重なっている。すなわち、層間接続導体13Aは、スルーホール12Aの近傍に形成され、積層方向に絶縁層11Aおよび絶縁層11Bを貫通している。層間接続導体13Aは、平面視で貫通部分に沿って複数形成されている。   The external electrode 21A and the linear conductor 22A are connected by eight interlayer connection conductors 13A. The interlayer connection conductor 13A passes through the insulating layer 11A and the insulating layer 11B in the stacking direction. A plurality of interlayer connection conductors 13A are formed so as to surround the through hole 12A in plan view, and overlap the external electrode 21A and the linear conductor 22A. That is, the interlayer connection conductor 13A is formed in the vicinity of the through hole 12A and penetrates the insulating layer 11A and the insulating layer 11B in the stacking direction. A plurality of interlayer connection conductors 13A are formed along the penetrating portion in plan view.

外部電極21Bと線状導体22Bとは、8つの層間接続導体13Bにより接続されている。層間接続導体13Bは、積層方向に向けて絶縁層11Aおよび絶縁層11Bを貫通している。層間接続導体13Bは、平面視で、スルーホール12Bを囲むように形成され、外部電極21Bおよび線状導体22Bに重なっている。層間接続導体13Aおよび層間接続導体13Bは、ビアホールに充填された導電ペーストが硬化することで形成される。   The external electrode 21B and the linear conductor 22B are connected by eight interlayer connection conductors 13B. The interlayer connection conductor 13B penetrates the insulating layer 11A and the insulating layer 11B in the stacking direction. The interlayer connection conductor 13B is formed so as to surround the through hole 12B in plan view, and overlaps the external electrode 21B and the linear conductor 22B. The interlayer connection conductor 13A and the interlayer connection conductor 13B are formed by curing the conductive paste filled in the via holes.

図4は、フレキシブルケーブル10の模式的A−A断面図である。外部電極21Aと線状導体22Aとはスルーホール12Aの内壁部分により接続されている。外部電極21Aは、メッキ膜15で被覆された導体箔14Aからなる。線状導体22Aは、メッキ膜15で被覆された導体箔14Bからなる。線状導体22Bは、メッキ膜15で被覆された導体箔14Cからなる。   FIG. 4 is a schematic AA cross-sectional view of the flexible cable 10. The external electrode 21A and the linear conductor 22A are connected by the inner wall portion of the through hole 12A. The external electrode 21A is made of a conductor foil 14A covered with a plating film 15. The linear conductor 22A is made of a conductor foil 14B covered with a plating film 15. The linear conductor 22B is made of a conductor foil 14C covered with a plating film 15.

スルーホール12Aは、貫通孔17の内壁にメッキ膜15が形成されてなる。メッキ膜15は導体箔14Aと導体箔14Bとを接続している。すなわち、スルーホール12Aは、積層体16を積層方向に貫通する貫通孔17を有する。スルーホール12Aには、積層体16の両主面に位置する導体箔14Aおよび導体箔14Bを互いに接続するように貫通孔17の側壁にメッキ膜15が形成されている。貫通孔17は本発明の貫通部分の一例である。導体箔14A、導体箔14Bおよび導体箔14Cは銅箔等からなる。メッキ膜15は、電解メッキ(電析)された金属膜等からなる。   The through hole 12 </ b> A has a plating film 15 formed on the inner wall of the through hole 17. The plating film 15 connects the conductor foil 14A and the conductor foil 14B. That is, the through hole 12A has a through hole 17 that penetrates the stacked body 16 in the stacking direction. In the through hole 12A, a plating film 15 is formed on the side wall of the through hole 17 so as to connect the conductor foil 14A and the conductor foil 14B located on both main surfaces of the laminate 16 to each other. The through hole 17 is an example of the through portion of the present invention. Conductor foil 14A, conductor foil 14B, and conductor foil 14C are made of copper foil or the like. The plated film 15 is made of an electroplated (electrodeposited) metal film or the like.

導体箔14Aは絶縁層11Aの上面に形成されている。導体箔14Bは、平面視で導体箔14Aと重なるように絶縁層11Bの下面に形成されている。導体箔14Aおよび導体箔14Bは貫通孔17により貫通されている。導体箔14Aおよび導体箔14Bは層間接続導体13Aに接合している。積層体16の両主面に位置する導体箔14Aと導体箔14Bとは層間接続導体13Aを介して互いに接続されている。層間接続導体13Aは、絶縁層11Aの下面から上面に向けて先細りになっており、絶縁層11Bの上面から下面に向けて先細りになっている。メッキ膜15は、導体箔14A、導体箔14Bおよび貫通孔17の内壁を連続的に被覆している。すなわち、メッキ膜15は、貫通孔17の側壁ならびに積層体16の両主面に位置する導体箔14Aおよび導体箔14B上を被覆するように形成されている。なお、スルーホール12B付近の構造はスルーホール12A付近の構造と同様に形成されている。   The conductor foil 14A is formed on the upper surface of the insulating layer 11A. The conductor foil 14B is formed on the lower surface of the insulating layer 11B so as to overlap the conductor foil 14A in plan view. The conductor foil 14 </ b> A and the conductor foil 14 </ b> B are penetrated by the through hole 17. The conductor foil 14A and the conductor foil 14B are joined to the interlayer connection conductor 13A. The conductor foil 14A and the conductor foil 14B located on both main surfaces of the multilayer body 16 are connected to each other via the interlayer connection conductor 13A. The interlayer connection conductor 13A tapers from the lower surface of the insulating layer 11A toward the upper surface, and tapers from the upper surface of the insulating layer 11B toward the lower surface. The plating film 15 continuously covers the inner walls of the conductor foil 14 </ b> A, the conductor foil 14 </ b> B, and the through hole 17. That is, the plating film 15 is formed so as to cover the conductor foil 14 </ b> A and the conductor foil 14 </ b> B located on the side wall of the through hole 17 and both main surfaces of the multilayer body 16. The structure near the through hole 12B is formed in the same manner as the structure near the through hole 12A.

図5および図6は、フレキシブルケーブル10の製造方法を示す模式的断面図である。まず、図5(A)に示すように、導体箔14Aと、外部電極21B(図1参照)のための導体箔とが片面に形成された基材25Aを用意する。基材25Aは、液晶(LCP)やポリイミド(PI)のような熱可塑性樹脂等を材料とする。以下では、基材の主面のうち導体箔が形成された主面を第1主面と称し、導体箔が形成されていない主面を第2主面と称する。   5 and 6 are schematic cross-sectional views illustrating a method for manufacturing the flexible cable 10. First, as shown in FIG. 5A, a base material 25A in which a conductor foil 14A and a conductor foil for the external electrode 21B (see FIG. 1) are formed on one side is prepared. The base material 25A is made of a thermoplastic resin such as liquid crystal (LCP) or polyimide (PI). Below, the main surface in which conductor foil was formed among the main surfaces of a base material is called a 1st main surface, and the main surface in which conductor foil is not formed is called a 2nd main surface.

次に、図5(B)に示すように、基材25Aの第1主面側から第2主面側に向けてパンチ29を押し出すことにより、導体箔14Aおよび基材25Aを貫通する貫通孔26Aを形成する。次に、図5(C)および図5(D)に示すように、基材25Aの上下を反転させ、基材25Aの第2主面側から第1主面側に向けてレーザを照射することにより、平面視で貫通孔26Aを囲むようにビアホール27を形成する。この際、レーザが基材25Aを貫通するが、導体箔14Aを貫通しないように、レーザの出力を調整する。これにより、第2主面側から第1主面側に向けて基材25Aを貫通し、底面が導体箔14Aからなるビアホール27が形成される。なお、ビアホール27を形成するために、レーザ加工に代えてエッチング技術等を用いてもよい。次に、図5(E)に示すように、ビアホール27に導電ペースト28Aを充填する。導電ペースト28Aは、例えば、スズや銅を主成分とした導電性材料からなる。   Next, as shown in FIG. 5 (B), the punch 29 is pushed out from the first main surface side of the base material 25A toward the second main surface side, thereby penetrating through the conductor foil 14A and the base material 25A. 26A is formed. Next, as shown in FIGS. 5C and 5D, the base material 25A is turned upside down, and the laser is irradiated from the second main surface side of the base material 25A toward the first main surface side. Thus, the via hole 27 is formed so as to surround the through hole 26A in plan view. At this time, the laser output is adjusted so that the laser penetrates the base material 25A but does not penetrate the conductor foil 14A. As a result, a via hole 27 is formed which penetrates the base material 25A from the second main surface side toward the first main surface side and whose bottom surface is made of the conductor foil 14A. In order to form the via hole 27, an etching technique or the like may be used instead of laser processing. Next, as shown in FIG. 5E, the via hole 27 is filled with a conductive paste 28A. The conductive paste 28A is made of, for example, a conductive material whose main component is tin or copper.

次に、図6(A)に示すように、図5(A)〜図5(E)に示す工程と同様の工程により、導体箔14Bおよび導体箔14Cが片面に形成された基材25Bに貫通孔26Bおよびビアホールを形成し、そのビアホールに導電ペースト28Bを充填する。そして、基材25Aおよび基材25Bの第2主面同士を向かい合わせて、基材25Aおよび基材25Bを積層する。この際、平面視で基材25Aに形成された貫通孔26Aと基材25Bに形成された貫通孔26Bとが重なるようにする。   Next, as shown in FIG. 6 (A), the conductive foil 14B and the conductive foil 14C are formed on one side by the same process as the process shown in FIGS. 5 (A) to 5 (E). A through hole 26B and a via hole are formed, and the via hole is filled with a conductive paste 28B. Then, the second main surfaces of the base material 25A and the base material 25B face each other, and the base material 25A and the base material 25B are laminated. At this time, the through hole 26A formed in the base material 25A and the through hole 26B formed in the base material 25B overlap each other in plan view.

次に、図6(B)に示すように、基材25Aおよび基材25Bを構成する熱可塑性樹脂が十分に軟化する温度で、積層された基材25Aおよび基材25Bを加熱しながら同時に加圧する(加熱圧着する)。これにより、基材25Aおよび基材25Bが一体化し、絶縁層11Aおよび絶縁層11Bが形成される。また、導電ペースト28Aおよび導電ペースト28Bが硬化し、一体化することで、導体箔14Aおよび導体箔14Bに接合する層間接続導体13Aが形成される。また、絶縁層11Aおよび絶縁層11Bを貫通する貫通孔17が形成される。   Next, as shown in FIG. 6B, the laminated base material 25A and the base material 25B are simultaneously heated while being heated at a temperature at which the thermoplastic resin constituting the base material 25A and the base material 25B is sufficiently softened. Press (heat pressure bonding). Thereby, base material 25A and base material 25B are integrated, and insulating layer 11A and insulating layer 11B are formed. In addition, the conductive paste 28A and the conductive paste 28B are cured and integrated, whereby the conductive foil 14A and the interlayer connection conductor 13A joined to the conductive foil 14B are formed. Further, a through hole 17 penetrating the insulating layer 11A and the insulating layer 11B is formed.

次に、図6(C)に示すように、電解メッキにより、導体箔14A、導体箔14Bおよび導体箔14Cの表面にメッキ膜15を形成する。この際、導体箔14Aと導体箔14Bとが層間接続導体13Aにより接続され、導体箔14Aと導体箔14Bとをほぼ同電位することができるので、貫通孔17の内壁にもメッキ膜15が形成される。これにより、スルーホール12Aが形成される。なお、スルーホール12B(図2参照)は、上述の工程と並行して、上述の工程と同様の工程により形成される。以上の工程により、フレキシブルケーブル10が完成する。   Next, as shown in FIG. 6C, a plating film 15 is formed on the surfaces of the conductor foil 14A, the conductor foil 14B, and the conductor foil 14C by electrolytic plating. At this time, the conductor foil 14A and the conductor foil 14B are connected by the interlayer connection conductor 13A, and the conductor foil 14A and the conductor foil 14B can be almost at the same potential, so that the plating film 15 is also formed on the inner wall of the through hole 17. Is done. Thereby, the through hole 12A is formed. The through hole 12B (see FIG. 2) is formed by the same process as the above process in parallel with the above process. The flexible cable 10 is completed through the above steps.

図7は、フレキシブルケーブル10と回路基板31との接合方法を示す模式的断面図である。まず、図7(A)に示すように、回路基板31の上面に形成された電極に半田32を印刷する。そして、平面視でフレキシブルケーブル10のスルーホール12Aと半田32とが重なるように、回路基板31の上面にフレキシブルケーブル10を配置する。次に、図7(B)に示すように、リフロー加熱により半田32を溶かす。スルーホール12Aの内壁面がメッキ膜15で形成されているので、半田32はスルーホール12A内に濡れ性良く濡れ広がる。半田32は、スルーホール12Aに充填されるとともに、フレキシブルケーブル10の上面まで到達する。このようにして、フレキシブルケーブル10と回路基板31とが接合される。   FIG. 7 is a schematic cross-sectional view showing a method for joining the flexible cable 10 and the circuit board 31. First, as shown in FIG. 7A, the solder 32 is printed on the electrode formed on the upper surface of the circuit board 31. And the flexible cable 10 is arrange | positioned on the upper surface of the circuit board 31 so that the through-hole 12A and the solder 32 of the flexible cable 10 may overlap with planar view. Next, as shown in FIG. 7B, the solder 32 is melted by reflow heating. Since the inner wall surface of the through hole 12A is formed of the plated film 15, the solder 32 spreads in the through hole 12A with good wettability. The solder 32 fills the through hole 12 </ b> A and reaches the upper surface of the flexible cable 10. Thus, the flexible cable 10 and the circuit board 31 are joined.

第1の実施形態では、図4とともに述べたように、導体箔14Aと導体箔14Bとが層間接続導体13Aにより接続される。このため、スルーホール12Aの近傍において導体箔14Aと導体箔14Bとをほぼ同電位にすることができる。これにより、貫通孔17の側壁にメッキ膜15を形成する際、無電解メッキを行わずに電解メッキにより貫通孔17の側壁にメッキ膜15を形成し易くなる。なお、上述の押出加工により、導体箔14Aおよび導体箔14Bが貫通孔17内に幾分押し込まれるので、貫通孔17内における導体箔14Aと導体箔14Bとの距離が短くなる。このため、貫通孔17の内壁にメッキ膜15が形成されやすくなる。   In the first embodiment, as described in conjunction with FIG. 4, the conductor foil 14A and the conductor foil 14B are connected by the interlayer connection conductor 13A. For this reason, the conductor foil 14A and the conductor foil 14B can be set to substantially the same potential in the vicinity of the through hole 12A. Thereby, when forming the plating film 15 on the side wall of the through-hole 17, it becomes easy to form the plating film 15 on the side wall of the through-hole 17 by electroplating without performing electroless plating. Note that the conductor foil 14A and the conductor foil 14B are somewhat pushed into the through hole 17 by the above-described extrusion process, so the distance between the conductor foil 14A and the conductor foil 14B in the through hole 17 is shortened. For this reason, the plating film 15 is easily formed on the inner wall of the through hole 17.

また、スルーホール12Aの周囲に層間接続導体13Aが形成されている。層間接続導体13Aは絶縁層11Aおよび絶縁層11Bに比べて硬質である。このため、スルーホール12Aの変形を抑制することができ、延いては、貫通孔17の内壁に形成されたメッキ膜15の断線を起こりにくくすることができる。なお、スルーホール12Aの近傍に補強材をさらに配置してもよい。補強材は、絶縁層11Aおよび絶縁層11Bに比べて硬質であれば、樹脂材料から形成されてもよい。   An interlayer connection conductor 13A is formed around the through hole 12A. The interlayer connection conductor 13A is harder than the insulating layers 11A and 11B. For this reason, the deformation of the through hole 12A can be suppressed, and consequently, the disconnection of the plating film 15 formed on the inner wall of the through hole 17 can be made difficult to occur. A reinforcing material may be further disposed in the vicinity of the through hole 12A. The reinforcing material may be made of a resin material as long as it is harder than the insulating layers 11A and 11B.

また、導体箔14Aおよび導体箔14Bは層間接続導体13Aに接合している。このため、スルーホール12Aの近傍において、導体箔14Aおよび導体箔14Bが絶縁層11Aおよび絶縁層11Bから剥離することを防止することができる。   The conductor foil 14A and the conductor foil 14B are joined to the interlayer connection conductor 13A. For this reason, it is possible to prevent the conductor foil 14A and the conductor foil 14B from being separated from the insulating layer 11A and the insulating layer 11B in the vicinity of the through hole 12A.

また、図6とともに述べたように、スルーホール12Aの内壁面にメッキ膜15が形成されているので、半田32はスルーホール12A内に濡れ広がりやすい。このため、メッキ膜15で被覆されたスルーホール12Aの内壁と半田32とが確実に接合されるので、スルーホール12Aを介した強固な接合を行うことができる。また、スルーホール12A内で半田32が濡れているかを、上から見て確認することができる。   In addition, as described with FIG. 6, since the plating film 15 is formed on the inner wall surface of the through hole 12A, the solder 32 is likely to spread in the through hole 12A. For this reason, since the inner wall of the through hole 12A covered with the plating film 15 and the solder 32 are reliably bonded, it is possible to perform strong bonding through the through hole 12A. Further, it can be confirmed from above whether the solder 32 is wet in the through hole 12A.

《第2の実施形態》
本発明の第2の実施形態に係る多層基板40について説明する。図8は多層基板40の模式的断面図である。多層基板40は、上から順に絶縁層41A〜絶縁層41Cを積層してなる積層体46を備える。絶縁層41Aの上面には導体箔44Aが形成されている。絶縁層41Aと絶縁層41Bとの間には導体箔44Bが形成されている。絶縁層41Cの下面には導体箔44Cが形成されている。
<< Second Embodiment >>
A multilayer substrate 40 according to a second embodiment of the present invention will be described. FIG. 8 is a schematic cross-sectional view of the multilayer substrate 40. The multilayer substrate 40 includes a laminated body 46 formed by laminating insulating layers 41A to 41C in order from the top. A conductive foil 44A is formed on the upper surface of the insulating layer 41A. A conductor foil 44B is formed between the insulating layer 41A and the insulating layer 41B. A conductive foil 44C is formed on the lower surface of the insulating layer 41C.

多層基板40は、貫通孔47の内壁にメッキ膜45が形成されてなるスルーホール42を備える。貫通孔47は絶縁層41A〜絶縁層41Cおよび導体箔44A〜導体箔44Cを積層方向に貫通する。メッキ膜45は、導体箔44A、導体箔44Cおよび貫通孔47の内壁を連続的に被覆している。すなわち、スルーホール42は、積層体46を積層方向に貫通する貫通孔47を有する。スルーホール42には、積層体46の両主面に位置する導体箔44Aおよび導体箔44Cを互いに接続するように貫通孔47の側壁にメッキ膜45が形成されている。   The multilayer substrate 40 includes a through hole 42 in which a plating film 45 is formed on the inner wall of the through hole 47. The through-hole 47 penetrates the insulating layers 41A to 41C and the conductor foils 44A to 44C in the stacking direction. The plating film 45 continuously covers the inner walls of the conductor foil 44 </ b> A, the conductor foil 44 </ b> C, and the through hole 47. That is, the through hole 42 has a through hole 47 that penetrates the stacked body 46 in the stacking direction. In the through hole 42, a plating film 45 is formed on the side wall of the through hole 47 so as to connect the conductor foil 44 </ b> A and the conductor foil 44 </ b> C located on both main surfaces of the multilayer body 46.

平面視でスルーホール42を囲むように、層間接続導体43Aおよび層間接続導体43Bが複数形成されている。層間接続導体43Aは、絶縁層41Aを積層方向に貫通し、導体箔44Aおよび導体箔44Bに接合している。導体箔44Aと導体箔44Bとは層間接続導体43Aにより接続されている。層間接続導体43Bは、絶縁層41Bおよび絶縁層41Cを積層方向に貫通し、導体箔44Bおよび導体箔44Cに接合している。導体箔44Bと導体箔44Cとは層間接続導体43Bにより接続されている。層間接続導体43Aと層間接続導体43Bとは平面視で重なっている。   A plurality of interlayer connection conductors 43A and interlayer connection conductors 43B are formed so as to surround the through hole 42 in plan view. The interlayer connection conductor 43A penetrates the insulating layer 41A in the stacking direction and is joined to the conductor foil 44A and the conductor foil 44B. The conductor foil 44A and the conductor foil 44B are connected by an interlayer connection conductor 43A. The interlayer connection conductor 43B penetrates the insulating layer 41B and the insulating layer 41C in the stacking direction, and is joined to the conductor foil 44B and the conductor foil 44C. The conductor foil 44B and the conductor foil 44C are connected by an interlayer connection conductor 43B. The interlayer connection conductor 43A and the interlayer connection conductor 43B overlap in plan view.

すなわち、層間接続導体43Aおよび層間接続導体43Bは、スルーホール42の近傍に形成され、積層方向に絶縁層41A〜絶縁層41Cを貫通している。積層体46の両主面に位置する導体箔44Aおよび導体箔44Cは層間接続導体43Aおよび層間接続導体43Bを介して互いに接続されている。   That is, the interlayer connection conductor 43A and the interlayer connection conductor 43B are formed in the vicinity of the through hole 42 and penetrate the insulating layers 41A to 41C in the stacking direction. The conductor foil 44A and the conductor foil 44C located on both main surfaces of the multilayer body 46 are connected to each other via the interlayer connection conductor 43A and the interlayer connection conductor 43B.

図9および図10は、多層基板40の製造方法を示す模式的断面図である。まず、図9(A)に示すように、片面に導体箔44Aが形成された基材46Aを用意する。次に、図9(B)に示すように、基材46Aの第2主面側から第1主面側に向けてレーザを照射することにより、所定位置にビアホール49を形成する。次に、図9(C)に示すように、ビアホール49に導電ペースト48Aを充填する。   9 and 10 are schematic cross-sectional views showing a method for manufacturing the multilayer substrate 40. First, as shown in FIG. 9A, a base material 46A having a conductor foil 44A formed on one side is prepared. Next, as shown in FIG. 9B, a via hole 49 is formed at a predetermined position by irradiating a laser from the second main surface side of the base material 46A toward the first main surface side. Next, as shown in FIG. 9C, the via hole 49 is filled with a conductive paste 48A.

次に、図9(D)に示すように、図9(A)〜図9(C)に示す工程と同様の工程により、片面に導体箔44Bが形成された基材46Bにビアホールを形成し、そのビアホールに導電ペースト48Bを充填する。また、片面に導体箔44Cが形成された基材46Cにビアホールを形成し、そのビアホールに導電ペースト48Cを充填する。そして、基材46Aの第2主面と基材46Bの第1主面とが向かい合い、基材46Bおよび基材46Cの第2主面同士が向かい合うように、基材46A〜基材46Cを積層する。   Next, as shown in FIG. 9 (D), via holes are formed in the base material 46B having the conductor foil 44B formed on one side by the same processes as those shown in FIGS. 9 (A) to 9 (C). The via hole is filled with a conductive paste 48B. Also, a via hole is formed in the base material 46C having the conductor foil 44C formed on one side, and the via hole is filled with a conductive paste 48C. Then, the base materials 46A to 46C are laminated so that the second main surface of the base material 46A and the first main surface of the base material 46B face each other, and the second main surfaces of the base material 46B and the base material 46C face each other. To do.

次に、図9(E)に示すように、基材46A〜基材46Cを構成する熱可塑性樹脂が十分に軟化する温度で、積層された基材46A〜基材46Cを加熱しながら同時に加圧する。これにより、基材46A〜基材46Cが一体化し、絶縁層41A〜絶縁層41Cが形成される。また、導電ペースト48A〜導電ペースト48Cが硬化することで、層間接続導体43Aおよび層間接続導体43Bが形成される。   Next, as shown in FIG. 9E, the laminated base materials 46A to 46C are simultaneously heated while being heated at a temperature at which the thermoplastic resins constituting the base materials 46A to 46C are sufficiently softened. Press. Thereby, base material 46A-base material 46C are integrated, and insulating layer 41A-insulating layer 41C are formed. Also, the conductive paste 48A to conductive paste 48C are cured, whereby the interlayer connection conductor 43A and the interlayer connection conductor 43B are formed.

次に、図10(A)および図10(B)に示すように、絶縁層41A〜絶縁層41Cおよび導体箔44A〜導体箔44Cを積層方向に貫通するようにパンチ29を押し出すことにより、貫通孔47を形成する。次に、図10(C)に示すように、電解メッキにより、導体箔44A、導体箔44Cおよび貫通孔47の内壁にメッキ膜45を形成する。以上の工程により、スルーホール42が形成された多層基板40が完成する。   Next, as shown in FIG. 10 (A) and FIG. 10 (B), the punch 29 is pushed through the insulating layer 41A to the insulating layer 41C and the conductor foil 44A to the conductor foil 44C in the laminating direction. A hole 47 is formed. Next, as shown in FIG. 10C, a plating film 45 is formed on the inner walls of the conductor foil 44A, the conductor foil 44C, and the through hole 47 by electrolytic plating. Through the above steps, the multilayer substrate 40 in which the through holes 42 are formed is completed.

各基材に貫通孔を形成した後、各基材を加熱圧着することで、多層基板にスルーホールを形成する場合、加熱圧着時に貫通孔が塞がるおそれがある。第2の実施形態では、基材46A〜基材46Cを加熱圧着してから、貫通孔47を形成する。このため、スルーホール42を確実に形成することができる。   When a through hole is formed in a multilayer substrate by forming each through hole in each base material and then thermocompression bonding the base material, the through hole may be blocked during the thermocompression bonding. In the second embodiment, the through-hole 47 is formed after the base material 46A to the base material 46C are thermocompression bonded. For this reason, the through hole 42 can be reliably formed.

また、層間接続導体43Aおよび層間接続導体43Bを形成した後、押出加工により貫通孔47を形成する。このため、押出加工する部分の周囲が層間接続導体43Aおよび層間接続導体43Bにより補強されるので、貫通孔47を形成しやすくなる。   Further, after forming the interlayer connection conductor 43A and the interlayer connection conductor 43B, the through hole 47 is formed by extrusion. For this reason, since the periphery of the part to be extruded is reinforced by the interlayer connection conductor 43A and the interlayer connection conductor 43B, the through hole 47 can be easily formed.

また、導体箔44A〜導体箔44Cは、層間接続導体43Aおよび層間接続導体43Bにより接続されている。そして、電解メッキの開始時、導体箔44Bは貫通孔47の内壁に露出しているので、貫通孔47の内壁部分において、導体箔44A〜導体箔44Cの間隔は狭くなっている。このため、貫通孔47の内壁にメッキ膜45を形成しやすくなる。   The conductor foils 44A to 44C are connected by the interlayer connection conductor 43A and the interlayer connection conductor 43B. Since the conductive foil 44B is exposed on the inner wall of the through hole 47 at the start of electrolytic plating, the interval between the conductive foil 44A to the conductive foil 44C is narrowed in the inner wall portion of the through hole 47. For this reason, it becomes easy to form the plating film 45 on the inner wall of the through hole 47.

《第3の実施形態》
本発明の第3の実施形態に係る多層基板50について説明する。図11は多層基板50の端部付近を示す分解平面図である。多層基板50は絶縁層51Bの上面に絶縁層51Aを積層してなる積層体を備える。積層体の縁には切欠部52が形成されている。絶縁層51Aの上面の縁には導体箔54Aが形成されている。絶縁層51Bの下面には、その縁から絶縁層51Bの長手方向に沿って延伸する導体箔54Bが形成されている。切欠部52は、絶縁層51A、絶縁層51B、導体箔54Aおよび導体箔54Bを積層方向に貫通している。
<< Third Embodiment >>
A multilayer substrate 50 according to a third embodiment of the present invention will be described. FIG. 11 is an exploded plan view showing the vicinity of the end of the multilayer substrate 50. The multilayer substrate 50 includes a laminate formed by laminating an insulating layer 51A on the upper surface of the insulating layer 51B. A cutout 52 is formed at the edge of the laminate. A conductor foil 54A is formed on the edge of the upper surface of the insulating layer 51A. On the lower surface of the insulating layer 51B, a conductor foil 54B extending from the edge along the longitudinal direction of the insulating layer 51B is formed. The notch 52 passes through the insulating layer 51A, the insulating layer 51B, the conductor foil 54A, and the conductor foil 54B in the stacking direction.

平面視で切欠部52を囲むように、3つの層間接続導体53が形成されている。層間接続導体53は、絶縁層51Aおよび絶縁層51Bを積層方向に貫通し、導体箔54Aおよび導体箔54Bに接合している。導体箔54Aと導体箔54Bとは層間接続導体53により接続されている。導体箔54A、導体箔54Bおよび切欠部52の側壁は、メッキ膜(図示せず)により連続的に被覆している。   Three interlayer connection conductors 53 are formed so as to surround the notch 52 in plan view. The interlayer connection conductor 53 penetrates the insulating layer 51A and the insulating layer 51B in the stacking direction, and is joined to the conductor foil 54A and the conductor foil 54B. The conductor foil 54A and the conductor foil 54B are connected by an interlayer connection conductor 53. The side walls of the conductor foil 54A, the conductor foil 54B, and the notch 52 are continuously covered with a plating film (not shown).

すなわち、多層基板50は、絶縁層51Aおよび絶縁層51Bを積層してなる積層体を備える。積層体には、積層体を積層方向に貫通する切欠部52を有し、積層体の両主面に位置する導体箔54Aおよび導体箔54Bを互いに接続するように切欠部52の側壁にメッキ膜が形成されている層間接続貫通部が形成されている。層間接続導体53は、層間接続貫通部の近傍に形成され、積層方向に絶縁層51Aおよび絶縁層51Bを貫通している。積層体の両主面に位置する導体箔54Aおよび導体箔54Bは、層間接続導体53を介して互いに接続されている。   That is, the multilayer substrate 50 includes a stacked body formed by stacking the insulating layers 51A and 51B. The laminate has a cutout portion 52 that penetrates the laminate in the stacking direction, and a plating film is formed on the side wall of the cutout portion 52 so as to connect the conductor foil 54A and the conductor foil 54B located on both main surfaces of the laminate. An interlayer connection through portion in which is formed is formed. The interlayer connection conductor 53 is formed in the vicinity of the interlayer connection through portion, and penetrates the insulating layer 51A and the insulating layer 51B in the stacking direction. The conductor foil 54 </ b> A and the conductor foil 54 </ b> B located on both main surfaces of the multilayer body are connected to each other via the interlayer connection conductor 53.

10…フレキシブルケーブル
11A,11B,41A〜41C,51A,51B…絶縁層
12A,12B,42…スルーホール(層間接続貫通部)
13A,13B,43A,43B,53…層間接続導体
14A〜14C,44A〜44C,54A,54B…導体箔
15,45…メッキ膜(金属膜)
16,46…積層体
17,47…貫通孔(貫通部分)
21A,21B…外部電極
22A,22B…線状導体
25A,25B,46A〜46C…基材
26A,26B…貫通孔
27,49…ビアホール
28A,28B,48A〜48C…導電ペースト
29…パンチ
31…回路基板
32…半田
40,50…多層基板
52…切欠部
10 ... Flexible cables 11A, 11B, 41A to 41C, 51A, 51B ... Insulating layers 12A, 12B, 42 ... Through-hole (interlayer connection penetration)
13A, 13B, 43A, 43B, 53 ... Interlayer connection conductors 14A-14C, 44A-44C, 54A, 54B ... Conductive foils 15, 45 ... Plating film (metal film)
16, 46 ... Laminated body 17, 47 ... Through-hole (penetration part)
21A, 21B ... external electrodes 22A, 22B ... linear conductors 25A, 25B, 46A-46C ... base materials 26A, 26B ... through holes 27, 49 ... via holes 28A, 28B, 48A-48C ... conductive paste 29 ... punch 31 ... circuit Substrate 32 ... solder 40, 50 ... multilayer substrate 52 ... notch

Claims (6)

フレキシブル多層基板および回路基板を備え、
前記フレキシブル多層基板は、
複数の絶縁層を積層してなる積層体と、
前記積層体を積層方向に貫通する貫通部分を有し、前記積層体の両主面に位置する導体箔を互いに接続するように前記貫通部分の側壁に金属膜が形成された層間接続貫通部と、
ビアホールに充填された導電ペーストが硬化することで形成されている、層間接続導体と、を備え、
前記層間接続貫通部の近傍に前記層間接続導体は前記層間接続貫通部に対して直接接しないように形成され、
前記層間接続導体は、平面視で前記貫通部分に沿って複数形成され、
前記積層体の両主面に位置する前記導体箔は、前記層間接続導体を介して互いに接続され、
前記フレキシブル多層基板と前記回路基板とは、前記層間接続貫通部内に侵入している半田を介して接合されている、フレキシブル多層基板と回路基板の接合構造。
With a flexible multilayer board and circuit board,
The flexible multilayer substrate is
A laminate formed by laminating a plurality of insulating layers;
An interlayer connection through part having a through part penetrating the laminated body in the laminating direction and having a metal film formed on a side wall of the through part so as to connect conductor foils located on both principal surfaces of the laminated body; ,
An interlayer connection conductor formed by curing the conductive paste filled in the via hole,
The interlayer connection conductor is formed in the vicinity of the interlayer connection through portion so as not to directly contact the interlayer connection through portion,
A plurality of the interlayer connection conductors are formed along the penetrating portion in plan view,
The conductor foils located on both main surfaces of the laminate are connected to each other via the interlayer connection conductor,
The flexible multilayer substrate and the circuit board are bonded to each other through a solder penetrating into the interlayer connection through portion.
前記層間接続導体は、前記貫通部分が形成された前記絶縁層を積層方向に貫通している、請求項1に記載のフレキシブル多層基板と回路基板の接合構造。   The junction structure of a flexible multilayer substrate and a circuit board according to claim 1, wherein the interlayer connection conductor penetrates the insulating layer in which the penetrating portion is formed in a laminating direction. 前記半田が前記フレキシブル多層基板の回路基板と対向している面と反対側の主面まで連続的に存在している、請求項2に記載のフレキシブル多層基板と回路基板の接合構造。   The joint structure of a flexible multilayer substrate and a circuit board according to claim 2, wherein the solder is continuously present up to a main surface opposite to a surface facing the circuit board of the flexible multilayer substrate. 加熱加圧時に、複数の絶縁基材を圧着し、かつ、前記絶縁基材の孔に充填された導電性ペーストを硬化させることで複数の層間接続導体を形成する第1の工程と、
前記第1の工程の後に、前記圧着された複数の絶縁基材の貫通部分の側壁に金属膜が形成されてなる層間接続貫通部を、前記層間接続貫通部に対して直接接せずに前記層間接続貫通部に沿って前記複数の層間接続導体が位置するように形成する第2の工程と、を有する、フレキシブル多層基板の製造方法。
A first step of forming a plurality of interlayer connection conductors by press-bonding a plurality of insulating base materials at the time of heating and pressurizing, and curing a conductive paste filled in the holes of the insulating base materials;
After the first step, an interlayer connection through portion in which a metal film is formed on a side wall of the through portion of the plurality of pressure-bonded insulating bases is not directly in contact with the interlayer connection through portion. And a second step of forming the plurality of interlayer connection conductors so as to be positioned along the interlayer connection through portion.
加熱加圧時に、複数の絶縁基材を圧着し、かつ、前記絶縁基材の孔に充填された導電性ペーストを硬化させることで複数の層間接続導体を形成する第1の工程と、
前記第1の工程の後に、前記圧着された複数の絶縁基材の貫通部分の側壁に金属膜が形成されてなる層間接続貫通部を、前記層間接続貫通部に対して直接接せずに前記層間接続貫通部に沿って前記複数の層間接続導体が位置するように形成し、フレキシブル多層基板を形成するの第2の工程と、
回路基板の電極の上面に半田と前記層間接続貫通部とが重なるように前記半田と前記層間接続貫通部を配置し、加熱により前記半田を溶融させ、前記層間接続貫通部に前記半田を濡れ広がらせる第3の工程と、を有する、フレキシブル多層基板と回路基板の接合方法。
A first step of forming a plurality of interlayer connection conductors by press-bonding a plurality of insulating base materials at the time of heating and pressurizing, and curing a conductive paste filled in the holes of the insulating base materials;
After the first step, an interlayer connection through portion in which a metal film is formed on a side wall of the through portion of the plurality of pressure-bonded insulating bases is not directly in contact with the interlayer connection through portion. A second step of forming the plurality of interlayer connection conductors along the interlayer connection through portion to form a flexible multilayer substrate;
The solder and the interlayer connection through part are arranged so that the solder and the interlayer connection through part overlap the upper surface of the electrode of the circuit board, the solder is melted by heating, and the solder is wetted and spread in the interlayer connection through part. And a third step of bonding the flexible multilayer substrate and the circuit board.
前記第3の工程で、前記半田を前記フレキシブル多層基板の回路基板と対向している面と反対側の主面まで濡れ広がらせる、請求項5に記載のフレキシブル多層基板と回路基板の接合方法。   6. The method of joining a flexible multilayer substrate and a circuit board according to claim 5, wherein, in the third step, the solder is spread to the main surface opposite to the surface of the flexible multilayer substrate opposite to the circuit board.
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