JP2018137620A - Amplifier circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an amplifier circuit in which the drain-source resistance value of a field effect transistor in off state can be obtained.SOLUTION: An amplifier circuit 10 includes an operational amplifier 11 having an inverted input terminal, a non-inverted input terminal, and an output terminal, a field effect transistor 12 having an inverted input terminal connected with a drain terminal, and an output terminal connected with the source terminal, a field effect transistor 40 showing the same drain-source resistance value as the first field effect transistor 12, when the same gate voltage as the first field effect transistor 12 is applied to the gate terminal, and a voltage application part 15 for applying the same gate voltage to the gate terminal of the first field effect transistor 12, and the gate terminal of the second field effect transistor 40.SELECTED DRAWING: Figure 2

Description

  The present invention relates to an amplifier circuit.

  Conventionally, an amplifier circuit that amplifies and outputs a minute signal from an amplified circuit such as a sensor has been used.

  For example, microelectromechanical sensors that detect acceleration or optical semiconductor sensors that detect energetic particles are used in the field of aerospace. In addition, microelectromechanical sensors that detect brain waves and the like are used in the medical field.

  The microelectromechanical sensor outputs, for example, a change in the amount of charge accompanying a change in capacitance. The optical semiconductor sensor outputs a current obtained by converting light energy into electrical energy, for example.

  Since the magnitude of the output signal of such a sensor is very small and the output impedance of the sensor is very high, the output signal of the sensor is amplified using an amplification circuit having a low output impedance. .

  Therefore, a very low and low noise input conversion noise characteristic is required for the amplifier circuit. In general, the input conversion noise of the amplifier circuit is determined by the noise conversion current due to the feedback conversion resistor having the input conversion noise and gain of the first stage transistor and the bias function of the input terminal.

The magnitude of the noise current caused by the feedback resistance is represented by (4 kT / R) ^1/2 . Here, k is a Boltzmann constant, T is a temperature, and R is a feedback resistance value.

  In order to reduce the noise current of the feedback resistor, the feedback resistance value R may be required to be several G ohms or more.

  FIG. 1 is a diagram illustrating a conventional amplifier circuit.

  The amplifier circuit 110 illustrated in FIG. 1 amplifies a signal input from the circuit to be amplified.

  The amplifier circuit 110 has an inverting input terminal 111a, a non-inverting input terminal 111b, an operational amplifier 111 having an output terminal 111c, and a field effect transistor 112 as a feedback resistor. The source terminal of the field effect transistor 112 is connected to the output terminal 111 c of the operational amplifier 111, and the drain terminal of the field effect transistor 112 is connected to the inverting input terminal 111 a of the operational amplifier 111. The drain-source resistance of the field effect transistor 112 is used as a bias resistance for determining the input potential of the operational amplifier 111.

  The amplifier circuit 110 inputs a signal to be amplified to the inverting input terminal 111a of the operational amplifier 111, and outputs the amplified signal from the output terminal 111c of the operational amplifier 111.

  In order to reduce the noise current, the feedback resistance value of the field effect transistor 112 is preferably set to 1 G ohm or more.

  Therefore, the amplifier circuit 110 uses the drain-source resistance of the field effect transistor 112 in the off state as the feedback resistance.

  The amplifier circuit 110 includes a resistance correction unit 115 that applies a gate voltage equal to or lower than a threshold voltage to the gate terminal of the field effect transistor 112 in order to control the drain-source resistance value of the field effect transistor 12. . The drain-source resistance of the field effect transistor 112 in the off state can be controlled, for example, in the range of several tens of M ohms to several hundreds G ohms.

  Since the drain-source resistance of the field-effect transistor 112 in the off state varies greatly with temperature, the resistance correction unit 115 includes a temperature detection unit 114 that outputs a voltage or current that linearly changes with respect to the temperature change, Based on the current or voltage output from the detection unit 114, the gate terminal of the field effect transistor 112 has a gate voltage equal to or lower than the threshold voltage so that the drain-source resistance of the field effect transistor 112 becomes a predetermined value. A control circuit 115a for applying a voltage is included.

  As described above, the amplifier circuit 110 generates an amplified signal with low power consumption and low noise by applying a gate voltage lower than the threshold voltage to the gate terminal of the field effect transistor 112.

JP2015-122635A

  The drain-source resistance in the off state of the field effect transistor changes under the influence of the gate width or gate length. Therefore, if the gate width or gate length of the field effect transistor differs due to manufacturing variations, the drain-source resistance also varies. In addition, the drain-source resistance of an actual field-effect transistor may be different from the designed resistance value due to the influence of parasitic resistance caused by accommodation in a package or the like.

  Therefore, the drain-source resistance in the off state of the actual field-effect transistor is obtained, and the gate voltage applied to the gate terminal of the field-effect transistor 112 is set so that the drain-source resistance becomes a predetermined value. It is desirable to decide.

  It is an object of the present specification to provide an amplifier circuit capable of obtaining a drain-source resistance value in an off state of a field effect transistor.

  It is another object of the present specification to provide a method for obtaining a drain-source resistance value of a field effect transistor of an amplifier circuit.

  According to the amplifier circuit disclosed in this specification, an operational amplifier having an inverting input terminal, a non-inverting input terminal, and an output terminal, a drain terminal is connected to the inverting input terminal, and a source terminal is connected to the output terminal. When the same gate voltage as that of the first field effect transistor is applied to the connected first field effect transistor and the gate terminal, the same drain-source resistance value as that of the first field effect transistor is exhibited. A second field effect transistor; a gate terminal of the first field effect transistor; and a voltage application unit that applies the same gate voltage to the gate terminal of the second field effect transistor.

  According to the method disclosed in this specification, an operational amplifier having an inverting input terminal, a non-inverting input terminal, and an output terminal, a drain terminal connected to the inverting input terminal, and a source terminal connected to the output terminal When the same gate voltage as that of the first field effect transistor is applied to the first field effect transistor connected to the gate terminal and the gate terminal, the same drain-source resistance value as that of the first field effect transistor is exhibited. An amplifier circuit comprising: a second field effect transistor; a gate terminal of the first field effect transistor; and a voltage application unit that applies the same gate voltage to the gate terminal of the second field effect transistor. The second field effect transistor is changed while changing the voltage applied to the gate terminal of the second field effect transistor at a predetermined temperature. To measure the drain-to-source resistance value of the data.

  According to the above-described amplifier circuit disclosed in the present specification, the drain-source resistance value of the field effect transistor can be obtained.

  Further, according to the method disclosed in this specification, the drain-source resistance value of the field effect transistor included in the amplifier circuit can be obtained.

It is a figure which shows the amplifier circuit of a prior art example. 1 is a diagram illustrating a first embodiment of an amplifier circuit disclosed in this specification. FIG. It is a figure which shows the relationship between the drain-source current of a field effect transistor, and the gate-source voltage. It is a figure which shows the relationship between the drain-source resistance value of a field effect transistor, and the gate-source voltage. It is a figure which shows the relationship between the drain-source current and drain-source voltage of a field effect transistor. It is a figure which shows 2nd Embodiment of the amplifier circuit disclosed to this specification. It is a figure which shows 3rd Embodiment of the amplifier circuit disclosed to this specification. (A) is a figure which shows an example of a buffer, (B) is a figure which shows the other example of a buffer. It is a figure which shows the principal part of other embodiment of the amplifier circuit disclosed to this specification.

  Hereinafter, a first preferred embodiment of an amplifier circuit disclosed in the present specification will be described with reference to the drawings. However, the technical scope of the present invention is not limited to these embodiments, but extends to the invention described in the claims and equivalents thereof.

  FIG. 2 is a diagram illustrating a first embodiment of the amplifier circuit disclosed in this specification.

  The amplifier circuit 10 of this embodiment amplifies and outputs the signal input from the circuit 20 to be amplified.

  The circuit 20 to be amplified has a variable capacitance sensor 21 that is a micro electric machine, and a constant voltage source 22 that applies a predetermined voltage to the variable capacitance sensor 21. As the variable capacitance sensor 21, for example, an accelerometer or a gyroscope can be used. When the capacitance of the variable capacitance sensor 21 receiving an external force changes, the amount of charge stored in the variable capacitance sensor 21 changes. The amplifier circuit 10 receives the charge change signal output from the variable capacitance sensor 21 and outputs an amplified voltage signal.

  The amplifier circuit 10 includes an inverting input terminal 11a, a non-inverting input terminal 11b, an operational amplifier 11 having an output terminal 11c, a capacitor 13 as a feedback capacitance, and a field effect transistor 12 as a feedback resistor. The output signal of the circuit to be amplified 20 is input to the inverting input terminal 11a, and the output signal of the operational amplifier 11 is output from the output terminal 11c. The non-inverting input terminal 11b is grounded. Although the field effect transistor 12 of the present embodiment is a P channel, an N channel field effect transistor may be used.

  The capacitor 13 is disposed between the output terminal 11c and the inverting input terminal 11a, and is used for detecting charges. The source terminal of the field effect transistor 12 is connected to the output terminal 11c, and the drain terminal of the field effect transistor 12 is connected to the inverting input terminal 11a. The drain-source resistance of the field effect transistor 12 is used as a bias resistance for determining the input potential of the operational amplifier 11.

  Next, the basic operation of the amplifier circuit 10 will be described below.

When the voltage of the constant voltage source 22 of the amplified circuit 20 is V _{0 and the} capacitance of the variable capacitance sensor 21 of the amplified circuit 20 changes by ΔC, the amount of charge stored in the variable capacitance sensor 21 is ΔQ = ΔC × V ₀ changes. Assuming that the capacitance of the capacitor 13 of the amplifier circuit 10 is Cf, the change in the potential difference ΔVf between the terminals of the capacitor 13 is ΔVf = ΔQ / Cf = ΔC × V ₀ / Cf.

Since the non-inverting input terminal 11b of the operational amplifier 11 is grounded and the non-inverting input terminal 11b and the inverting input terminal 11a are virtually short-circuited, the potential of the inverting input terminal 11a is also zero. The voltage is ΔC × V ₀ / Cf. In this way, the capacitance change ΔC of the variable capacitance sensor 21 is extracted as the output voltage of the operational amplifier 11.

  Here, when the inverting input terminal 11a of the operational amplifier 11 is opened in a direct current manner, the capacitor 13 is charged by the inflow of the leakage current, so that the output voltage of the operational amplifier 11 varies. Therefore, a field effect transistor 12 as a feedback resistor is disposed between the output terminal 11c and the inverting input terminal 11a to bias the DC component. Specifically, the drain-source resistance of the field effect transistor 12 is used as a feedback resistance. Note that the DC component biased by the field effect transistor 12 includes an AC component having a low frequency. The cycle of the capacitance change of the variable capacitance sensor 21 is, for example, several kHz, and an AC component having a frequency equal to or higher than this frequency is fed back through the capacitor 13.

  The level of the output signal of the variable capacitance sensor 21 is very small, and the output impedance of the variable capacitance sensor 21 is very high. Therefore, the amplifier circuit 10 is required to have a very low and low noise input conversion noise current characteristic. Therefore, the amplifier circuit 10 realizes low noise input conversion noise characteristics by increasing the feedback resistance value. Since the amplifier circuit 10 amplifies the charge change signal of the variable capacitance sensor 21, if the feedback resistance value is high, the current flowing through the feedback resistor is reduced, so that the noise current can be reduced.

  The amplifier circuit 10 is preferably formed as an integrated circuit.

  Therefore, in the present embodiment, the amplifier circuit 10 can be integrated by using the drain-source resistance of the field effect transistor in the off state as the feedback resistance.

  Hereinafter, the drain-source resistance in the off state of the field effect transistor will be described.

  FIG. 3 is a diagram showing the relationship between the drain-source current and the gate-source voltage of the field effect transistor. FIG. 4 is a diagram showing the relationship between the drain-source resistance value and the gate-source voltage of the field effect transistor.

As shown in FIG. 3, under the drain-source voltage V _DS is constant, the state of low gate-source voltage V _GS than the threshold voltage V _TH is applied (OFF state), the field-effect transistor The drain-source current I _DS is very small.

This is because, as shown in FIG. 4, the resistance of the OFF state of the field-effect transistor (hereinafter, off resistance also referred to as) the drain-source resistance R _DS is found a size of several tens of M ohms to several hundred G ohms It is for having.

In the amplifier circuit 10, the drain-source resistance R _DS of the off-state, by using as a feedback resistor, very low, thereby realizing the equivalent input noise characteristics of low noise.

The drain-source of the off-state resistance _{R DS} is changed in proportion to the inverse of the exponential function of the difference between the gate-source voltage _{V GS} and the threshold voltage _{V TH (V GS -V TH)} .

Here, the threshold voltage V _TH of the field effect transistor changes linearly with respect to temperature. As the temperature increases, the threshold voltage V _TH decreases, and as the temperature decreases, the threshold voltage V _TH increases. Thus, when the threshold voltage V _TH changes due to temperature change, the reciprocal of the difference (V _GS −V _TH ) between the gate-source voltage V _GS and the threshold voltage V _TH changes, so that the drain-source The resistance R _DS changes exponentially.

Therefore, the amplifier circuit 10 includes a resistance correction unit 15 (see FIG. 2) that corrects fluctuation of the drain-source resistance _RDS due to temperature change.

As shown in FIG. 4, when the gate-source voltage V _GS is constant, the drain-source resistance R _DS decreases as the temperature increases due to the change in the threshold voltage V _TH , whereas the temperature Becomes lower, the drain-source resistance _RDS becomes higher.

Therefore, the resistance correction unit 15 is configured to adjust the gate terminal of the field effect transistor 12 so that the difference (V _GS −V _TH ) between the gate-source voltage V _GS and the threshold voltage V _TH is constant. by applying a threshold voltage below the gate voltage V _G, and controls so that the drain-to-source resistance R _DS of the FET 12 becomes a predetermined value. The example shown in FIG. 4 shows that the gate voltage is controlled so that the drain-source resistance _RDS is 5 Gohm.

  FIG. 5 is a diagram illustrating the relationship between the drain-source current and the drain-source voltage of the field effect transistor.

In the off-state field effect transistor, there is a proportional relationship between the drain-source current I _DS and the drain-source voltage V _DS, and the proportional coefficient is the drain-source resistance R _DS .

Since the input resistance of the inverting input terminal 11a of the operational amplifier 11 and the circuit 20 to be amplified is very large, the drain-source voltage V _DS of the field effect transistor 12 is substantially zero, and the drain-source voltage V _DS is The value is lower than the threshold voltage. Thus, since the drain-source voltage V _DS of the field effect transistor 12 is low, the operation of the amplifier circuit 10 has a linear relationship between the drain-source current I _DS and the drain-source voltage V _DS. Done in the area.

The feedback resistance value required for the amplifier circuit 10 is determined by the ratio between the drain-source current _IDS and the drain-source voltage _VDS .

  Next, the resistance correction unit 15 will be further described below.

  The resistance correction unit 15 includes a temperature detection unit 14 that is disposed at a position where the temperature difference from the field effect transistor 12 is 10 ° C. or less and outputs a voltage or current that changes linearly with respect to a temperature change. Based on the current or voltage output from the temperature detection unit 14, the resistance correction unit 15 is connected to the gate terminal of the field effect transistor 12 so that the drain-source resistance of the field effect transistor 12 becomes a predetermined value. A gate voltage lower than the threshold voltage is applied.

  The resistance correction unit 15 determines the temperature of the temperature detection unit 14 based on the current or voltage output from the temperature detection unit 14, and determines the gate voltage to be applied to the gate terminal of the field effect transistor 12 based on the calculated temperature. To do.

  As shown in FIG. 2, the resistance correction unit 15 includes an AD converter 33 that converts an analog signal of the current or voltage output from the temperature detection unit 14 into a digital signal, a calculation unit 31, a storage unit 32, and a calculation unit 31. Has a DA converter 34 for converting the digital signal of the gate voltage output from the digital signal into an analog signal.

  The storage unit 32 shows the relationship between the current or voltage output from the temperature detection unit 14 and the temperature of the temperature detection unit 14, and the relationship between the temperature of the temperature detection unit 14 and the gate voltage applied to the gate terminal of the field effect transistor 12. Remember.

The relationship between the current or voltage output from the temperature detection unit 14 and the temperature of the temperature detection unit 14 is stored in the storage unit 32 by measuring the relationship between the temperature and the current or voltage output from the temperature detection unit 14 in advance. Is done. The relationship between the temperature of the temperature detector 14 and the gate voltage applied to the gate terminal of the field effect transistor 12 is the difference between the gate-source voltage V _GS of the field effect transistor 12 and the threshold voltage V _{TH at} each temperature ( A gate voltage at which V _GS −V _TH ) becomes a predetermined value is determined and stored in the storage unit 32.

  The calculation unit 31 refers to the relationship between the current or voltage output from the temperature detection unit 14 stored in the storage unit 32 and the temperature of the temperature detection unit 14, and based on the current or voltage output from the temperature detection unit 14, The temperature of the temperature detector 14 is obtained. In addition, the calculation unit 31 refers to the relationship between the temperature of the temperature detection unit 14 stored in the storage unit 32 and the gate voltage applied to the gate terminal of the field effect transistor 12, and based on the obtained temperature, the field effect transistor The gate voltage applied to the 12 gate terminals is determined.

  The measurement of the relationship between the gate voltage applied to the gate terminal of the field effect transistor 12 and the drain-source resistance value of the field effect transistor 12 at each temperature will be described later.

  The resistance correction unit 15 determines the gate voltage applied to the field effect transistor 12 on the assumption that the temperature of the temperature detection unit 14 is the same as the temperature of the field effect transistor 12. Therefore, it is preferable that the difference between the temperature of the temperature detector 14 and the temperature of the field effect transistor 12 is close.

  From this viewpoint, the temperature difference between the temperature detection unit 14 and the field effect transistor is preferably 5 ° C. or less, more preferably 1 ° C. or less, still more preferably 0.5 ° C. or less, and still more preferably 0.1 ° C. or less. is there.

  Next, measurement of the relationship between the gate voltage applied to the gate terminal of the field effect transistor 12 and the source-drain resistance value of the field effect transistor 12 will be described below.

  As shown in FIG. 2, the amplifier circuit 10 includes a field effect transistor 40. The field effect transistor 40 exhibits the same drain-source resistance as the field effect transistor 12 when the same gate voltage as that of the field effect transistor 12 is applied to the gate terminal at a predetermined temperature.

  The resistance correction unit 15 functions as a voltage application unit that applies the same gate voltage to the gate terminal of the field effect transistor 12 and the gate terminal of the field effect transistor 40.

  The field effect transistor 12 and the field effect transistor 40 exhibit the same drain-source resistance value when the same gate voltage is applied at the same temperature.

  The field effect transistor 12 and the field effect transistor 40 preferably have the same gate length and gate width from the viewpoint of having the same gate voltage and drain-source resistance value. The field effect transistor 12 and the field effect transistor 40 preferably have the same threshold voltage. The field effect transistor 12 and the field effect transistor 40 preferably have the same gate-source voltage and drain-source resistance relationship (relationship shown in FIG. 4) at the same temperature.

  From this point of view, the field effect transistor 12 and the field effect transistor 40 are preferably formed under the same manufacturing conditions using the same manufacturing process.

  In the present specification, the field-effect transistor 12 and the field-effect transistor 40 exhibit the same drain-source resistance value when the same gate voltage is applied at the same temperature. The ratio of the difference between the resistance value between the drain and the source of the field effect transistor 12 and the resistance value between the drain and the source of the field effect transistor 12 is preferably 10% or less, more preferably 5% or less. Preferably it means 1% or less.

  The pad 41 connected to the drain terminal of the field effect transistor 40 and the pad 42 connected to the source terminal of the field effect transistor 40 are connected to the resistance measuring device 50.

  Between the drain and the source of the field effect transistor 40 while changing the voltage (threshold voltage or less) applied to the gate terminals of the field effect transistor 12 and the field effect transistor 40 using the resistance correction unit 15 at a predetermined temperature. The resistance value is measured by the resistance measuring device 50.

  In this way, the relationship between the gate voltage applied to the gate terminal of the field effect transistor 40 and the drain-source resistance value of the field effect transistor 40 at a predetermined temperature is obtained.

  As described above, since the field effect transistor 12 and the field effect transistor 40 exhibit the same drain-source resistance value when the same gate voltage is applied at the same temperature, they are measured with respect to the field effect transistor 40. This relationship is also applicable to the field effect transistor 12.

Therefore, the gate-source voltage V _GS and threshold voltage V V of the field-effect transistor 12 are determined based on the relationship between the gate voltage measured using the field-effect transistor 40 and the drain-source resistance value at a predetermined temperature. _A gate voltage at which the difference from _TH (V _GS −V _TH ) becomes a predetermined value is determined and stored in the storage unit 32.

  The above-described measurement of the relationship between the gate voltage applied to the gate terminal of the field effect transistor 40 and the drain-source resistance value of the field effect transistor 40 is performed over a temperature range in which the amplifier circuit 10 operates.

  According to the amplifier circuit 10 of the present embodiment described above, the drain-source resistance value of the field effect transistor 40 in the off state is measured, and the gate voltage of the field effect transistor 12 at a predetermined temperature is determined based on the measured value. The relationship with the drain-source resistance value can be obtained. Then, the resistance correction unit 15 corrects the influence of the temperature, and the resistance value between the drain and the source of the field effect transistor 12 which is a feedback resistance can be controlled more accurately.

  The resistance correction unit 15 generates a gate voltage to be applied to the gate terminal of the field effect transistor 12 in response to the temperature change of the temperature detection unit 14, but the temperature of the temperature detection unit 14 changes at intervals of, for example, seconds. Therefore, the power consumption accompanying the operation of the resistance correction unit 15 is small.

  Next, second and third embodiments of the above-described amplifier circuit will be described below with reference to FIGS. Regarding points that are not particularly described in the second and third embodiments, the description in detail regarding the first embodiment is applied as appropriate. Moreover, the same code | symbol is attached | subjected to the same component.

  FIG. 6 is a diagram illustrating a second embodiment of the amplifier circuit disclosed in this specification.

  The amplifier circuit 10 of this embodiment includes a capacitor 43 connected to the field effect transistor 40. The capacitor 43 has a first terminal 43a connected to the drain terminal of the field effect transistor 40 and a second terminal 43b grounded. Note that the first terminal 43 a of the capacitor 43 may be connected to the source terminal of the field effect transistor 40.

  The first terminal 43 a of the capacitor 43 is also connected to the pad 41.

  A low-pass filter is formed by the field effect transistor 40 functioning as a resistor and the capacitor 43.

  The pad 41 and the pad 42 are connected to the frequency analysis device 51 so that the frequency characteristics of the low pass filter can be measured.

The cut-off frequency fc = 1 / (2πR _DS C) of the low-pass filter is represented by the drain-source resistance R _{DS of the} field effect transistor 40 and the capacitance C of the capacitor 43. Here, the capacitance C of the capacitor 43 is known.

As described in the first embodiment, at a predetermined temperature, the resistance correction unit 15 is used to change the voltage applied to the gate terminals of the field effect transistor 12 and the field effect transistor 40 (threshold voltage or less). The frequency characteristic of the low-pass filter at each gate voltage is measured by the frequency analysis device 51. The cut-off frequency fc of the low-pass filter is determined based on the measured frequency characteristics of the low-pass filter at each gate voltage, and the drain-source resistance R _{DS of the} field effect transistor 40 is determined based on the cut-off frequency fc. Desired.

In the first embodiment described above, with a measurable resistance measuring device with high resistance value of above G ohms was measured drain-source resistance R _DS of the FET 40. Such a resistance measuring device is expensive and may be difficult to use.

According to the amplifier circuit 10 of the present embodiment, using commonly it is easy frequency analyzer available, it is possible to measure the drain-source resistance R _DS of the FET 40 exhibits higher resistivity than G ohms.

  In addition, the amplifier circuit of this embodiment has the same effects as those of the first embodiment described above. The above is the description of the amplifier circuit of the second embodiment.

In the amplifier circuit of the first embodiment and the second embodiment described above, the measurement of the drain-source resistance R _DS of the FET 40 is before the amplifier circuit 10 is accommodated in a package, a plurality on a substrate This was performed in a state where the amplifier circuit 10 was arranged.

On the other hand, the amplifier circuit 10, individually in the state of being housed in the package as an amplifying device, in some cases it is desired to measure the drain-source resistance R _DS of the FET 40.

Therefore, the amplifier circuit 10, in a state where individually housed in a package as an amplifying device, a third embodiment of measurable amplifier drain-source resistance R _DS of the FET 40, with reference to FIG. 7 However, it will be described below.

  FIG. 7 is a diagram illustrating a third embodiment of the amplifier circuit disclosed in this specification.

  The amplifier circuit 10 of the present embodiment includes a capacitor 43 connected to the field effect transistor 40, as in the second embodiment. The capacitor 43 has a first terminal 43a connected to the source terminal of the field effect transistor 40 and a second terminal 43b grounded.

  A low-pass filter is formed by the field effect transistor 40 functioning as a resistor and the capacitor 43.

  The amplifier circuit 10 includes a buffer 44 a connected to the drain terminal of the field effect transistor 40 and a buffer 44 b connected to the source terminal of the field effect transistor 40.

  The buffer 44a is connected to the pad 41 via the protection circuit 45a. The buffer 44b is connected to the pad 42 via the protection circuit 45b.

  The pad 41 and the pad 42 are connected to the frequency analysis device 51 so that the frequency characteristics of the low pass filter can be measured.

  The buffers 44a and 44b, the protection circuits 45a and 45b, the capacitor 43, and the field effect transistor 40 can be integrated with other circuits such as the field effect transistor 12 and the operational amplifier 11 and accommodated in one package.

  The protection circuits 45 a and 45 b have a function of protecting the elements in the amplifier circuit 10 from an external electric shock through the pads 41 and 42. For example, an electrostatic protection circuit (ESD protection circuit) can be used as the protection circuits 45a and 45b.

  The buffers 44 a and 44 b prevent leakage current flowing from the protection circuits 45 a and 45 b from flowing to the field effect transistor 40. When a leakage current flows from the protection circuits 45 a and 45 b to the field effect transistor 40, the drain-source resistance value of the field effect transistor 40 changes.

  The protection circuits 45a and 45b prevent an electric shock such as static electricity from the pads 41 and 42 from being applied to the inside of the amplifier circuit 10, but the measurement of the resistance value between the drain and source of the field effect transistor 40 is prevented. To generate a leak current.

  Therefore, the buffers 44 a and 44 b are disposed between the protection circuits 45 a and 45 b and the field effect transistor 40, so that leakage current from the protection circuits 45 a and 45 b is prevented from flowing into the field effect transistor 40.

  FIG. 8A is a diagram illustrating an example of a buffer, and FIG. 8B is a diagram illustrating another example of the buffer.

  The buffer illustrated in FIG. 8A includes a field effect transistor 61 and a resistor 62. The gate terminal of the field effect transistor 61 is connected to the pad 60a. The pad 60a is connected to a protection circuit or a buffer. The drain terminal of the field effect transistor 61 is connected to a voltage source such as a power supply voltage. The source terminal of the field effect transistor 61 is grounded via the resistor 62. The source terminal of the field effect transistor 61 is connected to the pad 60b. The pad 60b is connected to a protection circuit or a buffer.

  When an AC signal for measuring the frequency characteristics of the low-pass filter by the frequency analysis device 51 is applied to the gate terminal of the field effect transistor 61 together with an appropriate DC bias voltage, the field effect transistor 61 is turned on, and the frequency analysis device 51 generates the frequency signal. A signal is output from the pad 60b according to the AC signal to be performed.

  On the other hand, even if the leakage current flowing from the protection circuits 45a and 45b is applied to the gate terminal of the field effect transistor 61, the leakage current is cut off and the field effect transistor 61 is not turned on. The influence of the leakage current on the measurement of the drain-source resistance value of the field effect transistor 40 is prevented.

  The buffer shown in FIG. 8B is different from the buffer shown in FIG. 8A in that the resistance of the buffer shown in FIG. 8A is replaced with a field effect transistor 63. The voltage Vb is applied to the gate terminal of the field effect transistor 63, and it is always in the on state.

  The buffer 44a and the buffer 44b may be the same circuit or different circuits. In FIG. 8, the buffer is configured using an N-channel field effect transistor, but a P-channel field effect transistor may be used.

  According to the above-described amplifier circuit 10 of the present embodiment, the drain-source resistance value of the field effect transistor 40 can be measured even when the amplifier circuit 10 is housed in a package.

  In addition, the amplifier circuit of this embodiment has the same effects as those of the first embodiment described above.

  In the present invention, the amplifier circuit of the above-described embodiment can be appropriately changed without departing from the gist of the present invention. In addition, the configuration requirements of one embodiment can be applied to other embodiments as appropriate.

  For example, in each of the above-described embodiments, the resistance correction unit 15 controls the difference between the gate voltage and the threshold voltage of the field effect transistor 12 to be a predetermined value. You may control so that resistance between sources may become predetermined value.

  In each of the above-described embodiments, the amplifier circuit has a single-phase input and a single-phase output, but may be a differential input and differential output type.

  FIG. 9 is a diagram illustrating a main part of still another embodiment of the amplifier circuit disclosed in this specification.

  In the embodiment shown in FIG. 9, the operational amplifier 11 includes an inverting input terminal 11a and a non-inverting input terminal 11b for inputting a differential signal, and a positive output terminal 11d and a negative output terminal 11e for outputting a differential signal. Have A first field effect transistor 12a is disposed between the positive output terminal 11d and the inverting input terminal 11a, and a second field effect transistor 12b is disposed between the negative output terminal 11e and the non-inverting input terminal 11b. The The source terminal of the first field effect transistor 12a is connected to the positive output terminal 11d, and the drain terminal of the first field effect transistor 12a is connected to the inverting input terminal 11a. The source terminal of the second field effect transistor 12b is connected to the negative output terminal 11e, and the drain terminal of the second field effect transistor 12b is connected to the non-inverting input terminal 11b.

  The gate terminal of the first field effect transistor 12a is connected to the gate terminal of the third field effect transistor 40a. The third field effect transistor 40a exhibits the same drain-source resistance as that of the first field effect transistor 12a when the same gate voltage as that of the first field effect transistor 12a is applied. The gate terminal of the second field effect transistor 12b is connected to the gate terminal of the fourth field effect transistor 40b. The fourth field effect transistor 40b exhibits the same drain-source resistance as the second field effect transistor 12b when the same gate voltage as that of the second field effect transistor 12b is applied.

  For the gate terminals of the first field effect transistor 12a and the third field effect transistor 40a, the resistance correction unit sets a threshold value so that the drain-source resistance of the first field effect transistor 12a becomes a predetermined value. Apply a gate voltage below the voltage. Similarly, with respect to the gate terminals of the second field effect transistor 12b and the fourth field effect transistor 40b, the resistance correction unit causes the drain-source resistance of the second field effect transistor 12b to have a predetermined value. A gate voltage lower than the threshold voltage is applied.

DESCRIPTION OF SYMBOLS 10 Amplifier circuit 11 Operational amplifier 11a Inverting input terminal 11b Non-inverting input terminal 11c Output terminal 12, 12a, 12b Field effect transistor 13 Capacitor 14 Temperature detection part 15 Resistance correction part (voltage application part)
20 Amplified Circuit 21 Variable Capacitance Sensor 22 Constant Voltage Source 31 Calculation Unit 32 Storage Unit 33 AD Converter 34 DA Converter 35 Constant Voltage Source 40, 40a, 40b Field Effect Transistor 41 Pad 42 Pad 43 Capacitor 43a First Terminal 43b First 2-terminal 44a buffer 44b buffer 45a protection circuit 45b protection circuit 50 resistance measurement device 51 frequency analysis device 60a pad 60b pad 61 field effect transistor 62 resistance 63 field effect transistor

Claims (4)

An operational amplifier having an inverting input terminal, a non-inverting input terminal, and an output terminal;
A first field effect transistor having a drain terminal connected to the inverting input terminal and a source terminal connected to the output terminal;
A second field effect transistor that exhibits the same drain-source resistance as the first field effect transistor when the same gate voltage as that of the first field effect transistor is applied to the gate terminal;
A voltage applying unit that applies the same gate voltage to the gate terminal of the first field effect transistor and the gate terminal of the second field effect transistor;
An amplifier circuit comprising:   2. The amplifier circuit according to claim 1, further comprising a capacitor having a first terminal connected to a source terminal or a drain terminal of the second field effect transistor and a second terminal grounded.   The amplifier circuit according to claim 1, further comprising: a first buffer connected to a source terminal of the second field effect transistor; and a second buffer connected to a drain terminal of the second field effect transistor. An operational amplifier having an inverting input terminal, a non-inverting input terminal, and an output terminal;
A first field effect transistor having a drain terminal connected to the inverting input terminal and a source terminal connected to the output terminal;
A second field effect transistor that exhibits the same drain-source resistance as the first field effect transistor when the same gate voltage as that of the first field effect transistor is applied to the gate terminal;
A voltage applying unit that applies the same gate voltage to the gate terminal of the first field effect transistor and the gate terminal of the second field effect transistor;
Using an amplifier circuit comprising
A method of measuring a drain-source resistance value of the second field effect transistor while changing a voltage applied to a gate terminal of the second field effect transistor at a predetermined temperature.

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