JP2018129525A - Solid state image sensor, and electronic apparatus - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an uncolored solid state image sensor excellent in color balance.SOLUTION: A solid state image sensor includes a semiconductor layer provided with multiple pixels, a photoelectric conversion part provided in the semiconductor layer for each pixel, a first trench element isolation provided on the light-receiving surface of the semiconductor layer, a second trench element isolation provided on the light-receiving surface of the semiconductor layer, at a position different from the first trench element isolation, a first light shielding film formed at a position deviated from the first trench element isolation in the first direction, and a second light shielding film formed at a position deviated from the second trench element isolation in the second direction. An isolating layer is formed in the first and second trench element isolations, and the first and second directions are opposite directions.SELECTED DRAWING: Figure 3

Description

  The present technology relates to a solid-state imaging device and an electronic device, and more particularly, to a solid-state imaging device having trench element isolation and an electronic device having the solid-state imaging device.

  The solid-state imaging device has a plurality of pixels arranged along the light receiving surface side of the semiconductor substrate. Each pixel includes a photoelectric conversion unit provided in the semiconductor substrate, a color filter and an on-chip lens provided above the semiconductor substrate.

  In the solid-state imaging device having such a configuration, when light incident from an oblique direction with respect to the light receiving surface leaks into a photoelectric conversion unit of an adjacent pixel, this light leakage becomes a factor that causes color mixing and color shading.

  Therefore, a configuration is proposed in which trench element isolation for separating the photoelectric conversion portions of each pixel is formed on the light-receiving surface side in the semiconductor substrate, and a light shielding film is provided inside this to prevent light leakage between adjacent pixels. Has been. In such a configuration, the opening width of the trench is widened at a shallow position on the light-receiving surface side, and the light shielding film is embedded only in the trench at the shallow position, so that the light shielding film can be formed without generating voids. It can be formed and light shielding between pixels is performed effectively (see, for example, Patent Document 1 below).

JP 2012-178457 A

  However, even in a solid-state imaging device having a trench element isolation in a semiconductor substrate, a color balance that depends on the wavelength of light reception and the incident angle of the received light occurs, which is a factor that causes coloring. It has become.

  Accordingly, an object of the present technology is to provide a solid-state imaging device having a good color balance and no color, and to provide an electronic apparatus using the solid-state imaging device.

  In order to achieve such an object, a solid-state imaging device according to an embodiment of the present technology includes a semiconductor layer in which one main surface side is a light receiving surface and a plurality of pixels are set along the light receiving surface, and the semiconductor layer for each pixel. And a photoelectric conversion unit provided inside. Also, a groove type element isolation formed by providing an insulating layer in a groove pattern formed on the light receiving surface side of the semiconductor layer, and provided at a position shifted from a pixel boundary between the pixels, It has.

  In the solid-state imaging device having such a configuration, the groove type element separation is shifted with respect to the pixel boundary. For this reason, the direction and the position of the photoelectric conversion unit on the light receiving surface side where the groove type element separation is provided are determined by setting the direction in which the groove type element separation is shifted to a direction depending on the wavelength of light intended for light reception in each pixel. Further, it is possible to adopt a configuration depending on the wavelength of light intended for light reception. As a result, the color balance between the short-wavelength light that is photoelectrically converted in the region on the light-receiving surface side where the grooved element isolation is provided and the long-wavelength light that is photoelectrically converted in a deeper region is improved. .

  As a result, according to the present technology, it is possible to perform imaging with good color balance and no coloring, and it is possible to improve imaging characteristics.

It is a schematic structure figure showing an example of a solid imaging device to which this art is applied. It is a top view of the principal part in the solid-state imaging device of 1st Embodiment. It is sectional drawing of the principal part in the solid-state imaging device of 1st Embodiment, and is sectional drawing equivalent to the AA cross section of FIG. It is a graph which shows the relative output with respect to each color light received by each photoelectric conversion part. It is a graph which shows the blue light absorption amount with respect to the depth from the light-receiving surface of a semiconductor layer (Si). It is a manufacturing-process figure of the solid-state imaging device of 1st Embodiment. It is a graph of the normalized sensitivity with respect to an incident angle. It is a graph of the absolute sensitivity with respect to an incident angle. It is sectional drawing which shows the structure of the principal part of the solid-state imaging device of 2nd Embodiment. It is sectional drawing which shows the structure of the principal part of the solid-state imaging device of 3rd Embodiment. It is sectional drawing which shows the structure of the principal part of the solid-state imaging device of 4th Embodiment. It is a top view of the principal part of the solid-state imaging device of 5th Embodiment. It is sectional drawing of the principal part of the solid-state imaging device of 5th Embodiment, and is sectional drawing equivalent to the AA cross section of FIG. It is a graph which shows the amount of color mixing to the adjacent pixel with respect to an incident angle. It is a block diagram of the electronic device of 6th Embodiment which has a solid-state image sensor to which this technique is applied.

Hereinafter, embodiments of the present technology will be described in the following order based on the drawings.
1. 1. Schematic configuration example of solid-state imaging device according to embodiment First embodiment (first example in which groove type element separation is shifted to the long wavelength pixel side)
3. Second Embodiment (Second Example in which groove type element separation is shifted to the long wavelength pixel side)
4). Third Embodiment (Third Example in which the groove type element separation is shifted to the long wavelength pixel side)
5. Fourth Embodiment (Fourth Example in which the groove type element separation is shifted to the long wavelength pixel side)
6). Fifth embodiment (example in which groove type element separation is shifted to the short wavelength pixel side)
7). Sixth Embodiment (Electronic device using a solid-state imaging device)

<< 1. Schematic configuration example of solid-state imaging device of embodiment >>
FIG. 1 shows a schematic configuration of a solid-state imaging device using a MOS type solid-state imaging device as an example of the solid-state imaging device of the present technology.

  The solid-state imaging device 1 shown in this figure has a pixel region 4 in which a plurality of pixels 3 including a photoelectric conversion region are two-dimensionally arranged on one surface of a support substrate 2. Each pixel 3 arranged in the pixel region 4 is provided with a photoelectric conversion region, a floating diffusion, a read gate, a pixel circuit composed of a plurality of other transistors (so-called MOS transistors), a capacitive element, and the like. ing. A plurality of pixels 3 may share a part of the pixel circuit.

  Peripheral circuits such as a vertical drive circuit 5, a column signal processing circuit 6, a horizontal drive circuit 7, and a system control circuit 8 are provided in the peripheral portion of the pixel region 4 as described above.

  The vertical drive circuit 5 is configured by, for example, a shift register, selects the pixel drive line 9, supplies a pulse for driving the pixel 3 to the selected pixel drive line 9, and the pixels 3 arranged in the pixel region 4. Is driven line by line. That is, the vertical drive circuit 5 selectively scans each pixel 3 arranged in the pixel region 4 sequentially in the vertical direction in units of rows. Then, the pixel signal based on the signal charge generated according to the amount of light received in each pixel 3 is supplied to the column signal processing circuit 6 through the vertical drive line 10 wired perpendicular to the pixel drive line 9.

  The column signal processing circuit 6 is disposed for each column of the pixels 3, for example, and performs signal processing such as noise removal on the signal output from the pixels 3 for one row for each pixel column. That is, the column signal processing circuit 6 performs signals such as correlated double sampling (CDS), signal amplification, and analog / digital conversion (AD) to remove fixed pattern noise unique to a pixel. Process.

  The horizontal drive circuit 7 is configured by, for example, a shift register, and sequentially outputs horizontal scanning pulses, thereby selecting each of the column signal processing circuits 6 in order and outputting a pixel signal from each of the column signal processing circuits 6.

  The system control circuit 8 receives an input clock and data for instructing an operation mode, and outputs data such as internal information of the solid-state imaging device 1. That is, in the system control circuit 8, based on the vertical synchronization signal, the horizontal synchronization signal, and the master clock, the clock signal and the control signal that become the reference of the operation of the vertical drive circuit 5, the column signal processing circuit 6, the horizontal drive circuit 7, and the like Is generated. These signals are input to the vertical drive circuit 5, the column signal processing circuit 6, the horizontal drive circuit 7, and the like.

  The peripheral circuits 5 to 8 as described above and the pixel circuit provided in the pixel region 4 constitute a drive circuit for driving each pixel 3. Note that the peripheral circuits 5 to 8 may be arranged at positions where they are stacked in the pixel region 4.

≪2. First Embodiment >>
(First example in which groove type element separation is shifted to the long wavelength pixel side)
In the first embodiment, the configuration of the solid-state imaging device 1-1 of the first embodiment, the manufacturing method of the solid-state imaging device 1-1, and the effects of the first embodiment will be described in this order.

<Configuration of solid-state imaging device 1-1>
FIG. 2 is a plan view of the main part of the solid-state imaging device 1-1 according to the first embodiment, and is for 12 pixels when the semiconductor layer 20 portion of the pixel region 4 is viewed in plan view from the light receiving surface side. It is a top view. FIG. 3 is a cross-sectional view of the main part of the solid-state imaging device 1-1 of the first embodiment, and corresponds to the AA cross section of FIG. Hereinafter, the configuration of the solid-state imaging device 1-1 of the first embodiment will be described based on these drawings.

  The solid-state imaging device 1-1 according to the first embodiment includes a semiconductor layer 20 bonded to a support substrate (not shown), and one main surface of the semiconductor layer 20 is a light receiving surface S. This is a back-illuminated imaging device in which transistors and wiring layers not shown here are provided on the side opposite to S.

  Inside the semiconductor layer 20, an isolation region 21 by impurity diffusion is provided, and a photoelectric conversion unit 23 is provided in each pixel 3 separated by this. Further, on the light receiving surface S side of the semiconductor layer 20, a grooved element isolation 25 that is characteristically arranged in the present embodiment is provided. A protective insulating layer 31, an insulating layer 33, and a light shielding film 35 are provided in this order on the light receiving surface S of the semiconductor layer 20, and a color filter 39 and an on-chip lens 41 are stacked via a planarizing insulating film 37. Has been.

  Hereinafter, the configuration of each layer stacked on the semiconductor layer 20, the groove-type element isolation 25 provided in the semiconductor layer 20, and the light receiving surface S of the semiconductor layer 20 will be described in order.

[Semiconductor layer 20]
The semiconductor layer 20 is a layer made of, for example, n-type single crystal or polycrystalline silicon. For example, the semiconductor layer 20 is made by thinning a semiconductor substrate made of n-type single crystal silicon. The semiconductor layer 20 has a light receiving surface S on one main surface side, and a plurality of pixels 3 are set along the light receiving surface S. Each pixel 3 is arranged as a red pixel 3R for receiving red light, a green pixel 3G for receiving green light, and a blue pixel 3B for receiving blue light. Here, as an example, a case where the pixels 3 of each color are two-dimensionally arranged in a Bayer array is illustrated.

  The pixels 3R, 3G, and 3B of the respective colors arranged in the Bayer array are arranged in the same shape with respect to the light receiving surface S regardless of the wavelength of light to be received. For example, when the boundary between the pixel 3 and the pixel 3 is a pixel boundary 3a, each pixel 3 surrounded by the pixel boundary 3a on the light receiving surface S has a substantially square planar shape with an equal size. Suppose that

  In such a semiconductor layer 20, an isolation region 21 configured as a p-type impurity diffusion region is provided. In the semiconductor layer 20, the isolation region 21 is centered on the pixel boundary 3a, and extends from the surface opposite to the light receiving surface S toward the light receiving surface S along the pixel boundary 3a.

  In addition, an n-type photoelectric conversion unit 23 is provided for each pixel 3 inside the semiconductor layer 20. The n-type photoelectric conversion unit 23 is configured by an n-type region separated in the semiconductor layer 20 by an isolation region 21 and a groove-type element isolation 25 described later. These photoelectric conversion units 23 constitute a photodiode together with the p-type isolation region 21, and serve as a charge accumulation region for photoelectric conversion in each pixel 3.

  In the semiconductor layer 20, in addition to the isolation region 21 and the photoelectric conversion unit 23, various impurity regions such as a source / drain and a surface diffusion layer of a transistor disposed in a normal back-illuminated solid-state imaging device. However, illustration and description thereof are omitted here.

[Groove element isolation 25]
The groove type element isolation 25 is configured by providing a protective insulating layer 31 and an insulating layer 33 in a groove pattern 20a provided on the light receiving surface S side of the semiconductor layer 20, and further providing a light shielding film 35 through these. Yes. The groove type element isolation 25 having such a configuration is characterized in that it is provided on the light receiving surface S at a position shifted from the center of the pixel boundary 3a. The shift direction of the groove type element isolation 25 with respect to the pixel boundary 3a depends on the wavelength of light intended for light reception in the two pixels 3 to 3 separated by the groove type element isolation 25.

  In particular, in the first embodiment, the groove-type element isolation 25 is provided so as to be shifted in the direction of the pixel having a long wavelength of light to be received among the two pixels 3 arranged adjacent to each other. That is, if each color pixel 3R, 3G, 3B is configured as a Bayer array, the grooved element separation 25 between the green pixel 3G and the blue pixel 3B is provided at a position shifted to the green pixel 3G side. . Further, the groove type element separation 25 between the green pixel 3G and the red pixel 3R is provided at a position shifted to the red pixel 3R side.

  Here, “the groove-type element isolation 25 is provided at a position shifted from the center of the pixel boundary 3a” means that the groove-type element isolation 25 is the center in the width direction when the light-receiving surface S is viewed, that is, the groove pattern 20a. It shows that the center of the opening width of is shifted with respect to the pixel boundary 3a. Therefore, the groove type element isolation 25 may be disposed on the pixel boundary 3a.

  In such a configuration, the width when the grooved element isolation 25 is viewed from the light receiving surface S side, that is, the opening width of the groove pattern 20a may be constant in the light receiving surface S.

  As a result, in the semiconductor layer 20, in the depth region where the groove-type element isolation 25 is provided, the width of the photoelectric conversion unit 23 in the arrangement direction of the color pixels 3R, 3G, 3B is the wavelength of light intended for light reception. The longer pixel is larger. For example, in the direction in which the green pixel 3G and the blue pixel 3B are adjacent to each other, in the depth region where the groove type element isolation 25 is provided, the width wG of the photoelectric conversion unit 23 in the green pixel 3G and the photoelectric conversion unit 23 in the blue pixel 3B. The width wB is wG <wB. In the direction in which the green pixel 3G and the red pixel 3R are adjacent to each other, in the depth region where the groove-type element isolation 25 is provided, the width wG of the photoelectric conversion unit 23 in the green pixel 3G and the photoelectric conversion unit 23 in the red pixel 3R. The width wR is wR <wG.

  Therefore, in a region where the groove-type element isolation 25 is provided, that is, a surface region close to the light receiving surface S and in which light having a short wavelength is photoelectrically converted, the photoelectric conversion unit in each color pixel 3R, 3G, 3B. The volume of 23 becomes larger as the wavelength of light for light reception becomes shorter.

  On the other hand, in the semiconductor layer 20 in the depth region where the groove-type element isolation 25 is not provided, that is, the region far from the light receiving surface S and where light having a long wavelength is photoelectrically converted, each color pixel 3R, The widths of the 3G and 3B photoelectric conversion units 23 are substantially the same in the pixel arrangement direction. Therefore, the volume of the photoelectric conversion unit 23 in each color pixel 3R, 3G, 3B is uniform.

  Further, the depth d of the groove-type element separation 25 from the light receiving surface S may be a depth at which the light of the shortest wavelength among the light of the light receiving target wavelength in each pixel 3 is absorbed by almost 100%. For example, FIG. 4 is a graph showing a relative output with respect to a wavelength that passes through a color filter of each color described below and is received by each photoelectric conversion unit. As shown in this graph, in each wavelength light received by the photoelectric conversion unit, a wavelength range in which 80% is converted by the photoelectric conversion unit and output is set as each color light intended for light reception. This defines the wavelength range of the blue light hB. Then, as shown in FIG. 5, the depth D from the light receiving surface S where the blue light hB in the specified wavelength range is absorbed almost 100% (here, D = 2300 nm) is set to the maximum value, and the groove type element isolation is performed. Is set within the range of the depth D.

  For example, FIG. 5 shows the amount of blue light hB absorbed when the semiconductor layer 20 is single crystal silicon. In this case, almost 100% of the blue light hB is absorbed at a depth of about 2300 nm from the light receiving surface S. Therefore, the depth d of the groove type element isolation 25 is set to d ≦ D = 2300 nm.

  In the grooved element isolation 25 arranged as described above, the inner wall of the groove pattern 20 a is covered with the protective insulating layer 31 and the insulating layer 33 provided on the light receiving surface S of the semiconductor layer 20. Further, a light shielding film 35 is embedded in the center of the groove pattern 20a via the protective insulating layer 31 and the insulating layer 33.

Among these, the protective insulating layer 31 is a layer made of a metal oxide that accumulates negative charges, and forms a hole accumulation layer at the interface of the semiconductor layer 20. Such a protective insulating layer 31 is a layer made of an oxide such as hafnium (Hf), aluminum (Al), tantalum (Ta), or titanium (Ti). The insulating layer 33 is a layer made of silicon oxide (SiO ₂ ) or silicon nitride (SiN).

[Light shielding film 35]
The light shielding film 35 is a layer patterned on the light receiving surface S with the protective insulating layer 31 and the insulating layer 33 interposed therebetween. The light shielding film 35 is embedded in the groove pattern 20 a of the groove type element isolation 25 to constitute a part of the groove type element isolation 25. Further, the light shielding film 35 is patterned on the light receiving surface S so as to have an opening 35 a above the photoelectric conversion unit 23. The opening 35a may have the same shape in each of the color pixels 3R, 3G, and 3B, and the center of each opening 35a coincides with the pixel center φ.

  Further, the light shielding film 35 is formed in a pattern with a line width around the pixel boundary 3 a above the light receiving surface S. This line width may be constant, and the center of the line width may coincide with the pixel boundary 3a. For example, it has a line width that covers the grooved element isolation 25 when viewed in plan view from the light receiving surface S side.

  The light shielding film 35 as described above is made of a metal material having light shielding properties such as tungsten (W), aluminum (Al), titanium nitride (TiN), titanium (Ti), and the like.

  The light shielding film 35 patterned as described above is covered with a planarization insulating film 37.

[Color filter 39]
The color filter 39 is a layer provided on the planarization insulating film 37, and is configured by a color filter of each color patterned for each pixel 3. Each patterned color filter 39 is configured to pass light in a wavelength range intended for light reception in each color pixel 3R, 3G, 3B. These color filters 39 may have the same shape in each of the color pixels 3R, 3G, and 3B, and the center of each color filter 39 may coincide with the pixel center φ.

[On-chip lens 41]
The on-chip lens 41 is disposed for each pixel 3 on the color filter 39, and here, for example, is a convex lens that is convex in the light incident direction. Such an on-chip lens 41 preferably has the same shape in each of the color pixels 3R, 3G, and 3B, and the center of each on-chip lens 41 preferably coincides with the pixel center φ.

<Method for Manufacturing Solid-State Imaging Device 1-1>
FIG. 6 is a cross-sectional process diagram illustrating a manufacturing procedure of the solid-state imaging device according to the first embodiment. A method for manufacturing the solid-state imaging device according to the first embodiment shown in FIGS. 2 and 3 will be described below with reference to FIG.

[FIG. 6A]
First, as shown in FIG. 6A, in the semiconductor layer 20 made of, for example, n-type single crystal silicon, a p-type isolation region 21 is formed by diffusion of impurities from the surface opposite to the light receiving surface S. The separation region 21 is formed with a constant width with a boundary (pixel boundary 3a) between the pixels 3 equally arranged two-dimensionally with respect to the light receiving surface S of the semiconductor layer 20 as a center.

  Although not shown here, an impurity diffusion layer is formed in the semiconductor layer 20 as necessary, and then a wiring layer is formed on the surface of the semiconductor layer 20 opposite to the light receiving surface S. Is covered with an insulating film, and a supporting substrate is attached. Thereafter, the semiconductor layer 20 is polished from the light receiving surface S side to a required film thickness.

  Next, the groove pattern 20 a is formed on the light receiving surface S side of the semiconductor layer 20. The groove pattern 20a is formed with a depth d reaching the separation region 21 from the light receiving surface S along the pixel boundary 3a at a position shifted from the center in the width direction with respect to the pixel boundary 3a. The shift and depth d of the groove pattern 20a with respect to the pixel boundary 3a are the same as the shift and depth d of the groove type element separation described above with reference to FIG. The groove pattern 20a is formed by applying a lithography method to form a mask pattern on the light receiving surface S and etching the semiconductor layer 20 from the mask pattern.

  As a result, the semiconductor layer 20 made of n-type single crystal silicon is separated by the p-type isolation region 21 and the groove pattern 20a, and the separated portions are used as the n-type photoelectric conversion unit 23. The photoelectric conversion unit 23 of each pixel 3 has a width and volume in the arrangement direction of the color pixels 3R, 3G, and 3B in the depth region where the groove pattern 20a is provided, that is, the surface region close to the light receiving surface S. The pixel having a shorter wavelength of light has a larger configuration. On the other hand, in the depth region where the groove pattern 20a is not provided, that is, the region far from the light receiving surface S, the width and volume of the photoelectric conversion unit 23 of each color pixel 3R, 3G, 3B are uniform.

[FIG. 6B]
Next, as shown in FIG. 6B, a protective insulating layer 31 and an insulating layer 33 are sequentially formed on the light receiving surface S of the semiconductor layer 20 so as to cover the inner wall of the groove pattern 20a. At this time, for example, the protective insulating layer 31 made of a metal oxide is formed by an atomic layer deposition (ALD) method. Next, an insulating layer 33 made of silicon oxide or silicon nitride is formed by plasma CVD. Further, here, the protective insulating layer 31 and the insulating layer 33 are formed with a film thickness that does not fill the groove pattern 20a.

  Thereafter, a light shielding film 35 is formed on the insulating layer 33 with a thickness sufficient for light shielding while the inside of the groove pattern 20a is embedded. At this time, for example, a light shielding film 35 made of a metal material is formed by sputtering.

  As described above, the groove-type element isolation 25 configured to be embedded in the groove pattern 20a formed in the semiconductor layer 20 with the protective insulating layer 31, the insulating layer 33, and the light shielding film 35 is obtained.

[FIG. 6C]
Next, as illustrated in FIG. 6C, the light shielding film 35 is patterned on the insulating layer 33, and an opening 35 a is formed on the photoelectric conversion unit 23. At this time, each opening 35a may have the same shape in each of the color pixels 3R, 3G, 3B, and the center of each opening 35a coincides with the pixel center φ. Further, when the opening 35a is formed, the center of the line width of the light shielding film 35 is made coincident with the pixel boundary 3a, and the groove type element is formed by the light shielding film 35 when viewed from the light receiving surface S side. Patterning is performed so that the separation 25 is covered.

[Fig. 3]
Thereafter, as shown in FIG. 3, a planarization insulating film 37 is formed on the insulating layer 33 so as to cover the patterned light shielding film 35. Next, a color filter 39 of each color is formed on each pixel 3 on the planarization insulating film 37, and an on-chip lens 41 is formed on the color filter 39. As described above, the color filter 39 and the on-chip lens 41 may have the same shape in each of the color pixels 3R, 3G, and 3B, and the centers thereof coincide with the pixel center φ.

  As described above, the solid-state imaging device 1-1 is completed.

<Effects of First Embodiment>
In the solid-state imaging device 1-1 described above, the groove-type element isolation 25 formed on the light receiving surface S side of the semiconductor layer 20 is provided so as to be shifted in a direction depending on the wavelength intended for light reception. Thus, in a region where light of a short wavelength is photoelectrically converted, each color pixel is secured in a region where light of a long wavelength is photoelectrically converted while securing a larger volume as the pixel having a shorter wavelength of light to be received is received. 3R, 3G, 3B has a uniform volume.

  Therefore, it is possible to prevent the light receiving sensitivity of the blue light hB from being lowered due to the volume reduction on the light receiving surface S side due to the groove type element separation 25, and it is possible to improve the sensitivity shading in the blue pixel 3B. As a result, as shown in FIG. 7A, the normalized sensitivity to the incident angle of light on the light receiving surface S can be matched between the red light hR, the green light hG, and the blue light hB. As a result, the color balance depending on the sensitivity incident angle is improved, and coloring can be prevented.

  In the conventional configuration in which the arrangement of the groove-type element separation 25 is not shifted with respect to the pixel boundary 3a, as shown in FIG. 7B, the sensitivity shading of the blue light hB is larger than that of the red light hR and the green light hG. It was. For this reason, the color balance depending on the sensitivity incident angle is lost, and coloring occurs.

  In the configuration of the first embodiment, the light shielding film 35 is common among the color pixels 3R, 3G, and 3B, and the position of the light shielding film 35 coincides with the pixel boundary 3a. For this reason, the kicking of the incident light in the light shielding film 35 is common to the color pixels 3R, 3G, and 3B. Therefore, as shown in FIG. 8A, sensitivity shading can be made uniform without causing a decrease in absolute sensitivity at an incident angle of 0 °.

  On the other hand, in the conventional configuration in which the arrangement of the groove type element isolation 25 is not shifted with respect to the pixel boundary 3a, as shown in FIG. 8B, the sensitivity shading of the blue light hB does not affect the absolute sensitivity, but the red light hR. In addition, it is greatly deteriorated compared with the green light hG. Further, in order to prevent the sensitivity shading of the blue light hB, the configuration in which the light shielding film 35 is shifted to the long wavelength pixel side improves the color dependency of the sensitivity shading as shown in FIG. This causes a decrease in absolute sensitivity in the blue pixel 3B.

  However, in the configuration of the first embodiment, it is possible to prevent coloring by improving the color balance depending on the sensitivity incident angle without causing a decrease in absolute sensitivity. Can be achieved.

  Further, in the configuration of the first embodiment, the groove type element isolation 25 has a configuration in which the light shielding film 35 is disposed inside the groove pattern 20a. For this reason, leakage of light from the adjacent pixel 3 through the insulating layer 33 between the light receiving surface S and the light shielding film 35 is prevented. Thereby, it is also possible to prevent color mixing.

  In the first embodiment described above, the configuration in which the color pixels 3R, 3G, and 3B are arranged in a Bayer manner has been described as an example. However, the solid-state imaging device of the present technology is not limited to application to such a configuration. For example, in the case of a configuration using a complementary color system of cyan and yellow as the color filter, the groove type element separation is shifted on the cyan pixel side with respect to the pixel boundary 3a between the cyan pixel and the yellow pixel. Further, in the case of a configuration using white pixels, the groove type element separation is shifted on the white pixel side with respect to the pixel boundary 3a between each color pixel and the white pixel. Thereby, a similar effect can be obtained.

≪3. Second Embodiment >>
(Second example in which groove type element separation is shifted to the long wavelength pixel side)
<Configuration of solid-state imaging device 1-2>
FIG. 9 is a cross-sectional view illustrating a configuration of a main part of the solid-state imaging device 1-2 according to the second embodiment. The solid-state imaging device 1-2 of the second embodiment shown in this figure is different from the solid-state imaging device of the first embodiment in that the light-shielding film 35 is not embedded in the groove-type element isolation 45. The configuration is the same. For this reason, a duplicate description of the same components as in the first embodiment is omitted.

  That is, the groove type element isolation 45 has a configuration in which the insulating layer 33 is embedded in the groove pattern 20 a formed on the light receiving surface S side of the semiconductor layer 20 via the protective insulating layer 31. The arrangement state of the groove pattern 20a with respect to the pixel boundary 3a is the same as in the first embodiment. The configurations of the protective insulating layer 31 and the insulating layer 33 are the same as those in the first embodiment, and are different from those in the first embodiment in that only the thicknesses of these layers are the thicknesses for embedding in the groove pattern 20a. The light shielding film 35 is patterned on the insulating layer 33 in the same manner as in the first embodiment, and is different from the first embodiment in that the film thickness is sufficient if it is sufficient for light shielding.

<Method for Manufacturing Solid-State Imaging Device 1-2>
The solid-state imaging device 1-2 having the above-described configuration is manufactured when the protective insulating layer 31 and the insulating layer 33 described with reference to FIG. 6B are formed in the manufacturing of the solid-state imaging device according to the first embodiment. The groove pattern 20 a may be completely embedded by the protective insulating layer 31 and the insulating layer 33.
Other steps may be the same as those in the first embodiment.

<Effects of Second Embodiment>
Even in the solid-state imaging device 1-2 of the second embodiment having the above-described configuration, the groove-type element separation 45, the light shielding film 35, and the on-chip lens 41 for each color pixel 3R, 3G, 3B. The arrangement state is the same as in the first embodiment. For this reason, as in the first embodiment, it is possible to prevent coloring by improving the color balance depending on the sensitivity incident angle without causing a decrease in absolute sensitivity, thereby improving imaging characteristics. be able to.

<< 4. Third Embodiment >>
(Third example in which the groove type element separation is shifted to the long wavelength pixel side)
<Configuration of solid-state imaging device 1-3>
FIG. 10 is a cross-sectional view illustrating a configuration of a main part of the solid-state imaging device 1-3 according to the third embodiment. The solid-state imaging device 1-3 of the third embodiment shown in this figure is different from the solid-state imaging device of the first embodiment in that the pattern width of the groove-type element isolation 47 is formed stepwise in the depth direction. However, the other configurations are the same. For this reason, the overlapping description about the component similar to 1st Embodiment is abbreviate | omitted.

  That is, the pattern width of the groove-type element isolation 47 has a two-step size that is wide on the light receiving surface S side and narrow at a deep position of the semiconductor layer 20. Such groove type element isolation 47 is provided so as to be shifted with respect to the pixel boundary 3a in a portion where the pattern width on the light receiving surface S side is wide. On the other hand, in the grooved element separation 47, the portion of the pattern width that is far from the light receiving surface S may have the pattern width center coincided with the pixel boundary 3a.

  In such a groove type element isolation 47, the depth of the wide pattern width is set to the depth d described in the first embodiment.

  Further, in the groove type element isolation 47, the light shielding film 35 may be embedded only in a portion having a wide pattern width, and thus the light shielding film 35 can be embedded without generating voids.

<Method for Manufacturing Solid-State Imaging Device 1-3>
The solid-state imaging device 1-3 having the above-described configuration is manufactured by using every two masks when forming the groove pattern 20a described with reference to FIG. 6A in the manufacturing of the solid-state imaging device of the first embodiment. The groove pattern 20a may be formed with two opening widths by two etchings. Other steps may be the same as those in the first embodiment.

<Effect of the third embodiment>
Even in the solid-state imaging device 1-3 according to the third embodiment having the above-described configuration, the groove-type element isolation 47, the light shielding film 35, and the on-chip lens 41 for each color pixel 3R, 3G, 3B are provided. The arrangement state is the same as in the first embodiment. For this reason, as in the first embodiment, it is possible to prevent coloring by improving the color balance depending on the sensitivity incident angle without causing a decrease in absolute sensitivity, thereby improving imaging characteristics. be able to. Further, the groove type element isolation 47 has a configuration in which the light shielding film 35 is disposed inside the groove pattern 20a. For this reason, similarly to the first embodiment, light leakage between adjacent pixels 3 is prevented, and color mixing can also be prevented.

≪5. Fourth Embodiment >>
(Fourth example in which the groove type element separation is shifted to the long wavelength pixel side)
<Configuration of solid-state imaging device 1-4>
FIG. 11 is a cross-sectional view illustrating a configuration of a main part of a solid-state imaging device 1-4 according to the fourth embodiment. The fourth embodiment shown in this figure is a modification of the third embodiment. This solid-state imaging device 1-4 differs from the solid-state imaging device of the first embodiment in that the pattern width of the groove-type element isolation 49 is formed stepwise in the depth direction. The same shall apply. For this reason, the overlapping description about the component similar to 1st Embodiment is abbreviate | omitted.

  That is, the pattern width of the groove-type element isolation 49 has a two-stage size that is wide on the light receiving surface S side and narrow at a deep position of the semiconductor layer 20. Such a groove-type element isolation 49 is provided so as to be shifted from the pixel boundary 3a in the wide and narrow portions on the light receiving surface S side. That is, the groove pattern 20a constituting the groove-type element isolation 49 has a shape in which the narrow opening portion is dug from the bottom center of the wide opening portion formed on the light receiving surface S side.

  It is assumed that the groove-type element isolation 49 has the entire depth including the wide portion and the narrow portion of the pattern width set to the depth d described in the first embodiment.

  Further, in the groove type element isolation 49, the light shielding film 35 may be embedded only in a portion having a wide pattern width, and thus the light shielding film 35 can be embedded without generating a void.

<Method for Manufacturing Solid-State Imaging Device 1-4>
In manufacturing the solid-state imaging device 1-4 having the above-described configuration, in forming the groove pattern 20a described with reference to FIG. 6A in the manufacturing of the solid-state imaging device according to the first embodiment, first, etching using a mask is performed. Thus, a wide opening portion on the light receiving surface S side in the groove pattern 20a is formed. Next, by forming a sidewall on the side wall of the groove pattern 20a and further etching the center of the bottom of the groove pattern 20a, the groove pattern 20a having a narrowed opening width may be formed. Other steps may be the same as those in the first embodiment.

<Effect of Fourth Embodiment> Even in the solid-state imaging device 1-4 according to the fourth embodiment having the above-described configuration, the groove-type element isolation 49 and the light shielding film for the color pixels 3R, 3G, and 3B are provided. 35 and the arrangement state of the on-chip lens 41 are the same as those in the first embodiment. For this reason, as in the first embodiment, it is possible to prevent coloring by improving the color balance depending on the sensitivity incident angle without causing a decrease in absolute sensitivity, thereby improving imaging characteristics. be able to. Further, the groove type element isolation 49 has a configuration in which the light shielding film 35 is disposed inside the groove pattern 20a. For this reason, similarly to the first embodiment, light leakage between adjacent pixels 3 is prevented, and color mixing can also be prevented.

≪6. Fifth embodiment >>
(Example of shifting groove type element separation to the short wavelength pixel side)
<Configuration of solid-state imaging device 1-5>
FIG. 12 is a plan view of the main part of the solid-state imaging device 1-5 of the fifth embodiment, and is a plan view of 12 pixels when the semiconductor layer portion of the pixel region 4 is viewed in plan view from the light receiving surface side. FIG. FIG. 13 is a cross-sectional view of the main part of the solid-state imaging device 1-5 according to the fifth embodiment, and corresponds to the AA cross section of FIG. The configuration of the solid-state imaging device 1-5 of the fifth embodiment will be described below based on these drawings.

  The solid-state imaging device 1-5 of the fifth embodiment shown in these drawings differs from the solid-state imaging device of the first embodiment in the direction of shifting the groove-type element isolation 51 with respect to the pixel boundary 3a and the groove-type element isolation 51. The light shielding film 35 is not embedded. Other configurations are the same as those of the first embodiment. For this reason, a duplicate description of the same components as in the first embodiment is omitted.

  That is, the groove type element isolation 51 has a configuration in which the protective insulating layer 31 and the insulating layer 33 are embedded in the groove pattern 20a. The groove-type element isolation 51 having such a configuration is provided at a position shifted from the center of the pixel boundary 3 a on the light receiving surface S, and the shift direction thereof is the two pixels 3-3 separated by the groove-type element isolation 51. The pixel 3 depends on the wavelength of light intended for light reception.

  In particular, in the fifth embodiment, the groove-type element isolation 51 is provided so as to be shifted in the direction of the pixel having the short wavelength of light to be received among the two pixels 3 arranged adjacent to each other. That is, if the pixels 3R, 3G, and 3B of each color are arranged in a Bayer array, the groove type element isolation 51 between the green pixel 3G and the red pixel 3R is provided at a position shifted to the green pixel 3G side. Yes. Further, the groove type element separation 51 between the green pixel 3G and the blue pixel 3B is provided at a position shifted to the blue pixel 3B side.

  Here, “the groove type element isolation 51 is provided at a position shifted from the center of the pixel boundary 3a” means the center in the width direction when the groove type element isolation 51 is viewed from the light receiving surface S side, that is, the groove pattern 20a. It shows that the center of the opening width of is shifted with respect to the pixel boundary 3a. Therefore, the groove type element isolation 51 may be disposed on the pixel boundary 3a.

  In such a configuration, the width when the grooved element isolation 51 is viewed from the light receiving surface S side, that is, the opening width of the groove pattern 20a may be constant in the light receiving surface S.

  As a result, in the semiconductor layer 20, in the depth region where the groove-type element isolation 51 is provided, that is, in the surface region close to the light receiving surface S, the pixel having a shorter wavelength of light for light reception is adjacent to the pixel. In this configuration, the light shielding film 35 is far away from the opening 35a. For example, in the direction in which the green pixel 3G and the red pixel 3R are adjacent to each other, the groove-type element separation 51 is arranged so as to be shifted to the green pixel 3G side, so that the green color from the opening 35a of the light shielding film 35 in the red pixel 3R. The light receiving surface S of the pixel 3G is arranged apart.

  On the other hand, in the depth region where the groove type element isolation 51 is not provided in the semiconductor layer 20, the widths of the photoelectric conversion portions 23 of the color pixels 3R, 3G, and 3B are substantially the same in the two arrangement directions. The volume of the photoelectric conversion unit 23 in the pixels 3R, 3G, and 3B is uniform.

<Method for Manufacturing Solid-State Imaging Device 1-5>
The manufacture of the solid-state imaging device 1-5 having the above-described configuration is performed when the groove pattern 20a described with reference to FIG. 6A is formed in the manufacture of the solid-state imaging device of the first embodiment. The light receiving target wavelength range is shifted to the short pixel side. In addition, when the protective insulating layer 31 and the insulating layer 33 described with reference to FIG. 6B are formed, the groove pattern 20 a may be completely embedded by the protective insulating layer 31 and the insulating layer 33. Other steps may be the same as those in the first embodiment.

<Effect of Fifth Embodiment>
In the solid-state imaging device 1-5 according to the fifth embodiment described above, the groove type element isolation 51 formed on the light receiving surface S side of the semiconductor layer 20 depends on the wavelength intended for light reception with respect to the pixel boundary 3a. It was shifted in the direction. As a result, in the region on the light receiving surface S side where the groove type element isolation 51 is provided, pixels having a short wavelength of light intended for light reception are arranged far away from the opening 35a of the light shielding film 35 in the adjacent pixels. In the deeper region, the volume of each color pixel 3R, 3G, 3B is made uniform.

  Therefore, it is possible to prevent light leakage due to diffraction of the red light hR and color mixture caused by this due to the photoelectric conversion unit 23 of the adjacent green pixel 3G being moved away from the opening 35a of the light shielding film 35 of the red pixel 3R. Can do. As a result, as shown in FIG. 14A, it is possible to match the color mixing amount to the adjacent pixels with respect to the incident angle between the red light hR, the green light hG, and the blue light hB. As a result, the color balance depending on the sensitivity incident angle is improved, and coloring can be prevented.

  In the conventional configuration in which the arrangement of the groove type element separation is not shifted with respect to the pixel boundary, as shown in FIG. 14B, the leakage amount of the red light hR into the adjacent pixels is compared with the blue light hB and the green light hG. And get bigger. For this reason, the color balance depending on the sensitivity incident angle is lost, and coloring is likely to occur.

  In the configuration of the fifth embodiment, the light shielding film 35 is common among the color pixels 3R, 3G, and 3B, and the position of the light shielding film 35 coincides with the pixel boundary 3a. For this reason, the kicking of the incident light in the light shielding film 35 is common to the color pixels 3R, 3G, and 3B, and the absolute sensitivity is not lowered at the incident angle of 0 °.

  As a result of the above, according to the solid-state imaging device of the fifth embodiment, it is possible to prevent color mixing by preventing color mixing depending on the incident angle, so that imaging characteristics can be improved.

≪7. Sixth Embodiment >>
(Electronic equipment using solid-state imaging device)
The solid-state imaging device having each configuration according to the present technology described in the first to fifth embodiments described above includes a camera system such as a digital camera and a video camera, a mobile phone having an imaging function, or an imaging function. It can be provided in a solid-state imaging device for electronic equipment such as other equipment provided.

  FIG. 15 is a configuration diagram of a camera using a solid-state imaging device as an example of an electronic apparatus according to the present technology. The camera according to the present embodiment is an example of a video camera capable of capturing still images or moving images. The camera 91 includes a solid-state imaging device 1, an optical system 93 that guides incident light to a light receiving sensor unit of the solid-state imaging device 1, a shutter device 94, a drive circuit 95 that drives the solid-state imaging device 1, and the solid-state imaging device 1. And a signal processing circuit 96 for processing the output signal.

  The solid-state imaging device 1 is a solid-state imaging device having the configuration described in the first to fifth embodiments. The optical system (optical lens) 93 forms image light (incident light) from the subject on the imaging surface of the solid-state imaging device 1. A plurality of pixels are arranged on the imaging surface, and incident light from the optical system 93 is guided to the photoelectric conversion region of the solid-state imaging device constituting the pixels. As a result, signal charges are accumulated in the photoelectric conversion region of the solid-state imaging device 1 for a certain period. Such an optical system 93 may be an optical lens system including a plurality of optical lenses. The shutter device 94 controls the light irradiation period and the light shielding period to the solid-state imaging device 1. The drive circuit 95 supplies drive signals to the solid-state imaging device 1 and the shutter device 94, and controls the signal output operation to the signal processing circuit 96 of the solid-state imaging device 1 and the shutter device by the supplied drive signal (timing signal). 94 shutter operation is controlled. That is, the drive circuit 95 performs a signal transfer operation from the solid-state imaging device 1 to the signal processing circuit 96 by supplying a drive signal (timing signal). The signal processing circuit 96 performs various signal processing on the signal transferred from the solid-state imaging device 1. The video signal subjected to the signal processing is stored in a storage medium such as a memory or output to a monitor.

  According to the electronic device according to the present embodiment described above, by providing the solid-state imaging device having good imaging characteristics described in each of the above-described embodiments, high-definition imaging in an electronic device having an imaging function is achieved. It becomes possible.

  In addition, this technique can also take the following structures.

(1)
A semiconductor layer in which one main surface side is a light receiving surface and a plurality of pixels are set along the light receiving surface;
A photoelectric conversion unit provided in the semiconductor layer for each pixel;
A groove-type element isolation provided in a groove pattern formed on the light-receiving surface side of the semiconductor layer and having an insulating layer provided at a position shifted from a pixel boundary between the pixels; Solid-state imaging device.

(2)
The solid-state imaging device according to (1), wherein a direction in which the groove type element separation is shifted with respect to the pixel boundary depends on a wavelength of light intended for light reception in each pixel.

(3)
Above the light-receiving surface of the semiconductor layer, there is provided a light-shielding film having an opening opening above the photoelectric conversion portion and patterned in a line width centered on the pixel boundary (1) Or the solid-state imaging device of (2) description.

(4)
The groove type element isolation is covered with the light shielding film. The solid-state imaging device according to (3).

(5)
The solid color filter according to any one of (1) to (4), wherein a color filter of each color is formed in a pattern with the center aligned with the center of the pixel above the light receiving surface in the semiconductor layer. Imaging device.

(6)
The solid-state imaging according to any one of (1) to (5), wherein an on-chip lens having a pattern formed so that a center coincides with a center of the pixel is provided above the light receiving surface in the semiconductor layer. apparatus.

(7)
The groove-type element isolation is provided by shifting in the direction of a pixel having a long wavelength of light for light reception among the pixels arranged adjacent to each other. (1) to (6) Solid-state imaging device.

(8)
The groove type element isolation is the solid-state imaging device according to (7), wherein a light shielding film is embedded in the center of the groove pattern.

(9)
The solid-state imaging device according to any one of (1) to (8), wherein the groove-type element separation is formed in multiple stages so that a pattern width increases on the light receiving surface side.

(10)
The solid-state imaging device according to (9), wherein in the groove-type element separation, at least a portion on the light receiving surface side is displaced with respect to the pixel boundary.

(11)
The groove-type element isolation is provided in the above-described pixels disposed adjacently so as to be shifted in the direction of a pixel having a short wavelength of light for light reception. Solid-state imaging device.

(12)
In the semiconductor layer, an isolation region composed of an impurity region is provided on the pixel boundary reaching from the surface opposite to the light receiving surface to the trench type element isolation. Any one of the solid-state imaging devices.

(13)
A semiconductor layer in which one main surface side is a light receiving surface and a plurality of pixels are set along the light receiving surface;
A photoelectric conversion unit provided in the semiconductor layer for each pixel;
A groove-type element isolation formed by providing an insulating layer in a groove pattern formed on the light-receiving surface side of the semiconductor layer, and provided at a position shifted from a pixel boundary between the pixels;
An electronic apparatus comprising: an optical system that guides incident light to the photoelectric conversion unit.

  1-1, 1-2, 1-3, 1-4, 1-5 ... solid-state imaging device, 3 ... pixel, 3a ... pixel boundary, 20 ... semiconductor layer, 20a ... groove pattern, 21 ... separation region, 23 ... Photoelectric conversion unit, 25, 45, 47, 49, 51 ... groove type element isolation, 31 ... protective insulating layer, 33 ... insulating layer, 35 ... light-shielding film, 35a ... opening, 39 ... color filter, 41 ... on-chip lens 91: Camera (electronic device), 93: Optical system, S: Light receiving surface, φ: Pixel center

Claims (20)

A semiconductor layer provided with a plurality of pixels;
A photoelectric conversion unit provided in the semiconductor layer for each pixel;
A first groove type element isolation provided on the light receiving surface side of the semiconductor layer;
A second groove type element isolation provided at a position different from the first groove type element isolation on the light receiving surface side of the semiconductor layer;
A first light-shielding film formed at a position shifted in the first direction from the first trench element isolation;
A second light-shielding film formed at a position shifted in the second direction from the second groove-type element separation;
With
An insulating layer is formed inside the first groove type element isolation and the second groove type element isolation,
The first direction and the second direction are opposite directions. Solid-state imaging device. The solid-state imaging device according to claim 1, wherein a protective insulating layer is formed in each of the first groove type element isolation and the second groove type element isolation. 3. The solid-state imaging device according to claim 1, wherein at least a part of the first light shielding film is embedded in the first groove type element isolation. The solid-state imaging device according to claim 1, wherein the insulating layer is formed above the light receiving surface of the photoelectric conversion unit. The solid-state imaging device according to claim 2, wherein the protective insulating layer is formed above the light receiving surface of the photoelectric conversion unit. The solid-state imaging device according to claim 1, wherein a planarization insulating film is formed above the light receiving surface of the photoelectric conversion unit. The solid-state imaging device according to claim 1, wherein a color filter is provided above the light receiving surface in the semiconductor layer. The solid-state imaging device according to claim 1, wherein an on-chip lens is provided above the light receiving surface in the semiconductor layer. The solid-state imaging device according to claim 1, wherein at least a part of the light-receiving surface side of the first groove-type element separation is covered with the first light-shielding film. The solid-state imaging device according to claim 1, wherein an isolation region is formed as a p-type impurity diffusion region so as to be adjacent to the photoelectric conversion unit inside the semiconductor layer. The solid-state imaging device according to claim 1, wherein the first direction depends on a wavelength of light intended for light reception for each pixel. The solid-state imaging device according to claim 1, wherein the first direction is a direction of a pixel having a long wavelength of light to be received. The solid-state imaging device according to claim 1, wherein the first direction is a direction of a pixel having a short wavelength of light intended for light reception. The solid-state imaging device according to claim 1, wherein the first groove type element isolation is formed in multiple stages so that a pattern width is increased on a light receiving surface side. The horizontal center of the first groove type element separation is formed at a position where at least a portion on the light receiving surface side is shifted from a horizontal center of the first light shielding film. The solid-state imaging device according to any one of the above. The solid-state imaging device according to claim 10, wherein the separation region is formed on a surface opposite to the light receiving surface. The solid-state imaging device according to claim 16, wherein the separation region is formed so as to be in contact with a side opposite to the light receiving surface of the first groove type element separation. The solid-state imaging device according to claim 1, wherein the insulating layer is made of silicon oxide or silicon nitride. The solid-state imaging device according to claim 2, wherein the protective insulating layer is made of an oxide such as hafnium, aluminum, tantalum, or titanium. A solid-state imaging device according to any one of claims 1 to 19,
An optical system for guiding incident light to the photoelectric conversion unit;
An electronic apparatus comprising: a signal processing circuit that processes an output signal of the solid-state imaging device.

Images