JP2018117178A - Image pickup element and imaging device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an imaging device of a simple structure, which is capable of producing signals for a shot image and focus detection.SOLUTION: An imaging device processes signals read from an image pickup element to produce an image. The image pickup element includes a plurality of unit pixels 100. Each unit pixel has: photodiodes (PD) 101, 102 which are laminated as photoelectric conversion parts different in light-receiving area; a vertical type transistor 103 operable to perform electric charge transfer from the surface layer-side PD 101 closer to incident light; and a planar-type transistor 104 operable to perform electric charge transfer from the deep layer-side PD 102. The deep layer-side PD 102 is arranged so as to be biased in a direction away from the vertical type transistor 103, and it is smaller than the PD 101 in light-receiving area. Signals for a shot image are acquired from the PD 101, and signals for focus detection are acquired from the PD 102.SELECTED DRAWING: Figure 1

Description

  The present invention relates to an imaging device and an imaging apparatus that can acquire signals for captured images and focus detection.

  An image sensor that performs pupil division type focus detection can photoelectrically convert light passing through different pupil planes of the imaging optical system, and can detect an image shift amount by comparing a plurality of image signals. As a simple configuration, each pixel unit includes a plurality of photodiodes (hereinafter also referred to as PDs) corresponding to one microlens. The light receiving region is limited by a light shielding member or the like disposed in front of the PD, and the PD receives light passing through different pupil planes, and a process of comparing a plurality of pixel outputs is performed. In this case, since the light receiving area of the PD is limited, the pixel unit alone cannot be used for a captured image, and becomes a pixel unit dedicated to focus detection. In Patent Document 1, a plurality of PDs are stacked in a unit pixel, and each part is configured for a captured image and for focus detection on the surface layer side and the deep layer side of the PD. Both the captured image and the focus detection image can be acquired.

  By the way, there is known a back-illuminated imaging device configured such that a PD receives light with the back side of the substrate wiring layer as the light incident side. The solid-state imaging device disclosed in Patent Literature 2 includes a photoelectric conversion unit stacked in a semiconductor layer, and one layer of the photoelectric conversion unit is formed up to a portion embedded in the semiconductor layer of the gate electrode of the vertical transistor. It is a configuration.

Japanese Patent No. 4838990 JP 2013-84785 A

The imaging device disclosed in Patent Document 1 has a structure in which PDs are stacked, and requires a portion extending in the vertical direction from a flat portion with respect to incident light to a transfer transistor that extracts charges. For this reason, when the obliquely extended light (incident light from the oblique direction) is received by the PD extended in the vertical direction, unnecessary charges are generated. Although the solid-state imaging device disclosed in Patent Document 2 is a back-illuminated type, there is no disclosure regarding a structure for acquiring a pupil division type phase difference detection signal.
An object of the present invention is to provide an imaging device capable of generating signals for captured images and focus detection with a simple configuration.

  An apparatus according to an embodiment of the present invention is an image pickup device having a pixel unit having a configuration in which a plurality of photoelectric conversion units are stacked, and a captured image formed on a light incident side among the plurality of photoelectric conversion units. The first photoelectric conversion unit for focus detection is formed at a position farther from the light incident side than the first photoelectric conversion unit, and has a light receiving area different from that of the first photoelectric conversion unit. A second photoelectric conversion unit; a first transistor that transfers charge from the first photoelectric conversion unit; a second transistor that transfers charge from the second photoelectric conversion unit; and the second photoelectric conversion unit. And a floating diffusion portion disposed between the first transistor and the first transistor.

  According to the present invention, signals for captured images and focus detection can be generated with a simple configuration.

It is sectional drawing which shows the structure of the unit pixel which concerns on embodiment of this invention. It is sectional drawing which shows the pair pixel of the pupil division system which concerns on this embodiment. It is a circuit diagram which shows the structure of the unit pixel which concerns on this embodiment. It is a block diagram showing an example of composition of an image sensor concerning this embodiment. 6 is a timing chart illustrating an operation example of the image sensor according to the present embodiment. It is a block diagram which shows the structural example of the whole imaging device which concerns on this embodiment.

The best mode for carrying out the present invention will be described in detail below.
FIG. 1 is a diagram schematically showing a cross-sectional structure of a unit pixel 100 showing a representative embodiment of the present invention. The back-illuminated imaging device has a configuration in which a circuit portion is formed on the front surface side of the semiconductor substrate and a light receiving portion is formed on the back surface side of the semiconductor substrate. FIG. 1 shows one unit pixel 100 among a plurality of pixel portions. In the pixel portion, photodiodes (PD) 101 and 102 which are photoelectric conversion portions are formed in the depth direction (stacking direction) of the semiconductor substrate. In the figure, among the two layers of the stacked PDs, PD101 is expressed as “PD1” and PD102 is expressed as “PD2”.

  A microlens 107 is provided on the back side (light incident side) on the semiconductor substrate. Incident light to the unit pixel 100 is collected by the microlens 107 and received by the PD 101 and PD 102 to perform photoelectric conversion. In this example, a captured image PD 101 is arranged on the surface layer side with respect to incident light, and a focus detection PD 102 is arranged on the deep layer side. The PD 101 is designed to have a light receiving area that can effectively capture incident light collected by the microlens 107. The PD 102 has a light receiving area that can capture incident light divided into pupils, and is designed to have a smaller effective area than the PD 101. The PD 102 is disposed at a position shifted from the optical axis center of the microlens 107. That is, in the phase difference detection method based on pupil division, focus detection is possible by performing correlation calculation together with focus detection PD output of a pair of pixel units. In addition, the PD 102 receives light having a wavelength component transmitted through the region of the PD 101 and performs photoelectric conversion. Therefore, the PD 102 mainly obtains a focus detection signal by photoelectrically converting light having a long wavelength of 600 nm or more reaching the deep part from the absorption wavelength of light in the depth direction of silicon, which is a semiconductor substrate material.

  The charge photoelectrically converted by the PD 101 is transferred to a floating diffusion portion (hereinafter referred to as an FD portion) 105 by the vertical transistor 103. The vertical transistor 103 is formed up to a position where the electrode reaches the PD 101, and transfers a stored signal charge to the FD unit 105 by applying a desired voltage.

  The planar transistor 104 is formed in contact with the PD 102 and the FD unit 105 on the surface side of the semiconductor substrate (the side opposite to the light incident side). The planar transistor 104 transfers the charge accumulated in the PD 102 to the FD unit 105. The wiring 106 is a wiring for driving a switch in the pixel portion or a power supply.

  In this embodiment, since the PD 101 for captured images is arranged on the surface layer side, a large amount of incident light can be captured, so that the S / N ratio (signal-to-noise ratio) of the pixel signal can be increased. Since the charge transfer of the PD 101 is performed by the vertical transistor 103, it is not necessary to extend the region of the PD 101 to the transfer unit, and it is difficult to be affected by oblique incident light. Note that when the vertical transistor 103 is in a charge transfer state, the surface layer PD 101 and a channel portion formed around the vertical transistor 103 are connected. For this reason, if the deep PD 102 is close to the vertical transistor 103 due to the influence, there is a possibility that charge is mixed. On the other hand, in the configuration of the present embodiment, the deep PD 102 provided for focus detection may have a light receiving area with respect to incident light that is divided into pupils and an arrangement according to the light receiving area. Can be secured sufficiently. That is, it is possible to avoid the influence on the charge separation of the PD 101 and the PD 102, and the captured image signal and the focus detection signal can be easily and accurately acquired in the unit pixel.

  FIG. 2 shows a configuration example in which horizontal pupil division is performed in order to explain phase difference type focus detection by pupil division. FIG. 2 shows an arrangement example of two adjacent unit pixels 100. The unit pixel shown on the right side has the same configuration as the unit pixel 100 shown in FIG. 1, but the unit pixel shown on the left side is different in the positional relationship of the PD 102 with respect to the PD 101. That is, the two columns of paired pixels are arranged symmetrically in the horizontal direction with respect to the optical axis of the microlens indicated by a one-dot chain line in FIG. For convenience of explanation, a pixel arranged on the right side is called an A unit pixel, and a pixel arranged on the left side is called a B unit pixel. Since the A unit pixel has the same arrangement as the unit pixel 100 described in FIG. 1, the same reference numerals as those in FIG. In addition, for the B unit pixel, a reference numeral obtained by adding 100 to the reference numerals 101 to 107 used in the unit pixel 100 described with reference to FIG.

  The PD 102 of the A unit pixel and the PD 202 of the B unit pixel are PDs for focus detection, and are arranged so as to be deviated in one direction with respect to the center lines of the microlenses 107 and 207 indicated by a one-dot chain line. Specifically, since the PD 102 of the A unit pixel is deviated to the left with respect to the center line of the micro lens 107, the light beam that has passed through the partial area of the exit pupil on the right side of the photographing lens is received. Further, since the PD 202 of the B unit pixel is deviated to the right side with respect to the center line of the micro lens 207, the light beam that has passed through the partial area of the exit pupil on the left side of the photographing lens is received.

  The imaging device includes a pixel group in which A unit pixels and B unit pixels are regularly arranged in the horizontal direction. In the pixel group, an object image acquired by the PD 102 of the A unit pixel is an A image, and an object image acquired by the PD 202 of the B unit pixel is a B image. In the phase difference detection method, the defocus amount (defocus amount) of the subject image can be detected by detecting the relative position (output shift amount) between the A image and the B image. When detecting the amount of defocus in the vertical direction (vertical direction), the PD unit 102 of the A unit pixel is biased upward and the PD 202 of the B unit pixel is biased downward in the vertical direction of the two-dimensional array. What is necessary is just composition.

  FIG. 3 is a circuit diagram showing the unit pixel 100 shown in FIGS. 1 and 2. The photoelectric conversion units PD101 and PD102 receive incident light through a microlens and generate optical signal charges. Each anode of PD101 and PD102 is grounded. The cathode of the PD 101 is connected to the FD unit 105 through the vertical transistor 103. The cathode of the PD 102 is connected to the FD unit 105 through the planar transistor 104.

  One end (end on the non-ground side) of the FD unit 105 is connected to the gate of the amplification transistor 109. The amplification transistor 109 has a gate connected to the source of a reset transistor 108 for resetting the transistor. A power supply terminal of a predetermined power supply voltage VDD is connected to the drain of the reset transistor 108. The drain of the amplification transistor 109 is connected to the power supply terminal of the power supply voltage VDD, and the source thereof is connected to the drain of the selection transistor 110.

The meaning of each signal shown in FIG. 3 is as follows.
PRES signal: reset signal to the reset transistor 108 PVTG signal: transfer control signal to the vertical transistor 103 PTX signal: transfer control signal to the planar transistor 104 VOUT signal: output signal of the unit pixel PSEL signal: A selection control signal to the selection transistor 110.

  The vertical transistor 103 is driven by the PVTG signal input to the gate terminal, and transfers the signal of the PD 101 to the gate of the FD unit 105 and the amplification transistor 109. The planar transistor 104 is driven by a PTX signal input to the gate terminal, and transfers the signal of the PD 102 to the FD unit 105 and the gate of the amplification transistor 109. The reset transistor 108 is driven by a PRES signal input to the gate terminal, and resets the FD unit 105, PD101, and PD102. The output signal read after the reset is read as a noise signal. The selection transistor 110 is driven by the PSEL signal input to the gate terminal, and the output signal VOUT of the unit pixel amplified by the amplification transistor 109 is output from the output terminal.

  FIG. 4 is a block diagram illustrating a configuration example of the image sensor 400. The imaging element 400 includes an imaging unit in which a plurality of unit pixels 100 are arranged in a matrix. The pixel group constituting the imaging unit receives light imaged by the photographing lens, performs photoelectric conversion, and outputs an electrical signal. In FIG. 4, a total of 16 unit pixels 100 in 4 rows and 4 columns are shown as representatives. As shown in FIGS. 1 and 2, the unit pixel 100 has a structure in which a plurality of PDs are stacked. A captured image signal and a focus detection signal from each PD are output from the vertical output line 401. That is, the output terminal of the VOUT signal in FIG. 3 is connected to the vertical output line 401 of each column shown in FIG. 4 and to the constant current source 402 as a load. The amplification transistor 109 in FIG. 3 functions as a source follower amplifier by being connected to the load (constant current source 402) of the vertical output line 401 via the selection transistor 110.

  The vertical scanning circuit 407 is connected to the unit pixel 100 via the signal lines 408 of the PSEL signal, PRES signal, PTX signal, and PVTG signal, which are connected for each row, and performs row selection and driving. In FIG. 4, the signal line 408 is wired in each row, although only the 0th row, which is the first row, is illustrated. The signal of the pixel portion selected by the vertical scanning circuit 407 is read out to the vertical output line 401. The readout circuit 403 includes a column circuit configured for each vertical output line 401, and reads out the signal of the pixel portion selected by the vertical scanning circuit 407. The pixel signal read by the reading circuit 403 is sequentially output to the outside of the image sensor via the horizontal output line 405 and the output amplifier 406 by driving of the horizontal scanning circuit 404. In the readout circuit 403, for the pixel signal read out to the vertical output line 401, the noise signal component is held in a noise capacitor (not shown) by the PTN signal, and the optical signal component is not shown by the PTS signal. Keep in capacity. The signals held here are sequentially output to the horizontal output line 405 by the PH signal of the horizontal scanning circuit 404 and transferred to the output amplifier 406 at the subsequent stage. Thereby, the pixel signal from which the noise signal is subtracted is output.

  Next, with reference to FIG. 5, an example of a pixel signal readout operation of the image sensor 400 in the present embodiment will be described. FIG. 5 is a timing chart for explaining an operation of reading out charges accumulated in each PD one pixel at a time in each row. A case where output is performed from the captured image PD 101 and a case where output is performed from the focus detection PD 102 by the pupil division method will be described. In the figure, the HD signal is a signal that changes from a low level to a high level when reading the signal of the unit pixel 100 for each row. Each time the HD signal changes from the low level to the high level, the PSEL signal changes to the high level in the row order. Each pulse signal is set to a high level to turn on the corresponding transistor. The time axis T is set from the left to the right in the figure, and indicates time t0, t1 to t14. Here, in order to simplify the description, it is assumed that the PD 101 and PD 102 of the unit pixels are accumulated before the time t0, and the operation after the time t0 will be described.

  With reference to the timing chart of FIG. 5, a pixel signal readout operation for a captured image will be described. First, in the period from time t0 to time t1, the HD signal becomes low level (hereinafter referred to as Lo). At time t3, the PSEL signal becomes high level (hereinafter referred to as Hi), and the signal of the unit pixel in the readout row is output to the vertical output line 401. At this time, since the PRES signal is in the Hi state, the FD unit 105 is in the reset state.

  When the PRES signal becomes Lo at time t4, the reset of the FD unit 105 is released. The potential of the FD unit 105 at this time is read as a reset signal level (noise component) to the vertical output line 401 and input to the column reading circuit 403. By setting the PTN signal to the Hi state during the period from the time t6 to the time t7, the column read circuit 403 writes the reset signal level to the noise capacitor (not shown) and temporarily stores it.

  Next, the PVTG signal is in a Hi state in the period from time t8 to time t9, and the photocharge accumulated in the PD 101 is transferred to the FD unit 105. By this operation, the charge of the captured image PD 101 is transferred to the FD unit 105. At this time, the potential fluctuation of the FD unit 105 according to the amount of charge is read as an optical signal level (light component + noise component) to the vertical output line 401 and input to the column readout circuit 403. In the column readout circuit 403, the PTS signal is in the Hi state during the period from time t10 to time t11, and the optical signal level is written in the signal level capacitor (not shown).

  Next, in the period from time t13 to time t14, which is a horizontal transfer period, the signal held in the noise capacitor and the signal level capacitor of the column readout circuit 403 is read by the horizontal scanning circuit 404. During the horizontal transfer period (t13 to t14), the PH signal sequentially repeats the Hi state and the Lo state for each column circuit of the column readout circuit 403. As a result, the reset signal and the optical signal held in each capacitor of the column readout circuit 403 pass through the horizontal output line 405 and are output as a differential signal level (optical component) by the output amplifier 406. That is, a signal obtained by subtracting the noise component from the optical signal level (light component + noise component) of the vertical output line 401 is acquired.

  The pixel signal read out by driving the image sensor described above can be used as a signal for a captured image. That is, the above operation is repeated for each row, and the output signal of the unit pixel is read as a signal for a captured image for one screen.

  Next, the reading operation of the focus detection pixel signal will be described. In the readout operation of the captured image signal described with reference to FIG. 5, the PD in which charge is stored is the PD 101 on the surface layer side, but in this case, it is different in that it is the PD 102 on the deep layer side. Accordingly, the transistor for performing charge transfer is changed from the vertical transistor 103 to the planar transistor 104. Since other operations are the same as those in FIG. 5, only the main points will be described with reference to FIG. For convenience of explanation, the PVTG signal and the PTX signal are shown on the timing chart in FIG. Only shall be controlled.

  A period from time t0 to time t8 is a period in which the accumulation period and the reading operation of the noise component in the column readout circuit 403 are performed. During the period from time t8 to time t9, the PTX signal is in the Hi state, and the charge accumulated in the focus detection PD 102 is transferred to the FD unit 105. At this time, the potential fluctuation of the FD unit 105 according to the amount of charge is read as an optical signal level (light component + noise component) to the vertical output line 401 and input to the column readout circuit 403. The operation described above is performed during the period from time t10 to time t14.

  The pixel signal read out by driving the image sensor described above can be used as a focus detection pixel signal. That is, the correlation calculation is executed by the focus detection calculation unit together with the focus detection pixel signal which is a pair pixel signal. Therefore, it is possible to detect the defocus amount (defocus amount) of the subject image. In FIG. 5, the image pickup device is driven in units of rows, and a captured image signal and a focus detection signal are read out as one row. By sequentially performing vertical scanning by the above-described driving, one piece of image information (for one screen) and focus detection information necessary for focus adjustment control are generated.

  FIG. 6 is a block diagram illustrating a configuration example of the imaging apparatus 700 according to the present embodiment. The photographing lens unit 711 includes an optical member such as a lens and a diaphragm constituting an imaging optical system. For example, in an interchangeable lens imaging system, a user can shoot with the photographing lens unit 711 mounted on the camera body. The photographing lens unit 711 includes a zoom lens for changing the angle of view, a focus lens for adjusting focus, an image blur correction lens for correcting image blur due to camera shake, and the like. In the photographing lens unit 711, the control circuit 706 performs aperture control, focus adjustment control, and the like via the timing generation circuit 710. The light that passes through the photographic lens unit 711 forms an image on the imaging surface of the imaging device 400.

  The light from the subject imaged through the photographing lens unit 711 is received by the image sensor 400 and an electrical signal is output by photoelectric conversion. The image sensor 400 has a back-illuminated configuration in which the opposite side to the substrate wiring layer is received as a light incident side, and is a CMOS (complementary metal oxide semiconductor) type image sensor. In this example, two PDs, that is, a captured image PD and a focus detection PD, are stacked in a unit pixel.

  An analog signal processing circuit (AFE) 702 performs signal amplification, reference level adjustment, A (analog) / D (digital) conversion processing, and the like on the analog image signal output from the image sensor 400. A digital signal processing circuit (DFE) 703 performs digital image processing such as various corrections and data rearrangement on the image signal output from the analog signal processing circuit 702.

  The image processing circuit 705 performs processing necessary for correlation calculation and focus detection and predetermined image processing on the image signal output from the digital signal processing circuit 703. Predetermined image processing includes defective pixel correction processing and development processing. The memory circuit 704 includes a nonvolatile memory that stores the image signal and the like output from the image processing circuit 705. The recording medium 709 is a recording medium such as a memory card that records and holds the image signal output from the image processing circuit 705, and is used by being mounted on the camera body.

  The control circuit 706 is a central part that controls the entire imaging apparatus, and includes a CPU (Central Processing Unit). The control circuit 706 performs overall driving and control of the photographing lens unit 711, the image sensor 400, the image processing circuit 705, and the like. For example, the control circuit 706 performs drive control of the image sensor 400 via the timing generation circuit 710. The timing generation circuit 710 generates and outputs timing for each control signal for driving the imaging element 400 and the movable optical member (such as a focus lens) of the imaging lens unit 711 in accordance with a signal from the control circuit 706.

  The operation circuit 707 receives a signal from an operation member, a touch panel, or the like included in the imaging apparatus 700, and notifies the control circuit 706 of a user operation instruction regarding setting of a focus detection area. The control circuit 706 performs selection control for a captured image or focus detection for each row in the captured image, and a focus detection row is selected according to the focus detection area selected and operated by the operation circuit 707. By controlling the driving of the image sensor 400, it is possible to acquire both image signals for captured images and focus detection. The control circuit 706 acquires the output signals of the photoelectric conversion units (PD102) included in the pixel units having different light reception distributions, performs phase difference detection, and calculates the defocus amount. The focus lens is driven and controlled based on the calculated defocus amount, and the focus of the imaging optical system is adjusted.

  The display circuit 708 includes a display device such as a liquid crystal display panel. The display circuit 708 displays an image after shooting, a live view image, various setting screens, and the like and presents them to the user. The user can check the image and perform a desired operation while viewing the display screen.

  In the present embodiment, the first and second photoelectric conversion units are stacked, and in an imaging device having a vertical transistor, charge transfer is performed by the vertical transistor using the first photoelectric conversion unit for a captured image. Do. Further, the second photoelectric conversion unit is arranged to be deviated in a predetermined direction while avoiding the vertical transistor for focus detection. The predetermined direction is a direction orthogonal to a center line passing through the center of the microlens included in each pixel portion and away from the vertical transistor. Since a PD having a laminated structure does not have longitudinal sensitivity, it is not affected by obliquely incident light. Further, since the light receiving region of the PD is not limited by the light shielding film or the like, a signal for a captured image can be acquired by the pixel unit alone. According to this embodiment, it is possible to provide an imaging apparatus that can easily acquire signals for captured images and focus detection with a simple configuration while reducing the influence of obliquely incident light in each pixel unit.

101,102 PD (photoelectric converter)
103 Vertical transistor 104 Planar transistor 105 FD part (floating diffusion part)
107 Microlens 700 Imaging Device 705 Image Processing Circuit 706 Control Circuit

Claims (8)

An imaging device having a pixel portion having a configuration in which a plurality of photoelectric conversion portions are stacked,
Of the plurality of photoelectric conversion units, a first photoelectric conversion unit for a captured image formed on the light incident side;
A second photoelectric conversion unit for focus detection which is formed at a position farther from the light incident side than the first photoelectric conversion unit and has a light receiving area different from that of the first photoelectric conversion unit;
A first transistor that transfers charges from the first photoelectric conversion unit;
A second transistor for transferring charges from the second photoelectric conversion unit;
An image pickup device comprising: a floating diffusion portion disposed between the second photoelectric conversion portion and the first transistor. The image sensor according to claim 1, wherein the second photoelectric conversion unit is arranged to be biased in a direction away from the first transistor. The pixel portion has a microlens,
The imaging device according to claim 2, wherein the second photoelectric conversion unit is arranged to be deviated with respect to a center line passing through a center of the microlens. Of the plurality of pixel units, the second photoelectric conversion unit included in the first pixel unit is arranged to be biased in a first direction orthogonal to the center line of the microlens, and the second pixel The imaging device according to claim 3, wherein the second photoelectric conversion unit included in the unit is arranged to be biased in a second direction opposite to the first direction. 5. The imaging device according to claim 1, wherein a light receiving area of the second photoelectric conversion unit is smaller than a light receiving area of the first photoelectric conversion unit. The first transistor is a vertical transistor formed in a stacking direction,
The imaging device according to claim 1, wherein the second transistor is a planar transistor formed on a side opposite to a light incident side. The imaging device according to any one of claims 1 to 6,
An image processing apparatus comprising: an image processing unit that processes an output signal of the image sensor to generate an image. A control means for performing focus detection and focus adjustment control of the imaging optical system;
The image processing means performs a process of generating an image by acquiring a signal obtained by photoelectrically converting the light imaged through the imaging optical system by the first photoelectric conversion unit;
The control means detects a phase difference based on a signal obtained by photoelectric conversion of the light imaged through the imaging optical system by the second photoelectric conversion unit, calculates a defocus amount, and performs the focus adjustment. The imaging apparatus according to claim 7.

Images