JP2018113386A - Method for manufacturing light-emitting diode chip and light-emitting diode chip - Google Patents
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 12
- 238000000034 method Methods 0.000 title abstract description 9
- 239000000758 substrate Substances 0.000 claims abstract description 86
- 238000005520 cutting process Methods 0.000 claims abstract description 27
- 239000004065 semiconductor Substances 0.000 claims abstract description 8
- 239000013078 crystal Substances 0.000 claims abstract description 6
- 239000010980 sapphire Substances 0.000 claims description 11
- 229910052594 sapphire Inorganic materials 0.000 claims description 11
- 238000002360 preparation method Methods 0.000 claims description 5
- 239000005304 optical glass Substances 0.000 claims description 4
- 239000011347 resin Substances 0.000 claims description 4
- 229920005989 resin Polymers 0.000 claims description 4
- 239000000919 ceramic Substances 0.000 claims description 3
- 239000000853 adhesive Substances 0.000 claims description 2
- 230000001070 adhesive effect Effects 0.000 claims description 2
- 235000012431 wafers Nutrition 0.000 description 51
- 230000003287 optical effect Effects 0.000 description 7
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 5
- 229910002601 GaN Inorganic materials 0.000 description 2
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 2
- 239000000969 carrier Substances 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 239000004925 Acrylic resin Substances 0.000 description 1
- 229920000178 Acrylic resin Polymers 0.000 description 1
- 239000006061 abrasive grain Substances 0.000 description 1
- 239000002173 cutting fluid Substances 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 229910003460 diamond Inorganic materials 0.000 description 1
- 239000010432 diamond Substances 0.000 description 1
- 238000005323 electroforming Methods 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 229920005668 polycarbonate resin Polymers 0.000 description 1
- 239000004431 polycarbonate resin Substances 0.000 description 1
- 230000011218 segmentation Effects 0.000 description 1
Abstract
Description
本発明は、発光ダイオードチップの製造方法及び発光ダイオードチップに関する。 The present invention relates to a light emitting diode chip manufacturing method and a light emitting diode chip.
サファイア基板、GaN基板、SiC基板等の結晶成長用基板の表面にn型半導体層、発光層、p型半導体層が複数積層された積層体層が形成され、この積層体層に交差する複数の分割予定ラインによって区画された領域に複数のLED(Light Emitting Diode)等の発光デバイスが形成されたウエーハは、分割予定ラインに沿って切断されて個々の発光デバイスチップに分割され、分割された発光デバイスチップは携帯電話、パソコン、照明機器等の各種電気機器に広く利用されている。 A stacked body layer in which a plurality of n-type semiconductor layers, light-emitting layers, and p-type semiconductor layers are stacked is formed on the surface of a crystal growth substrate such as a sapphire substrate, a GaN substrate, or a SiC substrate. A wafer in which a plurality of light emitting devices such as LEDs (Light Emitting Diodes) are formed in a region partitioned by the planned division line is cut along the planned division line and divided into individual light emitting device chips, and the divided light emission Device chips are widely used in various electric devices such as mobile phones, personal computers, and lighting devices.
発光デバイスチップの発光層から出射される光は等方性を有しているため、結晶成長用基板の内部にも照射されて基板の裏面及び側面からも光が出射する。然し、基板の内部に照射された光のうち空気層との界面での入射角が臨界角以上の光は界面で全反射されて基板内部に閉じ込められ、基板から外部に出射されることがないから発光デバイスチップの輝度の低下を招くという問題がある。 Since the light emitted from the light emitting layer of the light emitting device chip is isotropic, the light is emitted also to the inside of the crystal growth substrate, and the light is also emitted from the back and side surfaces of the substrate. However, of the light irradiated to the inside of the substrate, light whose incident angle at the interface with the air layer is greater than the critical angle is totally reflected at the interface and confined inside the substrate, and is not emitted outside from the substrate. Therefore, there is a problem that the luminance of the light emitting device chip is lowered.
この問題を解決するために、発光層から出射された光が基板の内部に閉じ込められるのを抑制するために、基板の裏面に透明部材を貼着して輝度の向上を図るようにした発光ダイオード(LED)が特開2014−175354号公報に記載されている。 In order to solve this problem, a light emitting diode in which a transparent member is attached to the back surface of the substrate to improve the luminance in order to prevent light emitted from the light emitting layer from being confined inside the substrate. (LED) is described in Japanese Patent Application Laid-Open No. 2014-175354.
然し、特許文献1に開示された発光ダイオードでは、基板の裏面に透明部材を貼着することにより輝度が僅かに向上したものの十分な輝度が得られないという問題がある。 However, the light emitting diode disclosed in Patent Document 1 has a problem that sufficient luminance cannot be obtained although the luminance is slightly improved by sticking a transparent member to the back surface of the substrate.
本発明はこのような点に鑑みてなされたものであり、その目的とするところは、十分な輝度が得られる発光ダイオードチップの製造方法及び発光ダイオードチップを提供することである。 The present invention has been made in view of these points, and an object of the present invention is to provide a method of manufacturing a light-emitting diode chip and a light-emitting diode chip that can obtain sufficient luminance.
請求項1記載の発明によると、発光ダイオードチップの製造方法であって、結晶成長用の透明基板上に発光層を含む複数の半導体層が形成された積層体層を有し、該積層体層の表面に互いに交差する複数の分割予定ラインによって区画された各領域にそれぞれLED回路が形成されたウエーハを準備するウエーハ準備工程と、ウエーハの裏面に内部に複数の気泡が形成された第1の透明基板の表面を貼着して第1一体化ウエーハを形成する第1透明基板貼着工程と、該第1透明基板貼着工程を実施した後、該第1の透明基板の裏面に内部に複数の気泡が形成された第2の透明基板の表面を貼着して第2一体化ウエーハを形成する第2透明基板貼着工程と、該ウエーハを該分割予定ラインに沿って該第1及び第2の透明基板と共に切断して該第2一体化ウエーハを個々の発光ダイオードチップに分割する分割工程と、を備えたことを特徴とする発光ダイオードチップの製造方法が提供される。 According to invention of Claim 1, it is a manufacturing method of a light emitting diode chip | tip, Comprising: It has a laminated body layer in which the several semiconductor layer containing a light emitting layer was formed on the transparent substrate for crystal growth, This laminated body layer A wafer preparation step of preparing a wafer in which LED circuits are formed in each region partitioned by a plurality of division lines intersecting each other on the surface of the wafer, and a first in which a plurality of bubbles are formed inside the back surface of the wafer After performing the 1st transparent substrate sticking process which sticks the surface of a transparent substrate and forms the 1st integrated wafer, and the 1st transparent substrate sticking process, it is inside in the back of the 1st transparent substrate inside A second transparent substrate adhering step of adhering a surface of the second transparent substrate on which a plurality of bubbles are formed to form a second integrated wafer; and the first and second wafers along the division line. Cut with the second transparent substrate LED chip production method of which is characterized in that and a dividing step of dividing the integrated wafer into individual light emitting diode chips is provided.
好ましくは、該第1及び第2の透明基板は、透明セラミックス、光学ガラス、サファイア、透明樹脂の何れかで形成され、該第1及び該第2透明基板貼着工程は透明接着剤を使用して実施される。 Preferably, the first and second transparent substrates are formed of any one of transparent ceramics, optical glass, sapphire, and transparent resin, and the first and second transparent substrate pasting steps use a transparent adhesive. Implemented.
請求項4記載の発明によると、発光ダイオードチップであって、表面にLED回路が形成された発光ダイオードと、該発光ダイオードの裏面に表面が貼着された内部に複数の気泡を有する第1の透明部材と、該第1の透明部材の裏面に表面が貼着された内部に複数の気泡を有する第2の透明部材と、を備えたことを特徴とする発光ダイオードチップが提供される。 According to invention of Claim 4, it is a light emitting diode chip | tip, Comprising: The light emitting diode by which the LED circuit was formed in the surface, and the 1st which has a some bubble inside the surface stuck on the back surface of this light emitting diode There is provided a light-emitting diode chip comprising: a transparent member; and a second transparent member having a plurality of bubbles inside the surface of which is adhered to the back surface of the first transparent member.
本発明の発光ダイオードチップは、LEDの裏面に内部に複数の気泡を有する第1の透明部材の表面が貼着され、該第1の透明部材の裏面に内部に複数の気泡を有する第2の透明部材の表面が貼着されているので、光が第1及び第2の透明部材内で複雑に屈折して第1及び第2の透明部材内に閉じ込められる光が減少し、第1及び第2の透明部材から出射される光の量が増大して発光ダイオードチップの輝度が向上する。 In the light-emitting diode chip of the present invention, the surface of the first transparent member having a plurality of bubbles inside is adhered to the back surface of the LED, and the second surface having a plurality of bubbles inside the back surface of the first transparent member. Since the surface of the transparent member is adhered, the light is refracted in a complicated manner in the first and second transparent members, and the light confined in the first and second transparent members is reduced. The amount of light emitted from the transparent member 2 is increased, and the luminance of the light emitting diode chip is improved.
以下、本発明の実施形態を図面を参照して詳細に説明する。図1を参照すると、光デバイスウエーハ(以下、単にウエーハと略称することがある)11の表面側斜視図が示されている。 Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Referring to FIG. 1, there is shown a front side perspective view of an optical device wafer 11 (hereinafter sometimes simply referred to as a wafer) 11.
光デバイスウエーハ11は、サファイア基板13上に窒化ガリウム(GaN)等のエピタキシャル層(積層体層)15が積層されて構成されている。光デバイスウエーハ11は、エピタキシャル層15が積層された表面11aと、サファイア基板13が露出した裏面11bとを有している。 The optical device wafer 11 is configured by laminating an epitaxial layer (laminated body layer) 15 such as gallium nitride (GaN) on a sapphire substrate 13. The optical device wafer 11 has a front surface 11a on which an epitaxial layer 15 is stacked and a back surface 11b on which the sapphire substrate 13 is exposed.
ここで、本実施形態の光デバイスウエーハ11では、結晶成長用基板としてサファイア基板13を採用しているが、サファイア基板13に替えGaN基板又はSiC基板等を採用するようにしてもよい。 Here, in the optical device wafer 11 of the present embodiment, the sapphire substrate 13 is employed as the crystal growth substrate. However, a GaN substrate or a SiC substrate may be employed instead of the sapphire substrate 13.
積層体層(エピタキシャル層)15は、電子が多数キャリアとなるn型半導体層(例えば、n型GaN層)、発光層となる半導体層(例えば、InGaN層)、正孔が多数キャリアとなるp型半導体層(例えば、p型GaN層)を順にエピタキシャル成長させることにより形成される。 The stacked body layer (epitaxial layer) 15 includes an n-type semiconductor layer (for example, an n-type GaN layer) in which electrons are majority carriers, a semiconductor layer (for example, an InGaN layer) that is a light emitting layer, and a p in which holes are majority carriers. It is formed by epitaxially growing a type semiconductor layer (for example, a p-type GaN layer) in this order.
サファイア基板13は例えば100μmの厚みを有しており、積層体層15は例えば5μmの厚みを有している。積層体層15に複数のLED回路19が格子状に形成された複数の分割予定ライン17によって区画されて形成されている。ウエーハ11は、LED回路19が形成された表面11aと、サファイア基板13が露出した裏面11bとを有している。 The sapphire substrate 13 has a thickness of 100 μm, for example, and the laminate layer 15 has a thickness of 5 μm, for example. A plurality of LED circuits 19 are defined on the laminate layer 15 by a plurality of division lines 17 formed in a lattice pattern. The wafer 11 has a front surface 11a on which the LED circuit 19 is formed and a back surface 11b on which the sapphire substrate 13 is exposed.
本発明実施形態の発光ダイオードチップの製造方法によると、まず図1に示すような光デバイスウエーハ11を準備するウエーハ準備工程を実施する。更に、内部に複数の気泡が形成された第1及び第2の透明基板を準備する透明基板準備工程を実施する。 According to the light emitting diode chip manufacturing method of the embodiment of the present invention, first, a wafer preparation step for preparing an optical device wafer 11 as shown in FIG. 1 is performed. Furthermore, a transparent substrate preparation step is carried out for preparing first and second transparent substrates having a plurality of bubbles formed therein.
透明基板準備工程を実施した後、図2(A)に示すように、内部に複数の気泡が形成された第1の透明基板21の表面21aをウエーハ11の裏面11bに貼着する第1透明基板貼着工程を実施する。図2(B)は第1一体化ウエーハ25の斜視図である。 After performing the transparent substrate preparation step, as shown in FIG. 2A, the first transparent substrate 21 is bonded to the back surface 11b of the wafer 11 with the surface 21a of the first transparent substrate 21 in which a plurality of bubbles are formed. A substrate sticking step is performed. FIG. 2B is a perspective view of the first integrated wafer 25.
第1の透明基板21は、透明樹脂、光学ガラス、サファイア、透明セラミックスの何れかから形成される。本実施形態では、光学ガラスに比べて耐久性のあるポリカーボネート、アクリル樹脂等の透明樹脂から第1及び第2の透明基板を形成した。 The first transparent substrate 21 is formed from any one of transparent resin, optical glass, sapphire, and transparent ceramics. In the present embodiment, the first and second transparent substrates are formed from a transparent resin such as polycarbonate and acrylic resin which is more durable than optical glass.
第1透明基板貼着工程を実施した後、図3(A)に示すように、内部に複数の気泡が形成された第2の透明基板21Aの表面21aを第1一体化ウエーハ25の第1の透明基板21の裏面に貼着して(第2透明基板貼着工程)、図3(B)に示すような、第2一体化ウエーハ25Aを形成する。第2の透明基板21Aの材質も上述した第1の透明基板21の材質と同様である。 After the first transparent substrate pasting step, the surface 21a of the second transparent substrate 21A in which a plurality of bubbles are formed is formed on the first surface of the first integrated wafer 25 as shown in FIG. Is attached to the back surface of the transparent substrate 21 (second transparent substrate attaching step) to form a second integrated wafer 25A as shown in FIG. The material of the second transparent substrate 21A is the same as the material of the first transparent substrate 21 described above.
上述した第1透明基板貼着工程及び第2透明基板貼着工程に替えて、第1の透明基板21の裏面に第2の透明基板21Aの表面を貼着して一体化した後、第1の透明基板21の表面21aにウエーハ11の裏面11bを貼着するようにしてもよい。 Instead of the first transparent substrate sticking step and the second transparent substrate sticking step described above, the first transparent substrate 21 is attached to the back surface of the second transparent substrate 21A and integrated, and then the first transparent substrate sticking step is integrated. The rear surface 11b of the wafer 11 may be adhered to the front surface 21a of the transparent substrate 21.
第2透明基板貼着工程を実施した後、図4に示すように、第2一体化ウエーハ25Aの第2の透明基板21Aを外周部が環状フレームFに貼着されたダイシングテープTに貼着してフレームユニットを形成し、第2一体化ウエーハ25AをダイシングテープTを介して環状フレームFで支持する支持工程を実施する。 After performing the second transparent substrate attaching step, as shown in FIG. 4, the second transparent substrate 21A of the second integrated wafer 25A is attached to the dicing tape T whose outer peripheral portion is attached to the annular frame F. Thus, a frame unit is formed, and a supporting step of supporting the second integrated wafer 25A with the annular frame F via the dicing tape T is performed.
支持工程を実施した後、フレームユニットを切削装置に投入し、切削装置で第2一体化ウエーハ25Aを切削して個々の発光ダイオードチップに分割する分割工程を実施する。この分割工程について、図5を参照して説明する。 After carrying out the supporting step, the frame unit is put into a cutting device, and the dividing step of cutting the second integrated wafer 25A with the cutting device and dividing it into individual light emitting diode chips is carried out. This dividing step will be described with reference to FIG.
この分割工程は、例えば、よく知られた切削装置を用いて実施する。図5に示すように、切削装置の切削ユニット10は、スピンドルハウジング12と、スピンドルハウジング12中に回転可能に挿入された図示しないスピンドルと、スピンドルの先端に装着された切削ブレード14とを含んでいる。 This dividing step is performed using, for example, a well-known cutting device. As shown in FIG. 5, the cutting unit 10 of the cutting apparatus includes a spindle housing 12, a spindle (not shown) rotatably inserted into the spindle housing 12, and a cutting blade 14 attached to the tip of the spindle. Yes.
切削ブレード14の切り刃は、例えば、ダイヤモンド砥粒をニッケルメッキで固定した電鋳砥石で形成されており、その先端形状は三角形状、四角形状、又は半円形状をしている。 The cutting blade of the cutting blade 14 is formed of, for example, an electroforming grindstone in which diamond abrasive grains are fixed by nickel plating, and the tip shape thereof is triangular, quadrangular, or semicircular.
切削ブレード14の概略上半分はブレードカバー(ホイールカバー)16で覆われており、ブレードカバー16には切削ブレード14の奥側及び手前側に水平に伸長する一対の(1本のみ図示)クーラーノズル18が配設されている。 The upper half of the cutting blade 14 is covered with a blade cover (wheel cover) 16, and the blade cover 16 is a pair of cooler nozzles (only one is shown) extending horizontally toward the back side and the near side of the cutting blade 14. 18 is arranged.
分割工程では、第2一体化ウエーハ25AをフレームユニットのダイシングテープTを介して切削装置のチャックテーブル20で吸引保持し、環状フレームFは図示しないクランプでクランプして固定する。 In the dividing step, the second integrated wafer 25A is sucked and held by the chuck table 20 of the cutting device via the dicing tape T of the frame unit, and the annular frame F is clamped and fixed by a clamp (not shown).
そして、切削ブレード14を矢印R方向に高速回転させながら切削ブレード14の先端がダイシングテープTに届くまでウエーハ11の分割予定ライン17に切り込み、クーラーノズル18から切削ブレード14及びウエーハ11の加工点に向かって切削液を供給しつつ、第2一体化ウエーハ25Aを矢印X1方向に加工送りすることにより、ウエーハ11の分割予定ライン17に沿ってウエーハ11及び第1及び第2の透明基板21,21Aを切断する切断溝27を形成する。 Then, while rotating the cutting blade 14 in the direction of arrow R at high speed, the cutting blade 14 is cut into the division line 17 of the wafer 11 until the tip of the cutting blade 14 reaches the dicing tape T. From the cooler nozzle 18 to the processing point of the cutting blade 14 and the wafer 11. The second integrated wafer 25A is processed and fed in the direction of the arrow X1 while supplying the cutting fluid toward the wafer 11, and the wafer 11 and the first and second transparent substrates 21 and 21A along the scheduled division line 17 of the wafer 11. A cutting groove 27 for cutting is formed.
切削ユニット10をY軸方向に割り出し送りしながら、第1の方向に伸長する分割予定ライン17に沿って同様な切断溝27を次々と形成する。次いで、チャックテーブル20を90°回転してから、第1の方向に直交する第2の方向に伸長する全ての分割予定ライン17に沿って同様な切断溝27を形成して、図6に示す状態にすることで、第2一体化ウエーハ25Aを図7に示すような発光ダイオードチップ31に分割する。 While indexing and feeding the cutting unit 10 in the Y-axis direction, similar cutting grooves 27 are formed one after another along the planned dividing line 17 extending in the first direction. Next, after the chuck table 20 is rotated by 90 °, similar cutting grooves 27 are formed along all the planned dividing lines 17 extending in the second direction orthogonal to the first direction, as shown in FIG. In this state, the second integrated wafer 25A is divided into light emitting diode chips 31 as shown in FIG.
上述した実施形態では、第2一体化ウエーハ25Aを個々の発光ダイオードチップ31に分割するのに切削装置を使用しているが、ウエーハ11及び透明基板21,21Aに対して透過性を有する波長のレーザービームを分割予定ライン13に沿ってウエーハ11に照射して、ウエーハ11及び第1の透明基板21及び第2の透明基板21Aの内部に厚み方向に複数層の改質層を形成し、次いで、第2一体化ウエーハ25Aに外力を付与して、改質層を分割起点に第2一体化ウエーハ25Aを個々の発光ダイオードチップ31に分割するようにしてもよい。 In the embodiment described above, the cutting device is used to divide the second integrated wafer 25A into the individual light emitting diode chips 31, but the wavelength of the wavelength having transparency to the wafer 11 and the transparent substrates 21 and 21A. A laser beam is irradiated onto the wafer 11 along the division line 13 to form a plurality of modified layers in the thickness direction inside the wafer 11, the first transparent substrate 21 and the second transparent substrate 21A, and then Alternatively, an external force may be applied to the second integrated wafer 25 </ b> A, and the second integrated wafer 25 </ b> A may be divided into individual light emitting diode chips 31 using the modified layer as a division starting point.
図7に示された発光ダイオードチップ31は、表面にLED回路19を有するLED13Aの裏面に内部に複数の気泡29を有する第1透明部材21´が貼着されている。更に、第1透明部材21´の裏面に内部に複数の気泡29を有する第2透明部材21A´が貼着されている。 The light emitting diode chip 31 shown in FIG. 7 has a first transparent member 21 ′ having a plurality of bubbles 29 inside attached to the back surface of the LED 13A having the LED circuit 19 on the front surface. Further, a second transparent member 21A ′ having a plurality of bubbles 29 inside is attached to the back surface of the first transparent member 21 ′.
従って、図7に示す発光ダイオードチップ31では、第1及び第2透明部材21´,21A´の表面積が増大することに加え、光が第1及び第2透明部材内21´,21A´で複雑に屈折して透明部材内に閉じ込められる光が減少し、透明部材21,21A´から出射される光の量が増大し、発光ダイオードチップ31の輝度が向上する。 Therefore, in the light emitting diode chip 31 shown in FIG. 7, in addition to increasing the surface areas of the first and second transparent members 21 ′ and 21A ′, the light is complicated in the first and second transparent members 21 ′ and 21A ′. The light that is refracted and confined in the transparent member decreases, the amount of light emitted from the transparent members 21 and 21A ′ increases, and the luminance of the light-emitting diode chip 31 is improved.
10 切削ユニット
11 光デバイスウエーハ(ウエーハ)
13 サファイア基板
14 切削ブレード
15 積層体層
17 分割予定ライン
19 LED回路
21 第1の透明基板
21A 第2の透明基板
25 第1一体化ウエーハ
25A 第2一体化ウエーハ
27 切断溝
29 気泡
31 発光ダイオードチップ
10 Cutting unit 11 Optical device wafer (wafer)
13 Sapphire substrate 14 Cutting blade 15 Laminate layer 17 Line to be divided 19 LED circuit 21 First transparent substrate 21A Second transparent substrate 25 First integrated wafer 25A Second integrated wafer 27 Cutting groove 29 Bubble 31 Light emitting diode chip
Claims (4)
結晶成長用の透明基板上に発光層を含む複数の半導体層が形成された積層体層を有し、該積層体層の表面に互いに交差する複数の分割予定ラインによって区画された各領域にそれぞれLED回路が形成されたウエーハを準備するウエーハ準備工程と、
ウエーハの裏面に内部に複数の気泡が形成された第1の透明基板の表面を貼着して第1一体化ウエーハを形成する第1透明基板貼着工程と、
該第1透明基板貼着工程を実施した後、該第1の透明基板の裏面に内部に複数の気泡が形成された第2の透明基板の表面を貼着して第2一体化ウエーハを形成する第2透明基板貼着工程と、
該ウエーハを該分割予定ラインに沿って該第1及び第2の透明基板と共に切断して該第2一体化ウエーハを個々の発光ダイオードチップに分割する分割工程と、
を備えたことを特徴とする発光ダイオードチップの製造方法。 A method of manufacturing a light emitting diode chip,
Each of the regions has a laminate layer in which a plurality of semiconductor layers including a light emitting layer are formed on a transparent substrate for crystal growth, and is divided into a plurality of division lines intersecting each other on the surface of the laminate layer. A wafer preparation step of preparing a wafer on which an LED circuit is formed;
A first transparent substrate adhering step for adhering the surface of the first transparent substrate having a plurality of bubbles formed therein on the back surface of the wafer to form a first integrated wafer;
After performing the first transparent substrate pasting step, the surface of the second transparent substrate having a plurality of bubbles formed therein is pasted on the back surface of the first transparent substrate to form a second integrated wafer. A second transparent substrate pasting step,
A dividing step of cutting the wafer together with the first and second transparent substrates along the division line to divide the second integrated wafer into individual light emitting diode chips;
A method for producing a light-emitting diode chip, comprising:
表面にLED回路が形成された発光ダイオードと、
該発光ダイオードの裏面に表面が貼着された内部に複数の気泡を有する第1の透明部材と、
該第1の透明部材の裏面に表面が貼着された内部に複数の気泡を有する第2の透明部材と、
を備えたことを特徴とする発光ダイオードチップ。 A light emitting diode chip,
A light emitting diode having an LED circuit formed on the surface;
A first transparent member having a plurality of bubbles inside the surface of which is adhered to the back surface of the light emitting diode;
A second transparent member having a plurality of bubbles inside the surface of which is adhered to the back surface of the first transparent member;
A light-emitting diode chip comprising:
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