JP2018093529A - Oscillation circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an oscillation circuit capable of suppressing characteristic deterioration of the other circuits provided in a semiconductor integrated circuit when outputting an oscillation signal having an oscillation frequency of hundreds of megahertz.SOLUTION: An oscillation circuit comprises: a first closed circuit constituted of a first capacitor provided inside a semiconductor integrated circuit, an inductor provided outside the semiconductor integrated circuit, and first wiring surrounding a first region demarcated between the first capacitor and the inductor and connecting the first capacitor and the inductor; and a second closed circuit constituted of an inductor, a second capacitor being provided outside the semiconductor integrated circuit and arranged outside the first region, and second wiring surrounding a second region demarcated between the inductor and the second capacitor and connecting the inductor and the second capacitor. Wiring resistance of the second wiring is smaller than wiring resistance of the first wiring.SELECTED DRAWING: Figure 2

Description

  The present invention relates to an oscillation circuit that enables high-frequency oscillation.

  Conventionally, in a radio device, an oscillation circuit including a resonance circuit including an inductor and a capacitor and a transistor is used. By using a variable-capacitance diode as a capacitor, a voltage controlled oscillator (VCO: voltage controlled oscillator) is configured, and frequency control becomes possible. Further, a phase-locked loop (PLL) can be formed by the voltage-controlled oscillation circuit, the phase comparator, the loop filter, and the frequency divider, and can be used for a PLL frequency synthesizer.

  In recent years, the above-described oscillation circuit is formed as a part of a semiconductor integrated circuit. As a method of forming an oscillation circuit as a part of a semiconductor integrated circuit, when all the components constituting the oscillation circuit are formed in the semiconductor integrated circuit, or a part of the components constituting the oscillation circuit is formed outside the semiconductor integrated circuit. (That is, formed as an external part). For example, when the oscillation frequency is several hundred megahertz (MHz) or less, an inductor having an inductance of about 10 nanohenries (nH) is required. In such a case, if the inductor is provided in the semiconductor integrated circuit, the area occupied by the inductor in the semiconductor integrated circuit becomes excessive, and the semiconductor integrated circuit itself also increases. For this reason, in an oscillation circuit having an oscillation frequency of several hundred MHz or less, an inductor is generally provided outside the semiconductor integrated circuit. On the other hand, when the oscillation frequency is 1 gigahertz (GHz) or higher, an inductor having an inductance of about 5 nH is required, and the inductor can be accommodated in a semiconductor integrated circuit. For example, Patent Document 1 discloses an oscillation circuit in which an inductor is formed as an external component. Further, Patent Document 2 discloses an oscillation circuit formed with a capacitor as an external component. Patent Document 3 discloses an oscillation circuit having a configuration in which a capacitor is provided in a semiconductor integrated circuit, an inductor is provided as an external component, and an external capacitor is connected in series to the inductor.

JP 2007-110504 A JP-A-7-131243 JP-A-6-132728

  However, in a radio device, circuits having various functions such as a reception circuit, a transmission circuit, a phase synchronization circuit, and a control circuit are accommodated in a semiconductor integrated circuit. In a reception circuit that handles weak signals, an oscillation circuit The interference of the signal becomes a problem.

  For example, in an oscillation circuit having a structure in which a transistor and a capacitor are provided in a semiconductor integrated circuit and only an inductor is provided outside the semiconductor integrated circuit, when an oscillation frequency of 500 MHz is realized by a 15 nH inductor, the capacitance is as follows: From relational expression (1), 6.75 picofarad (pF) is obtained.

Formula 1

In the above equation, f is the resonance frequency, L is the inductance, and C is the capacitance. When the effective value of the voltage amplitude of the resonance circuit in the oscillation state is 1 V, the reactance of the inductor is 2πfL = 47.1 (Ω). As a result, the high-frequency current flowing through the resonance circuit is 1 ÷ 47.1 = 21.2 (mA). Such a high-frequency current is a large current comparable to the power supply current of the semiconductor integrated circuit itself.

  When such a high-frequency current flows through the resonance circuit, electromagnetic waves are emitted from the conductive material constituting the current path of the resonance circuit, and further, the substrate potential of the semiconductor element fluctuates and the characteristics of other circuits in the semiconductor integrated circuit Deteriorates. For example, characteristic degradation of the semiconductor integrated circuit such as a decrease in reception sensitivity occurs.

  In order to solve the above-described problem, it is conceivable to reduce the oscillation amplitude. However, if the oscillation amplitude is reduced, the purity of the oscillation signal deteriorates, so that it is difficult to use such a method. In addition, it may be possible to widen the interval between the oscillation circuit and other circuits, or to provide a shield between the oscillation circuit and other circuits, but this increases the area and cost of the semiconductor integrated circuit. Such a method is also difficult to use.

  The present invention has been made in view of the above circumstances, and suppresses deterioration of characteristics of other circuits provided in a semiconductor integrated circuit when an oscillation signal having an oscillation frequency of several hundred megahertz is output. Provided is an oscillation circuit that can be used.

  In order to solve the above-described problems, a semiconductor device according to the present invention is a semiconductor device including a semiconductor integrated circuit, and includes a first capacitor provided inside the semiconductor integrated circuit and an outside of the semiconductor integrated circuit. And a first wiring that surrounds a first region defined between the first capacitor and the inductor and connects the first capacitor and the inductor. 1 closed circuit, the inductor, a second capacitor provided outside the semiconductor integrated circuit and disposed outside the first region, and defined between the inductor and the second capacitor. A second closed circuit that surrounds the second region and connects the inductor and the second capacitor, and the wiring resistance of the second wiring is: Wherein the serial smaller than wiring resistance of the first wiring.

  An oscillation circuit of the present invention includes a first closed circuit including an internal capacitor provided inside a semiconductor integrated circuit, an external inductor provided outside the semiconductor integrated circuit, and a wiring connecting the internal capacitor and the external inductor. And a second closed circuit including an external capacitor provided outside the semiconductor integrated circuit, an external inductor, and a wiring connecting the external capacitor and the external inductor. Since the wiring resistance of the second closed circuit is smaller than the wiring resistance of the first closed circuit, a high-frequency current easily flows outside the semiconductor integrated circuit, and other circuits in the semiconductor integrated circuit receive the high-frequency current flowing during oscillation. The influence can be reduced.

  That is, in the oscillation circuit of the present invention, even when an oscillation signal having an oscillation frequency of several hundred megahertz is output, deterioration of characteristics of other circuits provided in the semiconductor integrated circuit can be suppressed.

1 is an equivalent circuit diagram of a radio device including an oscillation circuit according to Embodiment 1 of the present invention. It is a schematic block diagram of the resonance circuit which comprises the oscillation circuit which concerns on Example 1 of this invention. It is a schematic block diagram for demonstrating the high frequency magnetic field in a radio | wireless machine provided with the oscillation circuit which concerns on Example 1 of this invention. It is an equivalent circuit schematic of a radio device provided with the oscillation circuit which concerns on Example 2 of this invention. FIG. 3 is a schematic configuration diagram of an oscillation circuit according to Example 2 of the invention.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

  First, an oscillation circuit according to Embodiment 1 of the present invention will be described with reference to FIGS. FIG. 1 is an equivalent circuit diagram of a wireless device including an oscillation circuit according to Embodiment 1 of the present invention. FIG. 2 is a schematic configuration diagram of a resonance circuit constituting the oscillation circuit according to the first embodiment of the present invention. FIG. 3 is a schematic configuration diagram for explaining a high-frequency magnetic field in a wireless device including the oscillation circuit according to the first embodiment of the invention.

  As shown in FIG. 1, the wireless device 10 includes an oscillation circuit 20, a reception circuit 30, a transmission circuit 40, and a control circuit 50. In the radio device 10, a part of the oscillation circuit 20, the reception circuit 30, the transmission circuit 40, and the control circuit 50 are provided inside the semiconductor integrated circuit 60. The receiving circuit 30 has a function of receiving data supplied from another wireless device to the wireless device 10 and performing predetermined processing. The transmission circuit 40 has a function of generating data to be transmitted from the wireless device 10 to another wireless device and transmitting the data. The control circuit 50 has a function of supplying control signals to the oscillation circuit 20, the reception circuit 30, and the transmission circuit 40, and controlling these circuits to perform predetermined operations. The radio device 10 may include a memory unit for storing data in addition to these circuits, and is not limited to the configuration described above.

  The oscillation circuit 20 includes an amplification circuit 21 and a resonance circuit 22 connected to an input terminal and an output terminal of the amplification circuit 21. The amplifier circuit 21 includes two p-channel MOS (Metal Oxide Semiconductor) transistors P1 and P2 and two n-channel MOS transistors N1 and N2 provided in the semiconductor integrated circuit 60. A specific configuration of the amplifier circuit 21 is as follows. The source ends of the MOS transistors P1, P2 are connected to the power supply voltage Vdd, the drain end of the MOS transistor P1 is connected to the drain end of the MOS transistor N1, and the drain end of the MOS transistor P2 is connected to the drain end of the MOS transistor N2. Yes. The drain end of the MOS transistor P1 is connected to the gate ends of the MOS transistors P2 and N2, and the drain end of the MOS transistor P2 is connected to the gate ends of the MOS transistors P1 and N1. Further, the gate end of the MOS transistor P1 is connected to the gate end of the MOS transistor N1 and the drain ends of the MOS transistors P2 and N2, and the gate end of the MOS transistor P2 is connected to the gate end of the MOS transistor N2 and the drain ends of the MOS transistors P1 and N1. It is connected to the. The source ends of the MOS transistors N1 and N2 are connected to the ground potential.

  The resonance circuit 22 includes two internal capacitors C1 and C2 and variable capacitance diodes D1 and D2 provided in the semiconductor integrated circuit 60, and an external inductor L1 and external capacitor C3 provided outside the semiconductor integrated circuit 60. Has been. A specific configuration of the resonance circuit 22 is as follows. The anodes of the variable capacitance diodes D1 and D2 are connected to each other, and the anodes of the variable capacitance diodes D1 and D2 are connected to the frequency control voltage Vc. The cathode of the variable capacitance diode D1 is connected to the internal capacitor C1 and the external connection terminal T1 of the semiconductor integrated circuit 60, and the cathode of the variable capacitance diode D2 is connected to the internal capacitor C2 and the external connection terminal T2 of the semiconductor integrated circuit 60. One ends of the internal capacitors C1 and C2 are connected to the ground potential. The internal capacitor C1 and the variable capacitance diode D1 are connected to the drain ends of the MOS transistors P1 and N1 of the connection circuit 21, and the internal capacitor C2 and the variable capacitance diode D2 are the drain ends of the MOS transistors P2 and N2 of the connection circuit 21. It is connected to the. Outside the semiconductor integrated circuit 60, the external inductor L1 and the external capacitor C3 are connected in parallel to the semiconductor integrated circuit 60, and one end of the external inductor L1 and the external capacitor C3 is connected to the semiconductor integrated circuit 60 via the connection point T3. The other ends of the external inductor L1 and the external capacitor C3 are connected to the external connection terminal T2 of the semiconductor integrated circuit 60 via the connection point T4.

  Next, the configuration of the resonance circuit 22 will be described in detail with reference to FIG. In FIG. 2, the direction in which the wiring extends from both ends of the external inductor L1 is defined as the X direction, and the direction in which the wiring extends from the external connection terminals T1, T2 is defined as the Y direction.

  As shown in FIG. 2, the resonance circuit 22 includes a first closed circuit 23 (formed by connecting the variable capacitance diodes D1 and D2 and the external inductor L1 via the external connection terminals T1 and T2. And a second closed circuit 24 (shown by a one-dot chain line) formed by connecting the external inductor L1 and the external capacitor C3. The wiring length of the wiring constituting the first closed circuit 23 is longer than the wiring length of the wiring constituting the second closed circuit 24. In other words, the area surrounded by the first closed circuit 23 is larger than the area surrounded by the wiring configuring the second closed circuit 24. Note that the material of the wiring constituting the first closed circuit 23 is the same as the material of the wiring constituting the second closed circuit 24.

  In addition, the width W1 of a part of the wiring configuring the first closed circuit 23 is smaller than the width W2 of the wiring configuring the second closed circuit 24. Specifically, among the wirings constituting the first closed circuit 23, the width W1 of the wiring from the connection point T3 to the connection point T4 via the external connection terminal T1, the variable capacitance diodes D1 and D2, and the external connection terminal T2 is The width W2 of the wiring that constitutes the second closed circuit 24 is smaller. Here, the thickness of the wiring configuring the first closed circuit 23 is equal to the thickness of the wiring configuring the second closed circuit 24. Accordingly, the cross-sectional area of the wiring configuring the first closed circuit 23 is smaller than the cross-sectional area of the wiring configuring the second closed circuit 24.

  Further, the wiring with the width W1 extending in the Y direction and the wiring with the width W2 extending in the Y direction are connected at the connection points T3 and T4 so that the outer edges coincide.

  Note that the widths of all the wires constituting the second closed circuit 24 need not be larger than the widths of the wires constituting the first closed circuit 23. For example, among the wires constituting the second closed circuit 24, Only the width of the wiring extended in the Y direction may be increased. The wiring with the width W1 extending in the Y direction and the wiring with the width W2 extending in the Y direction may be connected at the connection points T3 and T4 so that the inner edges coincide with each other. You may connect in connection point T3 and T4 so that it may correspond.

  By having the configuration as described above, the oscillation circuit 20 has a frequency determined by the combined capacitance of the capacitors of the internal capacitors C1 and C2, the external capacitor C3, and the variable capacitance diodes D1 and D2, and the inductance of the external inductor L1. It oscillates at. The oscillation frequency can be changed by changing the frequency control voltage Vc applied to the variable capacitance diodes D1 and D2.

  In the first embodiment, the inductance of the external inductor L1 is 15 nanohenry (nH), and the combined capacitance of the capacitors of the internal capacitors C1 and C2 and the variable capacitance diodes D1 and D2 in the semiconductor integrated circuit 60 is 1.75 picofarads (pF ), The capacitance of the external capacitor C3 was 5 pF, and the oscillation frequency was 500 MHz. Here, the reactance of the external inductor L1 at an oscillation frequency of 500 MHz is 47.1 ohms (Ω), and the high-frequency current flowing through the external inductor L1 is 21.2 mA. The high-frequency current that flows through the external inductor L1 flows through the semiconductor integrated circuit 60 (that is, flows through the first closed circuit 23) and the high-frequency current that flows through the external capacitor C3 (that is, the second closed circuit). 24) and a high frequency current. Therefore, the 21.2 mA high-frequency current flowing through the external inductor L1 is a combination of the 5.5 mA high-frequency current flowing through the first closed circuit 23 and the 15.7 mA high-frequency current flowing through the second closed circuit 24. . As described above, the capacitors for determining the oscillation frequency are separately arranged inside and outside the semiconductor integrated circuit 60, and the capacitance of the external capacitor C3 provided outside the semiconductor integrated circuit 60 is provided in the semiconductor integrated circuit 60. By making it larger than the combined capacity of the obtained capacitors, the amount of current flowing in the semiconductor integrated circuit 60 can be reduced. Thereby, the influence which the receiving circuit 30, the transmitting circuit 40, and the control circuit 50 in the semiconductor integrated circuit 60 are affected by the high-frequency current flowing in the oscillation circuit 20 can be reduced.

  In the first embodiment, the wiring length of the wiring that configures the first closed circuit 23 is longer than the wiring length of the wiring that configures the second closed circuit 24, and further, the wiring that configures the first closed circuit 23 is disconnected. The area is smaller than the cross-sectional area of the wiring that constitutes the second closed circuit 24, and the materials that constitute both the wirings are the same. That is, the wiring resistance in the first closed circuit 23 is larger than the wiring resistance in the second closed circuit 24. For this reason, it becomes easy for a high-frequency current to flow through the second closed circuit 24, and the reduction of the amount of current flowing in the semiconductor integrated circuit 60 as described above is efficiently realized, and the receiving circuit 30 and the transmitting circuit 40 in the semiconductor integrated circuit 60 are realized. And the influence which the control circuit 50 receives can be reduced. Further, when the combined capacitance of the capacitors in the semiconductor integrated circuit 60 must be equal to or greater than the capacitance of the external capacitor C3, the amount of current flowing in the semiconductor integrated circuit 60 can be obtained by using the above-described wiring width relationship. And the influence of the receiving circuit 30, the transmitting circuit 40, and the control circuit 50 in the semiconductor integrated circuit 60 can be reduced.

  In addition, if the wiring resistance in the 1st closed circuit 23 can be made larger than the wiring resistance of the 2nd closed circuit 24, it will not be limited to the above structure. For example, a material having lower conductivity than the material of the second closed circuit wiring may be used for the wiring of the first closed circuit 23. Further, the wiring resistance in the first closed circuit 23 may be made larger than the wiring resistance of the second closed circuit 24 by changing not only the wiring width but also the wiring thickness.

  Furthermore, in the first embodiment, the area surrounded by the first closed circuit 23 is made larger than the area surrounded by the second closed circuit 24. Since the strength of the high frequency magnetic field is determined by the product of the area surrounded by the current path and the current value, the high frequency magnetic field in the second closed circuit 24 is reduced by reducing the area surrounded by the second closed circuit 24 where the amount of current increases. The strength of the magnetic field can be reduced.

  Further, internal capacitors C1 and C2 and variable capacitance diodes D1 and D2 are arranged in the + Y direction with respect to the external inductor L1, and an external capacitor C3 is arranged in the −Y direction (that is, the external capacitor C3 is connected by the first closed circuit 23). The first closed circuit 23 and the second closed circuit 24 have different extension directions at the connection points T3 and T4 (that is, the extension direction is the + Y direction or the -Y direction). Therefore, the directions of the high-frequency currents flowing in the first closed circuit 23 and the second closed circuit 24 at the same time are reversed. That is, the phase of the high frequency current generated in the first closed circuit 23 is inverted with respect to the high frequency current generated in the second closed circuit 24. As shown in FIG. 3, the direction of the high-frequency magnetic field in the first closed circuit 23 at the predetermined time (broken arrow) and the direction of the high-frequency magnetic field in the second closed circuit 24 (dotted line arrow) are reversed. become. Therefore, the high frequency magnetic field generated by the high frequency current flowing in the first closed circuit 23 can be canceled by the high frequency magnetic field generated by the high frequency current flowing in the second closed circuit 24, and the semiconductor integrated circuit is generated by the high frequency magnetic field generated in the first closed circuit 23. The influence which other circuits, such as the receiving circuit 30 in 60, the transmission circuit 40, and the control circuit 50 receive, can be reduced.

  As described above, since the strength of the high-frequency magnetic field is determined by the product of the area surrounded by the current path and the current value, the product of the area surrounded by the first closed circuit 23 and the amount of current flowing through the first closed circuit 23. Is equal to the product of the area enclosed by the second closed circuit 24 and the amount of current flowing through the second closed circuit 24, and the wiring length and width of the first closed circuit 23 and the second closed circuit 23, and More preferably, the capacitances of the internal capacitors C1, C2, the variable capacitance diodes D1, D2 and the external capacitor C3 are determined. If the phase of the high-frequency current generated in the first closed circuit 23 can be reversed with respect to the high-frequency current generated in the second closed circuit 24, the external inductor L1 and the external capacitor C3 need not be arranged as described above. For example, the external capacitor C3 may be provided in a region surrounded by the first closed circuit 23.

  The amplifier circuit 21 is not limited to a p-channel MOS transistor and an n-channel MOS transistor, and may be composed of only a p-channel or n-channel MOS transistor. Further, the external inductor L1 may have a midpoint tap, and further, an inductor in which two inductors are connected in series may be used. Furthermore, the configuration of the oscillation circuit 20 is not limited to the configuration described above, and a Colpitts circuit, a Hartley circuit, or a Clap circuit may be configured. However, in any case, it is necessary to dispose at least an inductor and a capacitor outside the semiconductor integrated circuit. Further, a crystal oscillator may be configured by arranging a crystal resonator instead of the external inductor L1.

  As described above, the oscillation circuit 20 of the present invention includes the internal capacitors C1 and C2 provided inside the semiconductor integrated circuit 60, the external inductor L1 provided outside the semiconductor integrated circuit 60, and the internal capacitors C1 and C2. And a first closed circuit 23 composed of a wiring connecting the external inductor L1, an external capacitor C3 provided outside the semiconductor integrated circuit 60, an external inductor L1, and a wiring connecting the external capacitor C3 and the external inductor L1. And a second closed circuit 24. Since the wiring resistance of the second closed circuit 24 is smaller than the wiring resistance of the first closed circuit 23, a high-frequency current easily flows outside the semiconductor integrated circuit 60. This can reduce the influence of the circuit.

  That is, in the oscillation circuit of the present invention, even when an oscillation signal having an oscillation frequency of several hundred megahertz is output, deterioration of characteristics of other circuits provided in the semiconductor integrated circuit can be suppressed.

  In the wireless device according to the first embodiment, the amplifier circuit constituting the oscillation circuit is provided in the semiconductor integrated circuit. However, the amplifier circuit may be provided outside the semiconductor integrated circuit. The configuration of the wireless device in such a case will be described with reference to FIGS. FIG. 4 is an equivalent circuit diagram of a radio device including the oscillation circuit according to the second embodiment of the present invention, and FIG. 5 is a schematic configuration diagram of the oscillation circuit according to the second embodiment of the present invention. In addition, the description is abbreviate | omitted about the same member and the same structure as the member which comprises the radio | wireless machine 10 which concerns on Example 1, and attaches | subjects the same code | symbol in drawing.

  As shown in FIG. 4, the radio device 100 includes an oscillation circuit 120, a reception circuit 30, a transmission circuit 40, a control circuit 50, a base voltage bias circuit 130, and an emitter voltage bias circuit (current source) 140. ing. In the radio device 100, a part of the oscillation circuit 120, the reception circuit 30, the transmission circuit 40, the control circuit 50, the base voltage bias circuit 130, and the emitter voltage bias circuit 140 are provided inside the semiconductor integrated circuit 160.

  The oscillation circuit 120 includes an amplifier circuit 121 and a resonance circuit 122. The amplifier circuit 121 includes an NPN-type bipolar transistor 170 provided outside the semiconductor integrated circuit 160. The base of the bipolar transistor 170 is connected to a base voltage bias circuit 130 provided in the semiconductor integrated circuit 160 via an external connection terminal T5 and a resistor R1. The emitter of the bipolar transistor 170 is connected to the emitter current bias circuit 140 provided in the semiconductor integrated circuit 160 via the external connection terminal T6. Furthermore, the collector of the bipolar transistor 170 is connected to the power supply voltage Vdd.

  The resonance circuit 122 includes two internal capacitors C1 and C2 and variable capacitance diodes D1 and D2 provided in the semiconductor integrated circuit 160, an external inductor L1 and external capacitors C3 to C7 provided outside the semiconductor integrated circuit 160, and It is composed of A specific configuration of the resonance circuit 122 is as follows. Outside the semiconductor integrated circuit 160, the external inductor L1 and the external capacitor C3 are connected in parallel to the semiconductor integrated circuit 160, and one end of the external inductor L1 and the external capacitor C3 is connected to the semiconductor integrated circuit 160 via the connection point T3. The other ends of the external inductor L1 and the external capacitor C3 are connected to the external connection terminal T2 of the semiconductor integrated circuit 160 through the connection point T4. The external capacitor C3 has one end connected to the external capacitor C5 via a connection point T7, and the other end connected to the external capacitor C4 via a connection point T8. An external capacitor C6 is connected to the external capacitor C5 via a connection point T9, and an external capacitor C7 is connected to the external capacitor C6 via a connection point T10. Furthermore, the external capacitors C3 and C5 are connected to the base of the bipolar transistor 170 via connection points T7 and T11, and the external capacitors C5 and C6 are connected to the emitter of the bipolar transistor 170 via connection points T9 and T12. C7 is connected to the collector of the bipolar transistor 170 via the connection point T13. The external capacitor C4 is connected to the ground potential via the connection point T14, and the external capacitors C6 and C7 are connected to the ground potential via the connection points T10 and T14. Here, the external capacitors C4 and C7 are provided to lower the impedance of the power supply having the power supply voltage Vdd. The configuration in the semiconductor integrated circuit 160 is the same as that in the first embodiment, and a description thereof will be omitted.

  Next, the configuration of the resonance circuit 122 will be described in detail with reference to FIG. In FIG. 5, the direction in which the wiring extends from both ends of the external inductor L1 is defined as the X direction, and the direction in which the wiring extends from the external connection terminals T1, T2 is defined as the Y direction.

  As shown in FIG. 5, the resonance circuit 122 is formed by connecting the first closed circuit 23 and the second closed circuit 24, which are the same as those in the first embodiment, and the external capacitors C3, C4, C5, and C6. It has four closed circuits of a third closed circuit 151 (indicated by a two-dot chain line) and a fourth closed circuit 152 (indicated by a broken line) formed by connecting external capacitors C6 and C7 and a bipolar transistor 170. Yes. Here, the wiring length of the wiring configuring the first closed circuit 23 is longer than the wiring length of the wiring configuring the second closed circuit 24, the third closed circuit 151, and the fourth closed circuit 152.

  In addition, the width W3 of the wiring configuring the third closed circuit 151 and the fourth closed circuit 152 and the width W4 of the wiring configuring the fourth closed circuit 152 are the same as the width W2 of the wiring of the second closed circuit 24. . Further, the width W5 of the wiring from the base of the bipolar transistor 170 to the connection point T7 is the same as the width W1 of a part of the wiring configuring the first closed circuit 23. Here, the first closed circuit 23, the second closed circuit 24, the third closed circuit 152, and the fourth closed circuit 153 have the same wiring thickness. Therefore, the cross-sectional area of the wiring that configures the first closed circuit 23 is smaller than the cross-sectional area of the wiring that configures the third closed circuit 152 and the fourth closed circuit 153. Further, the same material as the wiring of the first closed circuit 23, the second closed circuit 24, the third closed circuit 152, and the fourth closed circuit 153 is used.

  By having the configuration as described above, the oscillation circuit 120 is determined by the combined capacitance of the capacitors of the internal capacitors C1 and C2, the external capacitors C3 to C7, and the variable capacitance diodes D1 and D2, and the inductance of the external inductor L1. It oscillates at a certain frequency. The oscillation frequency can be changed by changing the frequency control voltage Vc applied to the variable capacitance diodes D1 and D2.

  In the second embodiment, capacitors for determining the oscillation frequency are separately arranged inside and outside the semiconductor integrated circuit 160, and the combined capacitance of the external capacitors C3 to C7 provided outside the semiconductor integrated circuit 160 is integrated into the semiconductor integrated circuit. Since the capacitance is larger than the combined capacitance of the capacitors provided in the circuit 160, the amount of current flowing in the semiconductor integrated circuit 160 can be reduced. As a result, the influence of the high-frequency current flowing in the oscillation circuit 120 on the reception circuit 30, the transmission circuit 40, and the control circuit 50 in the semiconductor integrated circuit 160 can be reduced.

  In the second embodiment, the wiring length of the wiring configuring the first closed circuit 23 is longer than the wiring length of the wiring configuring the second closed circuit 24, the third closed circuit 151, and the fourth closed circuit 152. The cross-sectional area of the wiring constituting the first closed circuit 23 is smaller than the cross-sectional area of the wiring constituting the second closed circuit 24, the third closed circuit 151 and the fourth closed circuit 152, and the materials constituting both the wirings are the same. It is. That is, the wiring resistance in the first closed circuit 23 is smaller than the wiring resistance of the second closed circuit 24, the third closed circuit 151, and the fourth closed circuit 152. For this reason, high-frequency current easily flows through the second closed circuit 24, the third closed circuit 151, and the fourth closed circuit 152, and the reduction of the amount of current flowing in the semiconductor integrated circuit 160 as described above is efficiently realized. The influence which the receiving circuit 30, the transmitting circuit 40, and the control circuit 50 in the integrated circuit 160 receive can be reduced.

  Further, in the second embodiment, since the amplifier circuit 121 is provided outside the semiconductor integrated circuit 160, a current flowing from the bipolar transistor 170 constituting the amplifier circuit 121 to the ground potential does not flow into the semiconductor integrated circuit 160. Therefore, it is possible to reduce the influence of the reception circuit 30, the transmission circuit 40, and the control circuit 50 due to the occurrence of such current.

  In the second embodiment, as in the first embodiment, the directions of the high-frequency currents flowing in the first closed circuit 23 and the second closed circuit 24 at the same time are reversed. Accordingly, the direction of the high-frequency magnetic field in the first closed circuit 23 at the predetermined time is opposite to the direction of the high-frequency magnetic field in the second closed circuit 24, and the high-frequency magnetic field generated by the high-frequency current flowing in the first closed circuit 23 is changed to the second closed circuit. It can be canceled out by a high-frequency magnetic field generated by a high-frequency current flowing through 24. In the second embodiment, since the high-frequency current flows through the third closed circuit 151 and the fourth closed circuit 152, the first closed circuit 23, the second closed circuit 23, the third closed circuit 151, and the fourth closed circuit 152 are used. Of the first closed circuit 23, the second closed circuit 23, the third closed circuit 151, and the fourth closed circuit 152 so that the strength of the high frequency magnetic field obtained by synthesizing the high frequency magnetic fields generated by the high frequency currents flowing through It is more preferable to determine the wiring length and width, and further the capacitances of the internal capacitors C1 and C2, the variable capacitance diodes D1 and D2, and the external capacitors C3 to C7.

  Note that the amplifier circuit 21 of the first embodiment may be further provided in the semiconductor integrated circuit 160. In general, when the amplifier circuit 21 in the semiconductor integrated circuit 160 is used, the current consumption can be reduced, but it becomes difficult to reduce the fluctuation of the oscillation frequency. On the other hand, when the amplification circuit 121 outside the semiconductor integrated circuit 160 is used, the fluctuation of the oscillation frequency can be reduced, but the current consumption can be reduced, but it becomes difficult. Therefore, by providing the amplifier circuit inside and outside the semiconductor integrated circuit 160, the amplifier circuit 21 in the semiconductor integrated circuit 160 is provided at the time of data reception in which it is necessary to reduce the current consumption rather than suppressing the fluctuation of the oscillation frequency. The oscillation operation using the amplification circuit 121 outside the semiconductor integrated circuit 160 may be performed at the time of data transmission in which the oscillation operation used is performed and it is necessary to suppress the fluctuation of the oscillation frequency rather than the reduction of the current consumption. More preferred.

DESCRIPTION OF SYMBOLS 10 Radio | wireless machine 20 Oscillation circuit 21 Amplification circuit 22 Resonance circuit 60 Semiconductor integrated circuit C1, C2 Internal capacitor C3 External capacitor L1 External inductor

Claims (6)

A semiconductor device including a semiconductor integrated circuit,
A first capacitor provided inside the semiconductor integrated circuit; an inductor provided outside the semiconductor integrated circuit; and a first region defined between the first capacitor and the inductor. A first closed circuit configured by a first wiring connecting the first capacitor and the inductor;
A second region defined between the inductor, the second capacitor provided outside the semiconductor integrated circuit and disposed outside the first region, and the inductor and the second capacitor; A second closed circuit comprising: a second wiring that surrounds and connects the inductor and the second capacitor;
Have
The semiconductor device according to claim 1, wherein a wiring resistance of the second wiring is smaller than a wiring resistance of the first wiring.   The semiconductor device according to claim 1, wherein an area of the first region is larger than an area of the second region.   The semiconductor device according to claim 1, wherein a capacitance of the second capacitor is larger than a capacitance of the first capacitor. A third capacitor defined between the second capacitor, the third capacitor provided outside the first region and the second region, and the second capacitor and the third capacitor; A third closed circuit configured by a third wiring that surrounds the region and connects the second capacitor and the third capacitor;
The third capacitor, the first region, the second region, and the bipolar transistor arranged in parallel with the third capacitor outside the third region; and the third capacitor A fourth closed circuit configured by a fourth wiring surrounding a fourth region defined between a capacitor and the bipolar transistor and connecting the third capacitor and the bipolar transistor;
The semiconductor device according to claim 1, further comprising:   The wiring length of the first closed circuit is longer than the wiring length of each of the second closed circuit, the third closed circuit, and the fourth closed circuit. Semiconductor device.   6. The wiring resistance of the first closed circuit is smaller than the wiring resistance of each of the second closed circuit, the third closed circuit, and the fourth closed circuit. The semiconductor device described.

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