JP2018084567A - Electronic control unit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an electronic control unit that is configured to enable disconnection and abnormality of a ground fault to be correctly discriminated as much as possible during an off-drive period of a drive unit even if a capacity part is added to a drive output node.SOLUTION: A drive unit 3 is configured to conduct a low-side drive of an electric load 2 connected to a high-side side, and energization unit 4 is configured to energize a charging electric current or discharging electric current to a capacitor C1 added to a low-side side of a drive output node N3 to the electric load 2 by the drive unit 3. A microcomputer is configured to change values of the charging and discharging electric currents to the capacitor C1 by the energization unit when a drive of the electric load 2 by a drive transistor 3 is turned off, and change a charging voltage value multiple times (S1 to S2, and S7 to S9). Then, the microcomputer is configured to, when changing the charging voltage value to the capacitor C1 multiple times, discriminate abnormality of disconnection between the drive output node N3 and the electric load 2 and abnormality of a ground fault of the drive output node N3 in accordance with respective detected charging voltage values of the capacitor C1 during off-drive periods of the drive unit 3 (S3, S4, S6, S10 and S11).SELECTED DRAWING: Figure 2

Description

  The present invention relates to an electronic control device.

  Some load driving devices, for example, connect an electric load to the high side and connect a switching element to the low side, thereby energizing the electric load on / off (see, for example, Patent Document 1). According to the abnormality detection device described in Patent Document 1, the terminal voltage when the FET (corresponding to the drive unit) is off is set to VB / 2 when the load is broken, and approximately VB when normal. Each of the determination voltages Vth1 and Vth2 is compared with the voltage VO by a comparator, and when the FET is turned off, if Vth1 ≧ VO> Vth2, it is determined that the wire is disconnected, and if Vth2 ≧ VO, it is determined that the ground is short (corresponding to a ground fault). Thereby, the disconnection and the ground short are distinguished and detected.

JP 2004-347423 A

  By the way, a capacitor may be added to the node of the drive output as a capacitance unit in order to remove various noises, for example. In recent years, it has been demanded to determine the disconnection and ground short-circuit abnormality at higher speed, and it is required to quickly distinguish between the disconnection and the ground short-circuit when the drive of the electric load is turned off by the drive unit. Yes.

  However, for example, even if the technique disclosed in Patent Document 1 is employed and disconnection and ground short are determined based on the threshold voltages Vth1 and Vth2, if a configuration in which a capacitor is added is used, the capacitor is charged / discharged. The current will flow according to a certain time constant.According to such influence, the charge voltage responsiveness of the capacitor part deteriorates, and it can be fully charged and discharged until the charge voltage becomes stable during the required off drive period. Therefore, it is difficult to determine abnormality based on the threshold voltages Vth1 and Vth2.

  That is, it becomes difficult to satisfy the demand for high processing speed during the off-drive period of the drive unit. In order to shorten the time constant, for example, it is conceivable to lower the resistance value of the resistor connected to the capacitor portion. However, if the resistance value is lowered, current consumption increases, which is not preferable.

  SUMMARY OF THE INVENTION An object of the present invention is to provide an electronic control device capable of accurately determining disconnection and ground fault abnormality during an off drive period of a drive unit even if a capacitor unit is added to a drive output node. is there.

  According to the first aspect of the present invention, the drive unit drives the electric load connected to the high side on the low side. The capacitor unit is added to the low side of the drive output node of the electric load by the drive unit. The energization unit energizes the charge current or the discharge current to the capacity unit. The abnormality determination unit changes the charge voltage value to the capacitor unit a plurality of times by changing the value of the charge / discharge current to the capacitor unit by the energizing unit when the drive of the electric load by the drive unit is turned off, and determines the charge voltage value to the capacitor unit. Abnormalities in the disconnection between the drive output node and the electric load and abnormalities in the ground fault of the drive output node according to the charge voltage value of the capacitor portion detected during the off-drive period of the drive unit when changed multiple times Is determined. As a result, the disconnection and the ground fault can be discriminated as accurately as possible at high speed.

Electrical configuration diagram of the electronic control device in the first embodiment Flowchart schematically showing abnormality type discrimination processing Timing chart (1) Timing chart (2) Electrical configuration diagram of electronic control device in second embodiment Flowchart schematically showing abnormality type discrimination processing Timing chart Electrical configuration diagram of electronic control device in third embodiment Flowchart schematically showing abnormality type discrimination processing Timing chart Comparative example timing chart

  Hereinafter, some embodiments of the electronic control device will be described with reference to the drawings. In the following description, components having the same or similar functions as those described in each embodiment are denoted by the same reference numerals or similar symbols, and description thereof will be omitted as necessary in the second and subsequent embodiments.

(First embodiment)
1 to 4 are explanatory views of the first embodiment. FIG. 1 shows an electrical configuration diagram of an electronic control device equipped with a drive unit for driving an external electrical load. This electronic control unit (hereinafter referred to as ECU: Electronic Control Unit) 1 controls, for example, fuel injection to the engine, and is configured by connecting an electric load 2 by an inductive load. One end of the electric load 2 is connected to the supply node N2 of the battery power source VB2, and the other end of the electric load 2 is an output terminal for driving the electric load 2 of the ECU 1 via a vehicle wiring, so-called harness. Thus, the electrical load 2 is connected to the high side of the output terminal 1a.

  Output terminal 1a is connected to drive output node N3 of ECU1. A capacitor C1 serving as a capacitor is connected between the drive output node N3 and the ground GND. The capacitor C1 is added to the low side of the drive output node N3, that is, the ground GND side for noise removal. Although the capacitor C1 is shown connected to the inside of the electronic control unit 1, it may be connected to the outside. In addition, not only one capacitor C1 but also a plurality of capacitors C1 may be connected as a capacitance unit.

  The ECU 1 includes a drive unit 3, an energization unit 4, a comparison unit 5, and a microcomputer (hereinafter referred to as a microcomputer) 6. The drive unit 3 is configured using, for example, a transistor TR1 for driving the electrical load 2, and is configured on the low side of the drive output node N3, thereby driving the electrical load 2 on the low side.

  The transistor TR1 is configured by, for example, an N channel type MOSFET. The transistor TR1 may be composed of, for example, a bipolar transistor, and the type thereof is not limited. Hereinafter, a mode in which the transistor TR1 is configured by an N-channel MOSFET will be described. The drain of the transistor TR1 is connected to the drive output node N3, the source is connected to the node of the ground GND, and the gate is connected to the microcomputer 6. Between the drain and the gate of the transistor TR1, clamp circuits D2 and D3 are connected in which a Zener diode D2 and a diode D3 are connected in opposite directions. By using the clamp circuits D2 and D3, the transistor TR1 can be protected from a high voltage.

  The energization unit 4 includes a bias circuit 7 and a charging circuit 8. A bias circuit 7 is connected to the drive output node N3. The bias circuit 7 includes a resistor Ru1 connected between a supply node N1 of a power supply voltage VB1 supplied from a battery (not shown) via a main relay and a drive output node N3, a drive output node N3, and a ground. The power supply voltage VB1 is divided by the resistors Ru1 and Rl1, and a DC bias is applied to the drive output node N3. These resistors Ru1 and Rl1 are also used as the energization unit 4 for energizing the charge / discharge current to the capacitor C1.

  A free-wheeling diode D1 is forward-connected between the drive output node N3 and the supply node N1 of the power supply voltage VB1. The free-wheeling diode D1 is provided to regenerate the power stored in the inductive electric load 2 to the power supply voltage VB1 when the transistor TR1 of the driving unit 3 is turned off.

  The comparison unit 5 includes a plurality of resistance voltage dividing circuits 9 and 10 and a plurality of comparators CP1 and CP2. A plurality of resistance voltage dividing circuits 9 and 10 are connected in parallel between the supply node N1 of the power supply voltage VB1 and the ground GND. The resistance voltage dividing circuit 9 is configured by connecting a plurality of resistors R1a and R1b in series, and the resistance voltage dividing circuit 10 is configured by connecting a plurality of resistors R2a and R2b in series. The divided voltage of one resistance voltage dividing circuit 9 is input to the inverting input terminal of the comparator CP1 as the threshold voltage Vth1. The divided voltage of the other resistance voltage dividing circuit 10 is input to the inverting input terminal of the comparator CP2 as the threshold voltage Vth2. The resistance values of the resistors R1a, R1b, R2a, and R2b are set in advance so that the relationship between the threshold voltage Vth1 and the threshold voltage Vth2 is Vth1 <Vth2.

  The drive output node N3 is connected to the non-inverting input terminals of the plurality of comparators CP1 and CP2. The plurality of comparators CP1 and CP2 are connected to the voltage of the drive output node N3, that is, the voltage across the terminals of the capacitor C1, that is, The charge / discharge voltage is compared with the threshold voltages Vth1 and Vth2, and the comparison result is output to the microcomputer 6.

  The charging circuit 8 of the energization unit 4 includes a resistance voltage dividing circuit 11 and a switch 12, and is configured on the high side of the drive output node N3. The resistance voltage dividing circuit 11 is configured by connecting a plurality of resistors Ru2 and Rl2 in series between the supply node N1 of the power supply voltage VB1 and the ground GND, and divides the power supply voltage VB1. As described above, the bias circuit 7 applies a DC bias to the drive output node N3. At this time, the voltage dividing resistance ratio (corresponding to the voltage dividing ratio) of the resistors Ru2 and Rl2 of the resistance voltage dividing circuit 11 and the bias circuit 7 It is desirable to define the voltage dividing resistance ratio (corresponding to the voltage dividing ratio) of the resistors Ru1 and R11 within a predetermined ratio range (for example, 0.95 to 1.05) including the same ratio (= 1). May be set appropriately. The reason for this will be described later.

  The switch 12 is configured by using, for example, a transistor TR2, and is used for diagnosis, that is, for self-diagnosis of the operation of the electronic control device. The transistor TR2 is configured using, for example, an N-channel type MOSFET. Although a mode in which the transistor TR2 is configured by an N-channel MOSFET is shown, the present invention is not limited to this, and for example, a bipolar transistor may be used.

  The common connection node N4 of the resistance voltage dividing circuit 11 is connected to the drain which is the energization terminal of the transistor TR2. The drive output node N3 is connected to the source which is the other energization terminal of the transistor TR2. As a result, the transistor TR2 constituting the switch 12 enables switching output of the divided voltage of the resistance voltage dividing circuit 11 to the drive output node N3.

  On the other hand, the microcomputer 6 includes a CPU 13, a ROM 14, a RAM 15, and an I / O 16. The microcomputer 6 may include a non-volatile memory or an A / D conversion circuit, but is not shown. Hereinafter, storage devices such as ROM and RAM will be collectively referred to as memory. The microcomputer 6 executes a program stored in a memory (ROM 14) serving as a non-transitional tangible recording medium. By executing the program stored in this memory, a method corresponding to the program is executed. Thereby, the microcomputer 6 implement | achieves the function as an abnormality determination part.

  The CPU 13 of the microcomputer 6 normally turns on and off the electrical load 2 by turning on and off the transistor TR1 serving as the drive unit 3 through the I / O 16. Further, the microcomputer 6 controls the transistor TR2 to be turned off or on during execution of the diagnosis diagnosis process, receives the outputs of the comparators CP1 and CP2 in this control state, and performs the diagnosis diagnosis process based on the output signal. The diagnostic diagnosis process mainly indicates a self-diagnosis process for confirming whether the drive output node N3 and the output terminal 1a are disconnected, ground fault, or power fault.

  Such various abnormalities are caused by, for example, poor contact of the harness between the electric load 2 and the output terminal 1a. For example, the disconnection indicates a problem that the battery power source VB2 is not energized to the output terminal 1a through the electric load 2 in accordance with the connection failure of the harness. Further, the power fault indicates a problem that the drive output node N3 or the output terminal 1a is short-circuited to the supply node N2 of the battery power supply VB2. The ground fault indicates a problem that the drive output node N3 or the output terminal 1a is short-circuited to the ground GND. Among these, the microcomputer 6 can determine whether or not it is a power fault by determining whether or not the voltage of the drive output node N3 becomes higher than a predetermined threshold voltage with the transistor TR1 turned on. .

  Hereinafter, the disconnection and ground fault determination process in the diagnosis process will be described in detail. FIG. 2 schematically shows a process of discriminating disconnection and ground fault in a flowchart, and FIG. 3 shows a timing chart. Normally, the microcomputer 6 executes a diagnostic diagnosis process for determining the disconnection and the ground fault shown in FIG. 2 periodically while energization of the electric load 2 is turned on or off. Although the microcomputer 6 shows a form in which the processing shown in FIG. 2 is periodically executed, it may be executed irregularly. Here, the following description will be made on the assumption that the transistor TR2 is turned off, the transistor TR1 is turned on, and the electric load 2 is energized.

  In S1, the microcomputer 6 turns off the transistor TR1. Then, a current flows to the capacitor C1 through at least the resistor Ru1. Further, if no abnormality such as disconnection has occurred, the current flowing in the electric load 2 flows in the capacitor C1. As shown in FIG. 3, the voltage of the drive output node N3 starts to rise from the voltage of the ground GND at the timing t0. The time constant related to the voltage rise at this time is determined mainly according to the impedance of the electric load 2, the resistance value of the resistor Ru1, and the capacitance value of the capacitor C1. Thereafter, as shown in FIG. 2, the microcomputer 6 sets the output voltage Vo of the drive output node N3 to the threshold voltages Vth1 and Vth2 by the comparator 5 at the timing t1 in the off drive period T2 when the predetermined time T1 has elapsed. Get the comparison result.

  Here, the predetermined time T1 is determined in advance so that the comparators CP1 and CP2 of the comparator 5 can obtain stable comparison results after the transistor TR1 is turned off. That is, the predetermined time T1 is set to a time longer than the settling time (that is, the settling time) determined according to the above-described time constant related to the voltage rise degree. At this time, the shorter the time constant related to the voltage rise degree, the shorter the predetermined time T1, and in this case, the processing time can be shortened.

  The microcomputer 6 refers to the comparison result acquired in S2, and when the comparison result of the comparator CP1 is “H” in S3 and the comparison result of the comparator CP2 is “H” in S4, It is determined that there is a fault. The process for determining whether the abnormality is normal or power is not related to the feature of the present embodiment, and thus the description thereof is omitted.

  The impedance value of the electric load 2 at the frequency that changes transiently is significantly lower than the resistance value of the resistor Ru1 (for example, 160 kΩ). For this reason, normally, if the electric load 2 is normally connected to the output terminal 1a through the harness, the capacitor C1 has a battery power source according to a time constant determined by a combined impedance such as the impedance of the electric load 2 and the resistor Ru1. The battery is charged from VB2. In this case, the time constant related to the voltage rise is sufficiently small. As a result, the comparison results of the comparators CP1 and CP2 during the off drive period T2 at the timing when the predetermined time T1 has elapsed are both “H”.

  In the other period thereafter, when the microcomputer 6 executes the processing of FIG. 2, if the transistor TR1 is controlled from ON to OFF in S1, the voltage of the drive output node N3 is changed as shown in FIG. At timing t2, the voltage starts to rise from the ground GND voltage. At this time, if the electric load 2 is not connected to the output terminal 1a through the harness, the capacitor C1 is not energized through the electric load 2.

  In this case, the voltage of the drive output node N3 in the steady state is lower than that in the normal state. For this reason, the comparison result of the comparator CP1 becomes “H” in S3, and the comparison result of the comparator CP2 becomes “L” in S4. In particular, if it is determined in S3 that the comparison result of the comparator CP1 is “H”, there is no possibility that the drive output node N3 has a ground fault. Can be determined. In this case, the time constant related to the voltage rise is determined according to a value including the resistance value of the resistor Ru1 and the capacitance value of the capacitor C1, and the time constant related to the voltage rise is compared with that in a normal state. Become smaller.

  In another period thereafter, when the microcomputer 6 executes the processing of FIG. 2, if the comparison result of the comparator CP1 is “L” in S3, it is determined NO in S3, and S7 to S10. The process proceeds to another determination process shown in FIG. In this case, there is no possibility of normal or sky fault, and the possibility of ground fault or disconnection remains.

<When the electrical load 2 and the output terminal 1a are disconnected>
The microcomputer 6 turns on again after turning on the transistor TR1 in S7 and turns on the transistor TR2 in S8. Note that it is desirable to perform the off processing of S7 and S8 simultaneously. At this time, compared with the process of charging the capacitor C1 in S1 and S2, the degree of increase in which the charging circuit 8 increases the charging current value to the capacitor C1 can be increased.

  When the electrical load 2 is disconnected, as shown in FIG. 3, the voltage at the drive output node N3 starts to rise from the ground GND at timing t6. The time constant related to the voltage rise at this time is determined according to a coefficient mainly including the combined resistance value of the resistors Ru1 and Ru2 and the capacitance value of the capacitor C1.

  Then, the microcomputer 6 obtains a comparison result obtained by comparing the output voltage Vo of the drive output node N3 with the threshold voltages Vth1 and Vth2 by the comparator 5 during the off drive period T2 after the elapse of the predetermined time T1 in S9 of FIG. . See timing t7 in FIG.

  When the electrical load 2 and the output terminal 1a are disconnected, the output voltage Vo of the drive output node N3 at the timing t7 in FIG. 3 is generally defined by the combined circuit of the bias circuit 7 and the resistance voltage dividing circuit 11. It will be.

  Even at the time of disconnection, the bias circuit 7 applies a DC bias to the drive output node N3. As described above, the voltage dividing resistance ratio of the resistance voltage dividing circuits Ru2 and Rl2 and the voltage dividing resistance ratio of the bias circuit 7 Are defined in advance within a predetermined ratio range (for example, 0.95 to 1.05) including the same ratio (= 1). Therefore, regardless of whether the switch 12 is on or off, the output voltage Vo can be maintained at a voltage equivalent to the voltage normally output by the bias circuit 7.

  Therefore, as shown in FIG. 3, when the disconnection is detected by the processing route of S3 → S4 → S6 of FIG. 2, and when the disconnection is detected by the processing route of S3 → S7 to S10 → S4 → S6 of FIG. , The output voltage Vo at the detection timings t3 and t7 at the time of disconnection can be kept at the same level, and when the comparison results of the comparators CP1 and CP2 are obtained in these two processing routes, the comparators CP1 and CP2 There is no need to change the threshold voltages Vt1 and Vt2 of CP2. Thereby, it becomes easy to design the processing program of the microcomputer 6 and the hardware of the electronic control unit 1.

  If the load 2 and the output terminal 1a are disconnected, the comparison result of the comparator CP1 is “H”. For this reason, the microcomputer 6 determines YES in S10, and proceeds to the process of S4. The microcomputer 6 determines whether or not the comparison result of the comparator CP2 is “H” in S4. This determination process of S4 can be performed using the comparison result of the comparator CP2 acquired in S2. desirable.

  When the microcomputer 6 makes a determination using the comparison result of the output voltage of the comparator CP2 acquired in S2, in principle, the comparison result of the comparator CP1 is determined to be “L” in S2, and the threshold voltage is Vth1 <Vth2. Therefore, the comparison result of the comparator CP2 is determined as “L” in S4. For this reason, the microcomputer 6 can determine that it is a disconnection by determining NO in S4. The microcomputer 6 may determine the determination in S4 using the comparison result of the output voltage of the comparator CP2 acquired in S9. Thereafter, for example, even if the processing shown in FIG. 2 is periodically repeated and the number of measurements is performed, as shown in the timings t8 to t9 and t10 to t11 in FIG. The microcomputer 6 continues to determine that the disconnection is abnormal at timings t9 and t11.

<If there is a ground fault>
When the drive output node N3 is grounded, the output voltage Vo remains substantially 0V as shown at timings t12 to t13, t14 to t15, t16 to t17, t18 to t19, and t20 to t21 in FIG. . For this reason, even if the microcomputer 6 determines NO in S3 and then performs the processes of S7 to S10, it determines NO in S10 and can determine that there is a ground fault abnormality. Thus, even if a disconnection or a ground fault occurs, these abnormalities can be determined.

  The features according to this embodiment will be conceptually described. According to this embodiment, when the microcomputer 6 turns off the driving of the electric load 2 by the driving transistor 3, the charging current value to the capacitor C1 by the energization unit 4 is changed to change the charging voltage value a plurality of times ( S1-S2 and S7-S9 in FIG.

  Then, when the microcomputer 6 changes the charging voltage value of the capacitor C1 a plurality of times, the driving output node N3 corresponds to the charging voltage of the capacitor C1 detected in the off driving period T2 after the predetermined time T1, respectively. 2 and the ground fault of the drive output node N3 are determined (S3, S4, S6, S10, S11 in FIG. 2). As a result, even if the capacitor C1 is added to the drive output node N3, the disconnection and the ground fault can be discriminated as quickly as possible.

  For example, when the conventional technology is applied and the charging unit 8 is not provided with the charging circuit 8, the output voltage Vo of the drive output node N3 is set to the disconnection lower limit threshold voltage Vth1 due to insufficient charging current to the capacitor C1. There is a possibility that it may be erroneously determined as a ground fault even if it is disconnected without reaching.

  In the present embodiment, the charging voltage value of the capacitor C1 is changed depending on whether the charging circuit 8 is provided and the charging circuit 8 is functioned or not, and is detected during the off drive period T2 after a predetermined time T1. The disconnection abnormality and ground fault abnormality of the drive output node N3 are discriminated in accordance with the charged voltage of the capacitor C1. For this reason, even if the capacitor C1 is added to the drive output node N3, the disconnection and the ground fault can be discriminated as fast as possible, thereby preventing the fault from being erroneously discriminated from the ground fault.

  In addition, the charging circuit 8 of the energization unit 8 is configured by using a voltage dividing circuit 11 and a switch 12, and the energized on / off of the voltage dividing circuit 11 is energized on and off by switching the energization on / off by the switch 12. Thus, the charging current value to the capacitor C1 is changed to change the charging voltage value a plurality of times. In this case, the increase / decrease amount of the charging current value to the capacitor C1 can be adjusted by setting the resistance value of the voltage dividing resistor of the voltage dividing circuit 11, and the resistance value of the voltage dividing circuit 11 according to the application such as the electric load 2 or the like. Can be adjusted.

  Since the voltage dividing resistance ratio of the voltage dividing circuit 11 and the voltage dividing resistance ratio of the bias circuit 7 are defined within a predetermined ratio range including the same ratio, the bias circuit 7 normally outputs regardless of whether the switch 12 is on or off. The output voltage Vo can be maintained at a voltage equivalent to the voltage. Therefore, comparison between the comparators CP1 and CP2 is performed when the disconnection is detected by the processing route S3 → S4 → S6 in FIG. 2 and when the disconnection is detected by the processing route S3 → S7 to S10 → S4 → S6 in FIG. When obtaining the result, there is no need to change the threshold voltages Vt1 and Vt2 of the comparators CP1 and CP2. Thereby, it becomes easy to design the program of the microcomputer 6 and the hardware of the electronic control unit 1.

(Second Embodiment)
5 to 7 show additional explanatory views of the second embodiment. FIG. 5 shows an electrical configuration diagram of the electronic control unit 1, and FIG. 6 shows the operation in a flowchart. FIG. 7 shows a timing chart and an image of the waveform of the output voltage Vo at the drive output node N3.

  As shown in FIG. 5, the energization unit 104 that replaces the energization unit 4 includes a charging circuit 108 that replaces the charging circuit 8. The charging circuit 108 of the energization unit 4 includes an energization circuit 111 and a switch 12 using a resistor Ru2. The switch 12 is configured by using a transistor TR2 made of, for example, an N-channel MOSFET. Although the transistor TR2 is configured by a MOSFET, the present invention is not limited to this. For example, a bipolar junction transistor may be used. According to the configuration shown in FIG. 5, the number of resistors can be reduced as compared with the first embodiment.

  The resistor Ru2 is connected between the supply node N1 of the power supply voltage VB1 and the drain of the transistor TR2, and the source of the transistor TR2 is connected to the drive output node N3. The bias circuit 7 applies a predetermined direct current bias to the drive output node N3, and the microcomputer 6 pulse-drives the transistor TR2, thereby energizing the drive output node N3 in an alternating manner. Thereby, the switch TR2 of the charging circuit 108 can be energized in an alternating manner to the drive output node N3 through the resistor Ru2 by being pulse-driven. At this time, the microcomputer 6 functions as a pulse control unit. As the pulse driving method, for example, various methods such as PWM, PFM, and PWFM can be used. The DC voltage value of the output voltage Vo at the constant time is defined by the bias circuit 7, and the DC voltage value of the output voltage Vo when the transistor TR1 is turned off regardless of the pulse drive on / off state of the switch 12 is within a predetermined range. Can be kept in.

  The driving frequency or / and the driving duty ratio, the predetermined time T1, the resistance value of the resistor Ru2, and the capacitance value of the capacitor C1 when the microcomputer 6 pulses the transistor TR2 by various pulse driving methods are as follows: With respect to the disconnection threshold range Vth1 to Vth2 in which it is possible to determine that the charging voltage of C1, that is, the output voltage Vo is abnormal disconnection, it is determined in advance so as to be constantly stabilized within the off drive time T2.

  The operation will be described below. As shown in FIG. 6, when the microcomputer 6 determines that the comparison result of the comparator CP1 is “H” in S3, the microcomputer 6 performs the processes of S4 to S6 as in the first embodiment, but this description is omitted. When the microcomputer 6 determines that the comparison result of the comparator CP1 is “L” in S3, the microcomputer 6 determines NO in S3, turns off the transistor TR1 in S7, and drives the control transistor 12 in S8a in a pulsed manner. Then, compared to the process of charging the capacitor C1 in S1 and S2, the degree of increase in which the charging circuit 108 increases the charging current value to the capacitor C1 can be increased.

  The output voltage Vo of the drive output node N3 is output after the microcomputer 6 starts the pulse drive of the transistor TR2 as shown at timings t6 to t7, t8 to t9, t10 to t11, and t12 to t13 in FIG. The output voltage Vo of the node N3 is steadily stabilized in the disconnection threshold range Vth1 to Vth2 within the off drive period T2 after the lapse of the predetermined time T1. As shown in FIG. 7, when the microcomputer 6 is driving the pulse of the transistor TR2, when the output voltage Vo is stable in the disconnection threshold range Vth1 to Vth2, a ripple is generated in the output voltage Vo.

  Then, the microcomputer 6 obtains a comparison result obtained by comparing the output voltage Vo of the drive output node N3 with the threshold voltages Vth1 and Vth2 by the comparator 5 during the off drive period T2 after the elapse of the predetermined time T1 in S9 of FIG. . See timing t7 in FIG.

  At this timing t7, the output voltage Vo is constantly stable in the disconnection threshold range Vth1 to Vth2, so the microcomputer 6 determines that the comparison result of the comparator CP1 is “H” in S10, and the comparison result of the comparator CP2 in S4. Is determined to be “L”, whereby it is possible to determine that the wire is disconnected in S6. Since other processes are the same as those in the first embodiment, description thereof is omitted.

  The features of the present embodiment are conceptually summarized below. In the present embodiment, the microcomputer 6 pulse-drives the switch 12 using the condition that the DC bias of the drive output node N3 is set in a predetermined range so that the drive output node N3 is supplied with an AC current. I made it. Thereby, even if a disconnection abnormality occurs and the switch 12 is pulse-driven in S8a of FIG. 6, the DC bias of the drive output node N3 can be stabilized. For this reason, it is possible to reliably detect the disconnection abnormality.

  Further, the drive frequency or / and drive duty ratio when the switch 12 is pulse-driven, the predetermined time T1, the resistance value of the resistor Ru2, and the capacitance value of the capacitor C1 are the charge voltage of the capacitor C1, that is, the output voltage Vo, With respect to a predetermined disconnection threshold range Vth1 to Vth2 in which it can be determined that the disconnection is abnormal, it is determined in advance so as to be steadily stable within the off drive period T2. For this reason, it is possible to reliably detect the disconnection abnormality.

(Third embodiment)
8 to 11 show additional explanatory views of the third embodiment. In the third embodiment, a plurality of drive units 3a and 3b are provided, and the plurality of drive units 3a and 3b are connected to the high side of the corresponding plurality of drive output nodes N3a and N3b, respectively. An embodiment in which the loads 2a and 2b are configured to be driven on the low side will be described. Although an example in which the electric loads 2a and 2b are driven in two systems is shown, the same applies to three or more systems. Parts having the same functions as those of the first embodiment are denoted by the same or similar reference numerals (for example, subscripts a, b, or 200 are added), description thereof is omitted as necessary, and different parts are mainly described below. Explained.

  FIG. 8 shows an electrical configuration diagram of the electronic control unit 201. As shown in FIG. 8, a plurality of electric loads 2a, 2b are connected to the high side outside the electronic control unit 201, and capacitors C1a, C1b are connected to the low side of the plurality of electric loads 2a, 2b. Is connected. The comparison units 5a and 5b, bias circuits 7a and 7b, switches 212a and 212b (transistors TR1a and TR1b), diodes D2a and D2b, and diodes D3a and D3b in FIG. 8 are configured as described in the description of the above embodiment. It is shown as a configuration that performs the same operation as the requirements (comparing unit 5, bias circuit 7, switch 12 (transistor TR1), diode D2, and diode D3, respectively).

  In FIG. 8, the code | symbol which added subscript a or b or 200 to the code | symbol of these corresponding component requirements is attached | subjected and shown. These structural requirements are provided corresponding to the electric loads 2a and 2b by a plurality of inductive loads, respectively. The control terminals (gates) of the transistors TR1a, TR1b, TR2a, TR2b are controlled by the microcomputer 6, but the control lines are not shown in FIG.

  The charging circuit 208 as a charging / discharging circuit includes, for example, one charging / discharging power supply 211 and switches 212a and 212b that enable switching on / off of energization from the charging / discharging power supply 211 to a plurality of output nodes N3a and N3b. Prepare.

  The charging / discharging power supply 211 is constituted by, for example, a buffer circuit that inputs a power supply voltage and outputs a voltage, and can output a current to the drive output nodes N3a and N3b through the switches 212a and 212b. The switches 212a and 212b are configured by N-channel type MOS transistors TR2a and TR2b, for example. The drains of these MOS transistors TR2a and TR2b are commonly connected to each other. The source of the transistor TR2a is connected to the drive output node N3a through the anode and cathode of the diode Da. The source of the transistor TR2b is connected to the drive output node N3b through the anode and cathode of the diode Db. The energization unit 204 includes bias circuits 7 a and 7 b and a charging circuit 208. Description of other configurations and electrical connection relations is omitted with reference to the drawings.

  Hereinafter, the disconnection and ground fault determination process in the diagnosis process will be described in detail. FIG. 9 schematically shows a process for determining a disconnection and a ground fault in a flowchart, and FIG. 10 shows a timing chart and an image of waveforms of the output voltages Vo1 and Vo2 of the drive output nodes N3a and N3b. ing.

  In the present embodiment, a mode is shown in which the electric loads 2a and 2b are PWM-driven at different driving cycles, and an example in which the PWM drive duty ratio at this time is 50%, for example, is shown. For this reason, also in FIG. 10, an example in which the on-drive period and the off-drive period for the electric loads 2a and 2b by the drive units 5a and 5b are different from each other is shown.

  In the present embodiment, as shown in FIG. 10, abnormality determination periods Ta, Tb, and Tb necessary for the microcomputer 6 to determine abnormality are provided. These abnormality determination periods Ta, Tb, and Tc may include at least off drive periods corresponding to the number of electric loads 2a and 2b to be driven by the electronic control unit 201 (two in this embodiment). It is set to a possible time length. The microcomputer 6 detects the states of the drive output nodes 3a and 3b of the loads 2a and 2b during the off-drive period of all the electric loads 2a and 2b with the abnormality determination periods Ta, Tb, and Tc as units. Based on this, processing to be executed in the next abnormality determination period is sequentially determined.

  As described in the above-described embodiment, the microcomputer 6 normally executes diagnostic diagnosis processing for determining disconnection and ground fault. The microcomputer 6 turns on / off the transistor TR1a when driving the electric load 2a. At this time, even if the microcomputer 6 turns off the transistor TR1a, the current flows to the capacitor C1a through at least the resistor Ru1a. The microcomputer 6 turns on / off the transistor TR1b when driving the electric load 2b. At this time, even if the microcomputer 6 switches the transistor TR1b from on to off, a current flows to the capacitor C1b through at least the resistor Ru1b. Further, during the off-drive period of the electric load 2a, the current that has flowed to the electric load 2a flows to the capacitor C1a unless an abnormality such as disconnection occurs. Similarly, during the off-drive period of the electric load 2b, the current that has flowed to the electric load 2b flows to the capacitor C1b unless an abnormality such as disconnection occurs.

  As in the previous embodiment, the microcomputer 6 compares the output voltage Vo1 of the drive output node N3a with the threshold voltages Vth1a and Vth2a by the comparator 5a at the timing in the off drive period T2 after the predetermined time T1 has elapsed. Get the result. Further, the microcomputer 6 obtains a comparison result obtained by comparing the output voltage Vo2 of the drive output node N3b with the threshold voltages Vth1b and Vth2b by the comparator 5b at the timing during the off-drive period T2 when the predetermined time T1 has elapsed.

  In the abnormality determination period Ta shown in FIG. 10, since the voltage of the drive output node N3a is detected to be higher than the threshold voltage Vth2a, the microcomputer 6 determines that the voltage Vo1 of the drive output node N3a is a normal value. Similarly, since the voltage of the drive output node N3b is detected to be higher than the threshold voltage Vth2b, the microcomputer 6 determines that the voltage Vo2 of the drive output node N3b is a normal value. For this reason, in the abnormality determination period Ta, the microcomputer 6 does not determine that the drive output nodes N3a and N3b are at least a disconnection or a ground fault. For this reason, the microcomputer 6 continues the abnormality determination process as described above also in the next abnormality determination period Tb. The same process is performed in the next abnormality determination period Tb.

  Thereafter, description will be made assuming that a disconnection or a ground fault has occurred in both of the drive output nodes N3a and N3b during the abnormality determination period Tb. After the microcomputer 6 turns off the transistor Tr1a, it is determined that the charging voltage of the drive output node N3a has not reached the threshold voltage Vth1a even after the predetermined time T1 has elapsed. On the other hand, after the transistor Tr1b is turned off, It is determined that the charging voltage of drive output node N3b has not reached threshold voltage Vth1b even after a predetermined time T1 has elapsed.

  That is, when the microcomputer 6 determines that the charging voltages of the drive output nodes N3a and N3b are both lower than a predetermined value during the abnormality determination period Tb, that is, the comparison results of the comparators CP1a and CP1b are both “L”, the drive output node N3a , N3b, it can be determined that some abnormality (disconnection or ground fault) has occurred. As described above, when an abnormality occurs in the plurality of drive output nodes N3a and N3b in a certain abnormality determination period Tb, the microcomputer 6 determines YES in S21 of FIG. 9, and executes the processes after S22.

  The microcomputer 6 first sets priorities in S22, and waits for the next abnormality determination period (that is, abnormality determination period Tc in FIG. 10) in S23. The priority order of S22 indicates the temporal priority order of abnormality determination of the drive output nodes N3a and N3b. When determining abnormality, the switches 212a and 212b are individually turned on / off. In other words, this priority order can be said to be a priority order of the on / off execution order of the plurality of switches 212a and 212b. Become.

  This priority order is desirably determined in advance in consideration of the importance of the electric loads 2a and 2b. Alternatively, the order may be set in the order in which it is determined that the charging voltages of the drive output nodes N3a and N3b are lower than a predetermined value. That is, you may make it discriminate | determine sequentially from the drive output node N3a and N3b which discovered abnormality early.

  Alternatively, the electric loads 2a and 2b by the drive units 5a and 5b may be set in order from the shortest off drive period. For example, as shown in FIG. 10, when the off-drive period of the electric load 2b is shorter than the off-drive period of the electric load 2a, the charging time for the capacitor C1b when this abnormality determination method is applied is also Since it becomes comparatively short, the charge process to the capacity | capacitance part 3b will be complete | finished on severer conditions. For this reason, when the microcomputer 6 detects the state of charge of the capacitor 3b and finally determines that it is a ground fault of the drive output node N3b, it can be estimated that the electrical load 2a is also likely to be a ground fault. .

  In the example of FIG. 10, in the abnormality determination period Tb, the microcomputer 6 detects early that the charging voltage of the drive output node N3a is lower than the threshold value Vth1a. For this reason, in this embodiment, the form which discriminate | determines an abnormality classification in order of the drive output node N3a-> N3b which discovered abnormality early is shown.

  In the abnormality determination period Tc of FIG. 10, the microcomputer 6 turns off the transistor TR1a after turning it on in order to determine the abnormality of the drive output node N3a, and turns on the transistor TR2a while the transistor TR1a is turned off in S24.

  The microcomputer 6 acquires the comparison result of the comparator 5a that compares the output voltage Vo1 of the drive output node N3a with the threshold voltages Vth1a and Vth2a in S25 of FIG. 9 during the off drive period T2 after the lapse of the predetermined time T1. . At this time, the microcomputer 6 can determine the state of the drive output node N3a by determining whether or not the comparison result of the comparator CP1a is “L” in S26.

  That is, if the comparison result of the comparator CP1a is “H”, NO is determined in S26, and the node N3a can be determined to be disconnected in S30 or S31 regardless of the comparison result of the comparator CP1b. Conversely, if the comparison result of the comparator CP1a is “L”, it is determined YES in S26, and the node N3a can be determined as a ground fault in S35 or S36 regardless of the comparison result of the comparator CP1b. In the example of FIG. 10, the microcomputer 6 determines that the disconnection occurs during the period in which the transistor Tr2a is on in the abnormality determination period Tc.

  Even if the comparison result of the comparator CP1a is “L” or “H”, the microcomputer 6 turns off the transistor TR1b in S27 and S32 in order to determine whether the drive output node N3b is abnormal thereafter. During this time, the transistor TR2b is turned on. Then, the microcomputer 6 acquires the comparison result of the comparator 5b that compares the output voltage Vo2 of the drive output node N3b with the threshold voltages Vth1b and Vth2b in S28 and S33. At this time, the microcomputer 6 can determine the state of the drive output node N3b by determining whether or not the comparison result of the comparator CP1b is “L” in S29 and S34.

  That is, if the comparison result of the comparator CP1b is “H”, NO is determined in S29 and S34, and it can be determined that the drive output node N3b is disconnected in S31 or S35 regardless of the comparison result of the comparator CP1a. Conversely, if the comparison result of the comparator CP1b is “L”, YES is determined in S29 and S34, and the drive output node N3b can be determined to be a ground fault in S30 or S36 regardless of the comparison result of the comparator CP1a. As a result, it is possible to determine which of the drive output nodes N3a and N3b is a disconnection or a ground fault. In the example of FIG. 10, the microcomputer 6 determines that there is a disconnection during the period in which the transistor Tr2b is on in the abnormality determination period Tc.

<Description of Comparative Example>
FIG. 11 shows a timing chart of a comparative example assumed by the inventors. For example, the energization unit 4 of the first embodiment is applied as it is, and only one transistor TR2 is provided as shown in FIG. 1, and a plurality (large number) of capacitance units 3a and 3b are provided through a plurality of drive output nodes N3a and N3b. Assume a form of charging. As shown in FIG. 11, even when both the drive output nodes N3a and N3b are disconnected, even if the transistor TR2 energizes the plurality of drive output nodes N3a and N3b in the second determination, the charging capability is maintained. Insufficient charge voltage of the drive output nodes N3a and N3b may not reach the threshold voltage Vth1, and it may be erroneously determined as a ground fault.

  On the other hand, according to the present embodiment, the drive output nodes N3a and N3b of the electric loads 2a and 2b are provided with energization paths through the transistors TR2a and TR2b, respectively. It becomes possible to accurately determine the abnormality.

<Conceptual summary of this embodiment>
According to the present embodiment, when the microcomputer 6 determines that the charging voltages of the plurality of drive output nodes N3a, N3b are lower than the predetermined value during the abnormality determination period Tb, the plurality of switches 212a, By sequentially turning on and off 212b, an abnormality in disconnection between the plurality of drive output nodes N3a and N3b with the electric loads 2a and 2b and a ground fault in the drive output nodes N3a and N3b are determined. . For this reason, disconnection or ground fault abnormality can be accurately determined.

<Modification>
For example, it is desirable that the abnormality determination period Tc of FIG. 11 is configured so that the charging period T1 of the capacity units C1a and C1b by the energization unit 204 can be changed. That is, for example, in the abnormality determination period Tc, it is already determined that some abnormality has occurred in the drive output nodes N3a and N3b, and the drive output nodes N3a and N3b are grounded or disconnected. What is necessary is just to discriminate | determine and it should just determine whether the charging voltage of drive output node N3a, N3b reached threshold voltage Vth1a, Vth1b by adjusting the period which charges capacitor part C1a, C1b. Then, when the charging voltages of the drive output nodes N3a and N3b reach the threshold voltage Vth1, the determination process can be stopped, and the abnormality determination result can be acquired quickly.

  Further, the charging period of the capacitors C1a and C1b by the energization unit 204 may be terminated early when the charging voltages of the drive output nodes N3a and N3b reach predetermined threshold voltages Vth1a and Vth1b, respectively. Then, when the threshold voltage Vth1 is reached, the discrimination process can be stopped and the discrimination result can be acquired quickly.

(Other embodiments)
The present invention is not limited to the above-described embodiments, can be implemented with various modifications, and can be applied to various embodiments without departing from the gist thereof. For example, the following modifications or expansions are possible.

  In the first to third embodiments, the charging circuits 8, 108, and 208 are provided as charging / discharging circuits, and the charging voltage value is changed a plurality of times by changing the charging current value to the capacitors C1, C1a, and C1b. However, the charging circuits 8, 108, and 208 may be provided as necessary. Further, a discharge circuit that discharges current can be used instead of the charging circuits 8 and 108. That is, the energization units 4 and 104 may be configured to energize a charging current or a discharging current, that is, a charging / discharging current.

  Further, for example, the resistors Ru1 and R11 of the bias circuit 7 may be connected in parallel, and the charging current value may be changed a plurality of times by changing the charging current value by changing the resistance value connected in parallel by a switch or the like. .

The voltage dividing circuit 11 is configured by the resistors Ru2 and Rl2, but may be configured by using a capacitor or the like.
In the first embodiment, the microcomputer 6 obtains the result of comparing the output voltage Vo and the threshold voltages Vth1 and Vth2 using the comparison unit 5, but the microcomputer 6 outputs the output voltage of the drive output node N3. Vo itself may be read, for example, a level may be acquired by an A / D conversion circuit, and the level of threshold voltages Vth1 and Vth2 set inside may be determined. The same applies to the second and third embodiments.

  In the first embodiment, the result of comparing the output voltage Vo and the threshold voltages Vth1 and Vth2 with the transistor TR2 turned off is obtained, and then the output voltage Vo and the threshold voltage Vth1, with the transistor TR2 turned on. The result of comparing with Vth2 was obtained, and based on these comparison results, the form of determining whether it was a disconnection, a ground fault, a normal or a power fault was shown, but this control order is limited to this For example, the result of comparing the output voltage Vo and the threshold voltages Vth1 and Vth2 with the transistor TR2 turned on is obtained, and the output voltage Vo and the threshold voltages Vth1 and Vth2 are obtained with the transistor TR2 turned off. The result of comparing the It may be.

  In the first embodiment, the power supply voltage VB1 is set to a predetermined voltage and divided by the bias circuit 7 and the voltage dividing circuit 11, and the current is supplied to the drive output node N3. However, the present invention is not limited to this and is predetermined. Any voltage can be used as long as the voltage is within the range.

  In the first to third embodiments, the form in which the charging current value to the capacitors C1, C1a, C1b is changed to change the charging voltage value a plurality of times is shown, but the present invention is not limited to this, and the capacitor C1, You may apply to the form which changes a discharge current value from C1a and C1b, and changes a charging voltage value in multiple times. Therefore, the charge / discharge current value may be changed.

  In the third embodiment, the processing after S22 in FIG. 9 is executed on condition that the charging voltages of the plurality of drive output nodes N3a and N3b are lower than predetermined values (threshold voltages Vth1a and Vth1b). When driving a plurality of electric loads of three or more systems, the processing after S22 of FIG. 9 may be executed on condition that the charging voltage of at least two or more drive output nodes is lower than a predetermined value. good.

A part or all of the functions executed by the electronic control devices 1, 101, and 201 may be configured in hardware by one or a plurality of ICs.
Means and / or functions provided by the electronic control device 1, 101, 201 may be provided by software stored in a substantial memory and a computer, software, or hardware that executes the software, or a combination thereof. it can. For example, when the electronic control device is provided by an electronic circuit that is hardware, it can be provided by a digital circuit or an analog circuit including a large number of logic circuits.

  The processing shown in the flowcharts of FIGS. 2, 5, and 9 of the first to third embodiments may be performed by changing the processing order if practical, or other processing may be changed as appropriate. good. For example, as described in the first embodiment, if YES is determined in S10 of FIG. 2, it is determined that the disconnection is made on the condition that the comparison result of the comparator CP2 does not become “H” in S4 of FIG. For example, when YES is determined in S10, the process may directly shift to S6 to determine that the disconnection is abnormal.

  Although the present disclosure has been described based on the above-described embodiments, it is understood that the present disclosure is not limited to the embodiments and structures. The present disclosure includes various modifications and modifications within the equivalent range. In addition, various combinations and forms, as well as other combinations and forms including one element, more or less, are within the scope and spirit of the present disclosure.

  In the drawings, 1, 101 is an electronic control device, 2 is an electric load, 3 is a drive unit, 4, 104 and 204 are energization units, 6 is a microcomputer (abnormality determination unit, pulse control unit), 7 is a bias circuit, 8 , 108, 208 are charging circuits (charging / discharging circuits), 11 is a voltage dividing circuit, 12 is a switch, TR1 is a transistor, TR2 is a transistor (switch), C1 is a capacitor (capacitor), Ru2 is a resistor, Vth1, Vth2, Vth1a, Vth2a, Vth1b, and Vth2b are threshold voltages, Vth1 to Vth2 are disconnection threshold ranges, and T1 is a predetermined time.

Claims (11)

A drive unit (3; 3a, 3b) for driving the electric load connected to the high side on the low side;
An energization unit (4, 104; 204) for energizing a charge current or a discharge current (hereinafter, charge / discharge current) to a capacitor unit added to the low side of the drive output node to the electric load by the drive unit;
When the drive of the electric load by the drive unit is turned off, the charging unit is changed a plurality of times by changing the value of the charge / discharge current to the capacitor unit by the energizing unit, and the charge voltage value to the capacitor unit is changed to a plurality The disconnection abnormality between the drive output node and the electric load according to the charge voltage value of the capacitor detected during the off-drive period of the drive unit when the drive output is changed, and the drive output node And an abnormality determination unit (6) for determining an abnormality of the ground fault. The energization unit (4) includes a voltage dividing circuit (11) that divides a predetermined voltage, and a switch (12) that can switch the energization on / off of the divided voltage of the voltage dividing circuit to the drive output node. The charge / discharge circuit (8),
The abnormality determination unit changes the charge / discharge current value to the capacitor unit by switching on / off the divided voltage of the voltage dividing circuit of the charge / discharge circuit by switching on / off the energization by the switch. The electronic control device according to claim 1, wherein the charging voltage value is changed a plurality of times. The energization unit includes a bias circuit (7) that divides the predetermined voltage by a resistor and applies a DC bias to the drive output node,
3. The electronic control device according to claim 2, wherein the voltage dividing ratio of the voltage dividing circuit and the voltage dividing ratio of the bias circuit are defined within a predetermined ratio range including the same ratio. The energization unit (104) includes a resistor (Ru2), and a charge / discharge circuit (108) including a switch (TR2) that allows the drive output node to be energized in an AC manner through the resistor by being pulse-driven. Configured with
A pulse control unit (6) for energizing the drive output node in an AC manner by pulse driving the switch of the charge / discharge circuit using a condition in which the DC bias of the drive output node is set in a predetermined range. The electronic control device according to claim 1, further comprising:   A drive frequency or / and a drive duty ratio when the switch is pulse-driven, a predetermined time (T1), a resistance value of the resistor (Ru2), and a capacitance value of the capacitor portion are determined by a disconnection voltage of the capacitor portion. 5. The electronic control unit according to claim 4, wherein the electronic control unit is predetermined so as to be steadily stabilized during the off-drive period with respect to a predetermined disconnection threshold range (Vth1 to Vth2) that can be determined to be abnormal. A plurality of the drive units (3a, 3b) are provided, and the plurality of drive units are configured to drive the electric load connected to the high side of the corresponding drive output nodes, respectively, on the low side,
The energization unit (204) includes one charging / discharging power source (211) and switches (212a, 212b) that can switch energization on / off from the one charging / discharging power source to the plurality of drive output nodes. It is configured using a charge / discharge circuit (208),
The abnormality determination unit determines that charging voltages of at least two or more of the plurality of drive output nodes are lower than a predetermined value when the capacitor unit is charged using a charging / discharging circuit of the energization unit during an abnormality determination period. In this case, by sequentially turning on and off the plurality of switches based on the priority order, it is possible to determine a disconnection abnormality between the plurality of drive output nodes and the ground fault of the drive output node. The electronic control device according to claim 1.   The electronic control device according to claim 6, wherein the priority of the turn-on / off order of the plurality of switches is preset.   The priority order of the on / off execution order of the plurality of switches is set to an order in which the abnormality determination unit determines that the charging voltage is lower than a predetermined value during a predetermined abnormality determination period. Electronic control device.   The electronic control device according to claim 6, wherein the priority of the turn-on / off order of the plurality of switches is set in order from the shortest off-drive period by the drive unit.   The electronic control device according to claim 6, wherein the abnormality determination unit is configured to be able to change a period during which the capacitor unit is charged by the charge / discharge circuit. When the plurality of switches are sequentially turned on / off based on the priority, the abnormality determination unit determines a charging period for the capacitor unit by the charge / discharge circuit when a charging voltage of the drive output node reaches a predetermined value. The electronic control device according to claim 6, wherein the electronic control device is terminated.

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