JP2018042343A - Power supply device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a power supply device capable of confirming operation of an overvoltage protection circuit without requiring processing of use resumption by intercepting power supply feeding.SOLUTION: A micro computer 50 (control circuit), in a state in which execution of interception state maintenance processing is inhibited by an interception state maintenance inhibition circuit 31, makes a pseudo overvoltage input circuit 32 input pseudo overvoltage to a voltage detection unit of an overvoltage protection circuit 30. When power feeding from a second power supply circuit 12 is intercepted before a predetermined time lapses after starting input of the pseudo overvoltage, the micro computer cancels the inhibition of the interception state maintenance processing by the interception state maintenance inhibition circuit 31 and terminates the input of the pseudo overvoltage to the voltage detection unit of the overvoltage protection circuit 30 by the pseudo overvoltage input circuit 32. When the power feeding from the second power supply circuit 12 is not intercepted within the predetermined time after starting pseudo overvoltage application processing, the micro computer turns OFF a second FET 23.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a power supply device having an overvoltage protection function.

  Conventionally, a power supply equipped with an overvoltage protection circuit that monitors the voltage applied to the load from the power supply circuit and cuts off the power supply to the power supply circuit when an overvoltage is applied to the load Devices are known (see, for example, Patent Documents 1 and 2).

JP 7-273564 A JP-A-8-19167

  When an overvoltage is applied from the power supply circuit to the load, if the overvoltage protection circuit fails, there is a possibility that the overvoltage is continuously applied to the load and the load is damaged. Therefore, it is desired to confirm that the overvoltage protection circuit operates normally.

  However, in general, when an overvoltage protection circuit detects an overvoltage and cuts off the power supply to the power supply circuit, the overvoltage protection circuit shuts off the power supply to the power supply circuit until the power supply from the external power supply is stopped. It is configured to maintain. Therefore, when the process for confirming the normal operation of the overvoltage protection circuit is performed, there is a problem that the user cannot resume the use of the power supply device unless the power supply from outside is once interrupted thereafter.

  The present invention has been made in view of such a background, and an object of the present invention is to provide a power supply device that can perform the operation check of the overvoltage protection circuit without requiring the work of resuming use by cutting off the power supply from the outside. To do.

The power supply device of the present invention is
A second power source that generates and outputs power of a predetermined voltage based on the power supplied from the first power source;
A control circuit that operates by power supplied from the second power source;
Actuated by the power supplied from the first power source, detects the output voltage of the second power source, and when the output voltage of the second power source exceeds a predetermined determination voltage, the first power source A shut-off state maintaining process for shutting off power supply to the two power supplies and maintaining the power supply from the second power supply to the control circuit until the power supply from the first power supply is shut off after the shut-off In a power supply device with an overvoltage protection circuit that performs
A pseudo overvoltage input circuit that inputs a pseudo overvoltage higher than the determination voltage to the voltage detection unit of the overvoltage protection circuit;
A cutoff state maintenance prohibiting circuit that prohibits execution of the cutoff state maintenance process;
The control circuit, as the operation check process of the overvoltage protection circuit, in a state in which execution of the cutoff state maintenance process is prohibited by the cutoff state maintenance prohibition circuit, the pseudo overvoltage input circuit to the pseudo overvoltage of the overvoltage protection circuit When the power supply from the second power source is interrupted within a predetermined time from the input of the pseudo overvoltage input to the voltage detection unit, the prohibition of the interrupted state maintaining process by the interrupted state maintaining prohibition circuit is canceled. The pseudo overvoltage input circuit terminates the input of the pseudo overvoltage to the voltage detector of the overvoltage protection circuit, and the power supply from the second power source is not shut off within the predetermined time from the start of the pseudo overvoltage input. In such a case, a process for performing a predetermined abnormality response is executed.

  According to the present invention, when the output voltage of the second power supply exceeds the determination voltage, the overvoltage protection circuit cuts off the power supply from the second power supply to the control circuit, thereby protecting the control circuit. Then, during normal use, a cut-off state maintaining process is performed, and the power supply from the second power supply to the control circuit is maintained until the power supply from the first power supply to the overvoltage protection circuit is cut off. Is done. Therefore, in order to resume the use of the power supply device, the user needs to perform an operation to temporarily cut off the power supply from the first power supply.

  Therefore, in order to avoid such an operation of temporarily shutting off the power supply from the first power supply and to check the normal operation of the overvoltage protection circuit, the control circuit maintains the cutoff state by the cutoff state maintaining circuit. In a state where execution of the process is prohibited, the pseudo overvoltage input circuit performs a process of inputting the pseudo overvoltage to the voltage detection unit of the overvoltage protection circuit. In this case, when the overvoltage protection circuit is operating normally, the power supply from the first power supply to the second power supply is cut off, and the power supply from the second power supply to the control circuit is also cut off. When the power supply from the power supply is cut off, the control circuit cancels the prohibition of the cut-off state maintenance process by the cut-off state maintenance circuit and inputs the pseudo overvoltage to the voltage detection unit of the overvoltage protection circuit by the pseudo overvoltage input circuit. Exit. Therefore, the user can resume the use of the power supply device without performing the work of temporarily shutting off the power supply from the first power supply. On the other hand, when the overvoltage protection circuit does not operate normally, it is possible to appropriately cope with the abnormality response executed by the control circuit.

A switching element for switching between supply and interruption of power from the second power source to the control circuit;
The control circuit performs a process of cutting off power supply from the second power source to the control circuit by the switching element as the abnormality handling.

  According to this configuration, it is possible to prevent the control circuit from operating when the overvoltage protection circuit is not operating normally.

The block diagram of the power supply device of this invention. The flowchart of the operation confirmation process of an overvoltage protection circuit.

  An embodiment of the present invention will be described with reference to FIGS.

[1. Device configuration]
Referring to FIG. 1, power supply device 1 is basically operated by power supplied from commercial power source 2 (for example, AC 100 V commercial power source), but is set by battery 14 and supplied from battery 14 in the event of a power failure. It is configured to be able to operate even with electric power. The power supply device 1 is mounted and used, for example, on a gas stove, a gas rice cooker, or the like.

  The power supply device 1 generates a DC power of 13 V DC from AC power supplied from the commercial power supply 2 via the external power supply connection terminals 5 and 6 and outputs it (corresponding to the first power supply of the present invention). The second power supply circuit 12 (corresponding to the second power supply of the present invention) that generates and outputs DC power of DC3V (corresponding to the predetermined voltage of the present invention) from the DC power supplied from the first power supply circuit 10. ), A third power supply circuit 24 that generates and outputs DC 3.3V DC power from the DC3V output power supplied from the second power supply circuit or the DC power supplied from the battery 14, and the third power supply circuit. A microcomputer 50 (corresponding to a control circuit of the present invention; hereinafter referred to as a microcomputer 50) that operates with electric power.

  The first power supply circuit 10 is connected to the second power supply circuit 12 via the first FET 11. When the first FET 11 is ON (conducting state), power is supplied from the first power supply circuit 10 to the second power supply circuit 12. When the first FET 11 is OFF (shut off state), power supply from the first power supply circuit 10 to the second power supply circuit 12 is shut off.

  The second power supply circuit 12 is connected to the third power supply circuit 24 via a second FET 23 (corresponding to the switching element of the present invention). When the second FET 23 is ON (conductive state), power is supplied from the second power supply circuit 12 to the third power supply circuit 24. When the second FET 23 is OFF (shut off state), the power supply from the second power supply circuit 12 to the third power supply circuit 24 is shut off. A diode 13 is connected between the input unit and the output unit of the second power supply circuit 12 with the direction from the output unit to the input unit as the forward direction.

  The first FET 11 is ON / OFF controlled by the control voltage Vc1 output from the overvoltage protection circuit 30, and is ON when the control voltage Vc1 is at the low level (0V level), and the control voltage Vc1 is at the high level (DC13V level). Is OFF.

  The overvoltage protection circuit 30 sets the control voltage Vc1 output to the gate of the first FET 11 to the Low level when the monitor voltage Vm input from the pseudo overvoltage input circuit 32 to the voltage detector is equal to or lower than the determination voltage, and sets the first power supply circuit. Power is supplied from 10 to the second power supply circuit 12. When the monitor voltage Vm input from the pseudo-overvoltage input circuit 32 is higher than the determination voltage, the control voltage Vc1 output to the gate of the first FET 11 is set to the high level, and the first power supply circuit 10 to the second power supply circuit 12 is set. Shut off the power supply.

  When the monitor voltage Vm becomes higher than the determination voltage and the control voltage Vc1 output to the gate of the first FET 11 is set to the high level, the overvoltage protection circuit 30 continues until the power supplied from the first power supply circuit 10 is cut off. It has a function of performing a cut-off state maintaining process for maintaining the control voltage Vc1 at a high level.

  Here, the supply of power from the first power supply circuit 10 to the overvoltage protection circuit 30 is interrupted from the commercial power supply 2 to the first power supply circuit 10 by a user removing a power plug (not shown) from the outlet of the commercial power supply 2 or the like. This is done by shutting off the power supply.

  The cut-off state maintenance prohibiting circuit 31 has a function of prohibiting the cut-off state maintaining process by the overvoltage protection circuit 30, and when the third control signal Ct3 is output from the output port Po3 of the microcomputer 50, the overvoltage protection circuit 30 Blocking state maintenance processing is prohibited. Further, when the third control signal Ct3 is not output from the output port Po3 of the microcomputer 50, the overvoltage protection circuit 30 is in a state where the shut-off state maintaining process can be executed.

  When the second control signal Ct2 is output from the output port Po2 of the microcomputer 50, the pseudo overvoltage input circuit 32 outputs a pseudo overvoltage exceeding the determination voltage to the overvoltage protection circuit 30 as the monitor voltage Vm. When the second control signal Ct2 is not output from the output port Po2 of the microcomputer 50, the voltage Vo2 of the second power supply circuit 12 is input to the overvoltage protection circuit 30 as the monitor voltage Vm.

  The power switch 20 is a momentary type push button switch, and the contact is turned on (conductive state) when being pushed by the user, and the contact is turned off (cut off) when the push operation is not made. The power switch 20 is connected to the second FET drive circuit 25 and the input port Pi1 of the microcomputer 50. The microcomputer 50 recognizes the operating state of the power switch 20 based on the voltage Vsw input to the input port Pi1.

  Although not shown in FIG. 1, a circuit for converting the voltage V3 input via the power switch 20 into an input-capable level of the microcomputer 50 between the power switch 20 and the input port Pi1 of the microcomputer 50. (A transistor or the like) is provided.

  Further, the voltage Vs obtained by dividing the output voltage of the second power supply circuit 12 (the output voltage of the battery 14 when the battery 14 is set) by the resistors 21 and 22 is the AD input port Pad (analog / digital) of the microcomputer 50. Input to the conversion input port). The microcomputer 50 converts the voltage Vs input to the AD input port Pad into a digital value and recognizes it, and monitors the voltage Vs.

  The second FET drive circuit 25 is connected to the power switch 20 and the output port Po1 of the microcomputer 50, and is at least one of the operation of the power switch 20 and the output of the first control signal Ct1 from the output port of the microcomputer 50. When one of them is performed, the control voltage Vc2 output to the gate of the second FET 23 is set to the Low level (0 V level), and the second FET 23 is turned on.

  When the power switch 20 is not operated and the first control signal Ct1 is not output from the output port Po1 of the microcomputer 50, the second FET drive circuit 25 outputs the control voltage Vc2 output to the gate of the second FET 23. The second FET 23 is turned off by setting the high level (DC3V level).

  The microcomputer 50 is operated by electric power supplied from the third power supply circuit 24. When the user operates the power switch 20 (power ON operation), the control voltage Vc2 input from the second FET drive circuit 25 to the gate of the FET 23 becomes Low level, the second FET 23 is turned on, and the second power circuit 12 To the microcomputer 50 via the third power supply circuit 24. As a result, the microcomputer 50 is activated, and the microcomputer 50 executes the control program for the power supply device 1 held in the memory, and executes an operation confirmation process for the overvoltage protection circuit 30 described later.

  The microcomputer 50 outputs the first control signal Ct1 from the output port Po1 to the second FET drive circuit 25, and sets the control voltage Vc2 output from the second FET drive circuit 25 to the gate of the second FET 23 to the Low level. Thereby, even after the user finishes the operation of the power switch 20 and the power switch 20 is turned off, the second FET 23 is maintained in the ON state, and the second power circuit 12 through the third power circuit 24 is used. Thus, the state in which power is supplied to the microcomputer 50 is maintained, and the microcomputer 50 continues to operate.

  Thereafter, when the user operates the power switch 20 (power OFF operation) and the voltage Vsw input to the input port Pi1 of the microcomputer 50 becomes High level, the microcomputer 50 drives the second FET from the output port Po1. The output of the first control signal Ct1 to the circuit 25 is stopped. As a result, the control voltage Vc2 output from the second FET drive circuit 25 to the gate of the second FET 23 becomes a high level, the second FET 23 is turned off, and the microcomputer 50 from the second power supply circuit 12 through the third power supply circuit 24 is turned on. The power supply to is cut off, and the microcomputer 50 stops operating.

[2. Overvoltage protection circuit operation check process]
Next, the operation confirmation process of the overvoltage protection circuit 30 executed by the microcomputer 50 will be described according to the flowchart shown in FIG.

  In STEP 1, the microcomputer 50 proceeds to STEP 2 when the voltage Vsw input to the input port Pi 1 becomes High level in response to the OFF operation (power OFF operation) of the power switch 20 by the user.

  In STEP 2, the microcomputer 50 outputs the third control signal Ct 3 from the output port Po 3, so that the cutoff state maintenance process in the overvoltage protection circuit 30 is prohibited by the cutoff state maintenance prohibition circuit 31. In subsequent STEP 3, the microcomputer 50 outputs the second control signal Ct 2 from the output port Po 2 so that a pseudo overvoltage exceeding the determination voltage of the overvoltage is input from the pseudo overvoltage input circuit 32 to the overvoltage protection circuit 30.

  Thereby, when the overvoltage protection circuit 30 is operating normally, the control voltage Vc1 input from the overvoltage protection circuit 30 to the gate of the first FET 11 is switched from the Low level (0V level) to the High level (DC13V level). The first FET 11 is turned off. On the other hand, when the control voltage Vc1 input from the overvoltage protection circuit 30 to the gate of the first FET 11 is maintained at the Low level due to the failure of the overvoltage protection circuit 30, the first FET 11 remains in the ON state.

  In subsequent STEP 4, the microcomputer 50 sets a time (corresponding to the predetermined time of the present invention) for determining the normal operation of the overvoltage protection circuit 30 based on the elapsed time from the start of the input of the pseudo overvoltage in STEP 3. The timer is started, and the next timer 5 waits for the timer to expire. Here, when the overvoltage protection circuit 30 is operating normally, the first FET 11 is in the OFF state as described above, so that power is supplied from the second power supply circuit 12 to the microcomputer 50 via the third power supply circuit 24. Is cut off.

  For this reason, the operation of the microcomputer 50 is stopped before the timer expires in STEP 5, and the processes after STEP 6 are not performed. When the power supply to the microcomputer 50 is cut off, the output of the first control signal Ct1, the second control signal Ct2, and the third control signal Ct3 from the output ports Po1 to Po3 is stopped, and the second FET drive circuit 25, the control voltage Vc2 input to the gate of the second FET 23 becomes a high level, the pseudo overvoltage input from the pseudo overvoltage input circuit 32 to the overvoltage protection circuit 30 is stopped, and the overvoltage protection circuit 30 by the cutoff state maintenance prohibiting circuit 31 The prohibition of the interruption state maintenance process is lifted.

  This prevents the first FET 11 from being maintained in the OFF state by the overvoltage protection circuit 30, and the next time the user turns on the power switch 20, the second power supply circuit 12 passes through the third power supply circuit 24. The power supply to the microcomputer 50 is restarted, and the microcomputer 50 is activated. Therefore, the user does not need to perform an operation to temporarily cut off the power supply from the commercial power supply 2 in order to release the state in which the first FET 11 is maintained in the OFF state by the overvoltage protection circuit 30.

  On the other hand, if the first FET 11 is not turned off even if a pseudo overvoltage is input from the pseudo overvoltage input circuit 32 to the overvoltage protection circuit 30 because the overvoltage protection circuit 30 is not operating normally, a timer is set in STEP5. Time is up and proceed to STEP6. In STEP 6, the microcomputer 50 performs error notification processing such as turning on an error lamp (not shown) and outputting a buzzer sound from a speaker to notify the user of an abnormality in the power supply device 1.

  In subsequent STEP 7, the microcomputer 50 stops the output of the first control signal Ct 1 from the output port Po 1, thereby setting the control voltage Vc 2 from the second FET drive circuit 25 to the gate of the second FET 23 to the high level and the second FET 23. Is turned off. As a result, power supply from the second power supply circuit 12 to the microcomputer 50 via the third power supply circuit 24 is interrupted, and the state in which an overvoltage is applied to the second FET 23 is prevented from continuing. Note that the processing of STEPs 6 and 7 corresponds to the predetermined abnormality handling of the present invention.

[3. Other Embodiments]
In the said embodiment, although the example which operate | moves by the electric power supply from the commercial power supply 2 or the electric power supply supplied from the battery 14 was shown, when the output voltage of a power supply circuit is monitored and the output of a power supply circuit becomes excessive If the power supply device has a function of cutting off the power supply to the power supply circuit and the power supply from the power supply needs to be cut off once in order to release this cut-off state, the present invention is applied to the present invention. The effect of this can be obtained.

  In the above embodiment, the second FET 23 that switches between power supply and interruption from the second power supply circuit 12 or the battery 14 to the third power supply circuit 24 is provided. In STEP 7 of FIG. However, even if this process is not performed, the effects of the present invention can be obtained.

  In the above embodiment, the microcomputer 50 is shown as the control circuit of the present invention, but the control circuit may be configured by a logic circuit.

  DESCRIPTION OF SYMBOLS 1 ... Power supply device, 2 ... Commercial power supply, 10 ... 1st power supply circuit (1st power supply), 11 ... 1st FET, 12 ... 2nd power supply circuit (2nd power supply), 14 ... Battery, 20 ... Power switch, 23 ... 2nd FET (switching element), 24 ... 3rd power supply circuit, 25 ... 2nd FET drive circuit, 30 ... Overvoltage protection circuit, 31 ... Blocking state maintenance prohibition circuit, 32 ... Pseudo overvoltage input circuit, 50 ... Microcomputer (control circuit) .

Claims (2)

A second power source that generates and outputs power of a predetermined voltage based on the power supplied from the first power source;
A control circuit that operates by power supplied from the second power source;
Actuated by the power supplied from the first power source, detects the output voltage of the second power source, and when the output voltage of the second power source exceeds a predetermined determination voltage, the first power source The power supply from the second power supply to the control circuit is maintained until the power supply from the second power supply is cut off and the power supply from the first power supply is cut off after the power cut. In a power supply device including an overvoltage protection circuit that performs processing,
A pseudo overvoltage input circuit that inputs a pseudo overvoltage higher than the determination voltage to the voltage detection unit of the overvoltage protection circuit;
A cutoff state maintenance prohibiting circuit that prohibits execution of the cutoff state maintenance process;
The control circuit, as the operation check process of the overvoltage protection circuit, in a state in which execution of the cutoff state maintenance process is prohibited by the cutoff state maintenance prohibition circuit, the pseudo overvoltage input circuit to the pseudo overvoltage of the overvoltage protection circuit When the power supply from the second power source is interrupted within a predetermined time from the input of the pseudo overvoltage input to the voltage detection unit, the prohibition of the interrupted state maintaining process by the interrupted state maintaining prohibition circuit is canceled. The pseudo overvoltage input circuit terminates the input of the pseudo overvoltage to the voltage detector of the overvoltage protection circuit, and the power supply from the second power source is not shut off within the predetermined time from the start of the pseudo overvoltage input. A power supply apparatus that executes a process for performing a predetermined abnormality response. The power supply device according to claim 1,
A switching element for switching between supply and interruption of power from the second power source to the control circuit;
The control circuit performs a process of cutting off power supply from the second power source to the control circuit by the switching element as the abnormality handling.