JP2018041918A - Capacitor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a capacitor which enables the reduction in dielectric loss in a low-frequency region.SOLUTION: A capacitor 1 comprises: a base 21 having a pair of principal faces 21a, 21b and arranged by laminating three solid electrolyte layers 3, 11, 19 which are made of a solid electrolyte (e.g. LLZ) having lithium ion conductivity; and a pair of internal electrode layers 9, 17 disposed in the base 21 so as to opposed to each other through the solid electrolyte layer 3, 11, 19. In the capacitor 1, mixture layers 7, 15 including a metal and the solid electrolyte are disposed on opposing faces of the pair of internal electrode layers 9, 17, which are opposed to each other through the central solid electrolyte layer 3. The first and second outside solid electrolyte layers 11, 19 are put in direct contact with surfaces on opposite sides to the opposing faces (i.e. surfaces on respective external face sides) in the first and second internal electrode layers 9, 17, disposed closest to the pair of principal faces 21a, 21b, respectively.SELECTED DRAWING: Figure 2

Description

  The present invention relates to a capacitor (capacitor) that stores and discharges electric charge, and more particularly to a capacitor using a solid electrolyte having lithium ion conductivity.

Conventionally, for example, solid capacitors having a pair of electrodes provided on the surface of a solid electrolyte are known (see Patent Documents 1 to 3 below).
For example, Patent Document 1 discloses a basic structure and characteristics of an electric double layer capacitor using a solid electrolyte between electrodes.

  Patent Document 2 discloses that a solid ion capacitor having an improved capacitance can be obtained by thinning a solid electrolyte as compared with a conventional electric double layer capacitor using an electrolytic solution.

  Patent Document 3 discloses that a capacitor having excellent frequency characteristics can be obtained by reducing the thickness of a dielectric layer containing a Li ion conductive compound.

JP 2008-130844 A International Publication No. 2013/111804 JP 2013-225534 A

However, the above-described prior art has the following problems, and improvements are desired.
Specifically, as a result of research by the present inventors, a solid capacitor of a type in which solid electrolytes and internal electrodes are alternately laminated has a large dielectric loss, for example, in a low frequency band of 1 kHz or less (that is, a low frequency region). It became clear that

The reason for this is considered to be that when the frequency is low, the ratio of contribution to impedance increases on the outermost surface of the internal electrode.
Specifically, in a solid capacitor using a solid electrolyte having lithium ion conductivity, in the internal electrode located on the outermost side (outside in the thickness direction), when the low frequency region is 1 kHz or less, lithium is also present outside the internal electrode. It is thought that ions move. For this reason, in the low frequency region, it is presumed that loss (loss of electric energy) accompanying the movement of lithium ions increases and dielectric loss increases.

As a result, for example, when the solid capacitor is used in a low frequency region of 1 kHz or less in alternating current, there is a risk that sufficient performance may not be obtained.
The present invention has been made to solve the above-described problems, and an object thereof is to provide a capacitor capable of reducing dielectric loss in a low frequency region.

  (1) According to a first aspect of the present invention, there is provided a substrate having a pair of main surfaces formed by laminating a plurality of solid electrolyte layers mainly composed of a solid electrolyte having lithium ion conductivity; The present invention relates to a capacitor including a plurality of internal electrode layers arranged to face each other with a solid electrolyte layer interposed therebetween.

  In this capacitor, a mixed layer containing a metal and a solid electrolyte is disposed on opposing surfaces of one or more pairs of internal electrode layers that are opposed to each other via one or more solid electrolyte layers. The solid electrolyte layer is in direct contact with the surface opposite to the facing surface (that is, the surface on the outer surface side) of the internal electrode layers arranged and disposed closest to the pair of main surfaces among the plurality of internal electrode layers.

  In the first aspect, the mixed layer containing the metal and the solid electrolyte is disposed on the opposing surfaces of the internal electrode layers facing each other via the solid electrolyte layer, and is disposed closest to the pair of main surfaces. The mixed layer is not formed on the outer surface of the internal electrode layer.

  That is, the mixed layer containing a metal is disposed inside the internal electrode layer, thereby increasing the electrode area inside the internal electrode layer. Therefore, it is considered that the dielectric loss in the low frequency region is reduced by relatively reducing the influence of the outermost surface of the internal electrode layer.

  In addition, in the first aspect, by forming a mixed layer of metal and solid electrolyte between the internal electrode layers, the area of the electrode interface per layer of the internal electrode layer is increased, so that the capacity can be increased. is there.

(2) In the second aspect of the present invention, a plurality of solid electrolyte layers are disposed between a pair of mixed layers, and an internal electrode layer is disposed between adjacent solid electrolyte layers.
The second aspect exemplifies a preferable capacitor configuration.

(3) In 3rd aspect of this invention, content of the metal in a mixed layer is 30 volume% or more.
In the third aspect, since the metal content is in the above-described range, there is an effect that the dielectric loss of the capacitor can be greatly reduced in the low frequency region.

(4) In the fourth aspect of the present invention, the solid electrolyte is Li ₇ La ₃ Zr ₂ O ₁₂ .
The fourth aspect shows a preferable example of the solid electrolyte.
Specifically, Li ₇ La ₃ Zr ₂ O ₁₂ (LLZ) has an advantage that it can be fired at the same time as, for example, a Ni electrode and has high ionic conductivity.

<Hereinafter, each configuration of the present invention will be described>
The “solid electrolyte layer” is a layer having characteristics as a solid electrolyte, that is, a characteristic (ion conductivity) in which ions (here, lithium ions) can be moved by an electric field applied from the outside.

“The main component” indicates that the corresponding component is the most abundant component (for example, 50% by volume or more).
-"A pair of main surface" has shown one surface and the other surface formed in the edge part of the thickness direction of a base | substrate.

  "Metal" includes not only a single metal having conductivity but also an alloy having conductivity. That is, any electrode that increases the electrode area by being electrically connected to the internal electrode in the mixed layer may be used.

  Examples of the metal include Au, Pt, Pd, Ag, Ni, and Cu.

It is a perspective view which shows the capacitor of 1st Embodiment. It is sectional drawing (AA sectional drawing of FIG. 1) which fractures | ruptures the capacitor of 1st Embodiment in the lamination direction (Z direction) of each layer, and shows the torn surface. (A) is BB sectional drawing of FIG. 2, (b) is CC sectional drawing of FIG. It is explanatory drawing explaining the manufacturing process of the capacitor of 1st Embodiment about one capacitor. It is sectional drawing which fractures | ruptures the capacitor of each sample used for evaluation in the lamination direction (Z direction) of each layer, and shows the torn surface. FIG. 4A is a cross-sectional view showing the fracture surface of the capacitor of the second embodiment in the stacking direction (Z direction) of each layer, and FIG. It is sectional drawing which fractures | ruptures and shows the torn surface.

[1. First Embodiment]
[1-1. Capacitor configuration]
First, the configuration of the capacitor according to the first embodiment will be described.

  In the following description, explanations will be made using each of the upper, lower, left and right directions in the figure. The direction in which the capacitor is oriented is arbitrary. For example, “up, down, left, right” indicating directions in the following description is the same as the “up, down, left, right” directions in FIG.

As shown in FIG. 1, the capacitor 1 of the first embodiment is a cuboid monolithic ceramic chip capacitor.
Specifically, as schematically shown in FIG. 2, the capacitor 1 has a single solid electrolyte layer (that is, a central solid electrolyte layer) in the central portion in the stacking direction (vertical direction in FIG. 2: Z direction). 3 is arranged.

A mixed layer (that is, a first mixed layer) 7 is disposed on one main surface 3a of the central solid electrolyte layer 3, that is, on the surface of one side in the stacking direction (upper side in FIG. 2; hereinafter referred to as the upper side). Has been.
Furthermore, an internal electrode layer (that is, a first internal electrode layer) 9 is disposed on the upper surface of the first mixed layer 7.

  In addition, another solid electrolyte layer (i.e., the first internal electrode layer 9) is formed on the upper surface of the first internal electrode layer 9 and the upper exposed surface of the central solid electrolyte layer 3 (i.e., the portion not covered with the first internal electrode layer 9). An outer solid electrolyte layer) 11 is disposed.

  On the other hand, on the other main surface 3b of the central solid electrolyte layer 3, that is, on the surface on the other side in the stacking direction (lower side in FIG. 2; hereinafter referred to as the lower side), the same as the first mixed layer 7 The mixed layer (that is, the second mixed layer) 15 is disposed.

Furthermore, another internal electrode layer (that is, second internal electrode layer) 17 similar to the first internal electrode layer 9 is disposed on the lower surface of the second mixed layer 15.
In addition, the first outer solid electrolyte layer is formed on the lower surface of the second internal electrode layer 17 and the exposed lower surface of the central solid electrolyte layer 3 (that is, the portion not covered with the second internal electrode layer 17). 11, another solid electrolyte layer (that is, a second outer solid electrolyte layer) 19 is disposed.

  The layers 3, 7, 9, 11, 15, 17, and 19 are stacked to form a rectangular parallelepiped base 21. In addition, the board | substrate 21 is equipped with the one main surface 21a above FIG. 2, and is equipped with the other main surface 21b below FIG.

  In addition, external electrodes 23 are formed over the entire surface so as to cover both sides of the capacitor 1 in the left-right direction (left-right direction: X direction in FIG. 2), that is, both sides of the base 21 in the left-right direction. That is, the first external electrode 23a is formed on the left side of FIG. 2, and the second external electrode 23b is formed on the right side of FIG.

Hereinafter, each configuration will be described in more detail.
In the following, in the stacking direction, the side where the central solid electrolyte layer 3 is disposed (that is, the inner side) is referred to as the center side, and the upper and lower sides in FIG.

The central solid electrolyte layer 3 is a solid electrolyte layer made of, for example, Li ₇ La ₃ Zr ₂ O ₁₂ (hereinafter sometimes referred to as LLZ). The thickness of the central solid electrolyte layer 3 is, for example, 10 μm in the range of 1-30 μm, for example.

As shown in FIG. 3A, the first internal electrode layer 9 is a rectangular conductive layer made of nickel (Ni), for example.
The first internal electrode layer 9 is connected to the first external electrode 23a, extends to the second external electrode 23b side, and covers most of the upper surface of the central solid electrolyte layer 3 (for example, 70% of the surface area). Yes. However, the first internal electrode layer 9 is not connected to the second external electrode 23 b, and there is a gap 25 between the first internal electrode layer 9 and the outer periphery of the base 21. The solid electrolyte layer 3 and the first outer solid electrolyte layer 11 are joined and integrated.

A mixed layer (first mixed layer) 7 having the same shape (rectangular shape) as the first internal electrode layer 9 is formed so as to cover the entire surface on the center side of the first internal electrode layer 9.
The first mixed layer 7 is a mixed layer made of a metal such as nickel and a solid electrolyte of LLZ, for example. The first mixed layer 7 contains, for example, 30% by volume of metal in the range of 20 to 50% by volume.

Similarly, as shown in FIG. 3B, the second internal electrode layer 17 is a rectangular conductive layer made of nickel, for example.
The second internal electrode layer 17 is connected to the second external electrode 23b, extends to the first external electrode 23a side, and covers most of the lower surface of the central solid electrolyte layer 3 (for example, 70% of the surface area). Yes. However, the second internal electrode layer 17 is not connected to the first external electrode 23 a, and there is a gap 27 between the second internal electrode layer 17 and the outer periphery of the base body 21. The solid electrolyte layer 3 and the first outer solid electrolyte layer 19 are joined and integrated.

A mixed layer (second mixed layer) 15 having the same shape (rectangular shape) as that of the second internal electrode layer 9 is formed so as to cover the entire surface on the center side of the second internal electrode layer 9.
Similar to the first mixed layer 7, the second mixed layer 15 is a mixed layer made of a metal such as nickel and a solid electrolyte of LLZ. That is, the second mixed layer 15 contains, for example, 30% by volume of metal in the range of 20 to 50% by volume.

Returning to FIG. 2, the first outer solid electrolyte layer 11 is formed so as to cover the entire exposed portions of the upper surfaces of the first internal electrode layer 9 and the central solid electrolyte layer 3.
The first outer solid electrolyte layer 11 is made of the same solid electrolyte material as that of the central solid electrolyte layer 3, that is, LLZ. In addition, the thickness of the 1st outer side solid electrolyte layer 11 is 140 micrometers, for example.

Similarly, the second outer solid electrolyte layer 19 is formed so as to cover the entire exposed portions of the lower surfaces of the second internal electrode layer 17 and the central solid electrolyte layer 3.
The second outer solid electrolyte layer 19 is made of the same solid electrolyte material as that of the central solid electrolyte layer 3, that is, LLZ. The thickness of the second outer solid electrolyte layer 19 is, for example, 140 μm.
[1-2. Capacitor manufacturing method]
Next, a method for manufacturing the capacitor 1 according to the first embodiment will be described.

  Here, a case where a flat base material is used in order to manufacture a plurality of capacitors 1 collectively will be described as an example, but the present invention is not limited to this. For example, the capacitor 1 may be manufactured independently.

<Calcined powder production process>
First, in order to produce Li ₇ La ₃ Zr ₂ O ₁₂ (LLZ) which is a solid electrolyte body, a predetermined amount of lithium carbonate, lanthanum hydroxide, and zirconium oxide are used as starting materials so as to have a molar ratio of LLZ. Weighed and mixed to make a mixed material.

  The mixed material was mixed with ethyl alcohol using a nylon pot and zirconia cobblestone. After the mixture was dried, it was calcined by holding it at 1100 ° C. for 10 hours in an air atmosphere with an alumina crucible to prepare a LLZ calcined powder.

<Crushed powder preparation process>
Next, the calcined powder of LLZ was pulverized for 36 hours using a nylon pot and zirconia spherulite together with methyl ethyl ketone and dried to prepare a pulverized powder of LLZ.

<Slurry production process>
Next, pulverized powder of LLZ, a binder (butyral resin), and a plasticizer (dioctyl phthalate) were mixed with a methyl ethyl ketone / toluene mixed solvent to prepare a slurry of LLZ.

<Sheet preparation process>
Next, the slurry of LLZ was applied to a carrier film made of polyethylene terephthalate (PET) treated with silicon (Si) on one side by a doctor blade method to produce a sheet (ie, initial sheet) having a thickness of about 15 μm. .

<Internal electrode layer / mixed layer printing process>
Next, the initial sheet was punched into a predetermined size (for example, a rectangular shape having a predetermined dimension), and a sheet to be laminated later (hereinafter, this sheet is simply referred to as a sheet) was obtained.

  Next, as shown in FIG. 4A, a portion corresponding to one capacitor 1 is formed on one surface of a sheet 31 by screen printing using a Ni electrode material, for example, the first internal electrode layer 9 and the like. A first electrode pattern 33 was formed. As is well known, the material of the Ni electrode is a paste obtained by adding a binder and a solvent to Ni powder.

Next, the 1st mixed pattern 35 used as the 1st mixed layer 7 was formed by screen printing using the material of the mixed layer so that the whole surface of the 1st electrode pattern 33 might be covered.
The material of the mixed layer is a paste obtained by mixing Ni powder and LLZ calcined powder and adding a well-known binder (for example, ethyl cellulose) and a solvent (for example, terpineol). The ratios of Ni powder and LLZ calcined powder are, for example, 30% by volume of Ni powder and 70% by volume of LLZ calcined powder.

  Similarly, as shown in FIG. 4B, the second electrode pattern 39 to be the second internal electrode layer 17 is formed on one surface of the other sheet 37 by screen printing using the above-described Ni electrode material, for example. Formed.

  Next, the 2nd mixed pattern 41 used as the 2nd mixed layer 15 was formed by screen printing using the material of the mixed layer mentioned above so that the whole surface of the 2nd electrode pattern 39 might be covered.

In order to manufacture a large number of capacitors 1 at a time, a large number of electrode patterns 33 and 39 and mixed patterns 35 and 41 were formed on the sheets 31 and 37, respectively.
<Laminated body production process>
Next, as shown in FIG. 4C, for example, the sheet 31 on which the first electrode pattern 33 and the first mixed pattern 35 are printed, and the sheet 43 just punched to become the central solid electrolyte layer 3, The sheet surfaces were laminated and laminated. That is, the laminated member 45 was produced by laminating the sheets 43 so as to cover the first electrode pattern 33 and the first mixed pattern 35 on the sheet 31.

  Next, as shown in FIG. 4D, the other sheet 37 on which the second electrode pattern 39 and the second mixed pattern 41 were formed and the laminated member 45 were laminated by laminating the sheet surfaces. That is, the other sheets 37 were laminated so that the second mixed pattern 41 side of the other sheets 37 and the other sheets 43 of the laminated member 45 face each other.

  Thereafter, although not shown, the PET carrier film on the exposed surface of one of the bonded sheets 31 was peeled off, and then a predetermined number of sheets 43 (for example, 13 sheets) were sequentially stacked. Similarly, after peeling off the PET carrier film on the exposed side surface of the other sheet 37, a predetermined number of sheets 43 (for example, 13 sheets) were sequentially laminated.

In this way, a LLZ laminate was fabricated so that the structure (laminated structure) shown in FIG. 1 was obtained after firing.
And the produced laminated body (base material) was hold | maintained at 196 MPa for 1000 second, heating at 80 degreeC with WIP (Warm Isostatic Press), and performed the high pressure press.

Thereafter, the laminated body subjected to high-pressure pressing was subjected to break processing along the product shape using a CO ₂ laser processing machine, and was broken along the break grooves into individual pieces.
Next, Ni electrodes that become the first and second external electrodes 23a and 23b on the side surfaces where the first and second internal electrode layers 9 and 17 are exposed with respect to the separated member (element), respectively. The material was applied.

<Baking process>
Next, the element before baking which apply | coated the material of Ni electrode to each side surface was heated at 300 degreeC by air | atmosphere atmosphere, and the binder removal process was carried out. Thereafter, it was fired in a hydrogen-nitrogen mixed atmosphere at a maximum temperature of 1200 ° C. for 2 hours to produce a flat plate-shaped capacitor 1 having the dimensions described above.
[1-3. Capacitor evaluation]
Next, evaluation (experimental example) for confirming the performance of the capacitor will be described.

  First, samples (Examples 1 and 2) within the scope of the present invention were produced by the manufacturing method described above as follows. Separately, samples outside the scope of the present invention (Comparative Examples 1 and 2) were produced. In addition, except the structure described below, it is the same as that of the said 1st Embodiment.

  Example 1: As shown in FIG. 5 (a), the inner side (center side) of the first and second internal electrode layers 9, 17 has a thickness of 7.5 μm and a metal (Ni) content of 30% by volume. 1, the 2nd mixed layers 7 and 15 were arrange | positioned, and the thickness of the center solid electrolyte layer 3 was 10 micrometers.

  Example 2: As shown in FIG. 5 (b), on the inner side (center side) of the first and second internal electrode layers 9 and 17, the first, having a thickness of 15 μm and a metal (Ni) content of 30% by volume, The second mixed layers 7 and 15 were arranged, and the thickness of the central solid electrolyte layer 3 was 10 μm.

Comparative Example 1: As shown in FIG. 5 (c), the mixed layers 7 and 15 are not arranged on the inner side (center side) of the first and second internal electrode layers 9 and 17, and the thickness of the central solid electrolyte layer 3 Was 10 μm.
Comparative Example 2: As shown in FIG. 5 (d), on both sides of the first and second internal electrode layers 9, 17, a mixed layer having a thickness of 7.5 μm and a metal (Ni) content of 30% by volume, respectively. 51 was arranged, and the thickness of the central solid electrolyte layer 3 was 10 μm.

  And about each sample (Examples 1 and 2, Comparative Examples 1 and 2), AC impedance measurement etc. were performed using Agilent 4294A at measurement voltage 0.1V and measurement frequency 40Hz-110MHz.

  Thereafter, AC impedance measurement was performed using Solartron 1255B and 1287 at a measurement voltage of 0.1 V and a measurement frequency of 10 mHz to 1 MHz, thereby obtaining impedance frequency characteristic data at a frequency of 10 mHz to 110 MHz.

Then, tan δ and electric capacity [μF] of each sample at a measurement frequency of 10 Hz were obtained.
Further, after the impedance measurement, SEM observation with a scanning electron microscope (SEM) was performed. Specifically, cross section polisher (CP) processing or mirror polishing processing equivalent thereto was performed on a cross section of the sintered body (that is, a cross section in which the capacitor was broken along the thickness direction). Then, element analysis mapping or backscattered electron imaging was performed on the polished surface in an enlarged field of view of 500 times that of SEM, and an image capable of distinguishing the boundary between the solid electrolyte and Ni was obtained.

  Then, when the image analysis of the said image was performed and the area of Ni and LLZ in a mixed layer was calculated | required, it turned out that Ni is 30 volume% of the whole and the metal content of a mixed layer is 30 volume%.

  These results are shown in Table 1 below. Table 1 shows tan δ (that is, the ratio (%) of tan δ relative to Comparative Example 1) and electric capacity (that is, the ratio (%) of electric capacity relative to Comparative Example 1) at a measurement frequency of 10 Hz for each sample. Here, tan δ represents dielectric loss, and is an absolute value of (real part) / (imaginary part) of impedance at a specific frequency.

  Here, for “reduction in loss” in Table 1, ◯ indicates that “tan δ relative to Comparative Example 1 is less than 100%”, and × indicates that “tan δ relative to Comparative Example 1 is 100% or more”. In Table 1, “High capacity” indicates that “the electric capacity for Comparative Example 1 is higher than 100%” and “×” indicates that “the electric capacity for Comparative Example 1 is 100% or less”.

この表１から明らかなように、実施例１と実施例２は、比較例１よりも電気容量が大きく、かつ誘電損失も低下しており、低損失化と高容量化を両立していることがわかった。それに対して、比較例２は比較例１と比べて電気容量が大きくなっているが、誘電損失は高くなっていた。
［１−４．効果］
次に、本第１実施形態のキャパシタ１の効果について説明する。

As is clear from Table 1, Example 1 and Example 2 have a larger electric capacity and lower dielectric loss than Comparative Example 1, and both lower loss and higher capacity are compatible. I understood. In contrast, Comparative Example 2 had a larger electric capacity than Comparative Example 1, but had a higher dielectric loss.
[1-4. effect]
Next, the effect of the capacitor 1 of the first embodiment will be described.

  The capacitor 1 of the first embodiment has a pair of main surfaces 21a and 21b formed by stacking three solid electrolyte layers 3, 11, and 19 made of a solid electrolyte (here, LLZ) having lithium ion conductivity. A base 21 and a pair of internal electrode layers 9, 17 disposed so as to face each other with the solid electrolyte layers 3, 11, 19 inside the base 21 are provided.

  In this capacitor 1, mixed layers 7 and 15 including a metal and a solid electrolyte are disposed on opposing surfaces of the pair of internal electrode layers 9 and 17 that are opposed to each other via the central solid electrolyte layer 3. Further, the first and second outer surfaces are disposed on the surfaces opposite to the opposing surfaces (that is, the outer surfaces) of the first and second internal electrode layers 9 and 17 disposed closest to the pair of main surfaces 21a and 21b, respectively. The solid electrolyte layers 11 and 19 are in direct contact.

  That is, the mixed layers 7 and 15 are disposed in contact with the inner side (center side) of the pair of internal electrode layers 9 and 17, respectively, and the surface on the outer surface side of the pair of internal electrode layers 9 and 17 is mixed. The layer is not formed.

  In other words, the mixed layers 7 and 15 containing metal are disposed inside the internal electrode layers 9 and 17, respectively, thereby increasing the electrode area inside the internal electrode layers 9 and 17. Therefore, it is considered that the dielectric loss in the low frequency region is reduced due to the relatively less influence of the outer surfaces of the internal electrode layers 9 and 17.

  Further, in the first embodiment, by forming the mixed layers 7 and 15 of metal and solid electrolyte between the internal electrode layers 9 and 17, the area of the electrode interface per layer of the internal electrode layers 9 and 17 is large. Therefore, there is an advantage that the capacity can be increased.

That is, in the first embodiment, by forming the mixed layers 7 and 15 of metal and solid electrolyte between the internal electrode layers 9 and 17, the area of the electrode interface per layer of the internal electrode layers 9 and 17 is large. Thus, the capacity can be increased and the mixed layers 7 and 15 are not formed on the outermost layers of the internal electrode layers 9 and 17, so that the dielectric loss in alternating current can be reduced.
[1-5. Correspondence with Claims]
The capacitor 1, the solid electrolyte layers 3, 11, 19, the main surfaces 21 a, 21 b, the internal electrode layers 9, 17, the mixed layers 7, 15, and the base body 21 of the first embodiment are respectively a capacitor, It corresponds to an example of a solid electrolyte layer, a main surface, an internal electrode layer, a mixed layer, and a substrate.
[2. Second Embodiment]
Next, the second embodiment will be described, but the description of the same contents as the first embodiment will be omitted or simplified.

As shown in FIG. 6A, the capacitor 61 of the second embodiment has a plurality of (five layers) solid electrolyte layers 63 made of the same solid electrolyte body as that of the first embodiment.
In addition, an internal electrode layer 65 similar to that of the first embodiment is disposed between the solid electrolyte layers 63. Note that the internal electrode layers 65 are alternately connected to the first external electrodes 67a or the second external electrodes 67b in the stacking order, as in the first embodiment.

  Further, mixed layers 69 similar to those of the first embodiment are formed on both sides in the thickness direction of the second solid electrolyte layer 63 from above in FIG. Each mixed layer 69 is formed so as to cover the inner side surface of each adjacent internal electrode layer 65 (that is, the solid electrolyte layer 63 side).

  Similarly, mixed layers 69 similar to those in the first embodiment are formed on both sides in the thickness direction of the third solid electrolyte layer 63 from above in FIG. Each mixed layer 69 is formed so as to cover the inner side surface of each adjacent internal electrode layer 65 (that is, the solid electrolyte layer 63 side).

  Similarly, mixed layers 69 similar to those in the first embodiment are formed on both sides in the thickness direction of the second solid electrolyte layer 63 from the lower side of FIG. Each mixed layer 69 is formed so as to cover the inner side surface of each adjacent internal electrode layer 65 (that is, the solid electrolyte layer 63 side).

The second embodiment has substantially the same effect as the first embodiment.
In addition, the number of the solid electrolyte layers provided with the mixed layers on both sides and the arrangement in the stacking direction are not limited to the configuration of the second embodiment.
[3. Third Embodiment]
Next, the third embodiment will be described, but the description of the same contents as the first embodiment will be omitted or simplified.

As shown in FIG. 6B, the capacitor 71 of the third embodiment is formed by laminating a plurality (five layers) of solid electrolyte layers 73 made of the same solid electrolyte body as in the first embodiment.
Further, an internal electrode layer 75 similar to that in the first embodiment is disposed between the solid electrolyte layers 73. The internal electrode layers 75 are alternately connected to the first external electrodes 77a or the second external electrodes 77b in the stacking order, as in the first embodiment.

  Further, a mixed layer 79 similar to that of the first embodiment is formed on the upper surface of the second solid electrolyte layer 73 from above in FIG. An internal electrode layer 75 is disposed on the upper surface of the mixed layer 79.

  Similarly, a mixed layer 79 similar to that of the first embodiment is formed on the lower surface of the second solid electrolyte layer 73 from the lower side of FIG. An internal electrode layer 75 is disposed on the lower surface of the mixed layer 79.

That is, in the third embodiment, a plurality of solid electrolyte layers 73 are disposed between the pair of mixed layers 79, and the internal electrode layer 75 is disposed between the adjacent solid electrolyte layers 73.
The third embodiment has substantially the same effect as the first embodiment.
[4. Other Embodiments]
It goes without saying that the present invention is not limited to the above-described embodiment, and can be implemented in various modes without departing from the present invention.

(1) For example, Li ₇ La ₃ Zr ₂ O ₁₂ (LLZ) can be used as the solid electrolyte, but other lithium ion conductors can be used.
For _{example, Li 1 + x Al x Ge} 2-x (PO 4) 3, Li 1.3 Al 0.3 Ti 1.7 (PO 4) 3 (LATP), Li x Zr y Nb z (PO 4) 3 (LZNP ), Li _1.2 Zr _1.9 Ca _0.1 (PO ₄ ) ₃ (LZCP), Li _7-x La ₃ Zr _2-x Nb _x O ₁₂ (LLZN), Li _7-x La ₃ Zr _{2− x Ta x O 12 (LLZT)} , Li 3x La 2 / 3x Ti 1 / 3x O 3 (LLT), Li 6 BaLa 2 Ta 2 O 12 (LBLT), Li 3 BO 3, Li 3 PO 4 _{-x N x (LiPON), LiS} -P 2 S 5 (LPS), it can be adopted lithium ion conductor, such as _{Li 10 GeP 2 S 12 (LGPS} ).

  (2) The solid electrolyte layer is preferably composed only of the above-described solid electrolyte having lithium ion conductivity. However, the solid electrolyte layer may contain a material other than the solid electrolyte in a range of less than 50% by volume. Can be adopted.

  In addition, as materials other than the solid electrolyte contained in the solid electrolyte layer, for example, a material having electrical insulation (that is, electrical insulation related to electron conductivity and ion conductivity) such as barium titanate (BT) can be employed. Examples of the material having electrical insulation include metal oxides such as strontium titanate, alumina, zirconia, and silica, and resins such as polyethylene, polypropylene, ABS, acrylic, epoxy, and polyimide.

Furthermore, oxides of elements constituting the solid electrolyte can be employed as materials other than the solid electrolyte contained in the solid electrolyte body. Examples of the oxide material of the element constituting the solid electrolyte include AlPO ₄ , TiO ₂ , LaTiO _{3 and the} like.

  (3) As a method of forming the solid electrolyte layer, a green sheet is prepared using the slurry containing the solid electrolyte material described above, and the green sheet is fired under a predetermined condition to thereby obtain a solid electrolyte layer (accordingly, Various known methods such as a method of forming a laminate can be employed.

(4) The metal used for the mixed layer may be a simple substance or an alloy. For example, in addition to Ni, Au, Pt, Pd, Ag, Cu and the like can be mentioned.
(5) As the material of the internal electrode layer, various known conductive materials such as Au, Pt, Pd, Ag, Ni, Cu, etc. can be adopted. As a method of forming the internal electrode layer, various known methods such as a screen printing method using a slurry or paste containing the conductive material can be employed. For example, a thin film method, a coating method, a thermal spraying method, a sputtering method, a plating method, or the like can be adopted. For the external electrode, the same material and the same formation method as the internal electrode layer can be adopted.

  (6) The configurations of the above embodiments can be combined as appropriate.

DESCRIPTION OF SYMBOLS 1, 61, 71 ... Capacitor 3, 11, 19, 63, 73 ... Solid electrolyte layer 3a, 3b, 21a, 21b ... Main surface 9, 17, 65, 75 ... Internal electrode layer 7, 15, 69, 79 ... Mixing Layer 21 ... Substrate

Claims (4)

A substrate having a pair of main surfaces formed by laminating a plurality of solid electrolyte layers mainly composed of a solid electrolyte having lithium ion conductivity, and disposed inside the substrate so as to face each other through the solid electrolyte layer A plurality of internal electrode layers, and a capacitor comprising:
A mixed layer containing a metal and the solid electrolyte is disposed on opposing surfaces of the internal electrode layers of the plurality of internal electrode layers facing each other via the one or more solid electrolyte layers. And
The capacitor, wherein the solid electrolyte layer is in direct contact with a surface opposite to the facing surface in the internal electrode layer disposed closest to the pair of main surfaces among the plurality of internal electrode layers.   2. The capacitor according to claim 1, wherein a plurality of the solid electrolyte layers are disposed between a pair of the mixed layers, and the internal electrode layer is disposed between the adjacent solid electrolyte layers.   The capacitor according to claim 1, wherein a content of the metal in the mixed layer is 30% by volume or more. The capacitor according to claim 1, wherein the solid electrolyte is Li ₇ La ₃ Zr ₂ O ₁₂ .

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