JP2018026939A - Motor controller - Google Patents

Abstract

PROBLEM TO BE SOLVED: To detect overload of a motor with high accuracy.SOLUTION: An integrator 43 of overload detection means 23 integrates the division results of a square current iby a duty cycle time Tduty, finds an integration value as the square value of RMS of the current, and resets the integration value at the input timing of a cycle signal Cyc@. A previous value holder 44 holds the previous value of the square of RMS, and is updated at the input timing of the cycle signal Cyc@. A comparator 46 compares the addition result of the square value of RMS and the previous value of square of RMS, and a preset constant 1.0, and when the addition result exceeds the constant 1.0, determines that overload of an AC motor is detected and outputs an overload detection signal OL@. Consequently, the timing of overload detection signal OL@ outputted by the comparator 46 corresponds to a preset overload time TOL.SELECTED DRAWING: Figure 2

Description

  The present invention relates to a motor control device, and more particularly to a motor control device that detects an overload of an AC motor.

  2. Description of the Related Art Conventionally, a motor control device that performs vector control of an AC motor using a d-axis and a q-axis is known. The motor control device generates a voltage command by controlling the current command with a PI controller, and converts the voltage command to generate a three-phase AC voltage command. The motor control device controls the AC motor by outputting a three-phase AC voltage command to the inverter.

  In such a motor control device, if the AC motor is overloaded and the overcurrent flows for a long time, the AC motor may generate heat and be damaged, and the inverter may also be damaged. There is. Therefore, the motor control device detects that the AC motor is in an overload state by monitoring the current flowing through the AC motor, and stops the AC motor by shutting off the power source of the AC motor, for example. Thereby, the overload of the AC motor can be prevented and the elements of the inverter can be protected. This is called electronic thermal in the sense of protecting from overheating due to overcurrent.

  A motor control device having an electronic thermal function has been proposed (see, for example, Patent Document 1). When the current flowing through the AC motor exceeds a predetermined value and the time exceeds a predetermined time, the motor control device detects an overload abnormality and shuts off the AC motor.

JP 2014-93932 A

  In general, in order to protect an AC motor and an inverter by an electronic thermal function, an abnormality is detected based on an overload rate and an overload time. The overload rate and overload time are set in advance according to the type, specification, application, load connected to the AC motor, and the like of the AC motor.

  For example, in the case of a general AC motor, 150% and 60 sec are set as the overload rate and overload time, respectively, and in the case of a servo motor, 200% and 3 sec are set. When the state of operation at a preset overload rate continues for a preset overload time, an overload abnormality is detected, and the AC motor power is shut off, causing the AC motor to And the inverter is protected.

  The electronic thermal function described in Patent Document 1 described above compares the current value flowing through the AC motor with a predetermined value, and compares the time when the current value exceeds the predetermined value with the predetermined time. By doing so, an overload is detected.

  However, since this function is based on comparison processing, it is not always possible to detect an overload when the state of operation at a preset overload rate continues for a preset overload time. Not exclusively. For this reason, the prior art has a problem that the accuracy of overload detection is not high.

  Accordingly, the present invention has been made to solve the above-described problems, and an object of the present invention is to provide a motor control device capable of detecting an overload of an AC motor with high accuracy.

  In order to solve the above problem, in the motor control device according to claim 1, the deviation between the d-axis current command and the d-axis current feedback is zero, and the difference between the q-axis current command and the q-axis current feedback is zero. In the motor control device that generates a voltage command so that the deviation becomes zero, controls the AC motor based on the voltage command, and detects an overload of the AC motor, the d-axis current command and the q-axis current Each of the commands is squared and added to obtain a square current command, and each of the d-axis current feedback and the q-axis current feedback is squared and added to obtain a square current feedback. A current switching means for switching to one of the square current command and the square current feedback based on the switched signal and outputting as a square current; A duty cycle calculating means for calculating a duty cycle time based on the overload rate and the overload time, and the duty cycle time calculated by the duty cycle calculating means for calculating the square current output by the current switching means. And the result of the division is integrated to obtain the square value of the RMS (Root Mean Square) of the current, and the overload of the AC motor is detected based on the square value of the RMS of the current. And an overload detecting means.

  According to a second aspect of the present invention, there is provided the motor control device according to the first aspect, further comprising a cycle signal generating means, wherein the duty cycle calculating means squares the preset overload factor. The duty cycle time is obtained by multiplying the squared result by the preset overload time, and a time shorter than the duty cycle time is obtained as a cycle time. A pulse signal in units of the cycle time obtained by the duty cycle calculating means is generated as a cycle signal, and the overload detecting means outputs the square current output by the current switching means to the duty Divide by the duty cycle time obtained by the cycle calculation means and divide result A computing unit to be obtained; and the division result obtained by the computing unit is integrated to obtain a square value of the RMS of the current, and the cycle signal generated by the cycle signal generating unit is input, and the cycle signal And an integrator that resets an RMS square value of the current at a timing.

  According to a third aspect of the present invention, in the motor control device according to the second aspect, the overload detection unit further inputs the cycle signal generated by the cycle signal generation unit, and the cycle signal The RMS value of the current obtained by the integrator at the timing of the previous value holder that holds the square value of the current as the previous value, and the square value of the RMS value of the current obtained by the integrator, An adder for adding the previous value held by the previous value holder and calculating a square value of the RMS after the addition; a square value of the RMS after the addition obtained by the adder; A comparator that detects an overload of the AC motor when a square value of the RMS after the addition exceeds the preset constant. To do.

  As described above, according to the present invention, it is possible to detect an overload of an AC motor with high accuracy.

1 is an overall view showing a configuration example of a motor control system including a motor control device according to an embodiment of the present invention. It is a block diagram which shows the structural example of an overload detection part. It is a block diagram which shows the structural example of an electric current switching means. It is a block diagram which shows the structural example of a duty cycle calculating means. It is a block diagram which shows the structural example of a cycle signal production | generation means. It is a block diagram which shows the other structural example of a cycle signal production | generation means. It is a block diagram which shows the structural example of an overload detection means. It is a figure which shows the example of duty cycle time Tduty and cycle time Tcyc calculated by a duty cycle calculating means. It is a figure explaining the process example of a last time value holder and a comparator. It is a figure which shows the simulation result in case overload rate (eta) = 150% and overload time TOL = 60sec. It is a figure which shows the simulation result in case overload rate (eta) = 200% and overload time TOL = 3sec. It is a figure which shows the simulation result in case overload rate (eta) = 300% and overload time TOL = 1sec.

Hereinafter, embodiments for carrying out the present invention will be described in detail with reference to the drawings.
[Motor control system]
FIG. 1 is an overall view showing a configuration example of a motor control system including a motor control device according to an embodiment of the present invention. The motor control system includes a motor control device 1, a power amplifier 2, and an AC motor 3.

  The motor control device 1 is a device that performs vector control of the AC motor 3 on the d-axis and the q-axis. The motor control device 1 generates d-axis and q-axis current commands for controlling the rotational speed of the AC motor 3. The motor control device 1 converts the current command into a voltage command, and converts the voltage command into a U-phase AC voltage command Vu *, a V-phase AC voltage command Vv *, and a W-phase AC voltage command Vw * that are three-phase AC voltage commands. Convert to The motor control device 1 outputs a U-phase AC voltage command Vu *, a V-phase AC voltage command Vv *, and a W-phase AC voltage command Vw * to the power amplifier 2 to control the AC motor 3.

  The motor control device 1 includes a U-phase AC current FB (feedback) iu, which is a 3-phase AC current feedback detected by a current detector provided between the power amplifier 2 and the AC motor 3, and a V-phase AC current FB ( Feedback) iv and W-phase AC current FB (feedback) iw are input. The motor control device 1 converts the U-phase AC current FBiu, the V-phase AC current FBiv, and the W-phase AC current FBiw into d-axis and q-axis current feedback.

  In the overload detection process of the preset overload factor η and overload time TOL, the motor control device 1 detects the overload factor η, the overload time TOL, the current command of the d-axis and the q-axis, or the d-axis and Based on the q-axis current feedback, an overload of the AC motor 3 is detected. Then, the motor control device 1 outputs the overload detection signal OL @ at the timing when the overload is detected.

  The preset overload rate η and overload time TOL are values that reflect the overload characteristics of the AC motor 3, and indicate conditions for overload operation of the AC motor 3 desired by the user.

  The power amplifier 2 includes an inverter. The power amplifier 2 receives a U-phase AC voltage command Vu *, a V-phase AC voltage command Vv * and a W-phase AC voltage command Vw * from the motor control device 1, and generates a PWM signal from these three-phase AC voltage commands. . Then, the power amplifier 2 turns on and off the gate of the switching element of the inverter by the PWM signal, switches the DC bus voltage input to the inverter, and converts it into an AC voltage. The power amplifier 2 supplies an AC voltage to the AC motor 3.

[Motor control device 1]
Next, the motor control device 1 shown in FIG. 1 will be described in detail. As shown in FIG. 1, the motor control device 1 includes an overload detection unit 10, subtractors 11 and 12, current control units 13 and 14, and coordinate conversion units 15 and 16. In the configuration example of the motor control device 1 shown in FIG. 1, only the components that are directly related to the present invention are shown, and the components that are not directly related are omitted.

  The overload detection unit 10 inputs a preset overload rate η and an overload time TOL, inputs a d-axis current command id * and a q-axis current command iq *, and further receives a d from the coordinate conversion unit 16. The shaft current FB (feedback) id and the q-axis current FB (feedback) iq are input. The overload detection unit 10 calculates a current value based on the d-axis current command id * and the q-axis current command iq *, or the d-axis current FBid and the q-axis current FBiq, and the RMS (Root Mean Square) of the current. The square value of the root mean square) is calculated. The overload detection unit 10 detects an overload of the AC motor 3 based on the RMS value of the current, and outputs an overload detection signal OL @ at that timing. Details of the overload detection unit 10 will be described later.

  Thereby, when the state of operating at the overload rate η continues for the overload time TOL, the overload is detected at that timing, and the overload detection signal OL @ is output.

  The subtractor 11 receives the d-axis current command id * and also receives the d-axis current FBid from the coordinate conversion unit 16. Then, the subtractor 11 subtracts the d-axis current FBid from the d-axis current command id * and outputs the subtraction result to the current control unit 13 as a d-axis current deviation.

  The subtractor 12 receives the q-axis current command iq * and also receives the q-axis current FBiq from the coordinate conversion unit 16. Then, the subtractor 12 subtracts the q-axis current FBiq from the q-axis current command iq *, and outputs the subtraction result to the current control unit 14 as a q-axis current deviation.

  The current control unit 13 inputs the d-axis current deviation from the subtractor 11, performs current control by the PI controller using a preset proportional gain and integral gain so that the d-axis current deviation becomes zero, The d-axis voltage command vd * is calculated. Then, the current control unit 13 outputs the d-axis voltage command vd * to the coordinate conversion unit 15.

  The current control unit 14 inputs the q-axis current deviation from the subtractor 12, and performs current control by the PI controller using a preset proportional gain and integral gain so that the q-axis current deviation becomes zero, A q-axis voltage command vq * is calculated. Then, the current control unit 14 outputs the q-axis voltage command vq * to the coordinate conversion unit 15.

  The coordinate conversion unit 15 receives the d-axis voltage command vd * from the current control unit 13, receives the q-axis voltage command vq * from the current control unit 14, and further inputs an electrical angle (not shown). The coordinate conversion unit 15 converts the d-axis voltage command vd * and the q-axis voltage command vq * of the rotating coordinate system into the U-phase AC voltage command Vu *, the V-phase AC voltage command Vv *, and the W-phase based on the electrical angle. Coordinates are converted to AC voltage command Vw *. The coordinate conversion unit 15 outputs the U-phase AC voltage command Vu *, the V-phase AC voltage command Vv *, and the W-phase AC voltage command Vw * to the power amplifier 2.

  The coordinate conversion unit 16 inputs the U-phase AC current FBiu, the V-phase AC current FBiv, and the W-phase AC current FBiw detected by a current detector provided between the power amplifier 2 and the AC motor 3. Do not enter the electrical angle. Then, the coordinate conversion unit 16 converts the U-phase AC current FBiu, the V-phase AC current FBiv, and the W-phase AC current FBiw into a d-axis current FBid and a q-axis current FBiq in the rotating coordinate system based on the electrical angle. The coordinate conversion unit 16 outputs the d-axis current FBid to the overload detection unit 10 and the subtractor 11, and outputs the q-axis current FBiq to the overload detection unit 10 and the subtractor 12.

[Overload detection unit 10]
Next, the overload detection unit 10 shown in FIG. 1 will be described in detail. FIG. 2 is a block diagram illustrating a configuration example of the overload detection unit 10. The overload detection unit 10 includes a current switching unit 20, a duty cycle calculation unit 21, a cycle signal generation unit 22, and an overload detection unit 23.

(Current switching means 20)
The current switching means 20 inputs the d-axis current FBid and the q-axis current FBiq, and also receives the d-axis current command id * and the q-axis current command iq *, and obtains square values by square calculation. Then, the square value obtained from the d-axis current FBid and the q-axis current FBiq or the square value obtained from the d-axis current command id * and the q-axis current command iq * is selected and switched. Output to the overload detection means 23 as i ₁ ² .

  FIG. 3 is a block diagram illustrating a configuration example of the current switching unit 20. The current switching means 20 includes multipliers 30, 31, 32, 33, adders 34, 35, and a switch 36.

  The multiplier 30 receives the d-axis current FBid from the coordinate conversion unit 16, squares the d-axis current FBid, and outputs the square value of the d-axis current FBid to the adder 34. The multiplier 31 receives the q-axis current FBiq from the coordinate conversion unit 16, squares the q-axis current FBiq, and outputs the square value of the q-axis current FBiq to the adder 34.

  The multiplier 32 receives the d-axis current command id *, squares the d-axis current command id *, and outputs the square value of the d-axis current command id * to the adder 35. The multiplier 33 receives the q-axis current command iq *, squares the q-axis current command iq *, and outputs the square value of the q-axis current command iq * to the adder 35.

The adder 34 receives the square value of the d-axis current FBid from the multiplier 30 and also receives the square value of the q-axis current FBiq from the multiplier 31 and adds them to obtain the square current FB (id ² + Iq ² ). Then, the adder 34 outputs the square current FB (id ² + iq ² ) to the switch 36.

The adder 35 receives the square value of the d-axis current command id * from the multiplier 32 and also receives the square value of the q-axis current command iq * from the multiplier 33, adds them, and adds the square current. A command (id * ² + iq * ² ) is obtained. Then, the adder 35 outputs a square current command (id * ² + iq * ² ) to the switch 36.

The switch 36 receives the square current FB (id ² + iq ² ) from the adder 34, receives the square current command (id * ² + iq * ² ) from the adder 35, and further inputs a switching signal. . The switching signal is identification information that is preset by the user and indicates whether the overload detection process is performed based on the current FB or the current command.

When the switching signal indicates the current FB, the switch 36 outputs the square current FB (id ² + iq ² ) as the square current i ₁ ² to the overload detection means 23. On the other hand, when the switching signal indicates a current command, the switch 36 outputs the square current command (id * ² + iq * ² ) as the square current i ₁ ² to the overload detection means 23.

  Thereby, when the switching signal indicates the current FB, an overload detection process based on the current FB is performed, and when the switching signal indicates the current command, an overload detection process based on the current command is performed. .

(Duty cycle calculation means 21)
Returning to FIG. 2, the duty cycle calculation means 21 inputs a preset overload rate η and overload time TOL, and based on the overload rate η and overload time TOL, the duty cycle time Tduty and cycle time. Tcyc is calculated. Then, the duty cycle calculation means 21 outputs the duty cycle time Tduty to the overload detection means 23 and outputs the cycle time Tcyc to the cycle signal generation means 22 and the overload detection means 23.

  FIG. 4 is a block diagram illustrating a configuration example of the duty cycle calculation unit 21. The duty cycle calculating means 21 includes multipliers 37 and 38.

  The multiplier 37 receives a preset overload factor η and an overload time TOL, squares the overload factor η, multiplies the square value of the overload factor η by the overload time TOL, and outputs a duty cycle. Find the time Tduty. The multiplier 37 outputs the duty cycle time Tduty to the multiplier 38 and also outputs it to the overload detection means 23.

The duty cycle time Tduty is calculated by the following equation.
[Equation 1]
Tduty = η ² × TOL (1)

  The multiplier 38 receives the duty cycle time Tduty and multiplies the duty cycle time Tduty by 1/2 to obtain the cycle time Tcyc. The multiplier 38 outputs the cycle time Tcyc to the cycle signal generation means 22 and the overload detection means 23.

The cycle time Tcyc is calculated by the following formula.
[Equation 2]
Tcyc = Tduty / 2 (2)

  FIG. 8 is a diagram showing an example of the duty cycle time Tduty and the cycle time Tcyc calculated by the duty cycle calculation means 21. As described above, the overload rate η and the overload time TOL are values that reflect the overload characteristics of the AC motor 3, and indicate the overload operation conditions of the AC motor 3 that the user desires. As shown in FIG. 8, when the overload factor η = 150% and the overload time TOL = 60 sec set in advance, the duty cycle calculating means 21 sets the duty cycle time Tduty = 135 sec and the cycle time Tcyc = 67.5 sec. Calculated.

  Similarly, when the overload factor η = 200% and the overload time TOL = 3 sec set in advance, the duty cycle time Tduty = 12 sec and the cycle time Tcyc = 6 sec are calculated. Further, when the overload factor η = 300% and the overload time TOL = 1 sec set in advance, the duty cycle time Tduty = 9 sec and the cycle time Tcyc = 4.5 sec are calculated.

  Thus, the duty cycle calculation means 21 calculates the longer duty cycle time Tduty and cycle time Tcyc as the overload rate η is lower and the overload time TOL is longer. On the other hand, the shorter the overload rate η and the shorter the overload time TOL, the shorter the duty cycle time Tduty and the cycle time Tcyc are calculated. In any case, a cycle time Tcyc longer than the overload time TOL is calculated.

(Cycle signal generating means 22)
Returning to FIG. 2, the cycle signal generation means 22 receives the cycle time Tcyc from the duty cycle calculation means 21, and generates a pulse signal having the cycle time Tcyc as a unit as the cycle signal Cyc @. Then, the cycle signal generation means 22 outputs the cycle signal Cyc @ to the overload detection means 23.

  FIG. 5 is a block diagram illustrating a configuration example of the cycle signal generation unit 22. The cycle signal generation means 22 includes an integrator 39 and a comparator 40.

  The integrator 39 inputs a predetermined sampling signal and also inputs the cycle signal Cyc @ from the subsequent comparator 40 as a reset signal. The predetermined sampling signal is a sampling signal of the program when the process by the motor control device 1 is executed by software.

  The integrator 39 integrates the sampling signal, outputs the integration value as an elapsed time to the comparator 40, and resets the integration value at the timing when the cycle signal Cyc @ is input. That is, the integrator 39 outputs the elapsed time since the input of the cycle signal Cyc @ (the elapsed time since the cycle signal Cyc @ was turned on).

  The comparator 40 receives the elapsed time from the cycle time when the cycle signal Cyc @ is turned on from the integrator 39 and the cycle time Tcyc from the duty cycle calculating means 21. The comparator 40 outputs a pulsed cycle signal Cyc @ to the integrator 39 and the overload detection means 23 when the elapsed time exceeds the cycle time Tcyc. On the other hand, the comparator 40 does not output the cycle signal Cyc @ when the elapsed time is equal to or shorter than the cycle time Tcyc.

  Thus, when the integrator 39 inputs the cycle signal Cyc @, the elapsed time is reset, so that the cycle signal Cyc @ output by the comparator 40 becomes a pulse signal for each cycle time Tcyc.

  As described above, in the cycle signal generation means 22 shown in FIG. 5, the integrator 39 resets the elapsed time when the cycle signal Cyc @ is input. However, the integrator 39 cannot integrate the input sampling signal during the scan for resetting the elapsed time, and cannot reflect the input of the sampling signal for one scan in the elapsed time. For this reason, the elapsed time includes an error, and as a result, the comparator 40 cannot output the cycle signal Cyc @ with high accuracy for each cycle time Tcyc. Therefore, this problem is solved by another configuration example of the cycle signal generation means 22.

  FIG. 6 is a block diagram showing another configuration example of the cycle signal generation means 22. The cycle signal generating means 22 ′ includes an integrator 39 ′, a comparator 40 and a clearer 41.

  The integrator 39 ′ inputs a predetermined sampling signal and inputs the previous value of the elapsed time from the subsequent clearing device 41 as a clear signal. The predetermined sampling signal is a program sampling signal as described with reference to FIG.

  The integrator 39 'integrates the sampling signal to obtain an integrated value. When the previous value of the elapsed time is input as a clear signal, the integrator 39 'subtracts the previous value of the elapsed time from the integrated value, and outputs the subtraction result to the comparator 40 and the clearer 41 as the elapsed time. That is, the elapsed time is cleared at the timing of the cycle signal Cyc @ output by the comparator 40 described later, and is output as the time from when the cycle signal Cyc @ is turned on.

  Since the comparator 40 is the same as that of FIG. 5, description is abbreviate | omitted here. The comparator 40 outputs the cycle signal Cyc @ to the clearer 41 and the overload detection means 23 when the elapsed time exceeds the cycle time Tcyc.

  The clearing device 41 inputs an elapsed time (time from when the cycle signal Cyc @ is turned on) from the integrator 39 ′, inputs a preset value of 0, and further receives a cycle from the comparator 40. Input the signal Cyc @ as a reset signal. When the cycle signal Cyc @ is not input, the clearer 41 outputs the input value of 0 to the integrator 39 'as the previous value of the elapsed time. When the cycle signal Cyc @ is input, the clearer 41 outputs the elapsed time input from the integrator 39 'at that time to the integrator 39' as the previous value of the elapsed time.

  Thereby, the previous value of the elapsed time updated at every timing of the cycle signal Cyc @ is output from the clearer 41.

  The cycle signal Cyc @ output from the comparator 40 is a pulse signal for each cycle time Tcyc. The integrator 39 'clears the elapsed time integrated by the sampling signal using the previous value of the elapsed time. For this reason, the elapsed time output by the integrator 39 ′ does not include an error, and as a result, the comparator 40 can output a highly accurate cycle signal for each cycle time Tcyc.

(Overload detection means 23)
Returning to FIG. 2, the overload detecting means 23, and inputs from current switching means 20 squared currents i ₁ ^2, and inputs the duty cycle time Tduty and cycle time Tcyc from duty cycle calculation unit 21. Further, the overload detection means 23 receives the cycle signal Cyc @ from the cycle signal generation means 22.

The overload detecting means 23 integrates the square current i ₁ ² to obtain the square value of the RMS of current, detects the overload of the AC motor 3 based on the square value of the RMS of current, The overload detection signal OL @ is output at the timing.

  FIG. 7 is a block diagram illustrating a configuration example of the overload detection unit 23. The overload detection means 23 includes a calculator 42, an integrator 43, a previous value holder 44, an adder 45, a comparator 46, calculators 47 and 48, and a holder 49.

The computing unit 42 receives the square current i ₁ ² from the current switching unit 20 and the duty cycle time Tduty from the duty cycle computing unit 21. Then, computing unit 42, the square current i ₁ ² divided by the duty cycle time Tduty, the division result (i ₁ ² / Tduty) outputs to the integrator 43.

The integrator 43 inputs the division result (i ₁ ² / Tduty) from the computing unit 42 and also inputs the cycle signal Cyc @ from the cycle signal generation unit 22. The integrator 43 integrates the division result (i ₁ ² / Tduty) and sets the integrated value as the RMS square value of the current (hereinafter referred to as the RMS square value), and the previous value holder 44 and the adder 45. And output to the computing unit 47.

The integrator 43 resets the integration value at the timing when the cycle signal Cyc @ is input. That is, the integrator 43 calculates the integral value (integral value from when the cycle signal Cyc @ is turned on) of the division result (i ₁ ² / Tduty) after the timing when the cycle signal Cyc @ is input as the RMS 2 Output as a multiplier value.

ｔは、サイクル信号Cyc＠を入力したタイミング以降の経過時間を示す。 The square value of RMS is calculated by the following formula.
[Equation 3]

t indicates the elapsed time after the timing when the cycle signal Cyc @ is input.

  Thereby, the square value of RMS that is reset at every timing of the cycle signal Cyc @ is output from the integrator 43.

  The previous value holder 44 receives the RMS square value from the integrator 43 and the cycle signal Cyc @ from the cycle signal generation unit 22 as a reset signal. The previous value holder 44 holds the square value of RMS input from the integrator 43 when the cycle signal Cyc @ is input, and outputs this to the adder 45 as the previous value of the square of RMS.

  Thereby, the previous value of the square of RMS is updated and outputted from the previous value holder 44 at every timing of the cycle signal Cyc @.

The adder 45 inputs the RMS square value from the integrator 43 and also inputs the previous RMS square value from the previous value holder 44, and sets the RMS square previous value to the RMS square value. Addition is performed, and the addition result is output to the comparator 46 as the RMS square value rms ² after the addition.

The comparator 46 receives the RMS square value rms ² after addition from the adder 45, and also inputs a preset constant 1.0, and the RMS square value rms ² after addition and a preset value. Compared with the calculated constant 1.0. Then, comparator 46 determines that AC motor 3 is in an overload state when RMS squared value rms ² after addition exceeds constant 1.0. At this time, the comparator 46 determines that an overload of the AC motor 3 has been detected, and outputs an overload detection signal OL @. On the other hand, the comparator 46, when the square value rms ² of RMS after the addition is a constant 1.0, the AC motor 3 is determined not to overload condition does not output the overload detection signal OL @.

FIG. 9 is a diagram for explaining a processing example of the previous value holder 44 and the comparator 46. 9 (1) shows the cycle signal Cyc @, and FIG. 9 (2) shows the RMS square value of the current output by the integrator 43, respectively. FIG. 9 (3) shows the RMS squared value rms ² output from the adder 45, and FIG. 9 (4) shows the overload detection signal OL @. The squares in FIGS. 9 (2) and 9 (3) indicate the time period during which integration processing is performed by the integrator 43 in order to detect overload.

  Referring to FIG. 9 (2), when the cycle value Cyc @ shown in FIG. 9 (1) is input in the integrator 43 while the square value of RMS is increasing, the square value of RMS. Is reset.

  Here, since the time period in which the integration process for detecting the overload is continued before and after the timing of the cycle signal Cyc @, the comparator 46 does not reset the RMS square value. An overload determination should be made.

  When the previous value holder 44 does not exist, the comparator 46 performs overload determination using the reset RMS square value after the timing of the cycle signal Cyc @. Cannot judge.

9 (3), the previous value holder 44 holds the RMS square value at the reset timing by the cycle signal Cyc @ as the RMS squared previous value. Then, the comparator 46 determines the overload using the RMS square value rms ² after the addition of the RMS square value added to the RMS squared previous value, as shown in FIG. 9 (4). At the timing, the overload detection signal OL @ is output. Thereby, an overload can be correctly determined.

Note that the square current i ₁ ² used when obtaining the square value of the RMS of the current is supplied by the current switching means 20 to the d-axis current command id * and the q-axis current command iq * or the d-axis current FBid and q It is calculated based on the shaft current FBiq. In this case, the d-axis current command id *, the q-axis current command iq *, the d-axis current FBid, and the q-axis current FBiq are normalized to values corresponding to the overload factor η.

For example, as shown in FIG. 8, when the overload rate η = 150% and the overload time TOL = 60 sec, the duty cycle time Tduty = 135 sec is calculated by the duty cycle calculating means 21. Assuming that the state of the overload factor η = 150% of the AC motor 3 continues, the square current i ₁ ² = 1.5 ² = 2.25, and the square value of RMS in the equation (3) = 2 25 × t / 135. The comparator 46 outputs the overload detection signal OL @ at a timing of RMS square value = 2.25 × t / 135 = 1, that is, a timing of t = 60 sec. This t = 60 sec corresponds to the overload time TOL = 60 sec.

  Further, when the overload rate η = 200% and the overload time TOL = 3 sec, the comparator 46 outputs the overload detection signal OL @ because the RMS square value = 4 × t / 12 = 1. The timing is t = 3 sec. This t = 3 sec corresponds to the overload time TOL = 3 sec. Similarly, when the overload rate η = 300% and the overload time TOL = 1 sec, the comparator 46 outputs the overload detection signal OL @ because the RMS square value = 9 × t / 9 = 1. I.e., t = 1 sec. This t = 1 sec corresponds to the overload time TOL = 1 sec.

Thus, in a preset overload factor η and overload time TOL, the square current i ₁ ² integral value of the AC motor 3 squares of the RMS current is the result of division by the duty cycle time Tduty By detecting overload of AC motor 3 based on this, overload detection signal OL @ can be output after overload time TOL has elapsed. Therefore, the overload detection of the AC motor 3 at the preset overload rate η and overload time TOL can be performed with high accuracy.

  Returning to FIG. 7, the computing unit 47 inputs the RMS square value from the integrator 43 and also receives the duty cycle time Tduty and the cycle time Tcyc from the duty cycle computing unit 21. The computing unit 47 divides the duty cycle time Tduty by the cycle time Tcyc, multiplies the division result (Tduty / Tcyc) by the square value of RMS, and the multiplication result ((Tduty / Tcyc) × the square value of RMS. ) Is output to the computing unit 48.

The multiplication result output by the calculator 47 is calculated by the following equation.
[Equation 4]

  The denominator in the square value of the RMS of the current shown in Equation (3) is the duty cycle time Tduty. On the other hand, the denominator of the multiplication result of Equation (4) is the cycle time Tcyc. The multiplication result of the equation (4) is obtained by using the cycle time Tcyc instead of the duty cycle time Tduty which is the denominator of the equation (3). Therefore, the equation (3) is the RMS square value of the current with the duty cycle time Tduty as the denominator, and the equation (4) is the RMS value of the current with the cycle time Tcyc as the denominator. It can be said.

  The computing unit 48 receives the multiplication result (the square value of the RMS of the current with the cycle time Tcyc as the denominator) from the computing unit 47, and the square root of the multiplication result (the square of the RMS of the current with the cycle time Tcyc as the denominator). ) And outputs the RMS value as the calculation result to the holder 49.

  The holder 49 receives the RMS value from the computing unit 48 and also receives the cycle signal Cyc @ from the cycle signal generation unit 22 as a reset signal. The holder 49 holds the RMS value input from the calculator 48 when the cycle signal Cyc @ is input, and outputs this as the motor RMS value MOTER_RMS.

The motor RMS value MOTER_RMS is calculated by the following equation.
[Equation 5]

  Thereby, the RMS value updated at each timing of the cycle signal Cyc @ is output from the retainer 49 as the motor RMS value MOTER_RMS.

〔simulation result〕
Next, simulation results by the computer will be described. FIG. 10 is a diagram showing a simulation result when the overload rate η = 150% and the overload time TOL = 60 sec. FIG. 11 is a diagram showing simulation results when the overload rate η = 200% and the overload time TOL = 3 sec. FIG. 12 is a diagram showing a simulation result when the overload rate η = 300% and the overload time TOL = 1 sec. The horizontal axis indicates time.

As shown in FIG. 10, the current corresponding to the overload factor η = 150% is assumed to be i ₁ = 150%. Then, the motor RMS value MOTER_RMS = 150%. Further, 60 seconds after the overload detection signal OL @ is reset, the RMS squared value rms ² = 1.0 after the addition, the overload is detected, and the overload detection signal OL @ is output. The time 60 seconds during which the overload detection signal OL @ is output corresponds to the overload time TOL = 60 seconds.

As shown in FIG. 11, the current corresponding to the overload factor η = 200% is set to i ₁ = 200%. Then, the motor RMS value MOTER_RMS = 200%. Further, 3 seconds after the overload detection signal OL @ is reset, the RMS squared value rms ² = 1.0 after the addition, the overload is detected, and the overload detection signal OL @ is output. The time 3 seconds during which the overload detection signal OL @ is output corresponds to the overload time TOL = 3 seconds.

As shown in FIG. 12, if the current corresponding to the overload factor η = 300% is i ₁ = 300%, the motor RMS value MOTER_RMS = 300%. In addition, one second after the overload detection signal OL @ is reset, the squared RMS value rms ² after addition is 1.0, the overload is detected, and the overload detection signal OL @ is output. The time 1 sec when the overload detection signal OL @ is output corresponds to the overload time TOL = 1 sec.

As described above, according to the motor control device 1 according to the embodiment of the present invention, the current switching unit 20 includes the d-axis current command id * and the q-axis current command iq *, or the d-axis current FBid and the q-axis current FBiq. Are squared and added to obtain a square current i ₁ ² . The duty cycle calculating means 21 calculates the duty cycle time Tduty (η ² × TOL) and the cycle time Tcyc (Tduty / 2) from the preset overload rate η and overload time TOL. The cycle signal generation means 22 generates a cycle signal Cyc @ indicating the timing for each cycle time Tcyc.

The integrator 43 of the overload detection means 23 integrates the result of dividing the square current i ₁ ² by the duty cycle time Tduty, obtains the integral value as the square value of the RMS of the current, and inputs the cycle signal Cyc @ To reset the integral value. The previous value holder 44 holds the previous value of the square of RMS and updates it at the input timing of the cycle signal Cyc @.

The comparator 46 compares the RMS square value rms ² after the addition of the RMS squared value with the RMS squared previous value and a preset constant 1.0, and the when square value rms ² of RMS exceeds the constant 1.0, the AC motor 3 outputs an over load state determines that the overload detection signal OL @.

  Thereby, the timing of the overload detection signal OL @ output by the comparator 46 corresponds to the preset overload time TOL. Therefore, it is possible to detect the overload of the AC motor 3 with high accuracy at the preset overload rate η and overload time TOL. As a result, the overload of the AC motor can be appropriately prevented and the inverter element can be prevented. Can be protected.

  The present invention has been described with reference to the embodiment. However, the present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the technical idea thereof. For example, the duty cycle calculation means 21 of the overload detection unit 10 multiplies the duty cycle time Tduty by 1/2 to obtain the cycle time Tcyc. On the other hand, the duty cycle calculating means 21 multiplies the duty cycle time Tduty by a predetermined value (a positive real number smaller than 1), and is a time shorter than the duty cycle time Tduty and longer than the overload time TOL. The time may be obtained as the cycle time Tcyc.

  As the AC motor 3 shown in FIG. 1, for example, an induction motor (IM), a synchronous reluctance motor (SynRM), an IPM synchronous motor (IPMSM), or the like is used.

DESCRIPTION OF SYMBOLS 1 Motor control apparatus 2 Power amplifier 3 AC motor 10 Overload detection part 11, 12 Subtractor 13, 14 Current control part 15, 16 Coordinate conversion part 20 Current switching means 21 Duty cycle calculation means 22, 22 'Cycle signal generation means 23 Overload detection means 30, 31, 32, 33, 37, 38 Multipliers 34, 35, 45 Adder 36 Switch 39, 39 ', 43 Integrator 40, 46 Comparator 41 Clearer 42, 47, 48 Calculator 44 Previous value holder 49 Cage id * d-axis current command iq * q-axis current command vd * d-axis voltage command vq * q-axis voltage command Vu * U-phase AC voltage command Vv * V-phase AC voltage command Vw * W-phase AC Voltage command iu U-phase AC current FB (feedback)
iv V-phase AC current FB (feedback)
iw W-phase AC current FB (feedback)
id d-axis current FB (feedback)
iq q-axis current FB (feedback)
η Overload rate TOL Overload time
OL @ Overload detection signal Tduty Duty cycle time Tcyc Cycle time
Cyc @ 2 of the cycle signal rms ² RMS after the addition squared value
MOTER_RMS Motor RMS value

Claims (3)

A voltage command is generated so that the deviation between the d-axis current command and the d-axis current feedback becomes zero, and the deviation between the q-axis current command and the q-axis current feedback becomes zero, and the voltage command In the motor control device for controlling an AC motor based on the above and detecting an overload of the AC motor,
Each of the d-axis current command and the q-axis current command is squared and added to obtain a square current command, and each of the d-axis current feedback and the q-axis current feedback is squared and added, A current switching means for obtaining a square current feedback, switching to one of the square current command and the square current feedback based on a preset switching signal, and outputting as a square current;
Duty cycle calculating means for calculating a duty cycle time based on a preset overload rate and overload time;
The square current output by the current switching means is divided by the duty cycle time calculated by the duty cycle calculating means, and the result of the division is integrated to obtain the RMS (Root Mean Square) of the current. Overload detection means for obtaining a square value and detecting an overload of the AC motor based on a square value of the RMS of the current;
A motor control device comprising: The motor control device according to claim 1,
Furthermore, a cycle signal generating means is provided,
The duty cycle calculating means includes:
The duty cycle time is obtained by squaring the preset overload rate and multiplying the squared result by the preset overload time, and further, a time shorter than the duty cycle time is obtained. As a cycle time,
The cycle signal generating means includes
A pulse signal in units of the cycle time obtained by the duty cycle calculating means is generated as a cycle signal,
The overload detection means includes
An arithmetic unit for dividing the square current output by the current switching unit by the duty cycle time obtained by the duty cycle computing unit to obtain a division result;
The division result obtained by the computing unit is integrated to obtain the RMS square value of the current, the cycle signal generated by the cycle signal generation means is input, and the current at the timing of the cycle signal is input. An integrator for resetting the RMS squared of
A motor control device comprising: The motor control device according to claim 2,
The overload detection means includes
further,
The previous value holder for inputting the cycle signal generated by the cycle signal generation means and holding the RMS value of the current obtained by the integrator as the previous value at the timing of the cycle signal. When,
An adder for adding the previous value held by the previous value holder to the square value of the RMS of the current obtained by the integrator, and obtaining an RMS square value after the addition;
The RMS value after addition obtained by the adder is compared with a preset constant, and when the RMS value after addition exceeds the preset constant, A comparator for detecting an overload of the AC motor;
A motor control device comprising:

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