JP2018000638A - Game machine - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a game machine which allows a player to play a game with peace of mind.SOLUTION: A game machine comprises: a main board display section 34 which is provided at a position where a player cannot visually recognize and displays an accessory ratio and continuous accessory ratio; a display device 13 for displaying a cumulative payout number of a regular winning hole from power supply; and a main control circuit 70 for managing the cumulative payout number being a total of each winning ball. In the main board display section 34, display in the main board display section 34 is performed in a first mode when it is determined that the cumulative winning ball number is less than a reference winning ball number, display in the main board display section 34 is performed in a second mode when it is determined that the accessory ratio and continuous accessory ratio exceed the reference ratios, and the cumulative payout number calculated for each game state is displayed when the cumulative payout number of the regular winning hole from power supply is displayed in the display device 13.SELECTED DRAWING: Figure 76

Description

  The present invention relates to a gaming machine such as a pachinko gaming machine or a pachislot gaming machine.

  Conventionally, a gaming machine such as a pachinko gaming machine or a pachislot gaming machine is known. In such a gaming machine, when a predetermined start condition is established and a prize is won, a value medium such as a game ball is paid out based on preset payout information (see Patent Document 1).

Japanese Patent Laying-Open No. 2015-142840

  However, for example, when playing a game machine installed in a game hall, it is difficult to grasp whether the value medium actually paid out is based on preset payout information. There was a problem that could not be done.

  The present invention has been made in view of the above-described problems, and an object thereof is to provide a gaming machine that allows a player to play a game with peace of mind.

  The gaming machine according to the present invention is provided at a position where the player cannot visually recognize, a first display means for displaying first information which is information on an accessory ratio and a continuous accessory ratio, and a normal winning opening from power-on. In the first display means, there is provided a second display means for displaying the second information that is the cumulative payout number, and a cumulative prize ball number management means for managing the cumulative payout number that is the sum of the prize balls. When it is determined that the cumulative number of winning balls is less than the reference number of winning balls, the display on the first display means is displayed in the first mode, and it is determined that the first information exceeds the reference ratio. Display the second information calculated for each gaming state when displaying the display on the first display means in the second mode and displaying the second information on the second display means. It is.

  Further, the gaming machine according to the present invention is provided at a position where the player cannot visually recognize, and is provided with a first display means (for example, provided on the main control board) for displaying first information which is information on the ratio of consecutive items and the ratio of consecutive items. 1 display area among the 7 segment LEDs provided) and the third display means (for example, the other display area of the 7 segment LEDs provided on the main control board) and the cumulative payout number of the normal winning opening from power-on Second display means for displaying the second information (for example, a liquid crystal display device on which various images for presentation are displayed), and cumulative prize ball number management means for managing the cumulative payout number that is the total of each prize ball. When the cumulative number of winning balls is determined to be less than the reference number of winning balls, the display on the first display means is displayed in a first mode, and the first information is used as a reference. The third display means when it is determined that the ratio has been exceeded A display definitive displayed in the second embodiment, when displaying the second information in the second display means, and displays the second information calculated for each gaming state.

  In addition, the gaming machine according to the present invention is provided at a position where the player cannot visually recognize, a first display means for displaying first information which is information on an accessory ratio and a continuous accessory ratio, and a small role from power-on. A second display means for displaying second information that is the cumulative number of payouts, and a cumulative prize ball number management means for managing the cumulative number of payouts that is the sum of the prize balls. When it is determined that the cumulative number of winning balls is less than the reference number of winning balls, the display on the first display means is displayed in the first mode, and it is determined that the first information exceeds the reference ratio. When displayed, the display on the first display means is displayed in the second mode, and when the second information is displayed on the second display means, the second information calculated for each gaming state is displayed. Is.

  Further, the gaming machine according to the present invention is provided at a position where the player cannot visually recognize, and is provided with a first display means (for example, provided on the main control board) for displaying first information which is information on the ratio of consecutive items and the ratio of consecutive items. One display area among the seven segment LEDs) and the third display means (for example, the other display area among the seven segment LEDs provided on the main control board), and the cumulative payout number of the small part from the power-on Second display means for displaying certain second information (for example, a liquid crystal display device on which various images for presentation are displayed), cumulative prize ball number management means for managing the cumulative number of payouts that is the total of each prize ball, When the cumulative number of prize balls is determined to be less than the standard number of prize balls, the display on the first display means is displayed in the first mode, and the ratio based on the first information is In the third display means when it is determined that A display to display in a second aspect, when displaying the second information in the second display means, and displays the second information calculated for each gaming state.

  ADVANTAGE OF THE INVENTION According to this invention, the game machine which a player can play a game in comfort can be provided.

It is a figure which shows the functional flow of the pachinko game machine which concerns on one Embodiment of this invention. 1 is an external perspective view of a pachinko gaming machine according to an embodiment of the present invention. 1 is an exploded perspective view of a pachinko gaming machine according to an embodiment of the present invention. It is a front view which shows the structure of the game board of the pachinko game machine which concerns on one Embodiment of this invention. 1 is a schematic back view of a pachinko gaming machine according to an embodiment of the present invention. (A) It is a front view which shows the structure of the main board | substrate unit which concerns on one Embodiment of this invention. (B) It is front sectional drawing of the main board | substrate unit which concerns on one Embodiment of this invention. 1 is a block diagram showing a circuit configuration of a pachinko gaming machine according to an embodiment of the present invention. It is a figure which shows the storage area for totalization processing of main RAM of the pachinko game machine which concerns on one Embodiment of this invention. It is a block diagram which shows the internal structure of the sub control circuit of the pachinko game machine which concerns on one Embodiment of this invention. It is a block diagram which shows the internal structure of the audio | voice / LED control circuit of the pachinko game machine which concerns on one Embodiment of this invention. 1 is a schematic connection configuration diagram between a built-in relay board and a speaker of a pachinko gaming machine according to an embodiment of the present invention. It is a block diagram which shows the internal structure of the display control circuit of the pachinko game machine which concerns on one Embodiment of this invention. 1 is an external perspective view of a pachislot gaming machine according to an embodiment of the present invention. It is a figure which shows the internal structure of the pachislot machine which concerns on one Embodiment of this invention, and is a perspective view of the state which closed the middle door. It is a figure which shows the internal structure of the pachislot machine which concerns on one Embodiment of this invention, and is a perspective view of the state which opened the middle door. (A) It is a front view which shows the structure of the main board | substrate unit which concerns on one Embodiment of this invention. (B) It is front sectional drawing of the main board | substrate unit which concerns on one Embodiment of this invention. It is a block diagram which shows the structure of the main control circuit of the pachislot gaming machine which concerns on one Embodiment of this invention. It is a figure which shows the memory area for search processes of main RAM of the pachislot machine which concerns on one Embodiment of this invention. It is a block diagram which shows the structure of the sub-control circuit of the pachislot game machine which concerns on one Embodiment of this invention. It is a figure which shows an example of the big hit random number determination table (at the time of the 1st start opening winning a prize) in the pachinko gaming machine concerning one embodiment of the present invention. It is a figure which shows an example of the big hit random number determination table (at the time of a 2nd starting opening prize) in the pachinko game machine concerning one embodiment of the present invention. It is a figure which shows an example of the symbol determination table (at the time of a 1st starting opening winning) in the pachinko game machine which concerns on one Embodiment of this invention. It is a figure which shows an example of the symbol determination table (at the time of a 2nd start opening winning) in the pachinko game machine which concerns on one Embodiment of this invention. It is a figure which shows an example of the jackpot kind determination table (the 1) in the pachinko game machine which concerns on one Embodiment of this invention. It is a figure which shows an example of the jackpot kind determination table (the 2) in the pachinko game machine which concerns on one Embodiment of this invention. It is a figure which shows an example of the jackpot kind determination table (the 3) in the pachinko game machine which concerns on one Embodiment of this invention. It is a figure which shows an example of the jackpot kind determination table (the 4) in the pachinko game machine which concerns on one Embodiment of this invention. It is a figure which shows an example of the prize information effect information determination table in the pachinko gaming machine according to one embodiment of the present invention. It is a figure which shows an example of the variation production pattern determination table in the pachinko game machine which concerns on one Embodiment of this invention. It is a figure which shows an example of the fluctuation production table in the pachinko game machine which concerns on one Embodiment of this invention. It is a figure which shows an example of the holding | maintenance effect table in the pachinko game machine which concerns on one Embodiment of this invention. It is a figure which shows an example of the prefetch effect table in the pachinko game machine which concerns on one Embodiment of this invention. It is a schematic block diagram of the command data in the pachinko gaming machine according to one embodiment of the present invention. It is a figure which shows the content of the information contained in the structure of the demonstration display command in the pachinko gaming machine which concerns on one Embodiment of this invention, and a demonstration display command. It is a figure which shows the content of the information contained in the structure of the special symbol effect start command and the special symbol effect start command in the pachinko gaming machine which concerns on one Embodiment of this invention. It is a figure which shows the content of the information contained in the structure of the 1st power failure reset command in the pachinko gaming machine which concerns on one Embodiment of this invention, and a 1st power failure reset command. It is a figure which shows the content of the information contained in the structure of the 2nd power failure reset command in the pachinko gaming machine which concerns on one Embodiment of this invention, and a 2nd power failure reset command. It is a figure which shows the content of the information contained in the structure of the pending | holding addition command in the pachinko gaming machine which concerns on one Embodiment of this invention, and a pending | holding addition command. In the pachinko gaming machine according to one embodiment of the present invention, it is a diagram for explaining the outline of the main-sub command control processing executed by the host control circuit (sub control circuit). It is a schematic block diagram of the ring buffer provided in the host control circuit in the pachinko gaming machine according to one embodiment of the present invention. It is a figure for demonstrating the outline | summary of the production | generation operation | movement of the various requests in the pachinko game machine which concerns on one Embodiment of this invention. It is a signal flow figure at the time of speaker drive in the pachinko game machine concerning one embodiment of the present invention. It is a figure for demonstrating the outline | summary of the audio | voice reproduction | regeneration operation | movement in the pachinko gaming machine which concerns on one Embodiment of this invention. It is a schematic block diagram of the access data used by the audio | voice reproduction | regeneration operation | movement in the pachinko game machine which concerns on one Embodiment of this invention. It is a figure for demonstrating the outline | summary of the lamp | ramp (LED) lighting operation | movement in the pachinko game machine which concerns on one Embodiment of this invention. FIG. 3 is a schematic connection configuration diagram among a voice / LED control circuit, an LED driver, and LEDs in a pachinko gaming machine according to an embodiment of the present invention. It is a SPI connection block diagram between the voice / LED control circuit and the LED driver in the pachinko gaming machine according to one embodiment of the present invention. In the pachinko game machine which concerns on one Embodiment of this invention, it is a schematic block diagram of the serial data transmitted to a LED driver from a voice and LED control circuit. It is a schematic block diagram of the LED driver in the pachinko game machine which concerns on one Embodiment of this invention. It is a figure for demonstrating the data input operation | movement of the LED driver in the pachinko game machine which concerns on one Embodiment of this invention. It is a figure for demonstrating the address setting operation | movement of the LED driver in the pachinko game machine which concerns on one Embodiment of this invention. In the pachinko gaming machine according to one embodiment of the present invention, it is a diagram showing a correspondence relationship between each SPI channel (physical system) and the device address and output terminal of the LED driver connected thereto. It is a figure which shows the format (data type) of LED data in the pachinko game machine which concerns on one Embodiment of this invention. It is a figure which shows the output control example of LED data in the pachinko game machine which concerns on one Embodiment of this invention. 7 is a flowchart illustrating an example of main control main processing executed by a main CPU in a pachinko gaming machine according to an embodiment of the present invention. It is a flowchart which shows an example of the special symbol control process in the pachinko game machine which concerns on one Embodiment of this invention. It is a flowchart which shows an example of the special symbol memory | storage check process in the pachinko game machine which concerns on one Embodiment of this invention. It is a flowchart which shows an example of the special symbol display time management process in the pachinko game machine which concerns on one Embodiment of this invention. It is a flowchart which shows an example of the jackpot end interval process in the pachinko gaming machine according to an embodiment of the present invention. It is a flowchart which shows an example of the normal symbol control process in the pachinko game machine which concerns on one Embodiment of this invention. In the pachinko gaming machine according to one embodiment of the present invention, it is a flowchart showing an example of a power-on process executed by the main CPU. 7 is a flowchart showing an example of a system timer interrupt process executed by a main CPU in a pachinko gaming machine according to an embodiment of the present invention. It is a flowchart which shows an example of the switch input detection process in the pachinko game machine which concerns on one Embodiment of this invention. It is a flowchart which shows an example of the starting opening passage detection process in the pachinko game machine which concerns on one Embodiment of this invention. It is a flowchart which shows a continuation of an example of the starting port passage detection process in the pachinko gaming machine according to one embodiment of the present invention. It is a flowchart which shows an example of a general winning opening passing detection process in the pachinko gaming machine according to an embodiment of the present invention. It is a flowchart which shows an example of the big winning opening passing detection process which concerns on 1st embodiment in the pachinko game machine which concerns on one Embodiment of this invention. It is a flowchart which shows an example of the big winning opening passing detection process which concerns on 2nd embodiment in the pachinko game machine which concerns on one Embodiment of this invention. It is a flowchart which shows an example of the total process which concerns on 1st embodiment in the pachinko game machine which concerns on one Embodiment of this invention. It is a flowchart which shows the continuation of an example of the total process which concerns on 1st embodiment in the pachinko game machine which concerns on one Embodiment of this invention. It is a flowchart which shows an example of the total process which concerns on 2nd embodiment in the pachinko game machine which concerns on one Embodiment of this invention. It is a flowchart which shows the continuation of an example of the total process which concerns on 2nd embodiment in the pachinko game machine which concerns on one Embodiment of this invention. It is a flow chart which shows an example of display processing for gambling nature concerning a first embodiment in a pachinko game machine concerning one embodiment of the present invention. It is a flowchart which shows an example of the display process for gambling which concerns on 2nd embodiment in the pachinko game machine which concerns on one Embodiment of this invention. It is a flowchart which shows an example of the display process for gambling nature which concerns on 3rd embodiment in the pachinko game machine which concerns on one Embodiment of this invention. It is a flowchart which shows an example of the display process for gambling nature which concerns on 4th embodiment in the pachinko game machine which concerns on one Embodiment of this invention. (A) It is a figure which shows the display content of the main board | substrate display part in the pachinko game machine which concerns on one Embodiment of this invention. (B) It is a figure which shows the display content of the main board | substrate display part in the pachislot machine which concerns on one Embodiment of this invention. 5 is a flowchart illustrating an example of main control main processing executed by the main CPU in the pachislot machine according to the embodiment of the present invention. It is a flowchart which shows an example of the main control main process in the pachislot game machine which concerns on one Embodiment of this invention. It is a flowchart which shows an example of the interruption process in the pachislot game machine which concerns on one Embodiment of this invention. It is a flowchart which shows an example of the communication data transmission process in the pachislot game machine which concerns on one Embodiment of this invention. It is a flowchart which shows an example of the winning search process which concerns on 1st embodiment in the pachislot machine which concerns on one Embodiment of this invention. It is a flowchart which shows the continuation of an example of the prize search process which concerns on 1st embodiment in the pachislot machine based on one Embodiment of this invention. It is a flowchart which shows the continuation of an example of the prize search process which concerns on 1st embodiment in the pachislot machine based on one Embodiment of this invention. It is a flowchart which shows an example of the winning search process which concerns on 2nd embodiment in the pachislot machine based on one Embodiment of this invention. It is a flowchart which shows an example of the display process for gambling according to the first embodiment in the pachislot machine according to one embodiment of the present invention. It is a flowchart which shows an example of the display process for gambling according to 2nd embodiment in the pachislot machine which concerns on one Embodiment of this invention. It is a flow chart which shows an example of display processing for gambling nature concerning a third embodiment in a pachislot machine concerning one embodiment of the present invention. It is a flow chart which shows an example of display processing for gambling nature concerning a 4th embodiment in a pachislot machine concerning one embodiment of the present invention. 7 is a flowchart illustrating an example of a sub control main process executed by a host control circuit (sub control circuit) in the pachinko gaming machine according to the embodiment of the present invention. It is a figure for demonstrating the outline | summary of the process at the time of the operation input performed by the host control circuit (sub control circuit) in the pachinko game machine which concerns on one Embodiment of this invention. It is a flowchart which shows an example of the operation input timer interruption process in the pachinko game machine which concerns on one Embodiment of this invention. It is a flowchart which shows an example of the operation input information acquisition process in the pachinko game machine which concerns on one Embodiment of this invention. It is a flowchart which shows an example of the command reception process (reception interruption) in the pachinko game machine which concerns on one Embodiment of this invention. It is a flowchart which shows an example of the received data storage process in the pachinko game machine which concerns on one Embodiment of this invention. It is a flowchart which shows an example of the command analysis process in the pachinko game machine which concerns on one Embodiment of this invention. It is a flowchart which shows an example of the audio | voice control process in the pachinko game machine which concerns on one Embodiment of this invention. It is a flowchart which shows an example of the lamp control process in the pachinko game machine which concerns on one Embodiment of this invention. In the pachinko gaming machine which concerns on one Embodiment of this invention, it is a flowchart which shows an example of the serial data output process to the LED driver via SPI performed by the audio | voice and LED control circuit.

  Hereinafter, the configuration and various operations of gaming machines (pachinko gaming machine 1 and pachislot gaming machine 501) according to an embodiment of the present invention will be described with reference to the drawings.

<Function flow>
First, the function of the pachinko gaming machine according to the present embodiment will be described with reference to FIG. FIG. 1 is a diagram showing a functional flow of the pachinko gaming machine according to the present embodiment.

  As shown in FIG. 1, a pachinko game is a game in which a game ball is fired by a user's operation and a game ball payout control process is performed when the game ball has won various prizes. The pachinko game includes a special symbol game using a special symbol and a normal symbol game using a normal symbol. When it is a “hit” in a special symbol game or a “hit” in a normal symbol game, the probability that a game ball will win is relatively increased, and the game ball payout control process is more likely to be performed. Become.

  In addition, for various winnings, there is a special symbol start winning, which is one condition for the variable symbol display in the special symbol game, and a single condition for the variable symbol normal symbol display in the normal symbol game. Some regular symbol starting prizes are also included.

  In this specification, “variable display” is a concept that can be displayed in a variable manner. For example, “variable display” that is actually changed and “stop display” that is actually stopped and displayed. Is possible. Further, in the “variable display”, for example, “derivation display” in which a special symbol (identification information) is displayed as a result of the special symbol game can be performed. In other words, in this specification, the operation from the start of “variable display” to “derivative display” is referred to as one “variable display”. Furthermore, in this specification, “identification information” means “designs” used in pachinko games such as special symbols, ordinary symbols, decorative symbols, identification symbols, etc., and identification symbols or ornaments used in pachislot or slot games. This means that it can include symbols used to display or suggest the results of a game when a player plays a game, such as symbols, and various symbols in the embodiments and various modifications described below are also included. May be included.

  Hereinafter, the outline of the processing flow of the special symbol game and the normal symbol game will be described.

(1) Special symbol game When there is a special symbol start winning in a special symbol game, random numbers (random number for jackpot determination and random number for symbol determination) are extracted from the jackpot determination counter and the symbol determination counter, respectively. Each extracted random number value is stored (see the flow of the special symbol start winning process in the special symbol game shown in FIG. 1).

  As shown in FIG. 1, in the special symbol control process during the special symbol game, first, it is determined whether or not a condition for starting variable display of the special symbol is satisfied. In this determination process, it is referred to whether or not a random number value is stored by a special symbol start winning, and the condition for starting the variable symbol variable display is established with one condition that the random number value is stored. judge.

  Next, when the variable symbol special display is started, the jackpot determination random number extracted from the jackpot determination counter is referred to and a jackpot determination is made as to whether or not the jackpot determination is made. Thereafter, stop symbol determination processing is performed. In this process, the special symbol to be stopped and displayed is determined by referring to the random number value for symbol determination extracted from the counter for symbol determination and the result of the jackpot determination described above.

  Next, a variation pattern determination process is performed. In this process, a random number value is extracted from the variation pattern determining counter, and the variation pattern of the special symbol is determined by referring to the random value, the result of the jackpot determination described above, and the special symbol to be stopped and displayed.

  Next, effect pattern determination processing is performed. In this process, a random number value is extracted from the effect pattern determination counter, and the random number value, the result of the jackpot determination described above, the special symbol for the stop display described above, and the variation pattern of the special symbol described above are referred to. An effect pattern to be executed in accordance with the variable display of the special symbol is determined.

  Then, as a result of the determined jackpot determination, the special display to be stopped, the special pattern variation pattern, and the effect pattern associated with the special symbol variable display are referred to, and the variable display control processing for controlling the special symbol variable display And the effect control process which performs a predetermined effect is performed.

  Then, when the variable display control process and the effect display control process are finished, it is determined whether or not “big hit” is reached. In this determination process, if it is determined that a “hit” is reached, a big hit game control process for performing a big hit game is executed. In the jackpot game, the possibility of various winnings described above increases. On the other hand, if it is determined that the “big hit” has not been reached, the big hit game control process is not executed.

  When it is determined that the game is not “big hit”, or when the big hit game control process is completed, a game state transition control process for shifting the game state is performed. In this gaming state transition control process, management of the gaming state in a normal time different from the big hit gaming state is performed. As a normal gaming state, for example, in the jackpot determination described above, a gaming state in which the probability of being determined as a “big hit” (hereinafter referred to as “probability changing gaming state”) or a special symbol start winning is likely to be obtained. A gaming state (hereinafter referred to as a “short-time gaming state”). Thereafter, the process for determining whether or not to start variable symbol special display is performed again, and thereafter, the various types of special symbol control processing described above are repeated.

  In the pachinko gaming machine 1 according to the present embodiment, when a game ball wins a start during the special symbol variation display, various data (a big hit determination random number value, a symbol determination random number value) acquired at the start win Etc.) is suspended. In other words, if a game ball wins a start during a special symbol variation display, the special symbol variable display (variation display) corresponding to the start winning is suspended, and after the currently executed special symbol variation display ends. The variable display of the special symbol that is put on hold is started. Hereinafter, the variable display of the special symbol that is on hold is also referred to as “holding ball”.

  In addition, in the pachinko gaming machine 1 of the present embodiment, as will be described later, two types of special symbol start prizes (first start opening prize and second start opening prize) are provided, and up to 4 for each special symbol start prize. Pieces of holding balls can be acquired. That is, in the present embodiment, a maximum of eight reserved balls can be acquired.

  Furthermore, although not shown in FIG. 1, the pachinko gaming machine 1 according to the present embodiment determines whether or not the holding ball is won (whether or not “big hit” is won) based on the above-described information on the holding ball, and further, the determination result A function for performing a predetermined effect based on the above, that is, a pre-reading effect function is also provided.

(2) Normal symbol game When there is a normal symbol start winning in the normal symbol game, a random number value is extracted from the counter for hit determination and the random number value is stored (the normal symbol game in the normal symbol game shown in FIG. 1). (Refer to the flow of the symbol start winning process).

  As shown in FIG. 1, in the normal symbol control process during the normal symbol game, it is first determined whether or not a condition for starting variable display of the normal symbol is satisfied. In this determination process, it is referred to whether or not the random number value is stored by the normal symbol start winning, and the condition for starting the variable symbol variable display is satisfied, with one condition that the random number value is stored. judge.

  Next, when starting normal symbol variable display, the random number value extracted from the counter for hit determination is referred to and a hit determination is made as to whether or not “win” is set. Thereafter, variation pattern determination processing is performed. In this process, the result of the hit determination is referred to, and the variation pattern of the normal symbol is determined.

  Next, referring to the determined hit determination result and the variation pattern of the normal symbol, a variable display control process for controlling variable display of the normal symbol and an effect control process for performing a predetermined effect are executed.

  When the variable display control process and the effect control process are finished, it is determined whether or not “winning” is achieved. In this determination process, when it is determined that “winning” is achieved, a winning game control process for performing a winning game is executed. In the winning game control process, the possibility of various winnings as described above, in particular, the possibility of special symbol start winning of a game ball in a special symbol game increases. On the other hand, if it is determined not to be “winning”, the winning game control process is not executed. Thereafter, the process for determining whether or not to start the variable display of the normal symbol is performed again, and thereafter, the various processes of the normal symbol control process described above are repeated.

  As described above, in the pachinko game, the payout control of the game ball depends on the conditions such as whether or not the game is a “hit” in the special symbol game, the transition state of the game state, and whether or not the game is the “hit” in the normal symbol game. The ease of processing changes.

  In this embodiment, as a random number extraction method, a soft random number method for generating random values by executing a program is used. However, the present invention is not limited to this. For example, when the pachinko gaming machine 1 is provided with a random number generator whose random number is updated at a predetermined cycle, the random number generator may be disturbed by a counter (so-called ring counter). You may employ | adopt the hard random number system which extracts a numerical value as an extraction system of the various random value mentioned above. When the hard random number method is used, it is possible to prevent the same random number value from being extracted in a predetermined period by determining the initial value of the random number value at a timing different from the predetermined period.

<Structure of pachinko machine>
Next, the structure of the pachinko gaming machine according to the present embodiment will be described with reference to FIGS. FIG. 2 is a perspective view showing the appearance of the pachinko gaming machine. FIG. 3 is an exploded perspective view of the pachinko gaming machine.

  As shown in FIGS. 2 and 3, the pachinko gaming machine 1 includes a main body 2, a base door 3 that can be opened and closed with respect to the main body 2, and a glass door that can be opened and closed with respect to the base door 3. 4.

[Main unit]
The main body 2 is composed of a frame-shaped member having a rectangular opening 2a (see FIG. 3). The main body 2 is formed of a material such as wood.

[Base door]
The base door 3 is configured by a plate-like member having a rectangular outer shape that is substantially equal to the outer shape of the main body 2. The base door 3 is disposed in front of the main body 2 (the front side of the pachinko gaming machine 1), and by rotating the base door 3 around one side edge of the main body 2, the base door 3 The opening 2a is opened and closed. As shown in FIG. 3, the base door 3 is provided with a rectangular opening 3 a. The opening 3a is formed from the substantially central portion of the base door 3 to the upper region, and has a size that occupies most of the region.

  Further, the base door 3 includes a speaker 11 (sound generation means), a game board 12, a display device 13 (production means, display means), a dish unit 14, a launching device 15, and a payout / launching unit 16a. The substrate unit 17 is attached.

  The speaker 11 is disposed on the upper part (near the upper end) of the base door 3. The game board 12 is disposed in front of the base door 3 (the front side of the pachinko gaming machine 1) and is disposed so as to cover the opening 3a of the base door 3.

  The game board 12 is composed of a plate-shaped resin member having light permeability. In addition, as resin which has a light transmittance, an acrylic resin, a polycarbonate resin, a methacryl resin etc. can be used, for example.

  In addition, a game area 12a in which a game ball fired from the launching device 15 rolls is formed on the front surface of the game board 12 (the surface on the front side of the pachinko gaming machine 1). The game area 12a is an area surrounded by a guide rail 41 (specifically, an outer rail 41a shown in FIG. 4 to be described later), and its outer peripheral shape is substantially circular. Further, a plurality of game nails (see FIG. 4 described later) are driven into the game area 12a. The configuration of the game board 12 (game area 12a) will be described in detail later with reference to FIG.

  The display device 13 is attached to the back side of the game board 12 (the side opposite to the front side of the pachinko gaming machine 1). The display device 13 has a display area 13a for displaying an image. The size of the display area 13a is set so as to occupy the whole or a part of the surface of the game board 12. In the display area 13 a of the display device 13, various images such as an effect identification symbol, an effect image, and a decoration image (decoration symbol) are displayed. The player can visually recognize various images displayed on the display area 13 a of the display device 13 via the game board 12.

  In the present embodiment, a liquid crystal display device is used as the display device 13. However, the present invention is not limited to this, and display devices such as a plasma display, a rear projection display, and a CRT (Cathode Ray Tube) display may be applied as the display device 13.

  A spacer 19 is provided on the back side of the game board 12 (the side opposite to the front side of the pachinko gaming machine 1). The spacer 19 is provided between the back surface of the game board 12 (surface on the back side of the pachinko gaming machine 1) and the front surface of the display device 13 (surface on the front side of the pachinko gaming machine 1). A space serving as a flow path for the game ball rolling in the region 12a is formed. The spacer 19 is made of a light transmissive material. Note that the present invention is not limited to this, and for example, the spacer 19 may be partially formed of a light-transmitting material or may be formed of a non-light-transmitting material. .

  The dish unit 14 is disposed below the game board 12. The dish unit 14 includes an upper dish 21 and a lower dish 22 disposed below the upper dish 21. As shown in FIG. 2, the upper plate 21 and the lower plate 22 are respectively formed with a payout port 21a and a payout port 22a for lending out game balls and paying out game balls (prize balls). When a predetermined payout condition is satisfied, the game balls are discharged from the payout opening 21a and the payout opening 22a and stored in the upper plate 21 and the lower plate 22, respectively. Further, the game balls stored in the upper plate 21 are launched into the game area 12 a by the launching device 15.

  The plate unit 14 is provided with an effect button 23. The effect button 23 is attached on the upper plate 21. A dial operation unit (jog dial) 24 is attached to the periphery of the effect button 23 so as to be rotatable with respect to the effect button 23. The pachinko gaming machine 1 of the present embodiment has a predetermined effect function performed using the effect button 23 and / or the dial operation unit 24, and when performing a predetermined effect, the display area 13 a of the display device 13 An image prompting the operation of the effect button 23 and / or the dial operation unit 24 is displayed.

  The launcher 15 is disposed in the lower right region (near the lower right corner) on the front surface of the base door 3. The launching device 15 includes a launching handle 25 that can be operated by a player, and a panel body 26 that engages with the lower right portion of the dish unit 14. The firing handle 25 is disposed on the front side of the panel body 26 and is rotatably supported by the panel body 26.

  Although not shown in FIGS. 2 and 3, a solenoid actuator (driving device) for controlling the launching operation of the game ball is provided on the back side of the panel body 26. Although not shown in FIGS. 2 and 3, a touch sensor is provided at the peripheral portion of the firing handle 25, and a firing volume is provided inside the firing handle 25. The firing volume changes the resistance value according to the amount of rotation of the firing handle 25, and changes the power supplied to the solenoid actuator.

  In the pachinko gaming machine 1 according to the present embodiment, when the player's hand contacts the touch sensor of the launch handle 25, the touch sensor outputs a detection signal. Thereby, it is detected that the player has gripped the launch handle 25, and the game ball can be launched by the solenoid actuator. When the player holds the firing handle 25 and rotates it clockwise (when viewed from the player side), the resistance of the firing volume changes according to the turning angle of the firing handle 25. The electric power corresponding to the resistance value is supplied to the solenoid actuator. As a result, the game balls stored in the upper plate 21 are sequentially fired, and the fired game balls are guided to the guide rail 41 (see FIG. 4 described later) and released to the game area 12a of the game board 12.

  Although not shown in FIGS. 2 and 3, a firing stop button is provided on the side of the firing handle 25. The launch stop button is a button provided to stop the launch of the game ball by the solenoid actuator. When the player presses the launch stop button, the launch of the game ball is stopped even when the launch handle 25 is gripped and rotated.

  The dispensing / launching unit 16 a and the substrate unit 17 are disposed on the back side of the base door 3. A game ball is supplied from the storage unit 16b to the payout / launch unit 16a. The payout / launch unit 16a pays out a predetermined number of game balls from the game balls supplied from the storage unit 16b to the upper plate 21 or the lower plate 22 based on the establishment of the payout condition. The board unit 17 has various control boards. Various control boards are provided with a main control circuit 70 and a sub-control circuit 200 described later.

[Glass door]
The glass door 4 is composed of a plate-like member having a substantially square surface. The glass door 4 is disposed on the front side of the game board 12 and has a size that covers the game board 12. On the front surface of the glass door 4, a speaker cover 29 is provided in an upper region facing the speaker 11.

  In the central portion of the glass door 4, an opening 4 a having a size that exposes at least the game area 12 a is formed in an area facing the game area 12 a of the game board 12. The opening 4a of the glass door 4 is attached with a protective glass 28 having a light transmission property, thereby closing the opening 4a. Therefore, when the glass door 4 is closed with respect to the base door 3, the protective glass 28 is disposed so as to face at least the game area 12 a of the game board 12.

[Game board]
Next, the configuration of the game board 12 will be described with reference to FIG. FIG. 4 is a front view showing the configuration of the game board 12.

  As shown in FIG. 4, on the front surface of the game board 12, a guide rail 41, a ball passage detector 43, a first start port 44, a second start port 45 (start region), and an ordinary electric accessory 46 Are provided. In addition, on the front surface of the game board 12, there are a plurality of general winning ports 51, 52, a first grand winning port 53 (variable winning device), a second large winning port 54 (variable winning device), and an out port 55. And a game nail 56 are provided. Further, on the front surface of the game board 12, a special symbol display device 61 (special symbol display means), a normal symbol display device 62, and a normal symbol are arranged above the display area 13a of the display device 13 disposed substantially at the center. A hold display device 63, a first special symbol hold display device 64, and a second special symbol hold display device 65 are provided.

  Although not shown in FIG. 4, an effect 7-segment counter is also provided on the front surface of the game board 12. The production 7-segment counter is composed of a display counter capable of displaying two-digit numbers and two alphabetic characters. In addition, in this embodiment, a notification LED (Light Emitting Diode) that is turned on when the result of the special symbol stop display is “big hit”, a round number display LED that shows the number of rounds during the big hit game, and the like are provided. Also good.

[Various components of game area]
The guide rail 41 includes an outer rail 41a extending in an arc shape that partitions the game area 12a, and an inner rail 41b extending in an arc shape disposed on the inner side (inner peripheral side) of the outer rail 41a. Is done. The game area 12a is formed inside the outer rail 41a. The outer rail 41a and the inner rail 41b are disposed so as to face each other in the vicinity of the left end portion of the game area 12a when viewed from the player side, and thereby, between the outer rail 41a and the inner rail 41b, A guide path 41c for guiding the game ball launched by 15 to the upper part of the game area 12a is formed.

  In addition, a ball discharge port 41d is formed at the tip of the inner rail 41b located at the upper left portion of the game area 12a by the tip of the inner rail 41b and a part of the outer rail 41a facing the tip. And the ball | bowl return prevention piece 42 is provided in the front-end | tip part of the inner rail 41b so that the ball | bowl discharge port 41d may be plugged up. The ball return prevention piece 42 prevents the game ball released from the ball discharge port 41d into the game area 12a from passing through the ball discharge port 41d again and entering the guide path 41c.

  The game ball released from the ball discharge port 41d flows down from the upper part of the game area 12a toward the lower part. At this time, the game ball collides with various members provided in the game area 12a such as the plurality of game nails 56, the first start opening 44, the second start opening 45, etc., and changes the traveling direction of the game area 12a. It flows down from the top to the bottom.

  A display area 13a of the display device 13 is provided substantially at the center of the game area 12a. An obstacle 13b is provided at the upper end of the display area 13a. By providing the obstacle 13b, the game ball does not pass over an area overlapping the display area 13a in the game area 12a.

  The ball passage detector 43 is disposed in the vicinity of the right end of the display area 13a when viewed from the player side. The ball passage detector 43 is provided with a later-described passage ball sensor 43 a for detecting a game ball passing through the ball passage detector 43. In addition, when a game ball passes through the ball passage detector 43, a lottery is performed to determine whether or not it is “winning”, and based on the result of the lottery, a normal symbol variation display is started.

  The first start port 44 is disposed below the display area 13 a, and the second start port 45 is disposed below the first start port 44. The 1st starting opening 44 and the 2nd starting opening 45 are comprised by the member which can receive a game ball. Hereinafter, a game ball entering or passing through the first start port 44 or the second start port 45 is referred to as “winning”. In the “winning”, the game ball enters or passes through the first start opening 44 (heso winning), and the game ball enters or passes through the second start opening 45 (electric chew winning). , Is included. Then, when the game ball wins the first start port 44, a predetermined number (three in the present embodiment) of game balls (jaw prize balls) are paid out. When a game ball wins the second start opening 45, a predetermined number (1 in this embodiment) of game balls (electric chew ball) is paid out. In addition, when a game ball enters the first start port 44, a lottery is performed to determine whether the game is “big hit” or “small hit”, and the special symbol changes based on the result of the lottery. Display starts. Furthermore, when a game ball enters the second start opening 45, a lottery for determining whether or not the game is a “big hit” is performed, and based on the result of the lottery, a special symbol variation display is started.

  The first start port 44 is provided with a first start port winning ball sensor 44a described later for detecting a game ball won in the first start port 44. The second starting port 45 is provided with a second starting port winning ball sensor 45a, which will be described later, for detecting a game ball won in the second starting port 45. The game balls that have won the first start port 44 and the second start port 45 pass through a recovery port (not shown) provided in the game board 12 and are conveyed to a game ball recovery unit (not shown). .

  The ordinary electric accessory 46 is provided at the second start opening 45. The ordinary electric accessory 46 includes a pair of blade members rotatably attached to both sides of the second start port 45, and a later-described ordinary electric agent solenoid 46a that drives the pair of blade members. This ordinary electric accessory 46 is driven by an ordinary electric accessory solenoid 46a, and opens the pair of blade members to make it easier to win a game ball in the second start opening 45, and closes the pair of blade members. One state of a closed state in which a game ball cannot be won is generated at the second start opening 45. In the present embodiment, when the ordinary electric accessory 46 is in a closed state, the opening form of the pair of blade members is not a form that makes it impossible to win a prize, but a form that makes it difficult to win a game ball. Also good.

  The general winning opening 51 is arranged near the lower left part of the game area 12a when viewed from the player side. The general winning opening 52 is disposed below the ball passage detector 43, and is disposed near the lower right portion of the game area 12a when viewed from the player side. The general winning opening 51 and the general winning opening 52 are configured by members capable of receiving game balls. Hereinafter, it is also referred to as “winning” that the game ball enters or passes through the general winning opening 51 or the general winning opening 52. When a game ball wins the general winning opening 51 or the general winning opening 52, a predetermined number (10 in this embodiment) of gaming balls (general winning opening winning balls) are paid out.

  The general winning opening 51 is provided with a later-described general winning ball sensor 51 a for detecting a game ball won in the general winning opening 51. The general winning opening 52 is provided with a later-described general winning ball sensor 52 a for detecting a game ball won in the general winning opening 52.

  The first big prize opening 53 and the second big prize opening 54 are arranged below the ball passage detector 43 and between the first start opening 44 and the general prize opening 52. The first grand prize port 53 and the second grand prize port 54 are arranged in the vertical direction along the flow path of the game ball, and the first grand prize port 53 is arranged above the second grand prize port 54. The Both the first grand prize opening 53 and the second big prize opening 54 are so-called attacker-type opening / closing devices, and shutters 53a and 54a that can be opened and closed, and solenoid actuators that drive the shutters (first grand prize opening solenoid described later). 53b and a second grand prize opening solenoid 54b).

  Each of the first big prize opening 53 and the second big prize opening 54 receives a game ball when the corresponding shutter is open (open state), and plays when the shutter is closed (closed state). Do not accept the ball. In the following, it is also referred to as “winning” that a game ball enters or passes through the first big winning opening 53 or the second big winning opening 54. When a game ball wins the first grand prize port 53 or the second big prize port 54, a predetermined number (15 in this embodiment) of game balls (large prize port prize balls) are paid out.

  Thus, in the present embodiment, in the “winning”, the game ball enters or passes through the first start opening 44 (heso winning), and the game ball enters or passes through the second start opening 45. (Electric Chu winning), a game ball entering or passing the general winning opening 51 or the general winning opening 52 (general winning opening winning), and entering the first grand winning opening 53 or the second large winning opening 54 Or passing (a grand prize winning prize). In other words, in the present embodiment, the “prize ball” includes an ellipse ball when the elbow is won, an electric chew ball when the electric chew is won, a general win mouth ball when the general win mouth is won, And a prize winning ball when winning a winning prize is included. In this way, the total number of winning balls, that is, the number of acquired game balls (outtake rate) (hereinafter referred to as “base”) is calculated.

  The first grand prize opening 53 is provided with a count sensor 53c, which will be described later, for counting game balls won in the first big prize opening 53. Further, the second grand prize opening 54 is provided with a count sensor 54c, which will be described later, for counting game balls won in the second big prize opening 54.

  The out port 55 is provided at the lowermost part of the game area 12a. The out port 55 is a game that has not won any of the first starting port 44, the second starting port 45, the general winning port 51, the general winning port 52, the first large winning port 53, and the second large winning port 54. Accept the sphere.

  When the arrangement of various components in the game area 12a of the present embodiment is as shown in FIG. 4, when a game ball is thrown into the area on the right side of the game area 12a by the player (when it is hit right), A game ball is guided to the second starting port 45 by the game nail 56 or the like. In this case, there is almost no possibility of winning the first start opening 44. In this embodiment, as will be described later, the winner of the second start opening 45 is more likely to receive a “hit” lottery that is advantageous to the player than when the first start opening 44 is won. Therefore, in the “short-time gaming state”, which will be described later, where winning at the second starting port 45 is relatively easy, the possibility of winning at the first starting port 44 (disadvantageous to the player) is achieved by making a right turn. The possibility of entering a gaming state) can be reduced.

[Special symbol display device]
As shown in FIG. 4, the special symbol display device 61 is disposed in the approximate center of the upper portion of the display area 13 a of the display device 13.

  The special symbol display device 61 is a display device that variably displays special symbols (variable display and stop display) in a special symbol game. In the present embodiment, as shown in FIG. 4, a special symbol display device 61 is configured by a device that displays special symbols as symbols composed of numbers, symbols, and the like. In addition, this invention is not limited to this, You may comprise the special symbol display apparatus 61 by several LED, for example. In this case, a display pattern configured by turning on / off a plurality of LEDs is represented as a special symbol.

  The special symbol display device 61 performs a variable display of the special symbol (identification information) when the game ball has won the first starting port 44 or the second starting port 45 (special symbol starting winning). Then, the special symbol display device 61 performs the special symbol stop display after performing the variable symbol special symbol display for a predetermined time. Hereinafter, the special symbol that is variably displayed on the special symbol display device 61 when the game ball wins the first start opening 44 is referred to as a first special symbol. The special symbol that is variably displayed on the special symbol display device 61 when the game ball wins the second start opening 45 is referred to as a second special symbol.

  In the special symbol display device 61, when the first special symbol or the second special symbol that is stopped and displayed is in a specific mode (“big hit” mode), the gaming state is advantageous to the player from the normal gaming state. It shifts to the big hit gaming state which is a state. That is, in the special symbol display device 61, it is “big hit” that the first special symbol or the second special symbol is stopped and displayed in a state of shifting to the big hit gaming state.

  In the big hit gaming state, the first big winning port 53 or the second big winning port 54 is opened. Specifically, in the present embodiment, when the game ball wins the first start opening 44 and the first special symbol is stopped and displayed in a specific manner on the special symbol display device 61, the first big winning opening 53 becomes an open state. On the other hand, when the game ball wins the second start opening 45 and the second special symbol is stopped and displayed in a specific manner on the special symbol display device 61, the second big winning port 54 is opened.

  The open state of each big winning opening is maintained until a predetermined number of game balls are won or until a certain period (for example, 30 sec) elapses. And if the elapsed period of the open state of each big prize opening satisfy | fills any of these conditions, the big prize opening which was the open state will be in a closed state.

  Hereinafter, a game in which the first grand prize opening 53 or the second big prize opening 54 is in a state (open state) in which it is easy to accept a game ball is referred to as a round game. During the round game, the big prize opening is closed. A round game is counted as the number of rounds such as one round and two rounds. For example, the first round game is referred to as a first round, and the second round game is referred to as a second round.

  In the special symbol display device 61, when the special symbol that is stopped and displayed is in a mode other than a specific mode (a mode of “losing”), the gaming state does not shift except when the falling lottery is won. That is, the special symbol game is a game in which the special symbol is variably displayed by the special symbol display device 61, and then the special symbol is stopped and displayed, and the gaming state is shifted or maintained depending on the result.

  Further, in the pachinko gaming machine 1 according to the present embodiment, when a game ball wins the first start opening 44 while the variation display of the first special symbol or the second special symbol is displayed, the variable of the first special symbol corresponding to the winning is made. The display (holding ball) is put on hold. Then, when the first special symbol or the second special symbol currently being displayed in a variable manner is stopped and displayed, the variable display of the first special symbol that has been suspended is started. In the present embodiment, the number of variable displays of the first special symbol to be held (so-called “holding number (the number of holding balls)”) is defined as a maximum of four times (pieces).

  Further, in the present embodiment, when a game ball wins the second start opening 45 during the variation display of the first special symbol or the second special symbol, the variable display of the second special symbol corresponding to the winning (holding ball) Is put on hold. Then, when the first special symbol or the second special symbol currently being displayed in a variable manner is stopped and displayed, the variable display of the second special symbol that has been suspended is started. In the present embodiment, the number of variable displays (holding number) of the second special symbol to be held is defined as a maximum of 4 times (pieces). Therefore, in this embodiment, the total number of variable symbols to be held is 8 at the maximum.

  Further, in the present embodiment, when the reserved ball of the first special symbol and the reserved ball of the second special symbol are mixed, the variation display of one special symbol is executed with priority over the variation display of the other special symbol. . In addition, this invention is not limited to this, When the reservation ball | bowl of a 1st special symbol and the reservation ball | bowl of a 2nd special symbol coexist, you may make it perform the change display of a special symbol in the order kept.

[Normal symbol display device]
As shown in FIG. 4, the normal symbol display device 62 is disposed in the approximate center of the upper portion of the display area 13 a of the display device 13. In the present embodiment, the normal symbol display device 62 is disposed on the right side of the special symbol display device 61 when viewed from the player side.

  The normal symbol display device 62 is a display device for variably displaying normal symbols (variation display and stop display) in a normal symbol game. In the present embodiment, as shown in FIG. 4, the normal symbol display device 62 is configured by two LEDs (normal symbol display LEDs) arranged in the vertical direction. In the normal symbol display device 62, a display pattern constituted by turning on / off each normal symbol display LED is represented as a normal symbol.

  The normal symbol display device 62 displays the variation of the normal symbol by turning on and off the two normal symbol display LEDs alternately when the game ball passes the ball passage detector 43. Then, the normal symbol display device 62 performs the normal symbol stop display after performing the normal symbol variation display for a predetermined time.

  In the normal symbol display device 62, when the stopped normal symbol is in a predetermined mode (a “win” mode), the normal electric accessory 46 is changed from the closed state to the open state for a predetermined period. On the other hand, when the normal symbol that is stopped and displayed is in a mode other than the predetermined mode (a mode of “losing”), the normal electric accessory 46 maintains the closed state. That is, the normal symbol game is a game in which the normal symbol is variably displayed by the normal symbol display device 62, and then the normal symbol is stopped and displayed, and the normal electric accessory 46 operates according to the result.

  If the game ball passes through the ball passage detector 43 during the normal symbol variation display, the normal symbol variable display is suspended. Then, when the normal symbol that is currently in the variable display is stopped and displayed, the variable display of the normal symbol that has been suspended is started. In the present embodiment, the number of variable symbols of the normal symbol to be held (that is, the “holding number”) is defined as a maximum of 4 times (pieces).

[Normal symbol hold display device]
As shown in FIG. 4, the normal symbol hold display device 63 is arranged at the approximate center of the upper portion of the display area 13 a of the display device 13. In the present embodiment, the normal symbol hold display device 63 is disposed below the special symbol display device 61 and the normal symbol display device 62.

  The normal symbol hold display device 63 is a device that displays the number of hold of variable display of normal symbols. In the present embodiment, as shown in FIG. 4, the normal symbol hold display device 63 is configured by four LEDs (normal symbol hold display LEDs) arranged in the left-right direction. Then, the normal symbol hold display device 63 displays the number of normal symbols that are variably displayed by turning on / off each normal symbol hold display LED.

  Specifically, when the number of holdings of the normal symbol variable display is 1, the normal symbol holding display LED located on the leftmost side when viewed from the player side (the first normal symbol holding display LED from the left) Lights up, and other normal symbol hold display LEDs are turned off. When the number of normal symbol variable display hold is 2, the first and second normal symbol hold display LEDs from the left are turned on, and the other normal symbol hold display LEDs are turned off. When the number of normal symbol variable display hold is 3, the first to third normal symbol hold display LEDs from the left are turned on, and the other normal symbol hold display LEDs are turned off. When the number of normal symbol variable display hold is 4, all the normal symbol hold display LEDs are lit.

[First special symbol hold display device]
As shown in FIG. 4, the first special symbol hold display device 64 is arranged on the left side of the special symbol display device 61 when viewed from the player side in the upper part of the display area 13 a of the display device 13.

  The first special symbol hold display device 64 is a device that displays information related to variable display of the first special symbol being held (the hold ball of the first special symbol). In the present embodiment, as shown in FIG. 4, the first special symbol hold display device 64 includes a first special symbol hold number display unit 64a and a first special symbol hold information display unit 64b. The first special symbol hold information display unit 64b is arranged on the left side of the special symbol display device 61, and the first special symbol hold information display unit 64a is arranged on the left side of the first special symbol hold information display unit 64b. .

  The first special symbol reserved number display section 64a has four LEDs (first special symbol reserved display LEDs) arranged in the left-right direction. Note that the display mode of the first special symbol reservation number display unit 64 a is the same as the display mode of the normal symbol hold display device 63. That is, when the variable display of the first special symbol is on hold, the first special symbol hold display LED from the first special symbol hold display LED located on the leftmost side to the number of reserved pieces as viewed from the player side. Lights up.

  Moreover, the 1st special symbol hold information display part 64b displays the information regarding the hold ball of a 1st special symbol. For example, the first special symbol hold information display unit 64b displays information (identification information) about the hold ball of the first special symbol to be variably displayed next with a symbol made up of numbers, symbols, and the like. Note that the configuration of the first special symbol hold display device 64 is not limited to the example shown in FIG. 4, and can be arbitrarily configured as long as it can display at least the number of variable display hold numbers of the first special symbol. .

[Second special symbol hold display device]
As shown in FIG. 4, the second special symbol hold display device 65 is disposed on the right side of the normal symbol display device 62 when viewed from the player side in the upper part of the display area 13 a of the display device 13.

  The second special symbol hold display device 65 is a device that displays information relating to variable display of the second special symbol being held (the hold ball of the second special symbol). In the present embodiment, as shown in FIG. 4, the second special symbol hold display device 65 includes a second special symbol hold number display unit 65a and a second special symbol hold information display unit 65b. The second special symbol hold information display unit 65b is arranged on the right side of the normal symbol display device 62, and the second special symbol hold information display unit 65a is arranged on the right side of the second special symbol hold information display unit 65b. .

  The second special symbol reserved number display unit 65a has four LEDs (second special symbol reserved display LEDs) arranged in the left-right direction. Note that the display mode of the second special symbol reservation number display unit 65 a is the same as the display mode of the normal symbol hold display device 63. That is, when the variable display of the second special symbol is held, the second special symbol hold display LED from the second special symbol hold display LED located on the leftmost side to the hold number when viewed from the player side. Lights up.

  In addition, the second special symbol hold information display unit 65b displays information related to the hold ball of the second special symbol. For example, the second special symbol hold information display unit 65b displays information (identification information) related to the hold ball of the second special symbol to be variably displayed next with a symbol made up of numbers, symbols, and the like. Note that the configuration of the second special symbol hold display device 65 is not limited to the example shown in FIG. 4, and can be arbitrarily configured as long as it can display at least the number of variable display holds of the second special symbol. .

[Display device]
The display device 13 is composed of a liquid crystal display device as described above, and performs various image display effects in the display area 13a.

  Specifically, in the present embodiment, an effect image related to the special symbol displayed on the special symbol display device 61 is displayed in the display area 13a. At this time, for example, when the special symbol is being variably displayed on the special symbol display device 61, except for a specific case, for example, a plurality of effect identification symbols (decorations) including numbers 1 to 8 and various characters are used. (Design) is variably displayed in the display area 13a. When the special symbol is stopped and displayed on the special symbol display device 61, a plurality of decorative symbols (such as a jackpot symbol to be described later) corresponding to the special symbol are also stopped and displayed in the display area 13a.

  Then, when the special symbol stopped and displayed in the special symbol display device 61 is in a specific mode (the result of the stop display is “big hit”), the player can grasp that it is “big hit”. The effect image is displayed in the display area 13a. As an effect for causing the player to grasp that it is a “hit”, for example, first, a plurality of decorative symbols that are stopped and displayed are in a specific mode (for example, a mode in which the same decorative symbols are arranged in a predetermined direction) After that, there is an effect of displaying an image for informing the “big hit”.

  In the present embodiment, an effect image related to the display contents of the first special symbol hold display device 64 and the second special symbol hold display device 65 is displayed in the display area 13 a of the display device 13. For example, the display area 13a displays hold information (for example, the same number of holding symbols as the number of holdings) for notifying the number of holdings for variable display of special symbols. In addition, for example, in the pachinko gaming machine 1 according to the present embodiment, a pre-reading effect is performed based on the information on the reserved ball of the special symbol, and a notice of notification at this time is also displayed in the display area 13a.

  In the present embodiment, when the normal symbol stopped and displayed on the normal symbol display device 62 is in a predetermined mode, an effect image that causes the player to grasp the information is displayed on the display area 13a of the display device 13. A function may be further provided.

  Next, the configuration of the back surface of the pachinko gaming machine 1 according to the present embodiment will be described with reference to FIG.

  As shown in FIG. 5, on the back side of the pachinko gaming machine 1, a payout / launch unit 16a and a board unit 17 are provided.

  The dispensing / launching unit 16a is provided with a storage unit 16b and the dispensing device 16c. The storage unit 16b stores game balls that are paid out to the upper plate 21 and the lower plate 22 by the payout device 16c. The payout / firing unit 16a is provided with a control board on which a payout / firing control circuit 123 described later is formed.

  The board unit 17 is provided with a main board unit 17a, a sub board unit 17b, a power supply unit 17c, and a dispensing / firing board unit 17d. The main board unit 17a is provided with a main control board 70a on which a later-described main control circuit 70 is formed, a board case 30 for housing the main control board 70a, and the like. The sub board unit 17b is provided with a sub control board 200a on which the sub control circuit 200 is formed, a board case for housing the sub control board 200a, and the like. The payout / launch board unit 17d is provided with a control board on which a payout / fire control circuit 123 described later is formed. The power supply unit 17 c is provided with a power supply device 37. The power supply device 37 is provided with a power switch 38 for turning on the power to the pachinko gaming machine 1 and an RWM initialization switch 39 for initializing a work area (game information) of the main RAM 73.

  The power switch 38 and the RWM initialization switch 39 are configured to be operable (pressing operation). The power switch 38 and the RWM initialization switch 39 output a predetermined detection signal when an operation is performed. Since the power switch 38 and the RWM initialization switch 39 are disposed on the back surface of the pachinko gaming machine 1, the power switch 38 and the RWM initialization switch 39 are configured so as not to be operated by a player who is playing the pachinko gaming machine 1.

[Configuration of main board unit]
Next, the configuration of the main control board 70a and the board case 30 will be described in detail with reference to FIGS. 6 (a) and 6 (b).

  The substrate case 30 is a box-shaped member having a space inside. The substrate case 30 is attached to the main substrate unit 17a in a state where the main control substrate 70a is accommodated inside. The substrate case 30 is provided with a base member 31 and a lid member 32.

  The base member 31 is a substantially box-shaped member having an opening on the front side. The base member 31 holds the main control board 70a while supporting the back surface on the inner side. The lid member 32 is a plate-like member whose plate surface is directed in the front-rear direction. The lid member 32 is disposed so as to cover the entire main control board 70 a held by the base member 31, and is connected to the base member 31. In this way, the base member 31 and the lid member 32 are integrated, and the substrate case 30 is configured. The base member 31 and the lid member 32 are connected by caulking, for example. In this way, the substrate case 30 is sealed so that the lid member 32 can be easily removed from the base member 31 in a state where the main control substrate 70a is accommodated.

  The substrate case 30 is affixed with a seal seal 33a indicating a sealed state and an information seal 33b on which predetermined information is described. The seal seal 33 a is disposed at the right end of the substrate case 30 so as to straddle the lid member 32 and the base member 31. The information seal 33b is disposed at the lower left portion of the substrate case 30 (lid member 32).

  The main control board 70a is provided with a 7-segment LED (hereinafter referred to as “main board display unit 34”). The main board display unit 34 has four independent display areas and can display four-digit numbers. Each display area of the main board display unit 34 is set so that the surface area is 36 square millimeters or more. The main board display unit 34 is arranged at a position that does not overlap with seals (sealing seal 33a and information seal 33b) attached to the lid member 32 of the board case 30 and other structures in front view. Thus, the visibility of the main board display unit 34 is not hindered by the seal sticker 33a, the information sticker 33b, and other structures.

  In the following, of the four independent display areas, the two right display areas are referred to as “first display areas 34a”, and the two left display areas are referred to as “second display areas 34b”.

<Circuit configuration of pachinko machines>
Next, the configuration of various circuits included in the pachinko gaming machine 1 of the present embodiment will be described with reference to FIGS. FIG. 7 is a block diagram showing a circuit configuration of the pachinko gaming machine 1.

  As shown in FIG. 7, the pachinko gaming machine 1 has a main control circuit 70 (main control means) that mainly controls game operations, a payout / launch control circuit 123, and control of performance operations according to the progress of the game. And a sub-control circuit 200 (sub-control means, effect control means).

[Main control circuit]
The main control circuit 70 includes a one-chip microcomputer 77, a clock generation circuit 74, and an initial reset circuit 75. As described above, in the present embodiment, a special symbol lottery process is performed when the first start port 44 or the second start port 45 is won, and this process is controlled by the main control circuit 70. That is, the main control circuit 70 also serves as means (lottery means) for performing a lottery process for determining whether or not to shift the gaming state to a state advantageous to the player.

  The one-chip microcomputer 77 includes a main CPU (Central Processing Unit) 71, a main ROM (Read Only Memory) 72, a main RAM (Random Access Memory) 73, and a serial communication unit 76. The main CPU 71, the main ROM 72, the main RAM 73, and the serial communication unit 76 may be provided separately.

  In the present embodiment, a configuration in which the main ROM 72 is built in the substrate of the main control circuit 70 will be described, but the present invention is not limited to this. For example, a ROM board on which the main ROM 72 is mounted may be connected to the board of the main control circuit 70. Furthermore, in the present embodiment, various circuits (various means) in the main control circuit 70 may be formed integrally or separately. Further, the main ROM 72 may not be configured to be installed in the gaming machine but may be configured to be able to communicate with the gaming machine.

  A clock generation circuit 74 and an initial reset circuit 75 are connected to the one-chip microcomputer 77. The main ROM 72 stores various programs for controlling the operation of the pachinko gaming machine 1 by the main CPU 71, various data tables, and the like.

  The main CPU 71 executes various processes according to programs stored in the main ROM 72. The main RAM 73 functions as a temporary storage area when the main CPU 71 executes various processes, and stores various flags and variable values necessary for the main CPU 71 for various processes. In this embodiment, the main RAM 73 is used as a temporary storage area of the main CPU 71. However, the present invention is not limited to this, and any recording medium can be used as a temporary storage area as long as it is a readable / writable storage medium. .

  Further, the main RAM 73 is provided with a predetermined storage area (hereinafter referred to as “total processing storage area”) for performing a totaling process by the main CPU 71 described later.

  As shown in FIG. 8, the totalization processing storage area has a total of 10 sets of buffer areas for each prize ball and the like. Each set (one set) is set using 2 bytes so that the total number of prize balls to be stored exceeds 6000. In the 10 sets of buffer areas, the first set (first) buffer area is connected to the 10th set (end) buffer area. Thus, the storage area for aggregation processing is configured as a ring buffer capable of storing a plurality of past data for a certain period by overwriting the oldest contents with the latest contents. In the present embodiment, the prize balls, such as the heso prize ball, the electric chew prize ball, the general prize mouth prize ball and the big prize mouth prize ball, as well as the prize money such as the heso prize ball are totaled. A total of winning balls and a winning ball (a winning ball for both roles) with a consecutive combination (first winning port 53 or second winning port 54 in the case of a big hit) are included.

  In addition, in a predetermined area in the total storage area, a value obtained by adding the values stored in the 10 sets of buffer areas is stored as “10 sets cumulative” for each prize ball. In addition, a value obtained by adding all the overwritten (erased) values to the current 10 set cumulative values is stored as “total cumulative” for each prize ball or the like. In addition, 3 bytes are used for the storage areas of these 10 sets and totals, respectively.

  With such a configuration, the total number of each prize ball (hereinafter simply referred to as “prize ball” for convenience) is counted as a set for each prize ball by the storage area for aggregation processing in the main RAM 73. Can be repeated. Here, in the pachinko gaming machine 1 according to the present embodiment, the number of game balls (launch balls) fired from the launch device 15 is set to be approximately the same as the number of prize balls. That is, in other words, in the pachinko gaming machine 1 according to the present embodiment, it can be said that the summation for each prize ball can be repeatedly performed with 6000 firing balls as one set.

  In the present embodiment, the substrate unit 17 is provided with a backup power source (not shown). Thus, for example, even when the power is turned off or when a power failure occurs, the total storage area is not cleared by the action of the backup power supply, and the data stored in the total storage area is retained.

  The data stored in the storage area for totalization processing is not limited to the data as described above. For example, as data stored in the storage area for tabulation processing, the ratio of consecutive items, the ratio of consecutive items, the normal winning opening (the first start opening 44, the general winning opening 51 and the general winning opening 52) or the power-on The cumulative number of payouts thereafter and the past (daily total) cumulative number of payouts of the normal winning award are included. In addition, the accumulated payout data after power-on includes the cumulative payout number for each type of gaming state (for example, normal gaming state, probability variation gaming state, short-time gaming state, etc.).

  The clock generation circuit 74 generates a clock pulse at a predetermined cycle (for example, 2 msec) in order to execute a system timer interrupt process to be described later. The initial reset circuit 75 generates a reset signal when the power is turned on. Then, the serial communication unit 76 supplies a command to the sub control circuit 200.

  Further, as shown in FIG. 7, various devices that operate in accordance with output signals sent from the main control circuit 70 are connected to the main control circuit 70.

  Specifically, the main control circuit 70 includes a main board display unit 34, a special symbol display device 61, a normal symbol display device 62, a normal symbol hold display device 63, a first special symbol hold display device 64, and a second special symbol. A hold display device 65 is connected. Each of these devices performs a predetermined operation based on the output signal sent from the main control circuit 70. For example, when a predetermined output signal is transmitted from the main control circuit 70 to the special symbol display device 61, the special symbol display device 61 performs operation control of variable symbol special display in the special symbol game based on the output signal. Do. In addition, when a predetermined output signal is transmitted from the main control circuit 70 to the main board display unit 34, the main board display unit 34 performs various information display operation controls based on the output signal.

  The main control circuit 70 is connected to a normal electric accessory solenoid 46a, a first big prize opening solenoid 53b, and a second big prize opening solenoid 54b. Then, the main control circuit 70 drives and controls the ordinary electric accessory solenoid 46a to bring the pair of blade members of the ordinary electric accessory 46 into an open state or a closed state. Further, the main control circuit 70 drives and controls the first big prize opening solenoid 53b and the second big prize opening solenoid 54b, respectively, so that the first big prize opening 53 and the second big prize opening 54 are opened or closed. To do.

  Furthermore, as shown in FIG. 7, the main control circuit 70 is connected to various sensors and receives output signals from the various sensors. Specifically, the main control circuit 70 includes count sensors 53c and 54c, general winning ball sensors 51a and 52a, a passing ball sensor 43a, a first starting port winning ball sensor 44a, a second starting port winning ball sensor 45a, a power source. A switch 38, an RWM initialization switch 39, an effect button switch 23a, and the like are connected.

  The count sensor 53 c counts the game balls that have won the first grand prize opening 53 and outputs a predetermined output signal indicating the result to the main control circuit 70. The count sensor 54 c counts the game balls that have won the second grand prize opening 54, and outputs a predetermined output signal indicating the result to the main control circuit 70. The general winning ball sensor 51 a outputs a predetermined detection signal to the main control circuit 70 when a game ball wins in the general winning slot 51, and the general winning ball sensor 52 a wins a game ball in the general winning slot 52. In this case, a predetermined detection signal is output to the main control circuit 70.

  The passing ball sensor 43 a outputs a predetermined detection signal to the main control circuit 70 when the game ball passes through the ball passing detector 43. The first start port winning ball sensor 44 a outputs a predetermined detection signal to the main control circuit 70 when a game ball wins the first start port 44. The second start opening winning ball sensor 45 a outputs a predetermined detection signal to the main control circuit 70 when the game ball wins the second starting opening 45. In addition, the RWM initialization switch 39 outputs a predetermined detection signal to the main control circuit 70 and the payout / launch control circuit 123 when the backup data is cleared in response to an operation of a game shop administrator or the like at the time of power interruption. Output to.

  When the effect button 23 is pressed, a detection signal is output from the effect button switch 23a, and the output detection signal is transmitted to the sub control circuit 200 (sub control means). In the sub-control circuit 200, the detection signal output from the effect button switch 23a is used when performing display processing for joyfulness, displaying a hall menu, operating means at the time of effect, and the like. The effect button switch 23 a may output a predetermined detection signal to the main control circuit 70 when an operation (pressing operation) of the effect button 23 is performed. In the main control circuit 70, the detection signal output from the effect button switch 23a is mainly used when performing display processing for joyfulness described later.

  Further, the main control circuit 70 is connected to the payout / launch control circuit 123 and the power supply unit 17c. The contents of the payout / launch control circuit 123 and various peripheral devices connected thereto will be described in detail later.

[Discharge / Launch Control Circuit and its Peripherals]
The payout / firing control circuit 123 is connected to the prize ball case unit 170, the payout state notification display device 178, the lower pan full switch 179, the launching device 15, the external terminal board 140, the card unit 150, and the power supply unit 17c. The external terminal board 140 is connected to the data display 141, and the card unit 150 is connected to the lending operation unit 151.

  Based on various commands transmitted from the main control circuit 70, the payout / launch control circuit 123 inputs and outputs signals and the like to these peripheral devices, and controls the operation of each peripheral device. For example, the payout / launch control circuit 123 receives a prize ball control command transmitted from the main control circuit 70 and a lending ball control signal to be described later transmitted from the card unit 150, and gives a predetermined ball to the prize ball case unit 170. Send a signal. Thereby, the prize ball case unit 170 pays out a game ball.

  The prize ball case unit 170 is a device for paying out game balls. The first 15-ball collateral switch 172a, the second 15-ball collateral switch 172b, the first counting switch 181a, the second counting switch 181b, and the payout A motor 174 is included. Note that these components included in the prize ball case unit 170 are connected to the payout / firing control circuit 123, respectively.

  Although not shown here, two ball supply passages are provided inside the prize ball case unit 170. Then, the first 15-ball collateral switch 172a detects a game ball supplied to one of the ball supply passages, and outputs a predetermined output signal indicating the detection result to the payout / launch control circuit 123. The second 15-ball collateral switch 172b detects a game ball replenished in the other ball supply passage, and outputs a predetermined output signal indicating the detection result to the payout / launch control circuit 123.

  Further, although not shown here, two payout passages are provided inside the prize ball case unit 170. Then, the first counting switch 181 a detects a game ball paid out to one payout passage, and outputs a predetermined output signal indicating the detection result to the payout / launch control circuit 123. The second counting switch 181b detects the game ball paid out to the other payout passage, and outputs a predetermined output signal indicating the detection result to the payout / launch control circuit 123.

  The payout motor 174 is composed of a stepping motor and is driven according to a control signal input from the payout / firing control circuit 123. The payout motor 174 rotationally drives a sprocket (rotating member) (not shown) provided in the prize ball case unit 170. Then, by the rotation of the sprocket, the game balls accumulated in each ball supply path move one by one to the corresponding payout passage.

  The payout state notification display device 178 is a device for notifying the type of abnormality when an abnormality occurs with respect to the payout of the game ball, and is configured by a 7-segment display. The payout state notification display device 178 is attached at a position where only the administrator of the game store (game room) can visually recognize, for example, at a predetermined location on the back surface of the pachinko gaming machine 1.

  When the game ball stored in the lower plate 22 becomes full, the lower plate full tank switch 179 detects this and outputs the detection result to the payout / launch control circuit 123.

  When the signal indicating that the lower pan is full is input from the lower pan full switch 179, the payout / launch control circuit 123 displays the payout state notification display device 178 indicating that the lower pan is full. And a signal indicating that the lower pan is full is output to the main control circuit 70. Thereafter, when an effect control command is transmitted from the main control circuit 70 to the sub control circuit 200, the sub control circuit 200 uses the speaker 11, the lamp group 18, the display device 13, etc., for example, so that the lower plate 22 is full. Notify that there is.

  The launching device 15 has a launching handle 25 that can be turned by the player when the game ball stored in the upper plate 21 is launched into the game area 12a. The payout / firing control circuit 123 is connected to a solenoid actuator (not shown) of the launching device 15 according to the turning angle when the launching handle 25 is gripped by the player and is turned clockwise. Supply power. Thereby, the launching device 15 launches a game ball. Note that a motor may be used instead of the solenoid actuator as the driving means of the launching device 15.

  The external terminal board 140 is used to transmit data to a hall computer that manages all pachinko gaming machines in the game store. The data display 141 is installed, for example, as an ancillary facility of a game store in the upper part of the pachinko gaming machine 1, and has a function of calling a hall attendant and a function of displaying the number of hits.

  When operated by the player, the lending operation unit 151 outputs a signal requesting lending of game balls to the card unit 150. The card unit 150 determines the number of game balls to be paid out via the prize ball case unit 170 (the number of loaned balls) based on a signal for requesting the rental of game balls output from the lending operation unit 151. When the card unit 150 receives a signal requesting lending of game balls from the lending operation unit 151, the card unit 150 transmits a lending ball control signal including information on the determined lending ball number to the payout / launch control circuit 123.

[Sub control circuit]
The sub control circuit 200 is connected to the serial communication unit 76 and the power supply unit 17 c of the main control circuit 70. Then, the sub control circuit 200 (host control circuit 210 described later) controls the entire sub control circuit 200 in accordance with various commands (information relating to the progress of the game) transmitted from the main control circuit 70. Then, the sub-control circuit 200 controls the sound reproduction operation by the speaker 11, the image display operation by the display device 13, and the lamp group 18 including LEDs (effects) based on various commands transmitted from the main control circuit 70. Control of lamp lighting / extinguishing operation by means), control of rendering operation by the accessory 20 (decorative member), and the like. That is, the sub control circuit 200 controls various effect devices based on commands from the main control circuit 70, and executes various effects according to the progress of the game. The sub control circuit 200 is connected to the effect button switch 23 a in the same manner as the main control circuit 70. In the sub control circuit 200, the detection signal output from the effect button switch 23a is mainly used for processing of various effects. In the present embodiment, a signal cannot be supplied from the sub control circuit 200 to the main control circuit 70. However, the present invention is not limited to this, and a signal can be transmitted from the sub control circuit 200 to the main control circuit 70. It may be provided with various configurations.

  Next, the internal configuration of the sub control circuit 200 will be described in more detail with reference to FIG. FIG. 9 is a block diagram showing a circuit configuration inside the sub control circuit 200 and a connection relationship between the sub control circuit 200 and its various peripheral devices.

  As shown in FIG. 9, the sub control circuit 200 includes a relay board 201, a sub board 202 (first board), a control ROM board 203, and a CGROM (Character Generator ROM) board 204 (second board). . The sub board 202 is connected to the relay board 201, the control ROM board 203, and the CGROM board 204. In the sub control circuit 200, the sub board 202 and various ROM boards (the control ROM board 203 and the CGROM board 204) are connected via a board-to-board connector (not shown).

  The relay board 201 is a relay board for receiving a command transmitted from the main control circuit 70 and transmitting the received command to the sub board 202.

  The sub-board 202 includes a host control circuit 210 (host control means), a sound / LED control circuit 220 (light emission control means, sound control means), a display control circuit 230 (effect control means), an SDRAM (Synchronous Dynamic RAM) 250, and A built-in relay board 260 is provided.

  The host control circuit 210 is a circuit that controls the operation of the entire sub-control circuit 200 based on various commands transmitted from the main control circuit 70, and is configured by a CPU processor. The host control circuit 210 is connected to the sound / LED control circuit 220, the display control circuit 230, and the built-in relay board 260 in the sub-board 202. The host control circuit 210 is connected to the control ROM board 203.

  The host control circuit 210 includes a sub work RAM 210a and an SRAM (Static RAM) 210b. The sub work RAM 210a is a storage device that acts as a temporary storage area for work when the host control circuit 210 executes various processes, and various flags and variables required when the host control circuit 210 executes various processes. The value of etc. is memorized. The SRAM 210b is a storage device that backs up predetermined data in the sub work RAM 210a. In this embodiment, a RAM is used as a temporary storage area of the host control circuit 210. However, the present invention is not limited to this, and any recording medium may be used as a temporary storage area as long as it is a readable / writable storage medium. .

  The voice / LED control circuit 220 is connected to the speaker 11 and the lamp group 18 via the built-in relay board 260, and based on control signals (a sound request and a lamp request described later) input from the host control circuit 210. Is a circuit that controls the sound reproduction operation by the lamp group and the light emission operation by the lamp group 18. Therefore, functionally, the sound / LED control circuit 220 includes a sound controller 220a and a lamp controller 220b. The sound controller 220a and the lamp controller 220b are substantially included in the sound / lamp control module 226 described later. The internal configuration of the sound / LED control circuit 220 will be described in detail later with reference to the drawings.

  In this embodiment, when a control signal and data (for example, LED data described later) output from the sound / LED control circuit 220 are transmitted to the lamp group 18 via the built-in relay board 260, the sound / LED Communication between the control circuit 220 and the lamp group 18 is performed by an SPI (Serial Peripheral Interface) communication method (a type of serial communication method). In the present embodiment, the lamp group 18 includes one or more LEDs and one or more LED drivers for controlling each LED.

  The display control circuit 230 is connected to the display device 13 and displays an image (decoration pattern image, background image, effect image, etc.) related to the effect based on a control signal (drawing request) input from the host control circuit 210. It is a circuit for controlling various processing operations when displaying on the screen. The display control circuit 230 includes a display controller (a first display controller 238 and a second display controller 239 described later) and a built-in VRAM (Video RAM) 237.

  The display control circuit 230 is connected to the SDRAM 250 in the sub-substrate 202. Further, the display control circuit 230 is connected to the CGROM substrate 204. Further, the display controller in the display control circuit 230 is directly connected to the display device 13 without using a relay board. The internal configuration of the display control circuit 230 will be described in detail later with reference to the drawings.

  The SDRAM 250 (third information storage means, second storage means) is composed of a DDR2 (Double-Date Rate2) SDRAM. Further, the SDRAM 250 is provided with various buffers for temporarily storing various image data in drawing processing of images (moving images and still images) displayed by the display device 13. Specifically, for example, the SDRAM 250 includes a texture buffer, a movie buffer, a blend buffer, two frame buffers (a first frame buffer and a second frame buffer), a motion buffer, and the like.

  The built-in relay board 260 receives various signals and various data output from the host control circuit 210 and the sound / LED control circuit 220, and receives the received various signals and various data to the speaker 11, the lamp group 18, and the accessory 20. It is a relay board to transmit.

  The built-in relay board 260 includes an I2C (Inter-Integrated Circuit) controller 261 and a digital audio power amplifier 262 (audio amplifying means). In this embodiment, an example in which the I2C controller 261 and the digital audio power amplifier 262 are mounted on the same relay board is shown, but the present invention is not limited to this, and the relay board on which the I2C controller 261 is mounted is connected to the digital audio. It may be provided separately from the relay board on which the power amplifier 262 is mounted.

  The I2C controller 261 is connected to the host control circuit 210 and the motor controller 270 of the accessory 20. That is, the host control circuit 210 is connected to the accessory 20 via the I2C controller 261 and the motor controller 270. A control signal and data (for example, excitation data described later) output from the host control circuit 210 are input to the accessory 20 via the I2C controller 261 and the motor controller 270.

  In this embodiment, communication between the I2C controller 261 and the motor controller 270 is performed by an I2C communication method (a kind of serial communication method). In the present embodiment, the accessory 20 includes one or more motors, and the motor controller 270 includes one or more motor drivers for driving each motor. Although FIG. 9 shows an example in which only one accessory 20 is provided, the present invention is not limited to this, and a plurality of accessories 20 may be provided.

  In the configuration of this embodiment, the host control circuit 210 may directly drive the motor of the accessory 20 without using the motor controller 270, or a motor control control circuit may be provided separately. Good. Furthermore, although this embodiment demonstrates the structure which controls a several motor driver (motor) with one control circuit, this invention is not limited to this. In the present embodiment, one or more (one or more) control circuits may be used to control one or more (one or more) motors (motor drivers), or one or more (one or more) control circuits may be used. One motor (motor driver) may be controlled, or one motor (motor driver) may be controlled by one control circuit.

  The digital audio power amplifier 262 is connected to the sound / LED control circuit 220 and the speaker 11. That is, the audio / LED control circuit 220 is connected to the speaker 11 via the digital audio power amplifier 262. Therefore, the audio signal or the like output from the audio / LED control circuit 220 is input to the speaker 11 via the digital audio power amplifier 262.

  A sub main ROM 205 is provided on the control ROM board 203. The sub main ROM 205 stores various programs for controlling the rendering operation of the pachinko gaming machine 1 by the host control circuit 210 and various data tables. Then, the host control circuit 210 executes various processes according to the program stored in the sub main ROM 205.

  In the present embodiment, the sub-main ROM 205 is applied as a storage unit that stores programs used in the host control circuit 210 and various tables. However, the present invention is not limited to this. As such a storage means, a storage medium of another aspect may be used as long as it is a computer-readable storage medium provided with a control means. For example, a hard disk device, a CD-ROM and a DVD-ROM, a ROM cartridge, etc. The storage medium may be applied. In addition, each program may be recorded on a separate storage medium. Furthermore, the program may be recorded in advance on a recording medium, or may be downloaded from the outside after the power is turned on and recorded in the sub main ROM 205.

  A CGROM 206 is provided on the CGROM substrate 204. The CGROM 206 is configured by a NOR type or NAND type flash memory. Further, the CGROM 206 stores, for example, image data displayed on the display device 13, audio data reproduced by the speaker 11 (access data described later), and the like. At this time, various data is compressed (encoded) and stored in the CGROM 206. However, the present invention is not limited to this, and various data may be stored in the CGROM 206 without being compressed.

  In the present embodiment, the configuration in which various ROM boards (control ROM board 203 and CGROM board 204) and the sub board 202 are connected by a board-to-board connector in the sub control circuit 200 has been described. The invention is not limited to this. For example, various types of ROM may be directly inserted into a port such as a socket provided on the sub-board 202, and the sub-board 202 may be configured by a single board having the ROM function or the ROM itself. That is, the sub board 202 and various ROMs may be integrally configured. Further, when the sub board 202 is configured by a single board having the ROM function or the ROM itself, the sub control circuit 200 uses the sub board 200 to be used according to the type of memory used as the CGROM. There may be provided switching means for switching the circuit on the substrate physically or electrically, or switching means for switching the information of the circuit on the sub-board to be used according to the type of memory.

  In this embodiment, the magnitude relationship between the data communication speeds between the various storage means (sub-main ROM 205, CGROM 206, built-in VRAM 237, SDRAM 250) and the corresponding control circuit is as follows: built-in VRAM 237> SDRAM 250> sub-main ROM205≈CGROM206. That is, in this embodiment, the communication speed between the built-in VRAM 237 and the various circuits in the display control circuit 230 is the fastest, and then the communication speed between the SDRAM 250 and the display control circuit 230 is fast. The communication speed between the sub main ROM 205 and the host control circuit 210 and the communication speed between the CGROM 206 and the display control circuit 230 are the slowest. However, the present invention is not limited to this, and the magnitude relationship of the communication speed between each of the various storage means and the corresponding control circuit can be arbitrarily set. For example, the magnitude relationship of the communication speed between each of the various storage means and the corresponding control circuit may be different from that of the present embodiment, or the communication speed between each storage means and the corresponding control circuit. May all be the same.

[Power supply unit]
As described above, the power supply unit 17c is connected to the main control circuit 70, the payout / launch control circuit 123, and the sub control circuit 200. The power supply unit 17 c is provided with a power supply device 37. The power supply device 37 is provided with the power switch 38 and the RWM initialization switch 39 as described above.

[Audio / LED control circuit]
Next, the internal configuration of the sound / LED control circuit 220 will be described with reference to FIG. FIG. 10 is a block diagram showing the internal circuit configuration of the voice / LED control circuit 220 and the connection relationship between the voice / LED control circuit 220 and its various peripheral devices and peripheral circuit units. In FIG. 10, illustration of a relay board or the like provided between the audio / LED control circuit 220 and various peripheral devices and circuit units is omitted to simplify the description.

  As shown in FIG. 10, the audio / LED control circuit 220 includes an LSI (Large-Scale Integration) interface 221, a memory interface 222, a digital audio interface 223, a peripheral interface 224, a command register 225, a sound lamp A control module 226, a main generator 227, and a multi-effector 228 are provided. The connection relation of each part in the sound / LED control circuit 220 is as follows.

  In the sound / LED control circuit 220, the sound / lamp control module 226 is connected to the memory interface 222, the peripheral interface 224, the command register 225, the main generator 227, and the multi-effector 228. The command register 225 is connected to the LSI interface 221 in addition to the sound / lamp control module 226. The main generator 227 is connected to the memory interface 222 and the multi-effector 228 in addition to the sound / lamp control module 226. Further, the multi-effector 228 is connected to the memory interface 222 and the digital audio interface 223 in addition to the sound / lamp control module 226 and the main generator 227.

  Next, the configuration of each unit in the voice / LED control circuit 220 will be described.

  The LSI interface 221 is an interface circuit used when an input / output operation such as a control signal (for example, a sound request, a ramp request) is performed between the host control circuit 210 and the command register 225. That is, the command register 225 is connected to the host control circuit 210 via the LSI interface 221.

  The memory interface 222 is an interface circuit used when performing input / output operations such as audio data between the sub main ROM 205 and each of the sound / lamp control module 226, the main generator 227, and the multi-effector 228.

  The digital audio interface 223 is an interface circuit used when outputting an audio signal or the like from the multi-effector 228 to the speaker 11. The digital audio interface 223 outputs an audio input signal to the multi-effector 228.

  The peripheral interface 224 is an interface circuit used when an input / output operation of a lamp signal or the like (LED data described later) is performed between the lamp group 18 and the sound / lamp control module 226. The peripheral interface 224 is provided with three physical systems as physical systems (SPI channels) for outputting data to the LED drivers included in the lamp group 18. In this embodiment, as will be described later, two physical systems (physical system 0 (SPI channel 0) and physical system 1 (SPI channel 1)) are used.

  The command register 225 includes a register group. The command register 225 sets function control for the sound / lamp control module 226, the main generator 227, and the multi-effector 228. The command register 225 also sets operating conditions for each interface (LSI interface 221, memory interface 222, digital audio interface 223, peripheral interface 224).

  Each register constituting the command register 225 includes an IC (Integrated Circuit), and each register is constituted by a memory chip whose operation is stabilized by memory access control. When a register having such a configuration is used, the load on the signal bus to which each register is connected is reduced. Therefore, by increasing the number of memory chips (registers), the capacity per memory module (e.g., The capacity of the command register 225 can be increased.

  The sound / lamp control module 226 controls the operation of each component (each block) in the sound / LED control circuit 220 according to the setting contents of the command register 225. As shown in FIG. 10, the sound / lamp control module 226 includes a simple access control unit 226a, a sequencer unit 226b, a lamp control unit 226c, and a peripheral control unit 226d.

  The simple access control unit 226a is a circuit unit that collectively processes commands. The sequencer unit 226b includes various sequencers (automatic reproduction function units) for controlling automatic reproduction operations such as lamp lighting and sound. Each sequencer controls various operations in accordance with timers and step conditions (for example, conditions set for each step process during sequence playback such as LED animation and audio described later).

  The lamp control unit 226c calculates the luminance value to be set in all channels (eight channels) in which LED data to be described later can be set, and transmits the calculation result to the outside (LED driver). The peripheral control unit 226d performs physical transmission control when transmitting the calculation result data output from the lamp control unit 226c to the LED driver.

  The main generator 227 is a circuit unit that generates an audio signal. Specifically, the main generator 227 acquires predetermined audio data (for example, access data described later) stored in the CGROM 206 based on the control signal input from the sound / lamp control module 226, and The acquired audio data is converted into a predetermined audio signal. The main generator 227 also performs amplification processing on the generated audio signal.

  The multi-effector 228 includes a mixer that synthesizes an audio signal input from the main generator 227 and an audio input signal input from the digital audio interface 223, and various effectors for applying various acoustic effects to the sound. Then, the multi-effector 228 outputs an audio signal synthesized by the mixer, an output signal from the effector, and the like to the speaker 11 via the digital audio interface 223.

[Connection configuration between digital audio power amplifier and speaker]
Next, a connection configuration between the digital audio power amplifier 262 and its peripheral circuit provided in the built-in relay board 260 and the speaker 11 will be described with reference to FIG. FIG. 11 is a connection configuration diagram between the built-in relay board 260 and the speaker 11. FIG. 11 shows a state where the speaker 11 is not connected to the built-in relay board 260 in order to clarify the configuration of the connection portion.

  In the pachinko gaming machine 1 of the present embodiment, as shown in FIG. 11, the speaker box 11a provided with the speaker 11 is connected to the built-in relay board 260 via a harness 300 (signal wiring means).

  The built-in relay board 260 includes a digital audio power amplifier 262, an LC circuit 263, a connection terminal group 264 (second terminal group) including four connection terminals (first connection terminal to fourth connection terminal), and two resistors. 265, 266, a capacitor 267, and a NOT circuit (logic circuit) 268.

  The digital audio power amplifier 262 amplifies the input audio signal (audio data), outputs the amplified audio signal to the speaker 11, and drives the speaker 11. The LC circuit 263 includes a resonance circuit including a coil and a capacitor. The NOT circuit 268 is a logic circuit that inverts and outputs the level of an input signal.

  The clock input terminal (MCK) and the data input terminal (SDATA) of the digital audio power amplifier 262 are connected to the audio / LED control circuit 220. The clock signal (master clock signal) output from the sound / LED control circuit 220 is input to the clock input terminal (MCK) of the digital audio power amplifier 262, and the sound / LED is input to the data input terminal (SDATA). The audio signal (audio data) output from the control circuit 220 is input.

  The first output terminal (OUTM1) and the second output terminal (OUTM2) of the digital audio power amplifier 262 are connected to the first connection terminal in the connection terminal group 264 of the built-in relay board 260 and the first output terminal (OUTM2) via the LC circuit 263, respectively. Connected to the second connection terminal (first connection terminal). In this embodiment, an example in which two output terminals of the digital audio power amplifier 262 are provided is shown, but the present invention is not limited to this. For example, the digital audio power amplifier 262 may be appropriately changed according to the function or specification of the speaker 11. Can do.

  Further, the digital audio power amplifier 262 has a mute terminal (MUTE: audio output control terminal). When the level (amplitude value) of the voltage signal applied to the mute terminal is the LOW level, the digital audio power amplifier 262 receives the audio signal from the first output terminal (OUTM1) and the second output terminal (OUTM2). It has a function (hereinafter referred to as a mute function) to stop the output or to ground these output terminals through a high resistance. That is, when the level of the voltage signal applied to the mute terminal is the LOW level, the digital audio power amplifier 262 is connected to the first relay board 260 from the first output terminal (OUTM1) and the second output terminal (OUTM2). It has a function of generating a state in which the output of the audio signal to the connection terminal and the second connection terminal is stopped.

  On the other hand, when the level (amplitude value) of the voltage signal applied to the mute terminal (MUTE) is the HIGH level, the digital audio power amplifier 262 includes the first output terminal (OUTM1) and the second output terminal (OUTM2). Output an audio signal.

  A third connection terminal (second connection terminal) in the connection terminal group 264 of the built-in relay board 260 is connected to an input terminal of the NOT circuit 268 via the resistor 266. The output terminal of the NOT circuit 268 is connected to the mute terminal (MUTE) of the digital audio power amplifier 262. The signal wiring between the third connection terminal of the built-in relay board 260 and the resistor 266 is connected to a power supply voltage (+5 V) terminal provided in the built-in relay board 260 via the resistor 265. The signal wiring between the input terminal of the NOT circuit 268 and the resistor 266 is connected (grounded) to the ground (GND) terminal provided in the built-in relay board 260 via the capacitor 267. Further, the fourth connection terminal (third connection terminal) of the built-in relay board 260 is connected to the ground (GND) terminal.

  As shown in FIG. 11, the speaker 11 is attached to a speaker box 11a formed of a wooden frame. The speaker box 11a is provided with a connection terminal group 11b (first terminal group) including four connection terminals (first connection terminal to fourth connection terminal). And the 1st connection terminal and 2nd connection terminal of the speaker box 11a are connected to the speaker 11 via signal wiring. Further, the third connection terminal (specific connection terminal) of the speaker box 11a is electrically connected to the fourth connection terminal by the signal wiring W1.

  As shown in FIG. 11, the harness 300 is configured by bundling four signal wires. The four connection terminals (first connection terminal to fourth connection terminal) of one of the four signal wirings are connected to the first connection terminal to the fourth connection terminal of the built-in relay board 260, respectively. On the other hand, the other four connection terminals (fifth connection terminal to eighth connection terminal) of the four signal wires are respectively connected to the first connection terminal to the fourth connection terminal of the speaker box 11a. That is, between the first connection terminal of the built-in relay board 260 and the first connection terminal of the speaker box 11a, signal wiring (first signal wiring) between the first connection terminal and the fifth connection terminal in the harness 300 is used. The second connection terminal of the built-in relay board 260 and the second connection terminal of the speaker box 11a are connected by signal wiring between the second connection terminal and the sixth connection terminal in the harness 300. In addition, the signal wiring (second signal wiring) between the third connection terminal and the seventh connection terminal in the harness 300 is provided between the third connection terminal of the built-in relay board 260 and the third connection terminal of the speaker box 11a. Between the fourth connection terminal of the built-in relay board 260 and the fourth connection terminal of the speaker box 11a, the signal wiring (third signal wiring) between the fourth connection terminal and the eighth connection terminal in the harness 300 is connected. Connected by Thereby, the speaker 11 is connected to the built-in relay board 260 via the harness 300.

  Note that the number of signal wires included in the harness 300 is not limited to four, and may be changed as appropriate according to, for example, the specifications of the digital audio power amplifier 262 and the speaker 11 and the connection configuration between the two. In the harness 300, at least a signal wiring for connecting the output terminal of the digital audio power amplifier 262 and the speaker 11 and a signal wiring for grounding the mute terminal of the digital audio power amplifier 262 via the speaker box 11a. As long as it is included.

  When the built-in relay board 260 and the speaker 11 are connected via the harness 300 as described above, the first output terminal (OUTM1) and the second output terminal (OUTM2) of the digital audio power amplifier 262 are connected via the harness 300. And connected to the speaker 11. The mute terminal (MUTE) of the digital audio power amplifier 262 is grounded through the NOT circuit 268, the harness 300, and the signal wiring W1 between the third connection terminal and the fourth connection terminal of the speaker box 11a.

  As a result, when the speaker 11 is connected to the built-in relay board 260 (digital audio power amplifier 262) via the harness 300, a LOW level voltage signal is input to the NOT circuit 268, and thus the digital audio power amplifier 262. The level (amplitude value) of the voltage signal input to the mute terminal (MUTE) is HIGH. In this case, an audio signal is output to the speaker 11 from the first output terminal (OUTM1) and the second output terminal (OUTM2) of the digital audio power amplifier 262.

  On the other hand, when the speaker 11 is not connected to the built-in relay board 260 (digital audio power amplifier 262), the third connection terminal of the built-in relay board 260 is opened. In this case, since the power supply voltage (+5 V) is input to the NOT circuit 268, the level (amplitude value) of the voltage signal input to the mute terminal (MUTE) of the digital audio power amplifier 262 becomes the LOW level, and the digital audio power amplifier The mute function 262 described above is activated.

  That is, when the speaker 11 is disconnected from the built-in relay board 260 (digital audio power amplifier 262), the built-in relay board 260 is connected from the first output terminal (OUTM1) and the second output terminal (OUTM2) of the digital audio power amplifier 262. A state is generated in which the output of the audio signal to the first connection terminal and the second connection terminal is stopped. As a result, the occurrence of a resonance phenomenon between the digital audio power amplifier 262 (output terminal) and the first and second connection terminals of the built-in relay board 260 is suppressed, and the occurrence of a malfunction such as a failure of the digital audio power amplifier 262 is prevented. Can be prevented.

  As described above, in this embodiment, the mute function of the digital audio power amplifier 262 can be activated regardless of software control by the host control circuit 210 and the sound / LED control circuit 220. Therefore, for example, in a situation where the speaker 11 is detached from the built-in relay board 260, even if the host control circuit 210 and the audio / LED control circuit 220 recognize that the audio signal output stop control is being performed, In a pachinko gaming machine 1 having a structure in which the game board cannot be replaced unless the speaker 11 is removed from the harness 300, such as when an audio signal is erroneously output due to a bug (problem) or the like, after the game board has been replaced. Even if a situation occurs such as when the door is closed by mistake without connecting the speaker 11 and the harness 300 and voice output is started, the mute function of the digital audio power amplifier 262 described above is activated in hardware. In this case, the digital audio power amplifier 262 can be reliably protected, and the safety of the pachinko gaming machine 1 can be improved.

  Further, in the present embodiment, as described above, the third connection terminal of the built-in relay board 260 is connected to the harness 300 and the signal wiring W1 between the third connection terminal and the fourth connection terminal of the speaker box 11a. It is connected to a ground (GND) terminal provided in the built-in relay board 260. In such a configuration, when the signal level of the third connection terminal of the built-in relay board 260 is LOW, is this factor due to the fourth connection terminal of the built-in relay board 260 being grounded? Since it can be determined by measuring the signal level of the fourth connection terminal of the built-in relay board 260, the digital output operation from the digital audio power amplifier 262 can be managed more accurately.

[Display control circuit]
Next, the internal configuration of the display control circuit 230 will be described with reference to FIG. FIG. 12 is a block diagram showing a circuit configuration inside the display control circuit 230 and a connection relationship between the display control circuit 230 and its various peripheral devices and peripheral circuit units.

  As shown in FIG. 12, the display control circuit 230 includes a memory controller 231, a command memory 232, a command parser 233, a moving picture decoder 234, a still picture decoder 235, an SDRAM controller 236, a built-in VRAM 237, a first A display controller 238, a second display controller 239, a 3D (Dimension) geometry engine 240, and a rendering engine 241 are provided. The connection relationship of each part in the display control circuit 230 and the connection relationship between the display control circuit 230 and its various peripheral devices and peripheral circuits are as follows.

  In the display control circuit 230, the memory controller 231 is connected to a command parser 233, a moving picture decoder 234 and a still picture decoder 235. In addition to the memory controller 231, the command parser 233 is connected to the command memory 232, the moving picture decoder 234, the still picture decoder 235, and the 3D geometry engine 240. The moving picture decoder 234 is connected to the SDRAM controller 236 in addition to the memory controller 231 and the command parser 233. The still picture decoder 235 is connected to the built-in VRAM 237 in addition to the memory controller 231 and the command parser 233.

  In the display control circuit 230, the SDRAM controller 236 is connected to the built-in VRAM 237, the first display controller 238 and the second display controller 239 in addition to the moving picture decoder 234. The built-in VRAM 237 is connected to the first display controller 238, the second display controller 239 and the rendering engine 241 in addition to the still image decoder 235 and the SDRAM controller 236. Further, the 3D geometry engine 240 is connected to the rendering engine 241 in addition to the command parser 233.

  The SDRAM 250 is connected to the memory controller 231 and the SDRAM controller 236 in the display control circuit 230. Further, the CGROM substrate 204 is connected to the memory controller 231 in the display control circuit 230. The host control circuit 210 is connected to the memory controller 231 and the command memory 232 in the display control circuit 230. Further, the display device 13 is connected to the first display controller 238 and the second display controller 239 in the display control circuit 230.

  Next, the configuration of each unit in the display control circuit 230 will be described.

  The memory controller 231 mainly controls communication between various external memories (the CGROM substrate 204 and the SDRAM 250) and the display control circuit 230. For example, the memory controller 231 performs processing such as transmission / reception of an address designation signal of an external memory to be controlled, memory ready, busy management, and the like, and data (effect data) stored in designated addresses for various memories. , Command data, etc.).

  The command memory 232 is a built-in memory that stores a command list. In addition to the command memory 232, the command list can be stored in the SDRAM 250 and the CGROM substrate 204 (CGROM 206).

  The command parser 233 acquires a command list from a specified memory (command memory 232, SDRAM 250 or CGROM 206). Specifically, in the present embodiment, the host control circuit 210 stores the command type in the system control register (not shown) in the display control circuit 230 (command memory 232, SDRAM 250 or CGROM 206), and The start address is set. Then, the command parser 233 obtains a command list by accessing the start address in the memory designated in the system control register (not shown).

  In addition, the command parser 233 generates a specific control code by analyzing the acquired command list, and outputs the control code to the moving picture decoder 234, the still picture decoder 235, and the 3D geometry engine 240. In the present embodiment, each image processing module in the display control circuit 230 operates based on the control code output by the command parser 233.

  The moving picture decoder 234 decodes (decodes) the moving picture compressed data acquired from the CGROM substrate 204 or the SDRAM 250. Then, the moving image decoder 234 outputs the decoded moving image data to the SDRAM 250 (external RAM). The moving image data (decoding result) output from the moving image decoder 234 is stored in a movie buffer provided in the SDRAM 250.

  The still image decoder 235 decodes still image compressed data acquired from the CGROM substrate 204 or the SDRAM 250. Then, the still picture decoder 235 outputs the decoded still picture data to the built-in VRAM 237. The still image data (decode result) output from the still image decoder 235 is temporarily stored in a sprite buffer provided in the built-in VRAM 237.

  The SDRAM controller 236 is a controller that controls operations such as storage processing of decoded moving image data and still image data in the RAM, and transfer processing (drawing processing) of image data between the built-in VRAM 237 and the CGROM substrate 204 or SDRAM 250. It is.

  The built-in VRAM 237 operates as a work RAM when executing various processes such as a decoding process and a rendering process in the drawing process by the display control circuit 230. Various image data are temporarily stored in the built-in VRAM 237 in the image data transfer process between the built-in VRAM 237 and the CGROM substrate 204 or the SDRAM 250 performed in each process in the drawing process.

  Each of the first display controller 238 and the second display controller 239 acquires the rendering result (drawing result) generated by the rendering engine 241 and outputs the rendering result to the display device 13. As a result, a predetermined image is displayed on the display screen of the display device 13. When two display controllers are provided as in the pachinko gaming machine 1 of the present embodiment, two screens are provided on the display device 13 by one display control circuit 230 (one chip). It can be controlled independently.

  Based on the control code input from the command parser 233, the 3D geometry engine 240 converts 3D information into 2D information (projection conversion processing), and affine transformation such as figure enlargement, reduction, rotation, and movement. Perform (graphic conversion) processing. Then, the 3D geometry engine 240 outputs the result of the conversion process to the rendering engine 241.

  The rendering engine 241 refers to a texture source (SDRAM 250 in this embodiment) in which decompressed still image data and moving image data are stored, and performs rendering (drawing) processing on the image data. Then, the rendering engine 241 writes the rendering result to a rendering target (in the present embodiment, the built-in VRAM 237 or the SDRAM 250).

  In this specification, “rendering” means editing data decoded according to designation information (information output from the 3D geometry engine 240 in this embodiment) such as enlargement / reduction or rotation of a moving image. It is to be. The “rendering engine” here includes, for example, “rasterizer”, “pixel shader”, and the like. Therefore, in the rendering engine 241, similarly to the pixel shader, the ARGB value (A: alpha value indicating transparency (opacity), R: luminance value of red component, G: green component) for each pixel of image data. (B: luminance value of blue component) is also calculated.

<Type of gaming state>
Next, the types of gaming states controlled and managed by the main CPU 71 will be described.

  In the present embodiment, the types of gaming states controlled and managed by the main CPU 71 include “big hit gaming state” (special gaming state) and “small hit gaming state” (specific gaming state), which have different expectations of prize balls. There is. The “big hit gaming state” is a gaming state in which a round game occurs in which the shutter opening period of the first big prize opening 53 or the second big prize opening 54 (that is, one round period) is long (for example, 30 seconds) This is a gaming state in which a big prize ball can be expected for the player. That is, in the “hit game state”, the player is more advantageous in the state of repeating the open state and the closed state of the shutter of the big prize opening.

  On the other hand, the “small hit gaming state” is a gaming state in which a round game occurs in which the period of one round is shorter (for example, 1.8 seconds) than the “big hit gaming state”, and a big prize ball cannot be expected for the player. A gaming state. That is, in the “small winning game state”, the repeated state of the open state and the closed state of the shutter of the big winning opening becomes a disadvantageous state by the player.

  In the present embodiment, the types of game states controlled and managed by the main CPU 71 include “probability gaming state” (high probability gaming state) and “normal gaming state” (low game state) having different winning probabilities for “big hit”. Stochastic gaming state).

  The “probability game state” is a game state in which the winning probability of “big hit” (1/131 in this embodiment) is high. On the other hand, the “normal gaming state” is a gaming state in which the winning probability (1/392 in this embodiment) of “big hit” is lower than the “probability changing gaming state”.

  Furthermore, in the present embodiment, the types of gaming states controlled and managed by the main CPU 71 are “short-time gaming states” (highly different) in which the winning probabilities of normal symbols (probability that the normal symbols become “hit”) are different from each other. (Winning gaming state) and "non-time saving gaming state" (low winning gaming state).

  As used herein, the “short-time gaming state” refers to a gaming state in which a normal symbol winning probability is high. That is, the “short-time gaming state” is a gaming state in which the ordinary electric accessory 46 (blade member) provided in the second starting port 45 is likely to be in an open state (a gaming state in which a second starting port winning is likely to occur). This is a game state advantageous to the player. The “short-time gaming state” ends when “big hit” is determined or when a special symbol variable display for a predetermined number of short-time times described later is executed. Also, in the short-time gaming state, a variation time shorter than the variation time selected during the normal gaming state can be easily selected as the variation time that is the time for performing the variation display of the special symbol executed during the state. It may be controlled. By such control, a game state that is advantageous to the player may be given by shortening the variation time in the short-time game state than in the normal game state and increasing the number of games per unit time.

  On the other hand, the “non-short-time (no short-time) gaming state” is a gaming state in which the winning probability of the normal symbol is lower than the “short-time gaming state”. Therefore, the “non-short-time gaming state” is a gaming state in which the ordinary electric accessory 46 (blade member) is unlikely to be in an open state (a gaming state in which the second start opening winning is unlikely to occur), and is a disadvantageous game for the player. State.

  In the present embodiment, game states of various combinations of the above-described game states other than the “big hit game state” and the “small hit game state” are provided. Specifically, in the present embodiment, a game state in which a “probability changing gaming state” and a “short-time gaming state” occur simultaneously (hereinafter referred to as a “high-probability time-shortening” state), and a “probability changing gaming state” A gaming state in which the “non-short-time gaming state” occurs at the same time (hereinafter referred to as a “high-precision time-short state”) is provided. It should be noted that in the state of “no high accuracy time”, it is difficult for the player to determine whether or not the gaming state is “probability changing gaming state”. " In the present embodiment, the “normal gaming state” and the “non-short time gaming state” occur simultaneously (hereinafter referred to as “the low probability timeless” state), and the “normal gaming state” and the “short time” There is also a gaming state (hereinafter referred to as a “low-probability time-short” state) in which a “gaming state” occurs simultaneously.

[Pachislot machine structure]
Next, with reference to FIG. 13, the structure of the pachislot machine 501 in the present embodiment will be described. FIG. 13 is a perspective view showing the appearance of the pachislot machine 501 in the present embodiment.

  The pachislot gaming machine 501 is a gaming machine that uses a game medium such as a coin, a medal, a game ball, or a token, or a game medium such as a card that stores information on a game value assigned to a player or assigned. . In the following description, it is assumed that medals are used.

  A housing 504 forming the entire pachislot machine 501 includes a box-shaped cabinet 560 and a front door 502 that opens and closes the cabinet 560. Lamps 514 capable of emitting light in a plurality of colors are provided on the left and right sides of the front door 502.

  The lamp 514 may be an existing light emitting element such as a light emitting diode (LED) or an organic electroluminescence (organic EL) as long as it can emit at least green, yellow, blue, and red.

  Further, vertically long rectangular display windows 521L, 521C, and 521R are provided in the approximate center of the front surface of the front door 502. An upper effective line 508 is set in the display windows 521L, 521C, and 521R. The valid line 508 is a line for performing a winning determination that is activated by operating a bet button 511 (to be described later) (hereinafter referred to as “BET operation”) or by inserting a medal into the medal insertion slot 522. Note that the activated line 508 is referred to as an “effective line”.

  On the back surface of the front door 502, a plurality of reels 503L, 503C, and 503R are rotatably provided in a horizontal row. In each reel 503L, 503C, 503R, a symbol row as identification information constituted by a plurality of types of symbols necessary for the game is drawn on each outer peripheral surface, and the symbols of each reel 503L, 503C, 503R are The display windows 521L, 521C, and 521R can be visually recognized from the outside of the pachislot machine 501. The reels 503L, 503C, and 503R rotate at a constant speed (for example, 80 rotations / minute), and the symbol row is variably displayed.

  Although not shown, a reel backlight is provided inside each of the reels 503L, 503C, and 503R. The reel backlight illuminates the symbols of the reels 503L, 503C, and 503R from behind. Three reel backlights are provided vertically in line for each reel 503L, 503C, and 503R, corresponding to the three symbols that are stopped and displayed in the display windows 521L, 521C, and 521R.

  These reel backlights are also used for backlight effects generated after the reels 503L, 503C, and 503R are stopped. A plurality of types of backlight effects are set in association with the types of small roles, but are forcibly terminated when a predetermined condition is satisfied. In the present embodiment, the predetermined condition corresponds to, for example, the case where the payout of medals accompanying the small role winning is completed, the case where the automatic insertion of medals by the replay winning is completed, or the case where the player cares for medals. . Completion of medal payout, automatic medal insertion, and medal care insertion is recognized by the sub CPU 581 based on a payout signal and insertion signal transmitted from the main CPU 531 to the sub CPU 581 described later. The payout signal is transmitted from the main CPU 531 every time one medal is paid out. The insertion signal is transmitted from the main CPU 531 every time one medal is inserted without distinguishing between automatic insertion and maintenance insertion. When executing the backlight effect, the sub CPU 581 forcibly ends the backlight effect based on the payout signal and the input signal. More specifically, the sub CPU 581 forcibly ends the backlight effect when receiving the payout signal when paying out the last one with respect to the payout signal, and the third input signal (game) with respect to the input signal. The backlight effect is forcibly terminated when the possible number of images is received.

  If the medal insertion into the next game is permitted upon completion of payout, or the start operation of the next game is permitted by automatic insertion or maintenance, the next game will be forcibly terminated by forcibly ending the production with the reel backlight. The display result can be clearly displayed to the player before the game starts.

  A liquid crystal display device 505 is provided above the display windows 521L, 521C, and 521R. The liquid crystal display device 505 has a larger display surface than the display windows 521L, 521C, and 521R, and produces an effect by image display. Speakers 509L and 509R are provided at the lower front portion of the front door 502, and effects such as sound effects and sounds are produced.

  On the left side of the display windows 521L, 521C, and 521R, a 7-segment display 513 including a 7-segment LED is provided. The 7-segment display 513 stores the number of medals inserted in the current game (hereinafter referred to as the number of inserted coins), the number of medals paid out to the player as a privilege (hereinafter referred to as the number of payouts), and the inside of the pachislot machine 501. Information such as the number of medals (hereinafter referred to as credits) is digitally displayed to the player.

  A substantially horizontal plane pedestal 510 is formed below the display windows 521L, 521C, and 521R. Within the horizontal plane of the pedestal 510, a medal slot 522 is provided on the right side, and a bet button 511 is provided on the left side.

  By depressing the bet button 511, the number (three) of medals used for a unit game is inserted, and a predetermined display line is activated as described above. The operation of the bet button 511 and the operation of inserting a medal into the medal insertion slot 522 (operation of inserting a medal for playing a game) are hereinafter referred to as “BET operation”.

  Further, on the left side of the display windows 521L, 521C, and 521R, an input button 595 (effect button) that can be operated by the player is provided. The input button 595 is composed of a plurality of key operators such as a cross key and an execution button. When the player operates the key operators, for example, the liquid crystal display device 505 displays a game history. be able to.

  Stop buttons 507L, 507C, and 507R serving as stop operation means for stopping the rotation of the three reels 503L, 503C, and 503R by a player's pressing operation are provided at substantially the center of the front surface of the pedestal 510. ing. In the embodiment, the unit game basically starts when the start lever 506 is operated, and ends when all the reels 503L, 503C, and 503R are stopped.

  On the left side of the front portion of the pedestal 510, there is provided a settlement button 512 for switching the credit / payout of medals acquired by the player in the game by a push button operation. By switching the settlement button 512, medals are paid out from the medal payout port 515 at the lower front, and the paid out medals are stored in the medal receiving portion 516. On the right side of the checkout button 512, a start lever 506 is provided as a start operation means for rotating the reel by a player's turning operation and starting the display of symbols in the display windows 521L, 521C, 521R. It is attached so as to be freely rotatable within an angle range.

  A medal payout opening 515 for paying out medals and a medal receiving portion 516 for storing the payout medals are provided in front of the lower portion of the front door 502. Also, on the front surface of the lower part of the front door 502, the waist panel 520 with a design corresponding to the model motif is attached to the surface sandwiched between the stop buttons 507L, 507C, and 507R and the medal receiving portion 516. It has been.

  Grip portions 547 are provided on both sides of the cabinet 560, so that it is easy to carry around when the pachislot machine 501 is installed.

  Next, the internal structure of the pachislot machine 501 will be described with reference to FIGS. FIG. 14 is a diagram illustrating a state in which the front door 502 is opened and the middle door 561 provided on the back side of the front door 502 is closed with respect to the front door 502. FIG. 15 shows a state in which the front door 502 is opened and the middle door 561 is opened with respect to the front door 502.

  A hopper 540 having a structure capable of accommodating a large amount of medals and discharging them one by one is provided below the inside of the cabinet 560. In addition, a power supply device 562 that supplies necessary power to each device included in the pachislot machine 501 is provided on one side of the hopper 540 (left side in the example illustrated in FIG. 14) in the cabinet 560. The power supply device 562 is provided with a power switch 545 for turning on power to the pachislot gaming machine 501 and an RWM initialization switch 544 for initializing a work area (game information) of the main RAM 533.

  The power switch 545 and the RWM initialization switch 544 are configured to be operable (pressing operation). The power switch 545 and the RWM initialization switch 544 output a predetermined detection signal when an operation is performed. Since the power switch 545 and the RWM initialization switch 544 are arranged in the cabinet 560, they are configured so as not to be operated by the player who is playing the pachislot machine 501. It should be noted that the initialization of the work area (game information) of the main RAM 533 as described above may be performed not by the operation of the RWM initialization switch 544 but by the operation of another switch. For example, the work area is initialized by operating a setting change switch (not shown) provided in the cabinet 560, an error release switch, or the like (specifically, when the setting change switch is operated or the setting change switch is operated). Or the like, when the error release switch is operated after that.

  The pachislot machine 501 is provided with payout control means such as the pachinko game machine 1, for example, and this payout control means is a variety of switches (RWM initialization switch 544, the error cancel switch, the setting change switch). Processing related to the above-described operation, and further processing related to euphoria (control) may be performed. Thus, storage and control of data relating to euphoria are not limited to the main control circuit 571 (main control means), and can be performed using any control means.

  A substrate case 630 and a main substrate 564 accommodated in the substrate case 630 are provided on the upper side inside the cabinet 560. The main board 564 constitutes a main control circuit 571. The main control circuit 571 controls main operations of the game in the pachislot machine 501 and the flow between the operations, such as determination of an internal winning combination, rotation and stop of each reel, determination of presence / absence of winning.

  As shown in FIGS. 14 and 15, the middle door 561 is disposed at the center of the back surface of the front door 502, and is configured to be able to open and close the display window 521 (see FIG. 15) from the back side. Door stoppers 561a, 561b, and 561c are provided at the upper and lower portions of the middle door 561. The door stoppers 561a, 561b, and 561c fix (prohibit) the opening operation of the middle door 561 with the display window 521 closed from the back side. That is, in order to open the middle door 561, it is necessary to rotate the door stoppers 561a, 561b, and 561c to release the middle door 561 from being fixed.

  Three reels (reel 503L, reel 503C, and reel 503R) are provided at the center portion of the middle door 561.

  Above the middle door 561, a sub board 565 constituting the sub control circuit 572 is provided. The sub-control circuit 572 controls the execution of effects by displaying images.

  Further, a selector 563 is provided in a lower part of the arrangement area of the display window 521 on the back side of the front door 502. The selector 563 is a device for selecting whether or not the material or shape of the medal inserted from the outside through the medal insertion slot 522 is appropriate, and guides the medal determined to be appropriate to the hopper 540. . Although not shown in FIG. 14, a medal detection unit 540 </ b> S that detects that a proper medal has passed is provided on the path through which the medal passes in the selector 563.

[Configuration of main board unit]
Next, the configuration of the main board 564 and the board case 630 will be described in detail with reference to FIGS. 16 (a) and 16 (b).

  The substrate case 630 is a box-shaped member having a space inside. The substrate case 630 is attached to the upper side inside the cabinet 560 with the main substrate 564 accommodated inside. The substrate case 630 is provided with a base member 631 and a lid member 632.

  The base member 631 is a substantially box-shaped member having an opening on the front side. The base member 631 holds the main substrate 564 while supporting the back surface on the inner side. The lid member 632 is a plate-like member whose plate surface is directed in the front-rear direction. The lid member 632 is disposed so as to cover the entire main substrate 564 held by the base member 631, and is coupled to the base member 631. In this way, the base member 631 and the lid member 632 are integrated, and the substrate case 630 is configured. The base member 631 and the lid member 632 are connected by caulking, for example. Thus, the substrate case 630 is sealed so that the lid member 632 is easily removed from the base member 631 in a state where the main substrate 564 is accommodated.

  The substrate case 630 is affixed with a seal seal 633a indicating a sealed state and an information seal 633b with predetermined information. The seal seal 633a is arranged at the right end of the substrate case 630 so as to straddle the lid member 632 and the base member 631. The information seal 633b is disposed at the lower left part of the substrate case 630 (lid member 632).

  The main board 564 is provided with a 7-segment LED (hereinafter referred to as “main board display unit 634”). The main board display unit 634 has four independent display areas and can display four-digit numbers. Each display area of the main substrate display unit 634 is set so that the surface area is 36 square millimeters or more. The main board display unit 634 is disposed at a position that does not overlap with seals (sealing seal 633a and information seal 633b) attached to the lid member 632 of the board case 630 and other structures in front view. Thus, the visibility of the main board display portion 634 is not hindered by the seal seal 633a, the information seal 633b, and other structures.

  In the following, of the four independent display areas, the two right display areas are referred to as “first display areas 634a”, and the two left display areas are referred to as “second display areas 634b”.

[Circuit configuration of pachislot machines]
This completes the description of the structure of the pachislot machine 501. Next, with reference to FIG. 17 to FIG. 19, a configuration of a circuit included in the pachislot machine 501 in the present embodiment will be described. The pachislot machine 501 in this embodiment includes a main control circuit 571, a sub control circuit 572, and peripheral devices (actuators) that are electrically connected to these.

<Main control circuit>
FIG. 17 is a block diagram showing the configuration of the main control circuit 571 of the pachislot machine 501 in the present embodiment.

(Microcomputer)
The main control circuit 571 includes a microcomputer 530 installed on a circuit board as a main component. The microcomputer 530 includes a CPU (hereinafter referred to as main CPU) 531, a ROM (hereinafter referred to as main ROM) 532, and a RAM (hereinafter referred to as main RAM) 533.

  The main ROM 532 stores a control program executed by the main CPU 531, a data table such as an internal lottery table, data for transmitting various control commands (commands) to the sub control circuit 572, and the like. The main RAM 533 is provided with a storage area for storing various data such as an internal winning combination determined by executing the control program.

  The main RAM 533 is provided with a predetermined storage area (hereinafter referred to as “search processing storage area”) for performing a winning search process by the main CPU 531 described later.

  As shown in FIG. 18, the search processing storage area has a total of 15 sets of buffer areas for each payout, number of games, and the like. Each set (one set) is set so that the total number of games to be stored is 400 using 2 bytes. In the 15 sets of buffer areas, the first set (first) buffer area is connected to the 15th set (end) buffer area. Thus, the search processing storage area is configured as a ring buffer capable of accumulating a plurality of past data for a certain period by overwriting the oldest contents with the latest contents. In the present embodiment, each of the payouts, the number of games, etc. includes the number of re-games, a prize payout, a feature payout, a continuous feature payout, and a game count.

  In addition, in a predetermined area in the search processing storage area, a value obtained by adding the values stored in the 15 sets of buffer areas is “15 sets cumulative” (for the number of games of 6000) for each payout or number of games. Stored as total). In addition, a value obtained by adding all the overwritten (erased) values to the current 15 set cumulative values is stored as “total cumulative” for each payout, number of games, and the like. Each of these 15 sets and totals of storage areas uses 3 bytes. The “all values” in the “all overwritten (erased) values” means one day, during business hours, from when the power is turned on to when the power is turned off, or It may be all values overwritten (erased) under a predetermined condition (or within a predetermined period), such as while the “total total” is stored in the storage area.

  With such a configuration, by using the search processing storage area of the main RAM 533, it is possible to repeatedly perform each payout and count for each number of games, with every 400 times of games as one set.

  In the present embodiment, a backup power source is provided in a board unit (not shown) having the main board 564 and the like. Thus, for example, even when the power is turned off or a power failure occurs, the search processing storage area is not cleared by the operation of the backup power supply, and the data stored in the search processing storage area is retained.

  The data stored in the search processing storage area is not limited to the data as described above. For example, the data stored in the search processing storage area includes, for example, an advantageous section game ball (the number of times the display lamp is turned on), a non-advantageous section game ball number, an advantageous section ratio, an accessory ratio, a continuous accessory ratio, and the like. .

(Random number generator etc.)
A clock pulse generation circuit 534, a frequency divider 535, a random number generator 536, and a sampling circuit 537 are connected to the main CPU 531. The clock pulse generation circuit 534 and the frequency divider 535 generate clock pulses. The main CPU 531 executes a control program based on the generated clock pulse. The random number generator 536 generates a random number in a predetermined range (for example, 0 to 65535). The sampling circuit 537 extracts one value from the generated random numbers.

(Switch etc.)
A switch or the like is connected to the input port of the microcomputer 530. The main CPU 531 receives input from a switch or the like and controls the operation of peripheral devices such as stepping motors 549L, 549C, and 549R. The stop switch 507S detects that each of the three stop buttons 507L, 507C, and 507R has been pressed (stop operation) by the player. The start switch 506S detects that the start lever 506 has been operated by the player (start operation). Further, the input button switch 595S detects that the input button 595 has been operated by the player.

  The medal sensor 542S detects that a medal received at the medal insertion slot 522 has passed through the selector 542 described above. The bet switch 511S detects that the bet button 511 has been pressed by the player. Further, the settlement switch 512S detects that the settlement button 512 has been pressed by the player.

(Peripheral devices and circuits)
Peripheral devices whose operations are controlled by the microcomputer 530 include stepping motors 549L, 549C, and 549R, a 7-segment display 513, and a hopper 540. A circuit for controlling the operation of each peripheral device is connected to the output port of the microcomputer 530.

  The motor drive circuit 539 controls driving of stepping motors 549L, 549C, and 549R provided corresponding to the reels 503L, 503C, and 503R. The reel position detection circuit 550 detects a reel index indicating that the reels 503L, 503C, and 503R have made one rotation according to the reels 503L, 503C, and 503R by an optical sensor having a light emitting unit and a light receiving unit.

  The stepping motors 549L, 549C, and 549R have a configuration in which the momentum is proportional to the number of output pulses and the rotation axis can be stopped at a specified angle. The driving force of the stepping motors 549L, 549C, and 549R is transmitted to the reels 503L, 503C, and 503R through a gear having a predetermined reduction ratio. Each time one pulse is output to the stepping motors 549L, 549C, 549R, the reels 503L, 503C, 503R rotate at a constant angle.

  The main CPU 531 counts the number of times pulses are output to the stepping motors 549L, 549C, and 549R after detecting the reel index, thereby rotating the rotation angles of the reels 503L, 503C, and 503R (mainly, the reels 503L, 503C, The number of symbols 503R has rotated) is managed, and the positions of the symbols arranged on the surfaces of the reels 503L, 503C, and 503R are managed.

  The display unit driving circuit 548 controls the operation of the 7-segment display 513. The hopper drive circuit 541 controls the operation of the hopper 540. The payout completion signal circuit 551 manages the detection of medals performed by the medal detection unit 540S provided in the hopper 540, and checks whether or not the medals discharged from the hopper 540 have reached the payout number.

(External terminal board)
The external terminal board 517 outputs a start signal indicating that a signal is output from the start switch 506S, a signal indicating shifting to ART, and the like to the outside. A signal from the external terminal board 517 is input to an external device 518 such as a calling device or a hall computer.

  Specifically, the pachislot machine 501 outputs the IN number and OUT number of medals to the hall computer via the external terminal board 517. The OUT number is output, for example, as a payout number at the time of winning a small role.

  Here, the calling device, which is an example of the external device 518, calls a game clerk, but generally has a function of displaying data and is also called a data display. As a general function, the calling device can display the number of big bonuses and the number of regular bonuses, and can display the number of games required between bonuses as a bonus history. The calling device can display a history such as the number of bonuses for a few days including the current day, the total number of games, and the like, and the number of games required between bonuses can be displayed as a history for the bonus on the current day. Regarding information such as various histories, it is possible to switch displayed information by operating an operation button provided on the calling device.

  The calling device can be set so that the number of ARTs can be displayed for a gaming machine equipped with an ART such as a pachislot gaming machine 501. In the present embodiment, the calling device can perform display related to gambling such as a role ratio.

  For such a paging device, a signal indicating that the transition from the pachislot machine 501 to ART is generated in the main control circuit 571 when the RT3 transition lip is displayed in the RT1 gaming state, and is generated by the external terminal board. Via 517. In the case of this embodiment, by performing on / off control of a predetermined external signal output to the calling device at a predetermined timing, it is displayed on the calling device that 7 rips are displayed, or the RT3 gaming state is displayed. It has come to be.

<Sub control circuit>
FIG. 19 is a block diagram showing a configuration of the sub control circuit 572 of the pachislot machine 501 in the present embodiment.

  The sub control circuit 572 is electrically connected to the main control circuit 571 and performs processing such as determination and execution of effect contents based on a command transmitted from the main control circuit 571. The sub control circuit 572 basically includes a CPU (hereinafter referred to as sub CPU) 581, a ROM (hereinafter referred to as sub ROM) 582, a RAM (hereinafter referred to as sub RAM) 583, a rendering processor 584, a drawing RAM 585, a driver 587, a DSP ( Digital signal processor) 588, audio RAM 589, A / D converter 590, and amplifier 591.

  The sub CPU 581 controls the output of video, sound, and light according to the control program stored in the sub ROM 582 according to the command transmitted from the main control circuit 571. The sub-RAM 583 is provided with a storage area for registering the determined contents and effects data, and a storage area for storing various data such as an internal winning combination transmitted from the main control circuit 571. In this embodiment, the sub RAM 583 is provided with an AT set counter, a extended game counter, a stock counter, a penalty counter, an ART counter, and the like. The sub ROM 582 basically includes a program storage area and a data storage area.

  A control program executed by the sub CPU 581 is stored in the program storage area. For example, the control program includes a main board communication task for controlling communication with the main control circuit 571 and determining and registering the content of the effect (effect data) based on the communication content, and the liquid crystal based on the determined content of the effect. An animation task for controlling display of video by the display device 505, a lamp control task for controlling light output by the lamp 514, a sound control task for controlling sound output by the speakers 509L and 509R, and the like are included.

  The data storage area stores a storage area for storing various data tables, a storage area for storing effect data constituting each effect content, a storage area for storing animation data related to creation of video, and a sound data related to BGM and sound effects. A storage area, a storage area for storing lamp data related to the light on / off pattern, and the like are included.

  In addition, a liquid crystal display device 505, speakers 509L and 509R, and a lamp 514 are connected to the sub control circuit 572 as peripheral devices whose operations are controlled.

  The sub CPU 581, the rendering processor 584, the drawing RAM 585 (including the frame buffer 586) and the driver 587 create a video according to the animation data designated by the contents of the presentation, and display the created video on the liquid crystal display device 505.

  Further, the sub CPU 581, the DSP (digital signal processor) 588, the audio RAM 589, the A / D converter 590, and the amplifier 591 output sounds such as BGM from the speakers 509 </ b> L and 509 </ b> R according to the sound data designated by the production contents. Further, the sub CPU 581 turns on and off the lamp 514 according to the lamp data designated by the contents of the effect.

<Configuration of data table stored in main ROM of pachinko machine>
Next, the configuration of various data tables stored in the main ROM 72 of the main control circuit 70 of the pachinko gaming machine 1 will be described with reference to FIGS.

[Big Random Number Judgment Table (at the time of winning the first start opening)]
First, with reference to FIG. 20, the big hit random number determination table (at the time of a 1st start opening winning) is demonstrated. The big hit random number determination table (at the time of winning the first start opening) is based on the big hit determination random number value acquired when the game ball enters the first start opening 44 (winning), "big hit", "small hit" And a table that is referred to when either “losing” is determined by lottery.

  The jackpot determination random number is a random value for determining a lottery result that is triggered by the start opening prize, and more specifically, lottery of special symbols (first special symbol and second special symbol). A random value indicating the result. In this embodiment, the jackpot determination random number value (random number value for lottery of special symbols) is selected from 0 to 65535 (65536 types).

  In the present embodiment, when a game ball wins the first start opening 44, any one of “big hit”, “small win”, and “losing” is determined by lottery. Therefore, in the jackpot random number determination table (at the time of the first start opening winning), as shown in FIG. 20, for each value of the probability variation flag (“0 (= off)” or “1 (= on)”), “ The range of random numbers for determining big hits for which the winning of “big hit”, “small hit” and “losing” are determined, and the corresponding decision value data (“big hit decision value data”, “small hit decision value data”) And any one of “lose determination value data”). The probability change flag is one of the management flags stored in the main RAM 73, and is a flag for managing whether or not the game state is the “probability change game state”. When the gaming state is “probability changed gaming state”, the confirmation flag is “1”.

  In the present embodiment, as shown in FIG. 20, when the first start port 44 is won, the probability variation flag is “0”, and the jackpot determination random number value is any one of “777” to “943”. , “Big hit” is won, and “Big hit judgment value data” is determined. In other words, the winning probability of “big hit” in this case (“selection rate” in FIG. 20) is 167/65536.

  In addition, when the probability variation flag is “0” and the big hit determination random value is any one of “1” to “300” at the time of winning the first start opening 44, “small hit” is won, The “small hit determination value data” is determined. That is, the winning probability of “small hit” in this case is 300/65536.

  Furthermore, when the probability variation flag is “0” and the jackpot determination random number value is not any of “1” to “300” and “777” to “943” at the time of winning the first starting port 44, “losing” "Is won and" Loss determination value data "is determined.

  On the other hand, when the first start opening 44 is won, if the probability variation flag is “1” and the jackpot determination random number is any one of “777” to “1277”, as shown in FIG. "Is won, and" big hit judgment value data "is determined. That is, the winning probability of “big hit” in this case (“selection rate” in FIG. 20) is 500/65536, which is higher than that when the probability variation flag is “0”.

  In addition, when the probability variation flag is “1” and the big hit determination random value is any one of “1” to “300” at the time of winning the first starting port 44, “small hit” is won, The “small hit determination value data” is determined. That is, the winning probability of “small hit” in this case is 300/65536, which is the same as that in the case where the probability variation flag is “0”.

  Further, if the probability variation flag is “1” and the jackpot determination random number value is not any of “1” to “300” and “777” to “1277” at the time of winning the first starting port 44, “losing” "Is won and" Loss determination value data "is determined.

  As described above, in the present embodiment, when a game ball is won at the first start opening 44, the selection rate (big hit probability) is determined depending on whether or not the game state at the time of winning is the “probability game state”. fluctuate. Specifically, when the gaming state is the “probability changing gaming state”, the big hit probability when the gaming ball wins the first starting port 44 is about three times that when the gaming state is not the “probability changing gaming state”. Get higher.

[Big Random Number Judgment Table (at the time of winning the second starting opening)]
Next, with reference to FIG. 21, the jackpot random number determination table (at the time of winning the second start opening) will be described. The big hit random number determination table (at the time of the second start opening winning) is a lottery to determine whether or not it is a “big hit” based on the random number for determining the big hit when the game ball enters (wins) the second starting opening 45 This table is referred to when

  In the present embodiment, when a game ball wins the second start opening 45, either “big hit” or “losing” is determined by lottery. If a game ball wins at the second start opening 45, “small hit” is not won. Therefore, in the jackpot random number determination table (at the time of the second start opening winning), as shown in FIG. 21, for each value of the probability variation flag (“0 (= off)” or “1 (= on)”), “ Relationship between the range of random numbers for determining the big hits and the corresponding decision value data (either “big hit decision value data” or “lose decision value data”) for which the winning of each of the “big hit” and “losing” is determined. Is defined.

  In the present embodiment, as shown in FIG. 21, when the second start opening 45 is won, the probability variation flag is “0”, and the jackpot determination random number value is any one of “777” to “943”. , “Big hit” is won, and “Big hit judgment value data” is determined. That is, the winning probability of “big hit” in this case (“selection rate” in FIG. 21) is 167/65536.

  In addition, when the second start opening 45 is won, if the probability variation flag is “0” and the random number for jackpot determination is not any of “777” to “943”, “losing” is won and “losing determination” Value data "is determined.

  On the other hand, if the probability variation flag is “1” and the jackpot determination random number is any one of “777” to “1277” at the time of winning the second start opening 45, as shown in FIG. "Is won, and" big hit judgment value data "is determined. In other words, the winning probability (hit probability) of “big hit” in this case is 500/65536, which is higher than that when the probability variation flag is “0”.

  In addition, when the second start opening 45 is won, if the probability variation flag is “1” and the random number for jackpot determination is not any one of “777” to “1277”, it becomes “lost”, and “loss determination value data” Is determined.

  As described above, in this embodiment, even when a game ball is won at the second start opening 45, the selection rate (hit probability) depends on whether or not the game state at the time of winning is the “probability game state”. Fluctuates. Specifically, as in the case of winning the first starting opening 44, even when the second starting opening 45 is won, when the game ball wins the second starting opening 45 when the gaming state is “probable change gaming state”. The jackpot probability is about three times as high as that when the gaming state is not the “probability gaming state”.

[Symbol determination table (at the time of winning the first start opening)]
Next, with reference to FIG. 22, the symbol determination table (at the time of winning the first start opening) will be described.

  In the present embodiment, the winning type of the lottery (“big hit”, “small hit” or “losing”) based on the random number for jackpot determination performed when the game ball wins the first starting port 44, and the first start A special symbol is selected based on the symbol random number value (random symbol value for symbol determination) acquired at the time of winning the mouth. The symbol determination table (at the time of winning the first start opening) is a table that is referred to when selecting the special symbol. The symbol random number value is a random number value for determining a special symbol, and is selected from 0 to 99 (100 types) regardless of the lottery winning type based on the jackpot determining random number value.

  In the symbol determination table (at the time of winning the first start opening), as shown in FIG. 22, a symbol designating command for designating a special symbol for each determination value data indicating the winning type of the lottery based on the random number for jackpot determination The relationship between (“zA1” to “zA3”) and the symbol random value for which the symbol designation command is selected is defined.

  In addition, when the winning type of the lottery based on the random number for determining the big hit is “small hit” (small hit determination value data), there is one type (zA2) of design designation commands to be selected. The command (zA2) is determined. Further, even when the winning type of the lottery based on the random number for jackpot determination is “losing” (losing determination value data), the symbol specifying command to be selected is one type (zA3), and the symbol specifying command ( zA3) is determined.

  On the other hand, when the winning type of the lottery based on the random number for determining the big hit is “big hit” (big hit determination value data), there are a plurality of special symbol types to be selected as shown in FIG. A plurality of symbols ("z0" to "z4") are also prepared for the hour symbol designating command (the jackpot selecting symbol command in FIG. 22). At the time of “big hit”, the big hit selection symbol command to be determined also changes according to the acquired symbol random number value. For example, when the symbol random number value acquired at the time of “big hit” is any of “40” to “59”, the big hit selection symbol command “z2” is selected, and the selection rate is 20/100. Become.

[Pattern determination table (at the time of winning the 2nd starting opening)]
Next, with reference to FIG. 23, the symbol determination table (at the time of winning the second start opening) will be described.

  In the present embodiment, the winning type of the lottery (“big hit” or “losing”) based on the random number for jackpot determination performed when the game ball wins the second start opening 45 and the second start opening winning are acquired. The special symbol is selected based on the symbol random number value (random symbol value for symbol determination). The symbol determination table (at the time of winning the second start opening) is a table that is referred to when selecting the special symbol.

  As shown in FIG. 23, in the symbol determination table (at the time of winning the second start opening), a symbol designating command for designating a special symbol for each determination value data indicating the winning type of the lottery based on the random number for jackpot determination (“ZA1” and “zA3”) and the symbol random number value for which the symbol designation command is selected are defined.

  In addition, even when the winning type of the lottery based on the random number for jackpot determination is “losing” (losing determination value data), the symbol specifying command to be selected is one type (zA3), and the symbol specifying command ( zA3) is determined.

  On the other hand, when the winning type of the lottery based on the random number for jackpot determination is “big hit” (big hit determination value data), as shown in FIG. 23, there are a plurality of types of special symbols to be selected. A plurality of types (“z0” and “z4”) of the symbol designating command for time (the symbol command for selecting the big hit in FIG. 23) are also prepared. At the time of “big hit”, the big hit selection symbol command to be determined also changes according to the acquired symbol random number value. For example, when the symbol random number value acquired at the time of “big hit” is any one of “29” to “99”, the big hit selection symbol command “z4” is selected, and the selection rate is 80/100. Become.

[Big hit type determination table]
Next, the jackpot type determination table will be described with reference to FIGS. In the present embodiment, when the big hit time selection symbol command (any one of “z0” to “z4”) is determined with reference to the symbol determination table (see FIGS. 22 and 23), the determined big hit time selection is performed. Based on the symbol command, the type of “big hit” (the content of the big hit game) is determined. The jackpot type determination table is a table that is referred to when determining the type of “hit” (the contents of the jackpot game) based on the jackpot selection symbol command.

  In the present embodiment, a big hit type determination table is provided for each gaming state at the time of winning the big hit. FIG. 24 is a jackpot type determination table (No. 1) that is referred to when “big hit” is won when the gaming state is “no low probability time”, and FIG. It is a jackpot type determination table (No. 2) that is referred to when “Big Jack” is won when “Yes”. FIG. 26 is a jackpot type determination table (part 3) that is referred to when “big hit” is won when the gaming state is “no high accuracy time”, and FIG. This is a big hit type determination table (part 4) that is referred to when “big hit” is won when “there is a short time”.

  Each jackpot type determination table defines the relationship between the jackpot selection symbol commands (“z0” to “z4”) and various parameters for determining the type of “hit”. As various parameters for determining the type of “big hit” (contents of the big hit game), the value of the hour / short flag, the number of time reductions, the value of the probability variation flag, and the number of rounds in the big hit game are defined.

  For example, when “big hit” is won in the state of “highly accurate time is short” and “z1” is determined as the big hit selection symbol command, as shown in FIG. As various parameters for determining the content of the big hit game), a time reduction flag “1”, a time reduction number “100”, a probability change flag “0”, and a round number “10” are set.

  The “number of rounds” defined in each jackpot type determination table is the number of rounds in which the opening time of the big prize opening is relatively long in the jackpot game. The “time-short flag” is one of management flags stored in the main RAM 73, and is a flag for managing whether or not the game state is “time-short game state”. When the gaming state is “time saving gaming state”, the time saving flag is “1 (ON)”. The “number of times reduced” is the number of times of special symbol change display given in the “time saving gaming state”.

[Winning effect information determination table]
Next, with reference to FIG. 28, the winning effect information determination table will be described.

  In the present embodiment, the main control circuit 70 (main CPU 71) determines the winning type ("big hit", "small hit", or "losing") determined at the time of winning (at the start opening winning), the symbol designation command or the big win. Based on the time selection symbol command, the sub-control circuit 200 determines information to be used when determining the production contents. For example, in the sub-control circuit 200, information used when determining the contents relating to the color change effect of the holding symbol indicating the reserved ball of the special symbol, the contents relating to the pre-reading effect, and the like is determined. The winning effect information determination table is referred to when determining the outline of the effect contents executed by the sub control circuit 200 based on the information acquired by the main control circuit 70 at the time of winning (at the start opening winning). It is a table.

  In the winning effect information determination table, “winning effect information 1” and “winning effect information 1” indicating the combination of various types of information determined at the time of winning (at the start opening winning time) and the effect contents executed by the sub-control circuit 200 are displayed. The relationship with “winning effect information 2” is defined. In the present embodiment, the various types of information determined at the time of winning (at the time of starting port winning) include the type of starting port, the type of determination value data, the type of symbol command selected at the big hit, and the type of symbol designating command. It is defined in the hour performance information determination table.

  Winning effect information 1 (“1A” to “1D”) defined in the winning effect information determination table is mainly used in the sub-control circuit 200 to change the color change effect of the reserved symbol indicating the reserved ball of the special symbol. It is the production information used when determining the content regarding. When the sub control circuit 200 receives the winning effect information 1 determined based on the winning effect information determination table, the sub control circuit 200 performs the color change effect of the holding symbol included in the category of the winning effect information 1. One production pattern is selected from a plurality of types of production patterns.

  In addition, winning effect information 2 (“2A” to “2D”) defined in the winning effect information determination table is prefetched based on a reserved ball of a special symbol (subsequent read-ahead continuous) in the sub-control circuit 200. This is the production information used when determining the content related to the production. When the sub control circuit 200 receives the winning effect information 2 determined based on the winning effect information determination table, the sub control circuit 200 provides a plurality of types of prefetch effects included in the category of the winning effect information 2. One production pattern is selected from the patterns.

  When referring to the winning effect information determination table of the present embodiment, for example, when “big hit” is won at the time of winning the first start opening, “1A” is given as winning effect information 1 regardless of the type of the jackpot selection symbol command. Is determined, and “2A” is determined as the winning presentation information 2.

[Variation production pattern determination table]
Next, the variation effect pattern determination table will be described with reference to FIG.

  In the present embodiment, the main control circuit 70 (main CPU 71), when starting the special symbol variation display, the winning type ("big hit", "small hit" or "losing"), the design designation command, the big hit selection symbol command, Based on information such as the variation time, the variation effect pattern of the special symbol is determined. The variation effect pattern determination table is a table that is referred to when determining the variation effect pattern of this special symbol.

  The variation effect pattern (information included in a special symbol effect start command described later) determined based on the variation effect pattern determination table is transmitted from the main control circuit 70 to the sub control circuit 200 (host control circuit 210). . And the sub control circuit 200 will determine the kind of production | presentation based on the received information, such as a variation production pattern and a game state, if the information of a variation production pattern is received.

  In the variation effect pattern determination table, as shown in FIG. 29, a combination of a symbol designation command, a jackpot selection symbol command and a variation time of a special symbol determined at the time of winning (at the time of winning a start opening), and a variation display of the special symbol The relationship with the type of effect (variation effect pattern) executed by the sub-control circuit 200 is defined.

  In the present embodiment, the variation effect pattern is represented by a two-digit number character, and the “upper” (first digit) parameter and the “lower” (second digit) parameter described in the variation effect pattern column in FIG. Expressed in combination with parameters. For example, when the symbol designation command determined at the time of winning (at the time of winning the start opening) is “zA1”, the jackpot selection symbol command is “z0”, and the variation time of the special symbol is “15000 msec”. The parameter is “C1” (a combination of the upper “C” and the lower “1”).

  In the present embodiment, the information about the variable effect parameter is included in a special symbol effect start command described later. At this time, the “upper” parameter and the “lower” parameter defined in the variable effect pattern column are stored in different parameter areas. Therefore, in the variation effect pattern determination table, the “upper” parameter and the “lower” parameter of the variation effect pattern are separately defined.

<Configuration of data table stored in sub-main ROM of pachinko machine>
Next, the configuration of various data tables stored in the sub main ROM 205 of the sub control circuit 200 of the pachinko gaming machine 1 will be described with reference to FIGS.

[Variation production table]
First, the variation effect table will be described with reference to FIG.

  In the pachinko gaming machine 1 according to the present embodiment, as described above, various effects are executed during the special symbol variation display under the control of the sub-control circuit 200 (host control circuit 210). The content (effect pattern) of the effect performed at this time is the change effect of the special symbol included in the special symbol effect start command (described later) transmitted from the main control circuit 70 to the sub-control circuit 200 at the start of the change display of the special symbol. It is determined based on pattern information and the like. The variation effect table is referred to when determining the effect content (effect pattern) based on information such as the variation effect pattern and the gaming state.

  In the variation effect table, as shown in FIG. 30, a combination of various information (including information on the variation effect pattern) determined at the time of winning (at the time of winning the start opening) and an effect pattern ("EN00" determined by lottery). ”To“ EN44 ”) and the contents of the effects, and the correspondence between the random values for selecting (determining) each effect pattern and the selection rate (winning probability) are defined. In the present embodiment, as various information determined at the time of winning (at the start opening winning), the types of variation design patterns of special symbols (“A0” to “A4”, “B1” to “B3”, and “C1”). ”To“ CF ”), special symbol variation time, winning type (“ big hit ”,“ small hit ”or“ losing ”), symbol designation command and jackpot selection symbol command are defined in the variation effect table.

  In the present embodiment, it is assumed that the variation time of the special symbol defined in the variation effect table is substantially the same as the effect time of the corresponding effect pattern. The random value defined in the variation effect table is a random value acquired in a command analysis process (sub lottery process) described later, and is any one of “0” to “999” (1000 types).

  When determining an effect pattern with reference to the change effect table of the present embodiment, for example, when the change pattern of the special symbol determined at the start of the special symbol change display is “C1” and selecting the effect pattern When the random number value acquired in the above is any value from “0” to “499”, “EN15” is selected as the effect pattern. In this case, an effect called “normal reach effect A” is performed in the variable symbol display period (15000 msec). Then, along with the end of the “normal reach effect A”, the “big hit” mode is displayed in the display area 13a of the display device 13, and the special symbol is fluctuated and stopped.

[Holding effect table]
Next, the hold effect table will be described with reference to FIG.

  In the pachinko gaming machine 1 of the present embodiment, various effects relating to the color change of the holding symbol indicating the holding ball of the special symbol are executed under the control of the sub-control circuit 200 (host control circuit 210). The content (effect pattern) of the color change effect of the holding symbol performed at this time is a prize included in a holding addition command to be described later transmitted from the main control circuit 70 to the sub control circuit 200 at the start of the special symbol variation display. It is determined based on hour performance information 1 ("1A" to "1D"). The holding effect table is referred to when the content (effect pattern) of the color change effect of the holding symbol is determined based on information such as the winning effect information 1.

  As shown in FIG. 31, the holding effect table includes a combination of various information (including winning effect information 1) determined at the time of winning (at the start opening winning) and the color of the holding symbol determined by lottery. Correspondence relationships between the production patterns (“HE00” to “HE19”) and production contents of the change production, the random value for selecting (determining) each production pattern, and the selection rate (winning probability) are defined. In the present embodiment, as various information determined at the time of winning a prize (at the start opening prize), winning effect information 1 (“1A” to “1D”), winning type (“big hit”, “small hit” or “ “Lose”), a symbol designation command, and a jackpot selection symbol command are defined in the hold effect table. In addition, the random value defined in the hold effect table is a random value acquired in a command analysis process (sub lottery process) described later, and is any one of “0” to “999” (1000 types).

  When determining the effect pattern of the color change effect of the reserved symbol with reference to the hold effect table of the present embodiment, for example, the winning effect information 1 determined at the start of the variation display of the special symbol is “1A”, When the jackpot selection symbol command is “z0” and the random value acquired when selecting the effect pattern is any value from “0” to “499”, the color of the symbol for holding “HE00” is selected as the effect pattern of the change effect. In this case, an effect referred to as “holding effect A” is performed as the color change effect of the reserved symbol.

[Pre-reading effect table]
Next, the prefetch effect table will be described with reference to FIG.

  In the pachinko gaming machine 1 of the present embodiment, when the variable display of the special symbol is suspended, the sub-control circuit 200 (host control circuit 210) causes the contents of the variable display of the suspended special symbol (reserved ball) Depending on the content, a predetermined pre-reading effect is performed. The contents (effect pattern) of the pre-reading effect performed at this time are the winning effect information 2 (included in a hold addition command, which will be described later) transmitted from the main control circuit 70 to the sub-control circuit 200 at the start of variable symbol display. “2A” to “2D”) and the like. The prefetch effect table is referred to when the contents of the prefetch effect (effect pattern) are determined based on information such as the winning effect information 2.

  In the prefetch effect table, as shown in FIG. 32, a combination of various information (including winning effect information 2) determined at the time of winning (at the time of winning the start opening) and an effect pattern of prefetching effects determined by lottery ("SE00" to "SE19") and the contents of the effects, and the correspondence between the random number value and the selection rate (winning probability) for selecting (determining) each effect pattern are defined. In the present embodiment, as the various information determined at the time of winning (at the start opening winning), the winning effect information 2 (“2A” to “2D”), the winning type (“big hit”, “small hit” or “Lose”), a symbol designating command and a jackpot selecting symbol command are defined in the prefetch effect table. In addition, the random value defined in the prefetch effect table is a random value acquired in a command analysis process (sub lottery process) described later, and is any one of “0” to “999” (1000 types).

  When determining the effect pattern of the prefetch effect by referring to the prefetch effect table of the present embodiment, for example, the effect information 2 at the time of winning determined at the start of the special symbol variation display is “2A”, and the symbol command selected at the big hit Is “z0” and the random number value obtained when selecting the effect pattern is any value from “0” to “499”, “SE00” is the effect pattern of the pre-read effect. Selected. In this case, an effect referred to as “prefetch effect A” is performed as the prefetch effect.

<Composition of various commands of pachinko machines>
Here, the configuration of various commands transmitted from the main control circuit 70 of the gaming machine (pachinko gaming machine 1) to the sub control circuit 200 will be described.

[Basic configuration]
First, the basic structure of a command will be described with reference to FIG. FIG. 33 is a diagram showing a basic configuration (basic format) of command data.

  In the present embodiment, the command transmitted from the main control circuit 70 to the sub control circuit 200 is composed of a command type section in which command type information is stored, and a parameter field section in which various information relating to games and effects are stored. Is done. In the present embodiment, information in the parameter field portion is analyzed by command analysis processing described later executed in the sub-control circuit 200, and various types of information relating to games and effects are acquired.

  The command type part is provided at the head part of the command and is composed of 8 bits (1 byte: fixed length). On the other hand, in the parameter field portion, information on the game and the effect is defined in bit units, and the bit length (length) of the parameter field portion changes according to the command type.

  In this embodiment, since the command transmission / reception operation is repeatedly performed in units of 8 bits, the parameter field part is also managed in units of 8 bits. Here, the area in units of 8 bits is referred to as a “parameter”. Also, the names of the parameters arranged in the parameter field part are referred to as “first parameter”, “second parameter”, “third parameter”,... From the head side of the command (command type part side).

  Below, as an example of the command, the configuration of the demo display command, special symbol effect start command, power interruption return command and hold addition command, and the contents of various information included in these commands will be specifically described with reference to the drawings. explain.

[Demo display command]
First, the structure of the demonstration display command and the contents of various information included in the command will be described with reference to FIG. FIG. 34 is a diagram showing a bit-by-bit configuration of the demo display command and the contents of various information stored in each bit.

  The demonstration display command includes a command type portion and a parameter field portion including one parameter (first parameter). That is, the number of bytes (command length) of the entire demonstration display command is 2 bytes (16 bits), and the number of bytes in the parameter field portion is 1 byte (8 bits).

  In the command type portion of the demo display command, a value “80H” indicating the type of the demo display command is stored.

  A “state number” (any one of 0 to 7) corresponding to the gaming state is stored in bit 0 (b0) to bit 2 (b2) of the first parameter of the demonstration display command. For example, if the value of the probability variation flag is “0” and the value of the time reduction flag is “0”, the “state number” is any one of “0” to “2” among “0” to “7”. Is set to bit 0 (b0) to bit 2 (b2). Bit 4 (b4) and bit 5 (b5) of the first parameter store the value of the time reduction flag (“0” or “1”) and the value of the probability change flag (“0” or “1”), respectively. . In addition, data “0” is always stored in each of bit 3 (b3), bit 6 (b6), and bit 7 (b7) of the first parameter. In the following, a bit in which data “0” is always stored is also referred to as “always 0 area”.

  In the sub-control circuit 200, when a command analysis process described later is performed on the demo display command having the above-described configuration, the game state information (game status) at the time of displaying the demo screen is acquired from the first parameter as the analysis result.

[Special symbol production start command]
Next, the configuration of the special symbol effect start command and the contents of various information included in the command will be described with reference to FIG. FIG. 35 is a diagram showing the configuration in bit units of the special symbol effect start command and the contents of various information stored in each bit.

  The special symbol effect start command is composed of a command type part and a parameter field part composed of five parameters (first parameter to fifth parameter). That is, the total number of bytes of the special symbol effect start command is 6 bytes (48 bits), and the number of bytes in the parameter field portion is 5 bytes (40 bits).

  In the command type portion of the special symbol effect start command, a value “81H” indicating the type of the special symbol effect start command is stored.

  A “state number” (any one of 0 to 7) corresponding to the gaming state is stored in bits 0 to 2 of the first parameter of the special symbol effect start command. Bit 4 and bit 5 of the first parameter store the value of the time reduction flag (“0” or “1”) and the value of the probability variation flag (“0” or “1”), respectively.

  Bit 6 of the first parameter stores information on winning / non-winning of the falling lottery (“falling lottery winning / refusal information”). If the falling lottery is not won, “0” is stored in the bit 6 of the first parameter as “falling lottery rejection information”, and if the falling lottery is won, the “falling lottery rejection information” is “ 1 "is stored in bit 6 of the first parameter. Also, bit 3 and bit 7 of the first parameter are always 0 area.

  In bits 0 to 6 of the second parameter of the special symbol effect start command, symbol designation commands (“zA1” to “zA3”) determined by lottery using the symbol determination table (see FIGS. 22 and 23). A value corresponding to is stored. Note that bit 7 of the second parameter is always 0 area.

  In bits 0 to 3 of the third parameter of the special symbol effect start command, “higher” information (“A”) of the change effect pattern determined by the lottery using the change effect pattern determination table (see FIG. 29). To “C”) are stored. Note that bits 4 to 7 of the third parameter are “always 0 range”.

  In bits 0 to 3 of the fourth parameter of the special symbol effect start command, “lower” information (“0”) of the change effect pattern determined by lottery using the change effect pattern determination table (see FIG. 29). To “9” and “A” to “F”) are stored. Note that bits 4 to 7 of the fourth parameter are “always 0 area”.

  In addition, in bits 0 to 6 of the fifth parameter of the special symbol effect start command, a value corresponding to the remaining short time variation number is stored. Note that bit 7 of the fifth parameter is always 0 area.

  In the sub control circuit 200, when a command analysis process described later is performed on the special symbol effect start command having the above-described configuration, the game state information (game status) at the start of the special symbol effect is acquired from the first parameter as the analysis result. The special symbol stop symbol designation information is obtained from the second parameter, the variation effect pattern number designation information is obtained from the third parameter and the fourth parameter, and the remaining short time variation number designation information is obtained from the fifth parameter. The

[Power failure recovery command]
Next, the structure of the power interruption return command and the contents of various information included in the command will be described with reference to FIGS. In the present embodiment, the power failure recovery command is composed of a set of two commands (a first power failure recovery command and a second power failure recovery command). FIG. 36 is a diagram showing a bit unit configuration of the first power failure return command and the contents of various information stored in each bit. FIG. 37 is a diagram showing a bit unit configuration of the second power interruption return command and the contents of various information stored in each bit.

(1) First power failure recovery command As shown in FIG. 36, the first power failure recovery command is composed of a command type portion and a parameter field portion including three parameters (first parameter to third parameter). The That is, the total number of bytes of the first power failure return command is 4 bytes (32 bits), and the number of bytes in the parameter field portion is 3 bytes (24 bits).

  A value “D1H” indicating the type of the first power failure return command is stored in the command type portion of the first power failure recovery command.

  A “state number” (any one of 0 to 7) corresponding to the gaming state is stored in bits 0 to 2 of the first parameter of the first power interruption return command. Bit 4 and bit 5 of the first parameter store the value of the time reduction flag (“0” or “1”) and the value of the probability variation flag (“0” or “1”), respectively. Bit 6 of the first parameter stores “falling lottery winning / notifying information”. Note that bit 3 and bit 7 of the first parameter are always 0 regions.

  Bit symbols 0 to 5 of the second parameter of the first power interruption return command store special symbol stop symbol designation information ("special stop symbol designation information"). Further, bit 6 of the second parameter has a value (“0” or “1”) corresponding to the stop state of the first special symbol at the time of detection of power interruption (“first special stop symbol selection state”). Is stored. In addition, in the most recent special symbol variation display (the variation display executed at the time of power interruption detection and before the power interruption detection is the latest one performed), the stop symbol of the first special symbol is selected. For example, the value of the “first special symbol selection state” is “1”, and if the symbol of the first special symbol is not selected, the value of the “first special symbol selection state” is “0”. Also, bit 7 of the second parameter is always 0 area.

  “Special stop symbol designation information” is stored in bits 0 to 5 of the third parameter of the first power interruption return command. In addition, in bit 6 of the third parameter, a value (“0” or “1”) corresponding to the selection state of the stop symbol of the second special symbol (“second special stop symbol selection state”) at the time of detecting power interruption. Is stored. In addition, in the latest special symbol variation display (the variation display executed at the time of power interruption detection and before the power interruption detection, the latest executed variation display), the stop symbol of the second special symbol is selected. For example, the value of “second special stop symbol selection state” is “1”, and if the stop symbol of the second special symbol is not selected, the value of “second special symbol selection state” is “0”. Also, bit 7 of the third parameter is always 0 area.

  In the sub-control circuit 200, when a command analysis process described later is performed on the first power failure recovery command having the above-described configuration, game state information (game status) at the time of power failure recovery is acquired from the first parameter as an analysis result. Then, information on the stop symbol of the first special symbol at the time of return from power interruption is obtained from the second parameter, and information on the stop symbol of the second special symbol at the time of return from power interruption is obtained from the third parameter.

(2) Second power failure recovery command As shown in FIG. 37, the second power failure recovery command is composed of a command type portion and a parameter field portion including three parameters (first parameter to third parameter). The That is, the total number of bytes of the second power failure recovery command is 4 bytes (32 bits), and the number of bytes in the parameter field portion is 3 bytes (24 bits).

  In the command type portion of the second power failure recovery command, a value “D2H” indicating the type of the second power failure recovery command is stored.

  In bits 0 to 2 of the first parameter of the second power interruption return command, a value corresponding to the number of reserved variable display suspensions of the second special symbol is stored. In bits 4 to 6 of the first parameter, a value corresponding to the number of holdings of variable display of the first special symbol is stored. Also, bit 3 and bit 7 of the first parameter are always 0 areas.

  Note that bits 0 to 2 or bits 4 to 6 of the first parameter of the second power failure recovery command store “000” when the number of reservations is 0, and when the number of reservations is 1 “001” is stored, “010” is stored when the number of holdings is two, “011” is stored when the number of holdings is three, and when the number of holdings is four, “100” is stored.

  “Internal control state number” is stored in bit 0 to bit 2 of the second parameter of the second power interruption return command. Also, bits 3 to 7 of the second parameter are always 0 area.

  Note that bits 0 to 2 of the second parameter of the second power failure recovery command store “000” as the “internal control state number” when the internal control state is the demonstration screen display state. “001” is stored as “internal control state number” when the state is the special symbol variation state (the state during special symbol variation), and “010” is stored when the internal control state is the special symbol determination state. Stored as “internal control state number”, and when the internal control state is the start state per special symbol, “011” is stored as “internal control state number”. Further, in the second parameter bit 0 to bit 2 of the second power failure recovery command, “100” is stored as the “internal control state number” when the internal control state is the big prize opening open state. When the control state is an inter-round interval state, “101” is stored as the “internal control state number”, and when the internal control state is the end state per special symbol, “110” is the “internal control state number”. Stored as

  Further, “number of remaining short state fluctuations” (“0” to “99”) is stored in bits 0 to 6 of the third parameter of the second power failure recovery command. Also, bit 7 of the third parameter is always 0 area.

  In the sub-control circuit 200, when a command analysis process to be described later is performed on the second power failure recovery command having the above-described configuration, the analysis result indicates the number of reserved special variable display numbers at the time of power failure recovery from the first parameter. Information is acquired, information on the internal state at the time of power failure recovery is acquired from the second parameter, and information on the remaining short time fluctuation count at the time of power failure recovery is acquired from the third parameter.

[Hold addition command]
Next, the configuration of the pending addition command and the contents of various information included in the command will be described with reference to FIG. FIG. 38 is a diagram showing a bit unit configuration of the pending addition command and the contents of various information stored in each bit.

  The pending addition command is composed of a command type part and a parameter field part composed of three parameters (first parameter to third parameter). That is, the total number of bytes of the pending addition command is 4 bytes (32 bits), and the number of bytes in the parameter field portion is 3 bytes (24 bits).

  A value “85H” indicating the type of the hold addition command is stored in the command type portion of the hold addition command.

  In bits 0 to 2 of the first parameter of the hold addition command, a value corresponding to the hold number of the variable display of the second special symbol is stored. In bits 4 to 6 of the first parameter, a value corresponding to the number of holdings of variable display of the first special symbol is stored. Also, bit 3 and bit 7 of the first parameter are always 0 areas.

  “Big hit selection symbol information” is stored in bits 0 to 2 of the second parameter of the pending addition command. The “hit-hit selection symbol information” is information corresponding to the big-hit selection symbol commands (“z0” to “z4”) determined by lottery using the symbol determination table (see FIGS. 22 and 23). is there.

  Bit 3 of the second parameter stores “Large probability big hit / fail information”. Note that “1” is stored in “bit 3” as “big hit success / failure information” at low probability when “big hit” is won at low probability, and “low probability” when “losing” is won at low probability. “0” is stored in bit 3 as “time big hit success / failure information”. Further, in the bit 4 of the second parameter, “high probability big hit success / failure information” is stored. Note that “1” is stored in “bit 4” as “high-probability jackpot success / failure information” when winning a “big hit” at high accuracy, and “high probability” is won when “losing” is won at high accuracy. “0” is stored in bit 4 as “time big hit success / failure information”. These pieces of information are determined based on the lottery results used in the jackpot type determination table (see FIGS. 24 to 27).

  In bits 5 and 6 of the second parameter, “first winning effect information” is stored. “First winning effect information” is information corresponding to winning effect information 1 (“1A” to “1D”) determined by lottery using the winning effect information determination table (see FIG. 28). It is. For example, when the winning effect information 1 is “1A”, “00” is stored in bits 5 and 6 as the “first winning effect information”, and the winning effect information 1 is “1B”. In this case, “01” is stored in bit 5 and bit 6 as “first winning effect information”. Further, for example, when the winning effect information 1 is “1C”, “10” is stored in the bits 5 and 6 as the “first winning effect information”, and the winning effect information 1 is “1D”. In this case, “11” is stored in bit 5 and bit 6 as “first winning effect information”. Also, bit 7 of the second parameter is always 0 area.

  “Second winning effect information” is stored in bits 4 and 5 of the third parameter of the hold addition command. The “second winning effect information” is information corresponding to winning effect information 2 (“2A” to “2D”) determined by lottery using the winning effect information determination table (see FIG. 28). It is. For example, when the winning effect information 2 is “2A”, “00” is stored in bits 4 and 5 as the “second winning effect information”, and the winning effect information 2 is “2B”. In this case, “01” is stored in bits 4 and 5 as “second winning effect information”. Further, for example, when the winning effect information 2 is “2C”, “10” is stored in the bits 4 and 5 as the “second winning effect information”, and the winning effect information 2 is “2D”. In this case, “11” is stored in bit 4 and bit 5 as “second winning effect information”.

  Note that the values of the “first winning effect information” and the “second winning effect information” are executed based on pre-read information (information related to pre-change hold) at the time of the hold addition command generation (hold addition). It may be changed (updated) in accordance with the number of productions to be performed (the number of suspensions in which the prefetching production is executed).

  Bit 6 of the third parameter stores “falling lottery information”. When there is no fall, “0” is stored in bit 6 as “falling lottery information”, and “1” is stored in bit 6 as “falling lottery information” when there is a fall. In addition, each of bit 0 to bit 3 and bit 7 of the third parameter is always 0 region.

  In the sub-control circuit 200, when a command analysis process to be described later is performed on the pending addition command having the above-described configuration, information on the number of suspended display of the special symbol variable display at the time of winning is acquired as the analysis result, The designation information of the hold effect is acquired from the second parameter, and the specification information of the prefetch effect is acquired from the third parameter.

[Other commands]
Next, the configuration of commands other than the various commands described above and the contents of various information included in the commands will be described. Here, the illustration of the configuration of other various commands is omitted, and only the configuration of the parameter field portion in each command and the outline of various information included in the command will be described.

(1) Special Effect Stop Command The parameter field part of the special effect stop command is composed of two parameters (first parameter and second parameter).

  In the first parameter of the special effect stop command, for example, game status information (game status) such as a falling lottery, a probability change flag, a time reduction flag, and a state number is stored. The second parameter stores information on the stop symbol of the special symbol.

  In the sub-control circuit 200, when a command analysis process to be described later is performed on the special effect stop command having the above-described configuration, as the analysis result, when the effect at the time of special symbol variation display is ended from the first parameter and the second parameter The various game information is acquired.

(2) Special symbol start display command The parameter field portion of the special symbol start display command is composed of two parameters (first parameter and second parameter).

  The first parameter of the special symbol start display command stores, for example, game state information (game status) such as a state number. The second parameter stores information on the stop symbol of the special symbol.

  In the sub-control circuit 200, when a command analysis process to be described later is performed on the special symbol start display command having the above-described configuration, the analysis result includes information on the special symbol hit state (for example, from the first parameter and the second parameter). Information such as whether or not a big hit is being made, whether or not a small hit is being made).

(3) Display command during opening of special winning opening The parameter field portion of the display command during opening of large winning opening is composed of three parameters (first parameter to third parameter).

  For example, game state information (game status) such as a state number is stored in the first parameter of the display command for opening the big winning opening. The second parameter stores information on a special symbol stop symbol. Also, information on the number of rounds (“0” to “15”) is stored in the third parameter.

  In the sub-control circuit 200, when a command analysis process described later is performed on the display command for opening the special winning opening having the above-described configuration, information on a special symbol hit state is acquired from the first parameter and the second parameter as an analysis result. Then, information on the number of rounds is acquired from the third parameter.

(4) Inter-Round Display Command The parameter field part of the inter-round display command is composed of three parameters (first parameter to third parameter).

  In the first parameter of the display command between rounds, for example, game state information (game status) such as a state number is stored. The second parameter stores information on a special symbol stop symbol. In addition, information on the number of rounds (“0” to “14”) is stored in the third parameter.

  In the sub-control circuit 200, when a command analysis process to be described later is performed on the inter-round display command having the above-described configuration, the information about the special symbol hit state is acquired from the first parameter and the second parameter as the analysis result. Information on the number of rounds is acquired from the three parameters.

(5) Special symbol end display command The parameter field portion of the special symbol end display command is composed of two parameters (first parameter and second parameter).

  For example, game status information (game status) such as a status number is stored in the first parameter of the special symbol end display command. The second parameter stores information on the stop symbol of the special symbol.

  In the sub control circuit 200, when a command analysis process described later is performed on the special symbol end display command having the above-described configuration, information on the special symbol hit state is acquired from the first parameter and the second parameter as an analysis result. The

(6) Hold Subtraction Command The parameter field part of the hold subtraction command is composed of three parameters (first parameter to third parameter).

  For example, game status information (game status) such as a falling lottery, a probability change flag, a time reduction flag, and a state number is stored in the first parameter of the hold subtraction command. The second parameter stores information on the number of reserved special variable display. The third parameter stores information on the number of remaining short games.

  In the sub-control circuit 200, when a command analysis process described later is performed on the pending subtraction command having the above-described configuration, the game state information at the start of the change is acquired from the first parameter as the analysis result, and the change is performed from the second parameter. Information on the number of reserved games at the start is acquired, and information on the number of remaining short-time games is acquired from the third parameter.

(7) Winning Information Command The parameter field portion of the winning information command is composed of one parameter (first parameter).

  For example, winning detection information such as detection results of the count sensors 53c and 54c is stored in the first parameter of the winning information command.

  In the sub-control circuit 200, when a command analysis process described later is performed on the winning information command having the above configuration, the winning detection information of the big winning opening is acquired from the first parameter as the analysis result.

(8) Fraud detection related command The parameter field part of the fraud detection related command includes two parameters (a first parameter and a second parameter).

  The first parameter of the fraud detection-related command includes, for example, door opening detection (open / closed detection, closing detection, opening detection), illegal winning detection of the first grand prize opening, illegal winning detection of the second grand prize opening, ordinary electric Stores information such as detection of illegal winnings of a prize. The second parameter stores information such as induction magnetic field detection, magnetic detection, and sensor abnormality detection.

  In the sub-control circuit 200, when a command analysis process described later is performed on the fraud detection-related command having the above configuration, fraud detection information is acquired from the first parameter and the second parameter as an analysis result.

(9) Payout abnormality-related command The parameter field portion of the payout abnormality-related command is composed of one parameter (first parameter).

  The first parameter of the payout abnormality-related command stores, for example, information such as payout error information and lower pan full information.

  In the sub control circuit 200, when a command analysis process described later is performed on the payout abnormality-related command having the above configuration, payout abnormality information is acquired from the first parameter as an analysis result.

(10) Initialization Command The parameter field part of the initialization command is composed of one parameter (first parameter).

  In the first parameter of the initialization command, for example, information on initialization factors at the time of power-on such as a checksum abnormality, power failure recovery without power failure detection, or when the RWM initialization switch 39 is pressed is stored.

  In the sub-control circuit 200, when a command analysis process to be described later is performed on the initialization command having the above configuration, initialization factor designation information is acquired from the first parameter as an analysis result.

(11) Other Further, the command transmitted from the main control circuit 70 to the sub control circuit 200 is generated in the display process for euphoria performed in S125 in the system timer interrupt process (see FIG. 62) described later. Contains display related commands. The display-related commands include, for example, the ratio of the currently memorized items in the display device 13 (10 sets), the ratio of consecutive actors (10 sets), the ratio of actors (total), and the ratio of consecutive actors (total) The information necessary for displaying etc. is included.

<Overview of Pachinko machine command reception processing and command analysis processing>
Next, an overview of command reception processing and command analysis processing performed when the host control circuit 210 of the pachinko gaming machine 1 receives the various commands described above will be described with reference to FIG. FIG. 39 is a diagram showing an overview of command reception processing in this embodiment. This command reception process is performed as a reception interrupt process in a later-described main / sub command control process executed by the host control circuit 210.

  In the present embodiment, as shown in FIG. 39, when the command described above is transmitted from the main control circuit 70 (main CPU 71) to the host control circuit 210 and the host control circuit 210 receives the command, first, the host control circuit 210 is received. Writes the received command data in a ring buffer provided in the host control circuit 210. If an error occurs during command reception, the set information of the received command data and error information is written to the ring buffer.

  Here, FIG. 40 shows a schematic configuration of the ring buffer. In the present embodiment, the ring buffer includes a buffer area for storing received command data and a buffer area for storing corresponding error information. The size of each buffer area is 2048 bytes, and an address (“0” to “2047”) is assigned to each 1-byte storage area.

  In the buffer area for storing the command data, the command data is stored for each 1-byte storage area, and the command data is stored in the order of command reception from the head address area of the buffer area. Also in the buffer area for storing error information, error information is stored for each 1-byte storage area, and the error information is stored in the order of command reception from the top address side of the buffer area. At this time, the error information is stored in the storage area of the error information address associated one-to-one with the address of the corresponding command data storage area.

  When a command is received after the command data is stored at the last address “2047” of the ring buffer, the command data is stored in the storage area of the head address “0” of the ring buffer.

  Next, after the command data is stored in the ring buffer described above, the host control circuit 210 transfers the command data stored in the ring buffer to the sub work RAM 210a for storage.

  Then, the host control circuit 210 analyzes the contents of the command stored in the sub work RAM 210a and acquires various types of information. Specifically, the host control circuit 210 determines the command type based on the information stored in the command type part of the command, and acquires various information relating to the game and the effect stored in the parameter field part of the command.

  When the command analysis process described above is performed, the following effects can be obtained based on the structural features of the command.

  As described above, among commands such as the demo display command, special symbol effect start command, first power interruption return command, special effect stop command, special symbol start display command, etc. Game status information (game state information) is stored in the first parameter arranged at the head (second byte from the head of the command). Therefore, when these commands are received and the command analysis processing is performed for each byte, the command analysis processing in the second byte from the start of command reception is always the game status regardless of the command type. Since this is an analysis process, the analysis process of the second byte can be shared in the analysis process of these commands. That is, when command analysis processing is performed for these commands, the timing of the game status analysis processing based on the start of the command analysis processing is the same for any command, and the game status Analysis processing can also be standardized. In this case, the efficiency of command analysis processing in the host control circuit 210 can be improved, and more advanced presentation control can be performed.

  Further, in the command analysis process for the command having the above-described configuration, the constant 0 area provided in the predetermined bit area in each parameter is checked, the valid range of each data stored in the parameter is checked, and the stored data By checking these combinations, it is possible to determine whether the command is valid. In this case, since the number of check items in the determination process increases, it is possible to more accurately determine the validity of the received command, and it is possible to provide a safer game for the player.

<Pachinko machine animation request construction method>
In the pachinko gaming machine 1 of the present embodiment, the host control circuit 210 in the sub-control circuit 200 controls various effects when the display device 13 is controlled based on various commands received from the main control circuit 70. A process (hereinafter referred to as an animation request construction process) for generating a command signal (effect information (that is, request)) for operating the effect device (including the display device 13) is performed.

[Overview of animation request construction process]
First, an outline of the animation request construction process will be described with reference to FIG. Note that FIG. 40 is a diagram illustrating an outline of an operation (generation request generation operation) when an animation request is constructed.

  When the host control circuit 210 receives various commands from the main control circuit 70, first, based on the received command, the host control circuit 210 generates a request referred to as an animation request including designation information of effect contents (not shown). Next, the host control circuit 210 generates various requests (production start request) such as a drawing request, a sound request, a lamp request, and an accessory request based on the generated animation request.

  Thereafter, the host control circuit 210 outputs the generated requests to the control circuit (controller) of the corresponding rendering device. Specifically, the host control circuit 210 outputs a sound request and a lamp request to the sound / LED control circuit 220 and outputs a drawing request to the display control circuit 230. Further, the accessory request generated by the host control circuit 210 is delivered between the processes related to the accessory control performed in the host control circuit 210 and then output to the motor controller 270.

  Then, the sound / LED control circuit 220 controls the sound reproduction operation by the speaker 11 based on the input sound request. Further, the sound / LED control circuit 220 controls the light emission effect (LED animation) operation by the lamp (LED) group 18 based on the input lamp request. The display control circuit 230 controls the image display effect operation by the display device 13 based on the input drawing request. Further, the host control circuit 210 controls the rendering operation by the accessory 20 based on the generated accessory request.

<Speaker drive control method for pachinko machines>
Next, the contents of the drive control processing of the speaker 11 executed by the voice / LED control circuit 220 when a sound request is output from the host control circuit 210 of the pachinko gaming machine 1 to the voice / LED control circuit 220 will be described. .

[Overview of speaker control]
First, an outline of a control method when driving the speaker 11 provided in the pachinko gaming machine 1 will be described with reference to FIG. FIG. 42 is a signal flow diagram when driving the speaker (sound reproduction).

  At the time of sound reproduction (output) of the speaker 11, first, a sound request is output from the host control circuit 210 in the sub-control circuit 200 to the sound / LED control circuit 220. In the present embodiment, the presentation control process (sub control main process described later) of the host control circuit 210 is performed at a predetermined FPS cycle (for example, about 16.7 msec, about 33.3 msec, etc.). Transmission processing of the sound request to the LED control circuit 220 is also performed at a predetermined FPS cycle.

  Next, when a sound request is input to the voice / LED control circuit 220, the voice / LED control circuit 220 sets a voice signal (audio data) for setting a voice output pattern from the speaker 11 based on the sound request. Is transmitted to the built-in relay board 260. At this time, the transmission process of the audio signal from the audio / LED control circuit 220 to the built-in relay board 260 is performed at a cycle of about 4 msec.

  The built-in relay board 260 amplifies the received audio signal, outputs it to the speaker 11, and drives the speaker 11. Thereby, the sound reproduction (production) operation by the speaker 11 is executed.

<Outline of audio playback control method for pachinko machines>
Next, referring to FIG. 43, an outline of the sound reproduction processing executed by the sound / LED control circuit 220 when a sound request is output from the host control circuit 210 of the pachinko gaming machine 1 to the sound / LED control circuit 220 will be described. While explaining. FIG. 43 is a diagram showing an outline of the operation of the audio / LED control circuit 220 during the audio reproduction process.

  In the present embodiment, sound data to be output to the speaker 11 is stored in the CGROM 206. When a sound request is input to the sound / LED control circuit 220, the sound / LED control circuit 220 specifies an access number based on the sound request, and reads access data associated with the access number from the CGROM 206.

  In the present embodiment, the sound request includes not only the access number but also various sequence playback control commands (for example, start, stop, loop, etc. of audio playback) necessary for the audio playback processing generated in the sub-board 202. Command).

  Then, the audio / LED control circuit 220 performs audio reproduction processing based on the read access data. At this time, in this embodiment, sound reproduction control is performed by simple access control. Here, “simple access control” refers to a plurality of command register sequences in which the voice / LED control circuit 220 is registered in the CGROM 206 (external ROM) based on a sound request transmitted from the host control circuit 210. It is a control method for setting all at once. The number of simple access controls that can be executed simultaneously by the voice / LED control circuit 220 depends on the number of execution systems (four in this embodiment).

  FIG. 44 shows a schematic configuration of access data. As shown in FIG. 44, the access data includes a plurality of set information of setting data and addresses arranged in a predetermined order. A simple access end code (code indicating the end of audio reproduction) is placed at the end of the access data. ) Is stored. As shown in FIG. 43, when a plurality of access data is associated with one access number, a simple access end code is provided only for the last access data.

  When the setting data is set to the corresponding address for the access data having such a configuration, a reproduction code corresponding to the setting data is executed, and audio reproduction is performed. Then, this playback code execution process is sequentially performed from the setting data on the head side in the access data to the end, and when the simple access end code is finally set, the audio playback operation based on the read access data is completed. To do.

<Various drive control methods for lamps (LEDs)>
Next, when a lamp request is output from the host control circuit 210 to the sound / LED control circuit 220, the contents of various drive control processes of the plurality of LEDs included in the lamp group 18 executed by the sound / LED control circuit 220 Will be described. In the lamp control method of the present embodiment described below, an LED is described as an example of the light emitting element, but the present invention is not limited to this, and the present embodiment is also applied to other arbitrary light emitting elements. The lamp control method can be similarly applied.

[Outline of LED control]
First, an outline of a control method when driving (lighting / extinguishing) the LED provided in the pachinko gaming machine 1 will be described with reference to FIG. FIG. 45 is a signal flow diagram during LED driving (lighting / extinguishing).

  When the LED is driven (turned on / off), first, a lamp request (LED control request) is output from the host control circuit 210 in the sub-control circuit 200 to the sound / LED control circuit 220. In the present embodiment, the presentation control process (sub control main process described later) of the host control circuit 210 is performed at a predetermined FPS cycle (for example, about 16.7 msec, about 33.3 msec, etc.). The lamp request transmission process to the LED control circuit 220 is also performed at a predetermined FPS cycle.

  Next, when a lamp request is input to the voice / LED control circuit 220, the voice / LED control circuit 220 sets LED data (drive data) for setting an LED lighting pattern (LED animation) based on the lamp request. ) Is transmitted to each LED driver 280 in the lamp group 18. At this time, LED data is transmitted from the voice / LED control circuit 220 to the LED driver 280 by the SPI communication method. The LED data transmission process from the voice / LED control circuit 220 to the LED driver 280 is performed at a cycle of about 4 msec.

  Then, the LED driver 280 turns on / off the connected LED 281 (light emitting means) in a predetermined pattern based on the received LED data. As a result, an effect operation based on LED animation is executed.

  Note that the light emission mode based on the LED data is controlled by a signal (control signal) generated based on the LED data transmitted from the LED driver 280 to the LED 281 and capable of controlling the light emission mode. Specifically, the LED 281 is turned on, turned off, blinked, and the light emission mode is changed according to electrical waveform parameters (voltage value, current value, pulse width duty ratio, etc.) of the signal transmitted from the LED driver 280 to the LED 281. Is controlled.

  Moreover, although this embodiment demonstrated the example which uses the signal produced | generated based on LED data as a control signal for driving LED281, this invention is not limited to this. The control signal for driving the LED 281 may be a transfer mode of LED data (drive data) or data generated based on the LED data. Here, “data generated based on LED data” includes a signal, a command, and a voltage change. In this case, the control means that has received the LED data drives the other control means. A control signal based on data or drive data is transmitted.

[Voice / LED control circuit and connection configuration between LEDs]
Next, a connection configuration between the sound / LED control circuit 220 and each LED 281 will be described with reference to FIG. FIG. 46 is a schematic connection configuration diagram between the sound / LED control circuit 220 and the LED 281.

  In the present embodiment, as shown in FIG. 46, the audio / LED control circuit 220 uses a physical system 0 (SPI channel 0) and a physical system 1 (SPI channel 1) as LED data output systems (SPI channels). use. A plurality of LED drivers (devices) 280 are connected in parallel to each physical system via an SPI bus. In the example shown in FIG. 46, 16 LED drivers 280 (device 0 to device 15) are connected in parallel to each physical system.

  Each LED driver 280 is provided with a plurality of output ports (hereinafter simply referred to as “ports”) in which LED data is set, and one LED 281 is connected to each port (connection unit). That is, in this embodiment, the LED 281 is an LED 281 that is statically controlled. In the present specification, the statically controlled LED 281 is referred to as a static LED 281.

  In the example shown in FIG. 46, each LED driver 280 (each device) is provided with 16 ports (port 0 to port 15). That is, 16 LEDs 281 are connected to each LED driver 280 (each device). In the present embodiment, 16 LEDs 281 are connected to each LED driver 280. However, the present invention is not limited to this, and each LED driver is according to the function and specification of the LED driver 280 (device). Eight, thirty-two, sixty-four, etc. LEDs 281 may be connected to 280.

  In the pachinko gaming machine 1 configured as shown in FIG. 46, at the time of activation, the voice / LED control circuit 220 sets various parameters related to the connection configuration of the LEDs 281 for each SPI channel. Specifically, the voice / LED control circuit 220, at startup, uses the number of devices used in each SPI (the number of LED drivers 280 connected to each SPI channel), the LED 281 start port, the LED 281 end port, and the LED driver. A start address of 280 is set. For example, in the example shown in FIG. 46, “16” is set for the number of devices used for SPI, “0” is set for the start port, “15” is set for the end port, and “0” is set for the start address. The start address of the LED driver 280 is set as appropriate for each SPI channel, and is not limited to “0”.

  When various parameters relating to the connection configuration of the LED 281 are set as described above, for example, the address of the LED 281 connected to the port 15 of the device 15 (LED driver) connected to the SPI channel 0 in FIG. , Device number = 15 and port number = 15.

  Here, the connection configuration between the sound / LED control circuit 220 and the LED driver 280 will be described in more detail with reference to FIG. 47 is a connection configuration diagram between the sound / LED control circuit 220 and the LED driver 280. FIG.

  Since the audio / LED control circuit 220 and the LED driver 280 are connected by the SPI bus (signal wiring means) as described above, the serial clock (SCL) signal wiring (in the physical channel (SPI channel)) ( Timing signal lines) and signal wiring (data signal lines) for serial data (SDO, SDI) are provided as separate wirings. In each physical system (SPI channel) of the sound / LED control circuit 220 (master), the output terminals (SCL_P *, SCL_N *: “*”) of the serial clock signal (timing signal) of the sound / LED control circuit 220 are 1 or 2) is connected to the input terminal (SCL_P, SCL_N) of the serial clock signal of each LED driver 280 (slave). The output terminals (SDO_P *, SDO_N *) of the serial data (transmission data including drive data) of the audio / LED control circuit 220 are connected to the serial data input terminals (SDI_P, SDI_N) of each LED driver 280. Is done.

  In the present embodiment, basically, the voice / LED control circuit 220 (master) continues to transmit data between the voice / LED control circuit 220 and the LED driver 280, and each LED driver 280 (slave) is sent. Received data unilaterally. At this time, each LED driver 280 detects the rising edge of the serial data and starts inputting the serial data to the internal shift register.

[Configuration of serial data]
FIG. 48 shows the configuration (format) of serial data transmitted from the sound / LED control circuit 220 to the LED driver 280.

  In this embodiment, as shown in FIG. 48, “1” (specific data) is continuously stored in an area of 16 bits or more at the head of serial data. Therefore, when the LED driver 280 continuously detects reception of “1” 16 times or more, the LED driver 280 enters a serial data input standby state.

  The storage area of the device address (the address of the LED driver 280) and the storage area of the register address are arranged in this order after the storage area (first data portion) of “1” of 16 bits or more in the serial data. . The device address (output destination information) storage area (second data portion) and the register address storage area are each composed of an 8-bit (1 byte) area.

  In the present embodiment, as shown in FIG. 48, “0” (predetermined data) is stored in the storage area of the first bit of the device address. Therefore, if the LED driver 280 receives and detects “0” after continuously detecting “1” 16 times or more, the LED driver 280 indicates a signal (output destination designation signal) corresponding to the device address. It will be in a standby state.

  In addition, after the register address storage area in the serial data, the LED data storage area (third data section) is arranged, and the serial data transmission end is terminated in the last storage area of the serial data. “0FFH” (FF) shown is arranged. This “0FFH” is composed of a storage area of 8 bits (1 byte), and “1” is stored in each bit area.

[Configuration and operation overview of LED driver]
Next, an example of the internal configuration of the LED driver 280 will be described with reference to FIG. 49 is a schematic internal configuration diagram of the LED driver 280.

  As shown in FIG. 49, the LED driver 280 includes a digital control unit 280a, an I / O unit 280b, an ISET unit 280c, a terminal group 280d, and a port group 280e.

  Based on the signals received via the terminal group 280d and the I / O unit 280b, the digital control unit 280a outputs a drive signal (lighting / extinguishing signal) to the LED 281 connected to its own LED driver 280.

  The ISET unit 280c is a functional unit provided to prevent an excessive current from flowing through the LED 281. The ISET unit 280c forcibly stops (turns off) the operation of the LED driver 280 when an excessive current is detected.

  The terminal group 280d includes a serial clock signal input terminal (SCL), a serial data input terminal (SDI), a serial data output terminal (SDO), a signal format selection terminal (IFMODE), and an output enable terminal (OE). A plurality of device address selection terminals (DA0 to DA5) and an error flag output terminal (XERR). 49, for simplification of description, the two input terminals “SCL_P” and “SCL_N” of the serial clock signal shown in FIG. 47 are shown as one input terminal “SCL”, and the serial clock signal shown in FIG. Two input terminals “SDI_P” and “SDI_N” of data are indicated by one input terminal “SDI”.

  In the present embodiment, the LED driver 280 is an SPI-compatible driver, and therefore, the serial clock signal input terminal (SCL), the serial data input terminal (SDI), and the serial data output terminal (SDO), respectively. It is possible to communicate with the outside through the three connected communication wires. At this time, the LED driver 280 (slave) performs input / output control of serial data based on the serial clock signal input from the master (audio / LED control circuit 220).

  In this embodiment, as described above, serial data is unilaterally transmitted from the voice / LED control circuit 220 to the LED driver 280 between the voice / LED control circuit 220 and the LED driver 280. Therefore, in this embodiment, when serial data is transmitted and received between the voice / LED control circuit 220 and the LED driver 280, the serial clock signal input terminal of the LED driver 280 among the three communication wirings. (SCL) and a communication wiring connected to the serial data input terminal (SDI) are used.

  Here, FIG. 50 shows an outline of the operation when 1-bit data is input to each input terminal (SDI_P, SDI_N, SCL_P, SCL_N) in the LED driver 280.

  In the present embodiment, when “0” is input to the input terminal SDI_P of the LED driver 280 and “1” is input to the input terminal SDI_N, as shown in FIG. “0” is input to a digital circuit (for example, a digital control unit 280a described later). When “1” is input to the input terminal SDI_P of the LED driver 280 and “0” is input to the input terminal SDI_N, “1” is input to the digital circuit inside the LED driver 280. When the 1-bit data input to the input terminal SDI_P and the input terminal SDI_N of the LED driver 280 is the same (when “0” or “1” is input to both input terminals), the LED driver In the digital circuit inside 280, the previous input value is maintained.

  As shown in FIG. 50, the relationship between the combination of 1-bit data input to the input terminal SCL_P and the input terminal SCL_N of the LED driver 280 and the input value input to the internal digital circuit is also described above. The same as that of the input terminal SDI_P and the input terminal SDI_N.

  In the signal format selection terminal (IFMODE), a predetermined interface can be selected from a differential interface having a different logic operation method in SDI and SCL and an interface in the single end mode. The output enable terminal (OE) is a terminal that enables lighting / non-lighting of all the LEDs 281 by an external terminal. Specifically, by setting the signal level of the output enable terminal (OE) to a high level, the output of the LED driver 280 can be turned on, and by setting the signal level of the output enable terminal (OE) to a low level. The output of the LED driver 280 can be turned off.

The device address of the LED driver 280 is set in the plurality of device address selection terminals (DA0 to DA5). When the serial data is read into the shift register in the LED driver 280, a device address (device address information input from the voice / LED control circuit 220) designated by the serial data output destination includes a plurality of device addresses. Serial data is read when it matches the address set in the device address selection terminals (DA0 to DA5). The device address determination process is performed by the digital control unit 280a.

  Here, FIG. 51 shows a table summarizing the address setting mode of the LED driver 280.

  In the present embodiment, two types of modes, a device control mode and a bus control mode, are provided as address setting modes of the LED driver 280. The bus control mode is a mode in which serial data is read regardless of data (device addresses) set in a plurality of device address selection terminals (DA0 to DA5).

  When the device address of the LED driver 280 is set in the device control mode, the data “a0” to “a5” defined in “Bit0” to “Bit5” in FIG. 51 are the device address selection terminals (DA0). ~ Set to the device address selection terminal (DA5). Note that the data “a0” to “a5” defined in “Bit0” to “Bit5” in FIG. 51 change according to the device address of the LED driver 280. Further, it can be determined from the data defined in “Bit 6” in FIG. 51 whether the currently set address setting mode is the bus control mode or the device control mode.

  The error flag output terminal (XERR) is a terminal from which an error flag value “1” is output when an abnormality is detected. The error flag output operation from the error flag output terminal (XERR) is performed only during the abnormality detection period, and when the error flag value “1” is output, the LED driver 280 automatically returns.

  The error flag value “1” output from the error flag output terminal (XERR) is stored in the register. Further, while the error flag value “1” is output from the error flag output terminal (XERR), the register of the LED driver 280 is latched (holds the state). When the register becomes readable, the error is canceled and “0” is output from the error flag output terminal (XERR) to the register.

  The port group 280e is composed of a plurality of ports (48 in the example shown in FIG. 49), and one LED 281 is connected to each port. 49, a red component LED 281 is connected to the port “OUTR *” (“*” is 0 to 15), and a green component LED 281 is connected to the port “OUTG *”. The blue component LED 281 is connected to “*”.

  In the present embodiment, one color is emitted by the red component LED 281, the green component LED 281, and the blue component LED 281 connected to the adjacent ports “OUTR *”, “OUTG *”, and “OUTB *”, respectively. To. In addition, this invention is not limited to this, As a kind of LED connected to the port of LED driver 280, besides LED kind which light-emits one color using LED281 of each color component of three primary colors, You may provide LED for exclusive use of monochromatic light emission separately.

  Here, FIG. 52 shows a table summarizing the relationship between the physical system (SPI channel) to which the LED 281 is connected, the device address of the LED driver 280, and the output terminal of the LED driver 280. In the example shown in FIG. 52, two physical systems (physical system 0 and physical system 1) are used as the physical system, the number of LED drivers 280 connected to each physical system is 16, and each LED driver 280 is connected. This is a configuration example when the number of LEDs 281 connected to is 48.

[LED data]
Next, the configuration of LED data (LED data set for each port) output from the sound / LED control circuit 220 to the LED driver 280 (LED 281) will be described with reference to FIG. FIG. 53 is a diagram showing the format (data type) of LED data.

  The LED data includes reproduction time (lighting time), red component luminance data (light emission data), green component luminance data, and blue component luminance data, and is set for each port. The LED data is stored in the CGROM 206. Further, the data length (number of bytes) of the reproduction time is 2 bytes, and the data length of the luminance data of each color component is 1 byte.

  In the example shown in FIG. 53, the LED data is also provided with a data area called “alignment” of 1 byte, which is provided to make the data length (number of bytes) of the LED data an even number of bytes. Adjustment area.

  The value specified in the column of the reproduction time (lighting time) is not the time value, but the cycle of LED data transmission processing from the sound / LED control circuit 220 to the LED driver 280 (about 4 msec), that is, the sound / LED This is a value when the period of the interrupt process for the LED driver 280 of the control circuit 220 is “1”. For example, when “12” is set as the reproduction time (lighting time), the actual lighting time of the LED is about 48 msec (about 4 msec × 12). Further, when “0” is set in the reproduction time (lighting time) in the LED data, this means that the output of the LED data ends (the end of the predetermined LED animation), and the LED data corresponds to the corresponding LED 281. When output, the production operation by a series of LED animations ends.

  The method for defining the reproduction time (lighting time) in the LED data is not limited to the example shown in FIG. 53, and the time value of the reproduction time (lighting time) may be defined. Also in this case, a value that is an integral multiple of the interrupt processing period (about 4 msec) for the LED driver 280 of the audio / LED control circuit 220 is defined in the LED data. If a value other than an integral multiple of the interrupt processing period (about 4 msec) is specified in the column of the playback time (lighting time) in the LED data due to a calculation failure, etc., the period (about 4 msec) The portion exceeding the integer multiple is rounded down. For example, if the interrupt processing period is 4 msec and 47 msec is defined in the reproduction time (lighting time) column, the value in the reproduction time (lighting time) column is rewritten to 44 msec.

  An integer value in the range of “0” (light off) to “255” is set in the luminance data of each color component. Note that, as in this embodiment, the LED data includes the luminance data of the red component, the luminance data of the green component, and the luminance data of the blue component, so that full-color light emission is performed with the red LED, the blue LED, and the green LED. In addition to the case where the red LED, the blue LED and the green LED are used as a single color LED, it is possible to cope with the case.

  The luminance data “244” and “255” are “0xFF” and “0xFE” in hexadecimal (HEX), respectively. When the luminance data of the red, green, and blue components is “0xFE”, the LED 281 is lit white. When the luminance data of the red, green, and blue components is “0xFF”, the luminance data is luminance data of “transparency definition”, and the lighting mode of “transparency definition” is the generation (synthesis) of LED data described later. The method will be described. Further, when the luminance data of the red, green, and blue components is “0”, the LED 281 is turned off, and these luminance data are referred to as “light-off data”.

  Here, an example of LED data output control processing for a static LED will be described with reference to FIG. 54 shows an example in which one LED driver 280 is connected with one red LED, one blue LED, and one green LED. In this example, the reproduction time (lighting time) in the LED data is “12” (about 48 msec), and each of the red luminance data, the green luminance data, and the blue luminance data is “0xFE”. Will be explained. In this LED data, white lighting is performed by three LEDs, a red LED, a blue LED, and a green LED.

  When the above-described LED data is input to the LED driver 280, the LED driver 280 refers to information on a control part (port information of each port) described later, and corresponds to the type of the LED 281 connected from the LED data. The luminance data to be referred to is referred to, and a drive signal corresponding to the luminance data is output to the LED 281. Therefore, in the example shown in FIG. 54, only the red luminance data “0xFE” in the LED data is output to the red LED connected to the port 0, and the red LED corresponds to the red luminance data “0xFE”. Illuminates for about 48 msec at a brightness of At this time, only the blue luminance data “0xFE” in the LED data is output to the blue LED connected to the port 1, and the blue LED has a luminance corresponding to the blue luminance data “0xFE” at about 48 msec. Lights for a while. Furthermore, at this time, only the green luminance data “0xFE” in the LED data is output to the green LED connected to the port 2, and the green LED has a luminance corresponding to the green luminance data “0xFE” and is about 48 msec. Lights for a while.

  In the example shown in FIG. 54, when performing the turn-off operation, “0” is set in the luminance data of each color.

  As described above, in the present embodiment, the LED data output to the LED driver 280 has at least a luminance value of each color (red, blue, green) component and has a data form that can specify the light emission mode. Then, when the LED data is output from the LED driver 280 to the plurality of LEDs 281 connected thereto, the luminance data of the color component corresponding to its own emission color in the LED data is output to each LED 281 (each LED 281 , Only the luminance data of the corresponding color component in the LED data is referred to).

  When a plurality of LEDs 281 are controlled to be emitted by a single LED driver 280 using the LED data having such a configuration, even if the plurality of LEDs are LEDs 281 having different emission colors, the luminance value (data) of each LED 281 is obtained. Since it becomes easy to grasp | ascertain, the synthetic | combination process of the luminescent color by several LED281 is easy. In addition, since the processing related to the synthesis of the light emission color at this time can be executed by the LED driver 280 in which the LED data is set, complicated LED light emission control can be easily executed, which is more advanced than using the LED 281. Production control (LED animation control) can be easily executed.

  In this embodiment, the configuration of LED data output to the LED driver 280 is the same regardless of the type of the LED 281 connected to the LED driver 280. Therefore, the LED data used in the predetermined LED driver 280 is also used in the other LED drivers 280 with respect to other LED drivers 280 that perform the same light emission mode as the light emission mode (emission color) in the predetermined LED driver 280 (LED data). Can be made common). In this case, the LED data can be shared, and the processing related to the lighting operation of the LED 281 can also be shared.

  The effect of such common use of LED data and lighting operation processing is important when full color lighting is performed using a red LED, a green LED, and a blue LED connected to one LED driver 280, that is, emission distribution of each color is important. This is particularly noticeable when executing LED light emission control, which is a difficult parameter. Therefore, in this embodiment, the light emission control of the full color LED can also be easily performed.

  The “format of LED data (driving data)” referred to in this specification is not limited to the data format including the luminance data of the plurality of types of color components and the data relating to the lighting time. For example, the data format of the luminance data includes a data format used when generating the luminance data, a data format when stored in the CGROM 206, and the like. Even when the luminance data stored in the CGROM 206 is a variable, a group of variables, or data that does not have a data format format by compression processing or file format conversion processing, When a variable, a group of variables (structure) or data is used as a group of luminance data, the variable, group of variables (structure) or data is used as a data format for luminance data. Can be recognized. Therefore, the “LED data (drive data) format” as used in the present specification is meant to include the data format of these luminance data.

[LED data generation (synthesis) method]
Next, a method of generating (combining) LED data performed by the voice / LED control circuit 220 will be described. In this embodiment, the voice / LED control circuit 220 can output the predetermined LED data read from the CGROM 206 to the LED driver 280 (port) as it is, but reads a plurality of LED data from the CGROM 206 and outputs the LED data. The function is also provided to synthesize and output to the corresponding port.

  In order to realize this function, the voice / LED control circuit 220 is provided with a plurality of channels for each port for reading each of the plurality of LED data and performing various processes. Specifically, in the voice / LED control circuit 220, eight channels (first channel to eighth channel) in which LED data can be set are provided for each port.

  And in this embodiment, the execution priority of LED data is predetermined for every channel, and when LED data is set to a plurality of channels, according to the execution priority (based on, (Or correspondingly), LED data set to a port in the LED driver 280 is determined. In the present embodiment, the first channel is the channel with the lowest LED data execution priority, and the LED data execution priority is set so that the execution priority increases as the channel number increases. Therefore, in the present embodiment, the eighth channel is the channel with the highest execution priority. In the present embodiment, the eighth channel is set as a dedicated channel when an error occurs. The “LED data execution priority” set for each channel in this specification is a priority when LED data (driving data) is output, used, set, set, loaded, or the like.

  For example, when LED data (luminance data) is set in the second, fourth, and sixth channels for a predetermined port in the LED driver 280, the execution priority order of these channels is set. The highest LED data of the sixth channel is output (set) from the voice / LED control circuit 220 to a predetermined port in the LED driver 280 as a synthesis result.

  The LED data read to the channel is stored in a channel registration buffer (storage means) together with predetermined data table information. Specifically, when a lamp request (LED control request) is input from the host control circuit 210 to the voice / LED control circuit 220, the voice / LED control circuit 220 stores the lamp request in the CGROM 206 based on the lamp request. The obtained data table information and the LED data associated therewith are acquired. The data table information includes channel information for setting the read LED data, and the audio / LED control circuit 220 reads the read LED data and data into the registration buffer of the channel specified by the data table information. Overwrite table information and store. However, when the read LED data is stored (overwritten) in the registration buffer, it is determined whether to overwrite the LED data in the registration buffer based on the execution priority of the LED data set in the channel. Done. The contents of the data table information will be described in detail later.

  In the present embodiment, the LED data and the data table information read in the registration buffer are overwritten and stored. However, the information that can specify the LED data and the data table information (information corresponding to the light emission control information) is registered. A configuration may be adopted in which the buffer is overwritten and stored. In this case, the LED data and the data table information are acquired from a storage area different from the registration buffer (when the storage area and the registration buffer are physically divided in the same storage medium). In addition, the LED data and the data table information may be controlled to be acquired from the storage areas of physically different storage media based on the information stored in the registration buffer.

  The “information corresponding to the light emission control information” is not limited to information including the LED control ID (information specifying the light emission control information), and any information can be adopted as long as the information is related to the light emission control information. . Therefore, as in the configuration of the present embodiment, the light emission control information itself (LED data and data table information) may be adopted as information corresponding to the light emission control information.

  Here, a lighting mode when LED data (luminance data) of “transparency definition” is set will be described. For example, when LED data (luminance data) for red lighting is set in the fourth channel and LED data (luminance data) of “transparency definition” is set in the sixth channel, the fourth channel LED data that lights red is output. That is, when LED data is set for a plurality of channels and LED data of a channel with a low execution priority is to be output with priority, LED data of “transparency definition” is set to a channel with a high execution priority. Set. If LED data for red lighting is set for the 4th channel and “lighting-out data” is set for the 6th channel, “lighting-out data” of the 6th channel with higher execution priority is given priority. And the LED 281 is not lit. For example, when the LED data is set only in the second channel, the fourth channel, and the sixth channel, and the set LED data are all “transparent definition” LED data, the LED 281 emits light. do not do.

  In this embodiment, LED data of “transparency definition” is not set to the channel with the lowest execution priority. However, the present invention is not limited to this, and “transparent” is set to the channel with the lowest execution priority. LED data of “definition” may be set.

  Furthermore, “light-out data” and “transparent definition” data may be handled in the same way, and both data may be handled as “light-out data” or “transparent definition” data. In that case, the configuration for LED control is appropriately changed such that the configuration of the LED data is arbitrarily changed so that the LEDs that can be controlled in each channel do not overlap in advance. When such a configuration is adopted, for example, a game machine that handles only one of “light-off data” and “transparency definition” data can be used.

  In the present embodiment, the “channel” (system) indicates a sequencer channel, and can be expressed such that the sequencer channel sets a value in a variable or a register. However, the present invention is not limited to this, and the “channel” may simply indicate, for example, the number of sequencers, or may be playback means (automatic playback function) including a sequencer. Further, a stop channel (a channel for stopping designated audio reproduction) or the like may be included in the “channel”. Furthermore, “channel” is a general term for playback functions that can execute (including start, stop, end, stop, etc.) playback of animations, LED animations, and sounds displayed on the display device 13. It is also a unit for representing the number of data that can be reproduced at the same time (the number of animations).

[LED animation generation method]
In the pachinko gaming machine 1 of the present embodiment, the lamp group 18 includes a plurality of LEDs 281 as described above. Then, the voice / LED control circuit 220 performs a predetermined effect (LED animation) by turning on / off the plurality of LEDs 281 in various patterns according to the determined effect content. Therefore, in this embodiment, when the LED animation is determined, various LED data necessary for the production is designated.

  Further, in the present embodiment, since a plurality of LEDs 281 are linked to produce an effect by a predetermined LED animation, the lighting / extinguishing operations of the plurality of LEDs 281 involved in the predetermined LED animation are collectively managed and controlled. In the following, a port group (LED group) that collectively manages and controls the light emission operations in order to execute LED animation by the voice / LED control circuit 220 is referred to as a “control part”.

In the present embodiment, as described above, the audio / LED control circuit 220 is provided with eight channels (first channel to eighth channel) in which LED data can be set for each LED 281 (port). The control part is also set for each channel. When the voice / LED control circuit 220 executes LED animation, data obtained by combining the LED data of the control part of each channel between the channels is output as LED animation data. In addition, a control part may mutually be the same between channels, and may differ for every channel.

<Description of operation of main control circuit of pachinko machine>
Next, the contents of various processes executed by the main CPU 71 of the main control circuit 70 of the pachinko gaming machine 1 will be described.

[Main control main processing]
First, with reference to FIG. 55, main control main processing by the control of the main CPU 71 will be described. FIG. 55 is a flowchart showing a procedure of main control main processing of the pachinko gaming machine 1 in the present embodiment.

  When the pachinko gaming machine 1 is powered on, first, the main CPU 71 performs an initial setting process (S1). In this process, the main CPU 71 performs processes such as permitting access to the main RAM 73, restoring the backup, and initializing the work area. Next, the main CPU 71 performs an initial value random number update process (S2). In this process, the main CPU 71 updates the initial random number counter value.

  Next, the main CPU 71 performs a special symbol control process (S3). In this process, the main CPU 71 performs a predetermined control process relating to the progress of the special symbol game and the special symbols (first special symbol and second special symbol) displayed on the special symbol display device 61. Details of the special symbol control process will be described later.

  Next, the main CPU 71 performs a normal symbol control process (S4). In this process, the main CPU 71 performs a predetermined control process regarding the progress of the normal symbol game and the normal symbols displayed on the normal symbol display device 62. Details of the normal symbol control process will be described later.

  Next, the main CPU 71 performs control processing of the symbol display device (S5). In this process, the main CPU 71 changes the special symbol (the first special symbol and the second special symbol) and the normal symbol based on the execution results of the special symbol control process (S3) and the normal symbol control process (S4). Control display.

  Next, the main CPU 71 performs a game information data generation process (S6). In this process, the main CPU 71 generates game information data to be transmitted to the payout / launch control circuit 123, the sub control circuit 200, the hall computer of the game store, etc., and stores the game information data in the main RAM 73.

  Next, the main CPU 71 performs storage / game state data generation processing (S7). In this process, the main CPU 71 generates storage / game state data to be transmitted to the sub-control circuit 200 based on the value of the probability change flag and the time reduction flag, and stores the storage / game state data in the main RAM 73.

  After the process of S7, the main CPU 71 returns the process to the process of S2, and repeats the processes after S2 described above.

[Special symbol control processing]
Next, with reference to FIG. 56, the special symbol control process performed in S3 in the main control main process (see FIG. 55) will be described. FIG. 56 is a flowchart showing the procedure of the special symbol control process in the present embodiment. The numerical values in parentheses (“00” to “08”) written in parallel with the reference numerals of the respective processing steps shown in FIG. 56 indicate the value of the control state flag, and this control state flag is stored in a predetermined memory in the main RAM 73. Stored in the area. The main CPU 71 advances the special symbol game by executing each processing step corresponding to the numerical value of the control state flag.

  First, the main CPU 71 loads a control state flag (S11). In this process, the main CPU 71 reads the value of the control state flag stored in the main RAM 73.

  Based on the value of the control state flag loaded in S11, the main CPU 71 determines whether or not to execute various processes in S12 to S20 described later. This control state flag indicates the game state of the special symbol game, and enables execution of any one of S12 to S20.

  Further, the main CPU 71 executes the process of each step at a predetermined timing determined according to the waiting time set for each process of S12 to S20. In the period before the predetermined timing is reached, the other subroutine processing is executed without executing the processing of each step. In addition, a system timer interrupt process described later is also executed at a predetermined cycle.

  When the process of S11 is completed, the main CPU 71 performs a special symbol memory check process (S12).

  In this process, when the control state flag is a value (“00”) indicating the special symbol storage check process, the main CPU 71 checks the number of reserved special symbols that are variably displayed, and if the number of reserved is not “0”. When there is a holding ball, processing such as hit determination, determination of special symbol, determination of variation pattern of special symbol, and the like are performed. In this process, the main CPU 71 sets the control state flag to a value (“01”) indicating a special symbol fluctuation time management process (S13) described later, and corresponds to the fluctuation pattern determined in the current process. Set the special symbol variation time in the waiting time timer. That is, this process is set so that the special symbol variation time management process described later is executed after the variation time of the special symbol corresponding to the variation pattern determined in the process of S12 has elapsed.

  On the other hand, when the reserved number is “0” (when there is no reserved ball), the main CPU 71 performs a demonstration display process for displaying a demonstration screen. Details of the special symbol memory check process will be described later.

  Next, the main CPU 71 performs a special symbol variation time management process (S13). In this process, the main CPU 71 has a value ("01") indicating that the control state flag indicates the special symbol variation time management process, and when the variation time of the special symbol has elapsed, the special symbol display described later is displayed on the control state flag. A value ("02") indicating the time management process (S14) is set, and the waiting time after determination is set in the waiting time timer. That is, this process is set so that the special symbol display time management process described later is executed after the waiting time after determination set in the process of S13 has elapsed.

  Next, the main CPU 71 performs a special symbol display time management process (S14). In this process, the main CPU 71 determines the result of the hit determination when the control state flag is a value indicating the special symbol display time management process (“02”) and the waiting time after determination set in the process of S13 has elapsed. Is “big hit” or “small hit”. When the result of the hit determination is “big hit” or “small hit”, the main CPU 71 sets a value (“03”) indicating a big hit start interval management process (S15) described later in the control state flag, Set the time corresponding to the jackpot start interval in the latency timer. That is, by this process, after the time corresponding to the jackpot start interval set in the process of S14 has elapsed, the jackpot start interval management process described later is set to be executed.

  On the other hand, when the result of the hit determination is not “big hit” or “small hit”, the main CPU 71 sets a value (“08”) indicating a special symbol game end process (S20) described later in the control state flag. That is, in this case, the special symbol game end process described later is set to be executed. The details of the special symbol display time management process will be described later.

  Next, when it is determined in S14 that the result of the hit determination is “big hit” or “small hit”, the main CPU 71 performs a big hit start interval management process (S15). In this process, the main CPU 71 sets the first value when the control state flag is a value indicating the jackpot start interval management process (“03”) and the time corresponding to the jackpot start interval set in the process of S14 has elapsed. Based on the data read from the main ROM 72, the variables located in the main RAM 73 are updated in order to open the special winning opening 53 or the second large winning opening 54.

  In this process, the main CPU 71 sets a value (“04”) indicating a large winning opening opening process (S16), which will be described later, in the control state flag, and the upper opening limit time (for example, 30 sec) of the large winning opening. Is set in the big prize opening time timer. In other words, this process is set so that a process for opening a special prize opening described later is executed.

  Next, the main CPU 71 conducts a special winning opening opening process (S16). In this process, first, the main CPU 71 sets the condition that the big prize winning prize counter is a predetermined number or more when the control status flag is a value ("04") indicating the big prize opening releasing process, and the release. It is determined whether or not one of the conditions that the upper limit time has passed (the big winning opening opening time timer is “0”) is satisfied (a predetermined closing condition is satisfied).

  In S16, when one of the conditions is satisfied, the main CPU 71 updates a variable positioned in the main RAM 73 in order to close a predetermined prize winning opening (the first prize winning opening or the second prize winning opening). To do. Then, the main CPU 71 sets a value (“05”) indicating a later-described extra winning opening residual ball monitoring process (S17) in the control state flag, and sets the extra winning opening residual ball monitoring time in the waiting time timer. . That is, by this process, after the time for monitoring the residual ball in the big prize opening set in S17 has elapsed, it is set so that the residual ball monitoring process in the special prize mouth described later is executed.

  In S16, the main CPU 71 transmits an inter-round display command to the sub-control circuit 200 immediately before the end of the big prize opening opening process.

  Next, the main CPU 71 conducts a special winning opening residual ball monitoring process (S17). In this process, the main CPU 71 has a value ("05") indicating that the control status flag indicates the winning ball remaining ball monitoring process ("05"). It is determined whether or not the condition that the value is equal to or greater than the maximum value of the number of times of winning the big winning opening (the final round) is satisfied.

  When the main CPU 71 determines in S17 that the above condition is not satisfied, the main CPU 71 sets a value (“06”) indicating the big winning opening reopening waiting time management process in the control state flag. Further, the main CPU 71 sets a time corresponding to the interval between rounds in the waiting time timer. That is, by this process, after the time corresponding to the interval between rounds has elapsed, a waiting time management process before reopening the big winning opening described later is set to be executed.

  On the other hand, if the main CPU 71 determines in S17 that the above condition is satisfied, the main CPU 71 sets a value (“07”) indicating the big hit end interval process in the control state flag, and the time corresponding to the big hit end interval. Set the jackpot end interval time to the waiting time timer. That is, by this process, after the time corresponding to the jackpot end interval set in S17 has elapsed, the jackpot end interval process described later is set to be executed.

  Next, in S17, when the main CPU 71 determines that the value of the big prize opening number counter is not equal to or greater than the maximum value of the big opening number, the main CPU 71 performs a waiting time management process before the big prize opening re-opening ( S18). In this process, the main CPU 71 indicates that the control status flag is a value (“06”) indicating the waiting time management process before the big winning opening reopening and the time corresponding to the interval between rounds has elapsed. The number of times counter is updated so as to increase it by “1”. Further, the main CPU 71 sets a value (“04”) indicating the process for opening the special winning opening to the control state flag. Then, the main CPU 71 sets an opening upper limit time (for example, 30 sec) in the big prize opening time timer. That is, by this process, it is set so that the above-described special prize opening opening process (S16) is executed again after the process of S18.

  Further, in S18, the main CPU 71 transmits a large winning opening opening display command to the sub-control circuit 200 immediately before the end of the waiting time management process before the large winning opening reopening.

  If the main CPU 71 determines in S17 that the value of the big winning opening opening number counter is equal to or greater than the maximum value of the large winning opening number, the big hit end interval process is performed (S19). In this process, the main CPU 71 has a value ("07") indicating that the control state flag indicates the jackpot end interval process, and a value indicating the special symbol game end process ("" when the time corresponding to the jackpot end interval has elapsed). 08 ") is set in the control state flag. That is, by this process, the special symbol game end process described later is set to be executed after the process of S19. Details of the big hit end interval process will be described later.

  Then, the main CPU 71 performs control to shift the gaming state to the probability variation gaming state when the big hit symbol is the probability variation symbol, and shifts the gaming state to the normal gaming state when the big hit symbol is the non-probability variation symbol. To control. When the big hit symbol is a symbol corresponding to “small hit”, the main CPU 71 determines that the gaming state after the “small hit” game is more than the gaming state controlled when “small hit” is won. Also, control is performed so as not to shift to an advantageous gaming state.

  Next, the main CPU 71 performs a special symbol game end process when the big hit gaming state or the small hit gaming state is ended, or when “losing” is won (S20).

  In this process, when the control state flag is a value indicating the special symbol game end process (“08”), the main CPU 71 stores and updates the data indicating the number of holdings (starting storage information) to be decreased by “1”. To do. Further, the main CPU 71 updates the special symbol storage area in order to perform the next special symbol variation display. Further, the main CPU 71 sets a value (“00”) indicating the special symbol storage check process in the control state flag. That is, by this process, the special symbol storage check process (S12) described above is set to be executed after the process of S20.

  After the process of S20, the main CPU 71 ends the special symbol control process, and moves the process to S4 of the main control main process (see FIG. 55).

  As described above, in the pachinko gaming machine 1 of this embodiment, the special symbol game is advanced by sequentially setting various values in the control state flag. Specifically, when the gaming state is neither the big hit gaming state nor the small hit gaming state and the result of the hit determination is “lost”, the main CPU 71 sets the control state flag to “00”, “01”. , “02”, “08”. Thereby, the main CPU 71 performs the above-described special symbol memory check process (S12), special symbol variation time management process (S13), special symbol display time management process (S14), and special symbol game end process (S20) in this order. Execute at a predetermined timing.

  Further, the main CPU 71 sets the control status flag to “00”, “small hit” when the gaming state is neither the big hit gaming state nor the small hit gaming state and the result of the hit determination is “big hit” or “small hit”. Set in the order of “01”, “02”, “03”. Thereby, the main CPU 71 performs the above-described special symbol storage check process (S12), special symbol variation time management process (S13), special symbol display time management process (S14), and jackpot start interval management process (S15) in this order. It is executed at a predetermined timing, and the transition control to the big hit gaming state or the small hit gaming state is executed.

  Further, when the transition control to the big hit gaming state or the small hit gaming state is executed, the main CPU 71 sets the control state flags in the order of “04”, “05”, and “06”. As a result, the main CPU 71 performs the above-described process for opening the winning a prize opening (S16), the remaining ball monitoring process for the winning prize opening (S17), and the waiting time management process before reopening the winning a prize opening (S18) in this order at a predetermined timing. And execute a big hit game or a small hit game.

  Note that if the big hit gaming state end condition is satisfied during the big hit game, the main CPU 71 sets the control state flags in the order of “04”, “05”, “07”, and “08”. As a result, the main CPU 71 performs the above-described special winning opening opening process (S16), the special winning opening residual ball monitoring process (S17), the big hit end interval process (S19), and the special symbol game end process (S20) in this order. The game is executed at a predetermined timing to end the big hit gaming state.

  As described above, in the special symbol control process, the process flow is branched according to the status. Also, the normal symbol control process of S4 during the main control main process also branches the process flow according to the status, as in the special symbol control process, as will be described later.

  The processing program of this embodiment is programmed so that a pure return process from a small module to a parent module is possible with a call instruction when the process is branched according to the status. As a result, the capacity of the program can be reduced in this embodiment as compared with the case where a jump table is arranged to execute the above processing.

[Special symbol memory check processing]
Next, with reference to FIG. 57, the special symbol memory check process performed in S12 during the special symbol control process (see FIG. 56) will be described. FIG. 57 is a flowchart showing the procedure of the special symbol storage check process in this embodiment.

  First, the main CPU 71 loads a control state flag (S31). In this process, the main CPU 71 reads the value of the control state flag stored in the main RAM 73.

  Next, the main CPU 71 determines whether or not the control state flag is a value (“00”) indicating the special symbol storage check process (S32). When the main CPU 71 determines that the control state flag is not “00” in S32 (when S32 is NO), the main CPU 71 ends the special symbol storage check process, and the process proceeds to the special symbol control process (FIG. 56). Return to).

  On the other hand, when the main CPU 71 determines that the control state flag is “00” in S32 (when S32 is YES), the main CPU 71 receives the second start opening prize (variable display of the second special symbol). It is determined whether or not the hold number (second start memory number) is “0” (S33).

  In S33, when the main CPU 71 determines that the second start opening winning number is not “0” (NO in S33), the main CPU 71 sets the second starting opening winning number corresponding to the second starting opening winning number. "1" is subtracted from the value of the starting memory number (S34).

  In the present embodiment, the main CPU 71 determines whether data is stored in the second special symbol start storage area (0) to the second special symbol start storage area (4) provided in the main RAM 73, It is determined whether or not there is a start memory of the special symbol game corresponding to the variable display of the second special symbol being changed or on hold. In the second special symbol start storage area (0), data (information) of the special symbol game corresponding to the variable display of the changing second special symbol is stored as the start memory. Then, in the second special symbol start storage area (1) to the second special symbol start storage area (4), a special symbol game corresponding to the variable display (holding ball) of the second special symbol for four times held. The data (information) are stored as the start memory. The data included in the start memory stored in each second special symbol start storage area is, for example, data such as a jackpot determination random number value and a jackpot symbol random number value acquired when winning the second start port 45. .

  After the process of S34, the main CPU 71 performs a special symbol memory transfer process based on the second start opening winning (S35). In this process, the main CPU 71 transfers (stores) the data in the second special symbol start storage areas (1) to (4) to the second special symbol start storage areas (0) to (3), respectively. Then, after the process of S35, the main CPU 71 performs a process of S40 described later.

  Here, returning to the processing of S33 again, in S33, when the main CPU 71 determines that the number of the second start-up winnings held is “0” (when S33 is YES), the main CPU 71 It is determined whether or not the reserved number (first start memorized number) of the first start opening prize (variable display of the first special symbol) is “0” (S36).

  In S36, when the main CPU 71 determines that the number of first start opening prizes held is “0” (S36 is YES), the main CPU 71 performs a demo display process (S37). After the process of S37, the main CPU 71 ends the special symbol storage check process and returns the process to the special symbol control process (see FIG. 56).

  In the demonstration display process of S37, the main CPU 71 sets a demonstration display permission value in the main RAM 73. That is, the main CPU 71 determines that the reserved number of the first start opening winnings and the second starting opening winnings is “0” (the state where the special symbol game start storing is “0”) for a predetermined time (for example, 30 sec), the predetermined value is set as the demonstration display permission value. When the demonstration display permission value is a predetermined value in the demonstration display process of S37, the main CPU 71 sets the demonstration display command data in the main RAM 73. Demo display command data is transmitted from the main CPU 71 of the main control circuit 70 to the host control circuit 210 in the sub-control circuit 200. When the sub control circuit 200 receives the demo display command data, the sub control circuit 200 displays a demo screen in the display area 13 a of the display device 13.

  On the other hand, when the main CPU 71 determines in S36 that the number of first start opening prizes held is not "0" (when S36 is NO), the main CPU 71 corresponds to the number of first start opening prizes held. The value of the first start memory number is subtracted by “1” (S38).

  In the present embodiment, the main CPU 71 determines whether data is stored in the first special symbol start storage area (0) to the first special symbol start storage area (4) provided in the main RAM 73, and It is determined whether or not there is a start memory of the special symbol game corresponding to the variable display of the first special symbol being changed or on hold. In the first special symbol start storage area (0), data (information) of the special symbol game corresponding to the variable display of the first special symbol being changed is stored as the start memory. Then, in the first special symbol start storage area (1) to the first special symbol start storage area (4), a special symbol game corresponding to the variable display (holding ball) of the first special symbol for four times held. The data (information) are stored as the start memory. The data included in the start memory stored in each first special symbol start storage area is, for example, data such as a jackpot determination random number value and a jackpot symbol random number value acquired when winning the first start port 44 .

  After the process of S38, the main CPU 71 performs a special symbol memory transfer process based on the first start opening winning (S39). In this process, the main CPU 71 transfers (stores) the data in the first special symbol start storage areas (1) to (4) to the first special symbol start storage areas (0) to (3), respectively. Then, after the process of S39, the main CPU 71 performs a process of S40 described later.

  Next, after the processing of S35 or S39, the main CPU 71 determines whether or not the value of the time-short state variation frequency counter is “0” (S40).

  In S40, when the main CPU 71 determines that the value of the short-time state variation number counter is “0” (when S40 is YES), the main CPU 71 performs the process of S44 described later. On the other hand, when the main CPU 71 determines in S40 that the value of the short-time state variation number counter is not “0” (when S40 is NO), the main CPU 71 decrements the value of the short-time state variation number counter by “1”. (S41).

  After the process of S41, the main CPU 71 determines whether or not the value of the short-time state variation number counter is “0” (S42).

  In S42, when the main CPU 71 determines that the value of the short-time state variation number counter is not “0” (when S42 is NO), the main CPU 71 performs the process of S44 described later. On the other hand, when the main CPU 71 determines in S42 that the value of the time-short state change number counter is “0” (when S42 is YES), the main CPU 71 sets “0” in the time-short flag (S43). ).

  After S43, if S40 is YES or S42 is NO, the main CPU 71 sets a value ("01") indicating the special symbol variation time management process in the control state flag (S44). In this process, the main CPU 71 transmits a hold subtraction command and a special symbol effect start command to the sub control circuit 200.

  Next, the main CPU 71 conducts jackpot determination processing (S45). In this process, the main CPU 71 determines (determines) which one of “big hit”, “small hit”, and “losing” is won by lottery based on the random number for big hit determination acquired at the start opening.

  Next, the main CPU 71 clears the information (data) of the storage area used for the previous variation display (S46). Next, the main CPU 71 sets the variation time corresponding to the determined variation pattern of the special symbol in the waiting time timer (S47). After the process of S47, the main CPU 71 ends the special symbol storage check process and returns the process to the special symbol control process (see FIG. 56).

[Special symbol display time management process]
Next, the special symbol display time management process performed in S14 during the special symbol control process (see FIG. 56) will be described with reference to FIG. FIG. 58 is a flowchart showing the procedure of the special symbol display time management process in the present embodiment.

  First, the main CPU 71 determines whether or not the control state flag is a value ("02") indicating a special symbol display time management process (S51). In S51, when the main CPU 71 determines that the control state flag is not a value ("02") indicating the special symbol display time management process (when S51 is NO), the main CPU 71 performs the special symbol display time management process. The process ends, and the process returns to the special symbol control process (see FIG. 56).

  On the other hand, when the main CPU 71 determines in S51 that the control state flag is a value ("02") indicating the special symbol display time management process (when S51 is YES), the main CPU 71 It is determined whether or not the value (waiting time) is “0” (S52). In this process, the main CPU 71 determines whether or not the waiting time after change confirmation (variation start waiting time) set in the waiting time timer has been consumed.

  When the main CPU 71 determines in S52 that the value of the waiting time timer is not “0” (when S52 is NO), the main CPU 71 ends the special symbol display time management process, and performs the special symbol control process. Return to (see FIG. 56). On the other hand, when the main CPU 71 determines in S52 that the value of the waiting time timer is “0” (when S52 is YES), the main CPU 71 determines whether or not the special symbol game is “big hit”. A determination is made (S53). In this process, the main CPU 71 simultaneously transmits a special effect stop command to the sub control circuit 200.

  In S53, when the main CPU 71 determines that the special symbol game is not “big hit” (when S53 is NO), the main CPU 71 sets a value (“08”) indicating the special symbol game end process in the control state flag. Set (S54). After the process of S54, the main CPU 71 ends the special symbol display time management process and returns the process to the special symbol control process (see FIG. 56).

  On the other hand, when the main CPU 71 determines in S53 that the special symbol game is “big hit” (when S53 is YES), the main CPU 71 sets the big hit flag to the on state (S55). The jackpot flag is a flag indicating whether or not to play a jackpot game.

  Next, the main CPU 71 clears the value of the time-short state change number counter, the value of the time-short flag, and the value of the probability change flag (S56). Next, the main CPU 71 sets a value (“03”) indicating a big hit start interval management process in the control state flag (S57).

  Next, the main CPU 71 sets a jackpot start interval time (for example, 5000 msec) corresponding to the special symbol (the first special symbol or the second special symbol) in the waiting time timer (S58). Next, the main CPU 71 sets a jackpot start command (special symbol start display command) corresponding to the special symbol in the main RAM 73 (S59). In this process, the main CPU 71 simultaneously transmits a special symbol start display command to the sub-control circuit 200.

  Next, the main CPU 71 sets the round number display LED pattern flag to the ON state (S60). The round number display LED pattern flag is a flag indicating whether or not to display the remaining number of rounds in a predetermined pattern. After the process of S60, the main CPU 71 ends the special symbol display time management process and returns the process to the special symbol control process (see FIG. 56).

[Big hit end interval processing]
Next, with reference to FIG. 59, the big hit end interval process performed in S19 during the special symbol control process (see FIG. 56) will be described. FIG. 59 is a flowchart showing the procedure of the jackpot end interval process in the present embodiment.

  First, the main CPU 71 determines whether or not the control state flag is a value indicating a big hit end interval process (“07”) (S71).

  When the main CPU 71 determines in S71 that the control state flag is not a value indicating the jackpot end interval process (“07”) (when S71 is NO), the main CPU 71 ends the jackpot end interval process and performs the process. Is returned to the special symbol control process (see FIG. 56). On the other hand, when the main CPU 71 determines in S71 that the control state flag is a value indicating the jackpot end interval process ("07") (when S71 is YES), the main CPU 71 determines that the value of the waiting time timer is It is determined whether or not it is “0” (S72). In this process, the main CPU 71 determines whether or not the jackpot end interval time set in the waiting time timer has been consumed.

  In S72, when the main CPU 71 determines that the value of the waiting time timer is not “0” (when S72 is NO), the main CPU 71 ends the big hit end interval process, and the process is a special symbol control process (FIG. 56). On the other hand, when the main CPU 71 determines in S72 that the value of the waiting time timer is “0” (when S72 is YES), the main CPU 71 clears the special winning opening opening number display LED pattern flag ( S73).

  Next, the main CPU 71 clears the round number distribution flag (sets it to “0”) (S74).

  Next, the main CPU 71 sets a value (“08”) indicating a special symbol game end process in the control state flag (S75). In this process, the main CPU 71 simultaneously transmits a special symbol end display command to the sub-control circuit 200. Next, the main CPU 71 clears the big hit flag (S76).

  Next, the main CPU 71 refers to the jackpot type determination table (see FIGS. 24 to 27), and sets the value of the probability change flag based on the gaming state at the time of jackpot winning and the type of the jackpot selection symbol command (S77). . Next, the main CPU 71 refers to the big hit type determination table (see FIGS. 24 to 27), and sets the value of the short time flag based on the gaming state at the time of the big win and the type of the big hit selection symbol command (S78). .

  Next, the main CPU 71 determines whether or not the value of the time reduction flag is “1” (whether or not the time reduction flag is in an on state) (S79). When the main CPU 71 determines in S79 that the value of the time reduction flag is not “1” (when S79 is NO), the main CPU 71 ends the big hit end interval process, and the process is a special symbol control process (FIG. 56). Return to).

  On the other hand, when the main CPU 71 determines that the value of the time reduction flag is “1” in S79 (when S79 is YES), the main CPU 71 refers to the big hit type determination table (see FIGS. 24 to 27). Then, based on the game state at the time of winning the big hit and the type of the big hit time selected symbol command, the corresponding value of the number of time reductions is set in the time reduction state variation number counter (S80). Then, after the process of S80, the main CPU 71 ends the jackpot end interval process and returns the process to the special symbol control process (see FIG. 56).

[Normal symbol control processing]
Next, the normal symbol control process performed in S4 in the main control main process (see FIG. 55) will be described with reference to FIG. FIG. 60 is a flowchart showing the procedure of normal symbol control processing in the present embodiment.

  Note that the numerical values in parentheses (“00” to “04”) written in parallel with the reference numerals of the respective processing steps in the flowchart shown in FIG. 60 indicate the normal symbol control state flag, and this normal symbol control state flag is the main RAM 73. Stored in a predetermined storage area. The main CPU 71 advances the normal symbol game by executing each processing step corresponding to the numerical value of the normal symbol control state flag.

  First, the main CPU 71 loads a normal symbol control state flag (S91). In this process, the main CPU 71 reads the normal symbol control state flag stored in the main RAM 73. Based on the value of the normal symbol control state flag loaded in S91, the main CPU 71 determines whether or not to execute various processes in S92 to S96 described later. The normal symbol control state flag indicates the game state of the normal symbol game, and enables execution of any one of S92 to S96.

  Further, the main CPU 71 executes the process of each step at a predetermined timing determined according to the waiting time set for each process of S92 to S96. In the period before the predetermined timing is reached, the other subroutine processing is executed without executing the processing of each step. In addition, a system timer interrupt process described later is also executed at a predetermined cycle.

  When the process of S91 ends, the main CPU 71 performs a normal symbol storage check process (S92).

  In this process, when the normal symbol control state flag is a value (“00”) indicating the normal symbol storage check process, the main CPU 71 checks the number of holdings of the variable symbol variable display, and the number of holdings is “0”. If not, a process such as a hit determination is performed. Further, in this process, the main CPU 71 sets a value (“01”) indicating a normal symbol fluctuation time monitoring process (S93) described later in the normal symbol control state flag, and sets the fluctuation time determined in the current process. Set to the wait timer. That is, by this process, the normal symbol change time monitoring process described later is set to be executed after the normal symbol change time determined in S92 has elapsed.

  Next, the main CPU 71 performs normal symbol variation time monitoring processing (S93). In this process, the main CPU 71 indicates that the normal symbol control state flag is a value (“01”) indicating the normal symbol variation time monitoring process. A value ("02") indicating the normal symbol display time monitoring process (S94) is set, and the waiting time after determination (for example, 0.5 sec) is set in the waiting time timer. That is, by this process, the normal symbol display time monitoring process to be described later is set to be executed after the waiting time after determination set in the process of S93 has elapsed.

  Next, the main CPU 71 conducts normal symbol display time monitoring processing (S94). In this process, the main CPU 71 determines a hit when the normal symbol control state flag is a value ("02") indicating the normal symbol display time monitoring process and the waiting time after determination set in the process of S93 has elapsed. It is determined whether or not the result of is “hit”. If the result of the hit determination is “hit”, the main CPU 71 conducts a normal electric accessory release setting process, and the normal symbol control state flag indicates a value indicating a normal electric accessory release process (S95) described later (S95). “03”) is set. That is, this process is set so that a later-described ordinary electric accessory release process is executed.

  On the other hand, if the result of the hit determination is not “win”, the main CPU 71 sets a value (“04”) indicating a normal symbol game end process (S96) described later in the normal symbol control state flag. That is, in this case, the normal symbol game end process described later is set to be executed.

  Next, when the main CPU 71 determines in S94 that the result of the hit determination is “win”, the main CPU 71 performs a normal electric accessory release process (S95). In this process, the main CPU 71 has received a predetermined number of start prizes during the opening of the ordinary electric accessory 46 when the ordinary symbol control state flag is a value ("03") indicating the ordinary electric accessory release process. It is determined whether or not the condition that the upper limit time for opening the ordinary electric utility item 46 has elapsed (the ordinary electric role opening time timer is “0”) is satisfied.

  In S95, when the above one condition is satisfied, the main CPU 71 updates a variable positioned in the main RAM 73 in order to close the blade member, which is the ordinary electric accessory 46. Then, the main CPU 71 sets a value (“04”) indicating a later-described normal symbol game end process (S96) in the normal symbol control state flag. That is, this process is set so that a normal symbol game end process described later is executed.

  Next, the main CPU 71 performs a normal symbol game end process (S96). In this process, when the normal symbol control state flag is a value indicating the normal symbol game end process (“04”), the main CPU 71 decreases the data indicating the number of hold of the variable symbol variable display by “1”. Update the memory. Further, the main CPU 71 updates the normal symbol storage area in order to perform the next normal symbol variation display. Further, the main CPU 71 sets a value (“00”) indicating the normal symbol storage check process in the normal symbol control state flag. That is, by this process, after the process of S96, the above-described normal symbol storage check process (S92) is set to be executed.

  After the process of S96, the main CPU 71 ends the normal symbol control process, and moves the process to S5 of the main control main process (see FIG. 55).

[Power-on processing]
Next, referring to FIG. 61, the power-on process executed by the main CPU 71 will be described. FIG. 61 is a flowchart showing a procedure of power-on processing in the present embodiment.

  First, the main CPU 71 sets a predetermined initial value in the stack pointer (S101). Next, the main CPU 71 determines whether or not the power interruption detection signal is in an off state (LOW level) (S102). In this determination process, when the power interruption detection signal is in the OFF state, this corresponds to a case where the power interruption detection process is not in an executable state. That is, in a state where power interruption can be detected, the power interruption detection signal is turned on.

  In S102, when the main CPU 71 determines that the power interruption detection signal is in the OFF state (LOW level) (when S102 is YES), the main CPU 71 sets the power interruption detection signal in the ON state (HIGH level). Until the determination process of S102 is repeated. On the other hand, when the main CPU 71 determines in S102 that the power interruption detection signal is not in the OFF state (LOW level) (when S102 is NO), the main CPU 71 determines that the built-in RWM (Read Write Memory), that is, the main Access permission processing to the RAM 73 is performed (S103). In this process, the main CPU 71 performs various initial setting processes such as an initialization process for the work area of the main RAM 73.

  Next, the main CPU 71 performs a sub control reception acceptance wait process (S104). In this processing, the main CPU 71 waits until the operation state of the sub control circuit 200 becomes a state where data such as command data can be received. Next, the main CPU 71 performs initialization processing for a device incorporating the CPU (S105).

  Next, the main CPU 71 determines whether or not the backup clear signal is in an ON state (HIGH level) (S106). Specifically, the main CPU 71 determines whether or not the RWM initialization switch 39 (backup clear switch) is on.

  In S106, when the main CPU 71 determines that the backup clear signal is on (when S106 is YES), the main CPU 71 performs the process of S113 described later. On the other hand, when the main CPU 71 determines in S106 that the backup clear signal is not in the ON state (when S106 is NO), the main CPU 71 has the power failure detection flag set (the value of the power failure detection flag is It is determined whether it is “1” (S107).

  In S107, when the main CPU 71 determines that the power failure detection flag is not set (when S107 is NO), the main CPU 71 performs the process of S113 described later. On the other hand, when the main CPU 71 determines in S107 that the power interruption detection flag is set (when S107 is YES), the main CPU 71 performs damage check processing of the work area (S108). In this process, the main CPU 71 checks whether or not the work area is damaged based on the checksum value or the like.

  After the process of S108, the main CPU 71 determines whether or not the work area is normal based on the result of the damage check process for the work area of S108 (S109). In S109, when the main CPU 71 determines that the work area is not normal (when S109 is NO), the main CPU 71 performs a process of S113 described later.

  On the other hand, when the main CPU 71 determines that the work area is normal in S109 (when S109 is YES), the main CPU 71 performs initial setting processing of the work area that requires an initial value to be set when power is restored. (S110). Next, the main CPU 71 performs notification setting processing for a high-probability gaming state at the time of power failure recovery (S111).

  After the process of S111, the main CPU 71 transmits a power interruption return command to the sub-control circuit 200 (S112). In this process, the main CPU 71 transmits the first power failure recovery command and the second power failure recovery command described above (see FIGS. 36 and 37) to the sub-control circuit 200. After the process of S112, the main CPU 71 ends the power-on process.

  Here, it returns to the process of S106, S107, or S109 again, and when S106 is YES determination or when S107 or S109 is NO determination, that is, the pachinko gaming machine 1 is returned to the state before the power failure detection. If not, the main CPU 71 clears all work areas (S113).

  Next, the main CPU 71 performs an initial setting process of a work area that requires an initial value to be set when the main RAM 73 is initialized (S114). Next, the main CPU 71 transmits an initialization command for the main RAM 73 to the sub-control circuit 200 (S115). After the process of S115, the main CPU 71 ends the power-on process.

[System timer interrupt processing]
In the pachinko gaming machine 1 of the present embodiment, the main CPU 71 interrupts the main process at a predetermined period and executes the system timer interrupt process even during execution of the main process. Specifically, the main CPU 71 executes a system timer interrupt process according to clock pulses generated from the clock generation circuit 74 at a predetermined cycle (for example, 2 msec). Here, a system timer interrupt process executed by the main CPU 71 will be described with reference to FIG. FIG. 62 is a flowchart showing the procedure of the system timer interrupt process in the present embodiment.

  First, the main CPU 71 saves the data (information) of each register (S121). Next, the main CPU 71 performs random number update processing (S122). In this process, the main CPU 71 updates various random numbers extracted from a big hit determination counter, a symbol determination counter, a hit determination counter, a fall determination counter, a variation pattern determination counter, an effect pattern determination counter, and the like. . Note that the jackpot determination counter and the symbol determination counter lack fairness if the update timing of the counter value is indefinite. Therefore, the jackpot determination counter and the symbol determination counter are updated at a timing determined at a cycle of 2 msec in order to ensure fairness.

  Next, the main CPU 71 performs switch input detection processing (S123). In this processing, the main CPU 71 detects winning or passing to various start ports, various winning ports, and the ball passage detector 43. The details of the switch input detection process will be described later.

  Next, the main CPU 71 performs a timer update process (S124). Specifically, the main CPU 71 has various timers such as a waiting time timer for synchronizing the main control circuit 70 and the sub control circuit 200, and a big winning opening opening time timer for measuring the opening time of the big winning opening. Update processing is performed.

  Next, the main CPU 71 performs display processing for euphoria (S125). In this process, the main CPU 71 performs a process of displaying various information (values) calculated by a tabulation process described later on a predetermined display unit. Details of display processing for euphoria will be described later.

  Next, the main CPU 71 performs command output processing (S126). In this process, the main CPU 71 outputs various commands such as a winning command and a variation command to the host control circuit 210 of the sub-control circuit 200.

  Next, the main CPU 71 conducts game information output processing (S127). In this process, the main CPU 71 outputs various information related to the game processed by the main control circuit 70, the sub-control circuit 200, the payout / launch control circuit 123, etc., to the hall computer of the game store.

  Next, the main CPU 71 restores the data in each register saved in S121 (S128). After the process of S128, the main CPU 71 ends the system timer interrupt process.

[Switch input detection processing]
Next, the switch input detection process performed in S123 during the system timer interrupt process (see FIG. 62) will be described with reference to FIG. FIG. 63 is a flowchart showing the procedure of the switch input detection process in the present embodiment.

  First, the main CPU 71 performs a start port passage detection process (S131). In this process, the main CPU 71 determines whether or not a game ball has entered (passed through) the first start port 44 or the second start port 45. That is, the main CPU 71 detects whether or not a game ball winning is detected by the first starting opening winning ball sensor 44a or the second starting opening winning ball sensor 45a. The details of the start port passage detection process will be described later.

  Next, the main CPU 71 conducts a general winning opening detection process (S132). In this process, the main CPU 71 determines whether or not a game ball has entered the general winning opening 51 or 52. That is, the main CPU 71 detects whether or not a game ball winning is detected by the general winning ball sensor 51a or 52a. When the winning of a game ball in the general winning opening 51 or 52 is detected, the main CPU 71 performs various predetermined processes corresponding to the winning. The details of the general winning opening passing detection process will be described later.

  Next, the main CPU 71 performs a special winning opening passing detection process (S133). In this process, the main CPU 71 determines whether or not a game ball has entered the first big prize opening 53 or the second big prize opening 54. That is, the main CPU 71 detects whether or not a winning of a game ball has been detected by the first big prize opening solenoid 53b or the second big prize opening solenoid 54b. When the winning of the game ball to the first grand prize opening 53 or the second big prize opening 54 is detected, the main CPU 71 performs predetermined various processes corresponding to the prize. The details of the special winning opening passing detection process will be described later.

  Next, the main CPU 71 performs a ball passage detector passage detection process (S134). In this process, the main CPU 71 determines whether or not the game ball has passed the ball passage detector 43. That is, the main CPU 71 detects whether or not the passing of the game ball is detected by the passing ball sensor 43a. Next, when it is detected that the game ball has passed through the ball passage detector 43, the main CPU 71 performs various predetermined processes corresponding to the passage.

  Next, the main CPU 71 performs aggregation processing (S135). In this process, the main CPU 71 performs aggregation for each prize ball and calculates various ratios based on the processes from S131 to S133. The details of the aggregation process will be described later. After the process of S135, the main CPU 71 ends the switch input detection process, and moves the process to S124 of the system timer interrupt process (see FIG. 62).

[Starting port passage detection processing]
Next, with reference to FIGS. 64 and 65, the start-port passage detection process performed in S131 during the switch input detection process (see FIG. 63) will be described. 64 and 65 are flowcharts showing the procedure of the start port passage detection process in the present embodiment.

  First, the main CPU 71 determines whether or not a winning of a game ball to the first starting port 44 is detected based on the output signal of the first starting port winning ball sensor 44a (S141).

  In S141, when the main CPU 71 determines that the winning of the game ball to the first starting port 44 is not detected (when S141 is NO), the main CPU 71 performs the process of S152 described later. On the other hand, when the main CPU 71 determines in S <b> 141 that the winning of the game ball to the first start opening 44 has been detected (in the case where S <b> 141 is YES), the main CPU 71 determines the hem prize corresponding to the first start opening winning. Ball information (payout information) is set in the main RAM 73 (S142). In the present embodiment, when a game ball wins the first start opening 44, for example, three prize balls (game balls) are paid out for a single game ball win.

  After the processing of S142, the main CPU 71 determines whether or not the reserved number (the number of reserved balls) of the first start opening winning (variable display of the first special symbol) is less than “4” (S143).

  In S143, when the main CPU 71 determines that the number of first start opening prizes held is not less than “4” (when S143 is NO), the main CPU 71 performs a process of S149 described later. On the other hand, when the main CPU 71 determines in S143 that the number of first start opening prizes to be held is less than “4” (when S143 is YES), the main CPU 71 sets the number of first start opening prizes to be held. A process of adding “1” is performed (S144).

  After the processing of S144, the main CPU 71 acquires various random values used for the lottery, and stores the acquired various random values in a predetermined area of the main RAM 73 (S145). Specifically, the main CPU 71 acquires various random number values such as a jackpot determination random number value, a design random number value, a fall determination random number value, and a variation pattern determination random value.

  Next, the main CPU 71 performs a first special stop symbol determination process (S146). In this process, the main CPU 71 refers to the jackpot random number determination table (first start port) (see FIG. 20) and the symbol determination table (first start port) (see FIG. 22), and acquires the jackpot determination disorder acquired in S145. Based on the numerical value and the design random number value, it is determined whether or not it is a “hit”, and in the case of “hit”, the jackpot design (determination identification design) to be displayed on the display screen of the display device 13 is determined. Select (determine).

  In the case of “big hit” (when the change display result of the special symbol becomes a specific symbol), the operation of the condition device is started. The condition device is a device necessary for the operation of the accessory continuous operation device. The operation of the condition device is continued until the operation of the accessory continuous operation device is finished. The accessory continuous operation device is a device necessary for continuous operation of the first grand prize port 53 or the second grand prize port. The operation of the condition device and the accessory continuous device is realized by the operation of the main CPU 71. The condition device and the accessory continuous device do not operate in the case of “small hit”.

  Next, the main CPU 71 performs a variation pattern determination process (S147). In this process, the main CPU 71 refers to the variation pattern determination random value acquired in S145, the result of the jackpot determination described above, and the special symbol to be stopped and displayed, and the variation of the special symbol (first special symbol). A pattern is determined. In S147, the main CPU 71 determines whether or not there is a fall. In this process, the main CPU 71 performs a falling lottery based on the falling determination random value acquired in S145, and determines whether or not a falling has occurred. As a result, the main CPU 71 acquires the falling lottery information (“0”: no fall or “1”: with fall).

  Next, the main CPU 71 sets the pending addition command data at the time of winning the first start opening in the main RAM 73 (S148).

  In this process, the main CPU 71 determines the jackpot random number determination table (first start port) (see FIG. 20), the symbol determination table (first start port) (see FIG. 22), and the jackpot type determination table (see FIGS. 24 to 27). ) And the winning presentation information determination table (see FIG. 28), the gaming state (“normal”, “probability”, “short time”), winning type (“big hit”, “small hit”, “losing” )), Starting addition number command based on information such as number of starting memories (first special symbol hold number), symbol designation command, jackpot selection symbol command, winning prize presentation information, jackpot determination result information, falling lottery information, etc. The information (transmission contents) to be included in is determined.

  At this time, the gaming state is acquired by referring to the values of the probability variation flag and the hourly flag, and the winning type is acquired by referring to the jackpot random number determination table (first start port) (see FIG. 20). The symbol designation command and the big hit selection symbol command are acquired by referring to the symbol determination table (first start port) (see FIG. 22), and the winning effect information is the winning effect information determination table (see FIG. 28). Is obtained by referring to. Further, the result information of the jackpot determination is acquired in the process of S146, and the falling lottery information is acquired in the process of S147.

  In the present embodiment, in the process of S148, a hold addition command at the time of winning the first start opening is transmitted from the main CPU 71 to the sub control circuit 200 (host control circuit 210). Then, based on the hold addition command at the time of winning the first start opening, the sub-control circuit 200 selects the effect pattern of the hold effect and the prefetch effect.

  After the processing of S148, or when S143 is NO, the main CPU 71 is in one set (more specifically, for example, in the current one set started after the end of the previous one set, or the first one after power-on. In order to calculate the total number of velvet prize balls in the set) (hereinafter referred to as “total number of velocities (one set)”), the information about the number of velvet balls is added to the total number of navels (one set) (S149). Specifically, the main CPU 71 adds “3” to the value of a predetermined counter for the total accumulation (one set) before the processing of S149. The current one set started after the end of the previous set indicates the time until the most recent award ball (launched ball) counted after the end of the previous one set reaches 6000. .

  Next, the main CPU 71 adds the bulge prize ball information to the crustal total (total cumulative) in order to calculate the total total of the velvet prize balls (hereinafter referred to as “total lap total (total))” (S150). Specifically, the main CPU 71 adds “3” to the value of a predetermined counter for cumulative total (total cumulative) before the processing of S150.

  Next, the main CPU 71 adds the total number of prize balls to the prize ball total (total number) in order to calculate the total total of prize balls (hereinafter referred to as “prize ball total (total number)”) (S151). ). Specifically, the main CPU 71 adds “3” to the value of a predetermined counter for the total number of prize balls (total number) before the processing of S151.

  After the processing of S151, or when S141 is NO, the main CPU 71 determines whether or not a game ball winning to the second starting port 45 is detected based on the output signal of the second starting port winning ball sensor 45a. Is discriminated (S152).

  In S152, when the main CPU 71 determines that the winning of the game ball to the second starting port 45 is not detected (when S152 is NO), the main CPU 71 ends the starting port passage detection process, and the process Is shifted to S132 of the switch input detection process (see FIG. 63). On the other hand, when the main CPU 71 determines in S152 that a winning of a game ball to the second starting port 45 has been detected (when S152 is YES), the main CPU 71 determines whether or not the electric chew corresponding to the second starting port winning is obtained. Prize ball information (payout information) is set in the main RAM 73 (S153). In this embodiment, when a game ball wins the second start opening 45, for example, one prize ball (game ball) is paid out for one game ball winning.

  After the processing of S153, the main CPU 71 determines whether or not the reserved number (the number of reserved balls) of the second start opening winning (variable display of the second special symbol) is less than “4” (S154).

  In S154, when the main CPU 71 determines that the number of second start opening prizes held is not less than “4” (when S154 is NO), the main CPU 71 performs the process of S160 described later. On the other hand, when the main CPU 71 determines in S154 that the number of second start opening prizes to be held is less than “4” (when S154 is YES), the main CPU 71 determines the number of second start opening prizes to be held. A process of adding “1” is performed (S155).

  After the processing of S155, the main CPU 71 acquires various random values used for the lottery and stores the acquired various random values in a predetermined area of the main RAM 73 (S156). Specifically, the main CPU 71 acquires various random number values such as a jackpot determination random number value, a design random number value, a fall determination random number value, and a variation pattern determination random value.

  Next, the main CPU 71 performs a second special stop symbol determination process (S157). In this process, the main CPU 71 refers to the jackpot random number determination table (second start port) (see FIG. 21) and the symbol determination table (second start port) (see FIG. 23), and acquires the jackpot determination disorder acquired in S156. Based on the numerical value and the design random number value, it is determined whether or not it is a “hit”, and in the case of a big win, selection of a jackpot symbol (effect identification symbol) to be displayed on the display screen of the display device 13 ( Judgment).

  In the case of “big hit” (when the change display result of the special symbol becomes a specific symbol), the operation of the condition device is started. The operation of the condition device is continued until the operation of the accessory continuous operation device is finished.

  Next, the main CPU 71 performs a variation pattern determination process (S158). In this process, the main CPU 71 refers to the variation pattern determination random value acquired in S156, the result of the jackpot determination described above, and the special symbol to be stopped and displayed, and changes the special symbol (second special symbol). A pattern is determined. In S158, the main CPU 71 determines whether or not there is a fall. In this process, the main CPU 71 performs a fall lottery based on the fall determination random number value acquired in S156, and determines whether or not a fall has occurred. As a result, the main CPU 71 acquires the falling lottery information (“0”: no fall or “1”: with fall).

  Next, the main CPU 71 sets the pending addition command data at the time of the second start opening winning in the main RAM 73 (S159).

  In this process, the main CPU 71 determines the jackpot random number determination table (second start port) (see FIG. 21), the symbol determination table (second start port) (see FIG. 23), and the jackpot type determination table (see FIGS. 24 to 27). ) And the winning effect information determination table (see FIG. 28), the gaming state (“normal”, “probability”, “short time”), winning type (“big hit”, “losing”), starting memory Information to be included in the hold addition command based on information such as the number (the number of hold of the second special symbol), the symbol designation command, the jackpot selection symbol command, the winning effect information, the jackpot determination result information, the falling lottery information, etc. Determine what to send.

  At this time, the gaming state is acquired by referring to the values of the probability variation flag and the time reduction flag, and the winning type is acquired by referring to the jackpot random number determination table (second starting port) (see FIG. 21), The symbol designation command and the big hit selection symbol command are acquired by referring to the symbol determination table (second starting port) (see FIG. 23), and the winning effect information is the winning effect information determination table (see FIG. 28). Is obtained by referring to. Further, the result information of the jackpot determination is acquired in the process of S157, and the falling lottery information is acquired in the process of S158.

  In the present embodiment, in the process of S159, the hold addition command at the time of the second start opening winning is transmitted from the main CPU 71 to the sub control circuit 200 (host control circuit 210). The sub-control circuit 200 selects an effect pattern of the hold effect and the pre-read effect based on the hold addition command at the time of winning the second start opening.

  After the process of S159 or when S154 is NO, the main CPU 71 calculates the total of the electric chew prize balls in one set (hereinafter referred to as “electric chew total (one set)”). The electric chew prize ball information is added to the total (one set) (S160). Specifically, the main CPU 71 adds “1” to the value of a predetermined counter for the cumulative total (one set) of electric Chu before the process of S160.

  Next, the main CPU 71 adds the electric chew prize ball information to the electric chew cumulative total (total cumulative) in order to calculate the total electric electric prize winning total (hereinafter referred to as “electric chew total (total cumulative)”). (S161). Specifically, the main CPU 71 adds “1” to the value of a predetermined counter for the cumulative total (total) before the process of S161.

  Next, the main CPU 71 adds the electric chew ball information to the total prize ball (total) in order to calculate the total prize ball (total) (S162). Specifically, the main CPU 71 adds “1” to the value of a predetermined counter for total prize balls (total number) before the process of S162.

  After the process of S162 or when S152 is NO, the main CPU 71 ends the start port passage detection process, and moves the process to S132 of the switch input detection process (see FIG. 63).

[General winning exit passing detection process]
Next, with reference to FIG. 66, the general winning opening passing detection process performed in S132 during the switch input detection process (see FIG. 63) will be described. FIG. 66 is a flowchart showing the procedure of the general winning opening passing detection process in the present embodiment.

  First, the main CPU 71 determines whether or not a winning of a game ball in the general winning port 51 or the general winning port 52 is detected based on the output signal of the general winning ball sensor 51a or the general winning ball sensor 52a (S171). ).

  In S171, when the main CPU 71 determines that a winning of a game ball in the general winning opening 51 or the general winning opening 52 is detected (when S171 is YES), the main CPU 71 determines that the general winning slot winning corresponding to the general winning opening Winning mouth ball information (payout information) is set in the main RAM 73 (S172). In the present embodiment, when a game ball wins the general winning opening 51 or the general winning opening 52, for example, 10 winning balls (game balls) are paid out for winning one gaming ball.

  After the processing of S172, the main CPU 71 calculates the total number of general winning award winning balls in one set (hereinafter referred to as “general winning opening total (1 set)”), so that the general winning opening total (1 set) is calculated. General winning award ball information is added to (S173). Specifically, the main CPU 71 adds “10” to the value of a predetermined counter for the general winning award total (one set) before the processing of S173.

  Next, the main CPU 71 calculates the total number of general winning mouth prize balls (hereinafter referred to as “general winning mouth total (total number)”). Information is added (S174). Specifically, the main CPU 71 adds “10” to the value of a predetermined counter for the general winning award total (total total) before the processing of S174.

  Next, the main CPU 71 adds general winning opening prize ball information to the prize ball total (total) in order to calculate the prize ball total (total) (S175). Specifically, the main CPU 71 adds “10” to the value of a predetermined counter for total prize balls (total number) before the process of S175.

  After the process of S175, or when S171 is NO, the main CPU 71 ends the general winning opening passing detection process, and moves the process to S133 of the switch input detection process (see FIG. 63).

[Grand prize opening passage detection process (first embodiment)]
Next, with reference to FIG. 67, the special winning opening passing detection process (according to the first embodiment) performed in S133 during the switch input detection process (see FIG. 63) will be described. FIG. 67 is a flowchart showing the procedure of the special winning opening passing detection process in the present embodiment (first embodiment).

  First, the main CPU 71 determines whether or not winning of a game ball to the first big prize opening 53 or the second big prize opening 54 is detected based on the output signal of the count sensor 53c or the count sensor 54c (big prize opening sensor). Is discriminated (S181).

  In S181, when the main CPU 71 determines that a winning of a game ball to the first grand prize opening 53 or the second big prize opening 54 is detected (when S181 is YES), the main CPU 71 wins the big prize mouth winning. Is set in the main RAM 73 (S182). In the present embodiment, when a game ball wins the first grand prize port 53 or the second big prize port 54, for example, 15 prize balls (game balls) are paid out for one game ball.

  After the process of S182, the main CPU 71 calculates the total number of prize winning balls in one set (hereinafter referred to as “large prize winning total (one set)”), so that the main prize winning total (one set) is calculated. The prize winning ball information is added (S183). Specifically, the main CPU 71 adds “15” to the value of a predetermined counter for the cumulative total of award winning prizes (one set) before the processing of S183.

  Next, the main CPU 71 calculates the grand total of winning prize mouth balls (hereinafter referred to as “large winning mouth total (total)”), so that the main winning mouth total ball (total) is calculated. Information is added (S184). Specifically, the main CPU 71 adds “15” to the value of a predetermined counter for the grand prize winning total (total cumulative) before the processing of S184.

  Next, the main CPU 71 adds the big prize opening prize ball information to the prize ball total (total accumulation) in order to calculate the prize ball total (total accumulation) (S185). Specifically, the main CPU 71 adds “15” to the value of a predetermined counter for total prize balls (total number) before the processing of S185.

  After the process of S185, the main CPU 71 determines whether or not the accessory continuous device is operating (S186).

  In S186, when the main CPU 71 determines that the accessory continuous device is in operation (S186 is YES), that is, the big prize winning detected in the process of S181 is not big hit but big hit. In this case, the main CPU 71 calculates the cumulative total of the prize winning balls for consecutive roles in one set (hereinafter referred to as “large winning prize cumulative (one set of consecutive roles)”). The prize winning ball information is added to (one set of roles) (S187). Specifically, the main CPU 71 adds “15” to the value of a predetermined counter for the cumulative total of winning prizes (one set of roles) before the processing of S187.

  Next, the main CPU 71 calculates the total cumulative total of the big winning mouth prize balls for consecutive use (hereinafter referred to as “large winning prize cumulative (cumulative total cumulative)”). ) Is added to the prize winning ball information (S188). Specifically, the main CPU 71 adds “15” to the value of a predetermined counter for the grand prize winning total (the total of the consecutive roles) before the processing of S188.

  After the process of S188 or when S181 is NO, the main CPU 71 ends the special winning opening passing detection process, and moves the process to S134 of the switch input detection process (see FIG. 63).

  Thus, in the special winning opening passing detection process according to the first embodiment, in order to determine whether or not the accessory continuous device is operating in S186, for example, a so-called type 1 type 2 mixer or the like. Even if it is a model in which a game ball wins a prize to the first big prize opening 53 or the second big prize opening 54 when it is a small win (when it is other than a big hit), it can be dealt with.

  For example, when the pachinko gaming machine 1 is a small hit, if the gaming ball is a big hit (so-called two-type gaming machine) triggered by entering or passing through a specific area, The winning ball may be added to the grand prize winning total (one set of executives) or the big winning prize cumulative (cumulative total). Note that the game ball entering or passing through the specific area is included in the “winning” in the present embodiment. That is, when the pachinko gaming machine 1 is a two-type gaming machine, the “prize ball” includes a navel prize ball when a navel prize is won, an electric chew prize ball when an electric chew prize is awarded, and a general prize opening prize. General winning opening prize balls, a special winning opening prize ball when winning a big winning opening, and a specific area winning ball when winning in a specific area are included.

  In the method of calculating the total number of prize balls in the two types of gaming machines, that is, the number of game balls to be earned (outtake ratio) (hereinafter referred to as “base”), the timing at which the game balls enter or pass through a specific area Regardless, acquisition (prize ball) by all game balls won in the first grand prize opening 53 or the second big prize opening 54 is included in the base.

  On the other hand, the general winning port 51, the general winning port 52, the first starting port 44, or the second starting port 45 (which is not the first large winning port 53 or the second large winning port 54) It is determined whether or not the acquisition (prize ball) by the game ball that has won the winning prize in the object 46 is included in the base according to the operating state of the accessory continuous operating device. Specifically, when the accessory continuous operation device is not in operation, it is acquired by a game ball that has won a prize in the general winning port 51, the general winning port 52, the first starting port 44, or the second starting port 45 (prize ball). ) Is included in the base. On the other hand, at the time of the operation of the accessory continuous operation device, the acquisition (prize ball) by the game balls won in the general winning port 51, the general winning port 52, the first starting port 44, or the second starting port 45 is based on Not included.

[Big prize opening detection process (second embodiment)]
Next, with reference to FIG. 68, the special winning opening passing detection process (according to the second embodiment) performed in S133 during the switch input detection process (see FIG. 63) will be described. FIG. 68 is a flowchart showing a procedure of a special winning opening passing detection process in the present embodiment (second embodiment).

  In the special winning opening passing detection processing according to the second embodiment, the difference from the first embodiment is that there is no processing after S186.

  In this way, for example, when the pachinko gaming machine 1 does not have a small hit, that is, when the game ball does not win the first big winning opening 53 or the second big winning opening 54 when it is other than the big win. Since it is not necessary to determine whether or not the accessory continuous device is in operation, it is possible to simplify the control related to the big winning opening passing detection processing by eliminating the processing after S186.

[Aggregation process (first embodiment)]
Next, with reference to FIGS. 69 and 70, the aggregation process according to the first embodiment performed in S135 during the switch input process (see FIG. 63) will be described. FIG. 69 and FIG. 70 are flowcharts showing the procedure of the aggregation process in the present embodiment (first embodiment).

  First, the main CPU 71 calculates a total of prize balls in one set (hereinafter referred to as “prize balls (one set)”) (S191). Specifically, the main CPU 71 determines the values of the counters for the total number of navels (1 set), the total number of electric chews (1 set), the total number of winning prizes (1 set), and the total number of winning prizes (1 set). Is added to calculate the value of the total prize ball (one set).

After the process of S191, the main CPU 71 determines whether or not the total number of prize balls (one set) is greater than 6000 (S192).
Here, in the present embodiment, the main CPU 71 discriminates the total number of winning balls because the pachinko gaming machine 1 cannot detect (count) the number of out balls, but the number of winning balls is approximately the same as the number of out balls. It is because it is set to. Therefore, if the pachinko gaming machine 1 can detect the number of out balls, the main CPU 71 can determine the total number of out balls instead of the total of the winning balls.

  In S192, when the main CPU 71 determines that the total number of winning balls (one set) is greater than 6000 (when S192 is YES), the main CPU 71 calculates the total accumulated value (one set) for aggregation processing. Of the 10 sets of buffer areas in the storage area, the latest contents are stored in the ring buffer of the first set of velvet prize balls (the ring buffer for the total number of velocities) (S193). After the process of S193, the main CPU 71 sets the value of a predetermined counter for cumulative total (one set) of the velocities to 0 (S194).

  Next, the main CPU 71 calculates the value of the accumulated electric chew (one set) from the ten buffer areas of the tabulation processing storage area and the ring buffer ( (S195). After the process of S195, the main CPU 71 sets the value of a predetermined counter for the electric Chu total (one set) to 0 (S196).

  Next, the main CPU 71 sets the value of the general winning award total (one set) to the ring of the first general winning mouth award ball in which the latest contents are stored in the 10 buffer areas of the storage area for totalization processing. The data is stored in the buffer (ring buffer for general winning award totals) (S197). After the process of S197, the main CPU 71 sets the value of a predetermined counter for the general winning award total (one set) to 0 (S198).

  Next, the main CPU 71 sets the value of the grand prize winning total (one set) in the ring of the first winning prize winning ball of the first set in which the latest contents are stored in the ten buffer areas of the totaling processing storage area. The data is stored in a buffer (ring buffer for the total number of winning prizes) (S199). After the process of S199, the main CPU 71 sets the value of a predetermined counter for the grand prize winning total (one set) to 0 (S200).

  Next, the main CPU 71 calculates the value of the grand prize winning total (one set of consecutive games) for the first set of consecutive winning games for the first set in which the latest contents are stored in the 10 buffer areas of the storage area for totaling processing. It is stored in the ring buffer of the prize ball (the ring buffer of the total winning prize total (role)) (S201). After the processing of S201, the main CPU 71 sets the value of a predetermined counter for the grand prize winning total (one set of consecutive games) to 0 (S202).

  After the process of S202 or when S192 is NO, the main CPU 71 calculates the cumulative payout number of the normal winning opening (S203). In the present embodiment, the normal winning opening includes the first start opening 44, the general winning opening 51, or the general winning opening 52. The main CPU 71 calculates the cumulative number of payouts for the normal winning slot by adding the values of the respective counters for the cumulative total (total cumulative) and the general winning slot total (total).

  Next, the main CPU 71 calculates a total of 10 sets of velvet prize balls (accumulation of velocities) (hereinafter referred to as “accumulation of velocities (10 sets)”) (S204). As described above, the 10-set cumulative value is a value obtained by adding the values stored in the 10 sets of buffer areas. The main CPU 71 calculates the value of the total amount of the thighs (10 sets) by adding the values stored in the ten sets of buffer areas relating to the thigh prize balls (the total number of thighs). The main CPU 71 stores the calculated total value of the velocities (10 sets) in a predetermined area in the storage area for tabulation processing.

  Next, the main CPU 71 calculates a total of 10 sets of electric chew prize balls (electrical chew cumulative) (hereinafter referred to as “electrical chew cumulative (10 sets)”) (S205). The main CPU 71 calculates the value of the electric Chu total (10 sets) by adding the values stored in the 10 sets of buffer areas related to the electric chew winning ball (electric Chu total). The main CPU 71 stores the calculated electric Chu total (10 sets) in a predetermined area in the storage area for tabulation processing.

  Next, the main CPU 71 calculates a total of 10 sets of general winning award balls (general winning opening total) (hereinafter referred to as “general winning opening total (10 sets)”) (S206). The main CPU 71 calculates the value of the general winning opening total (10 sets) by adding the values stored in the 10 sets of buffer areas related to the general winning mouth winning ball (general winning opening total). The main CPU 71 stores the calculated value of the general winning award total (10 sets) in a predetermined area in the storage area for tabulation processing.

  Next, the main CPU 71 calculates a total of 10 sets of grand prize winning prize balls (large winning prize cumulative) (hereinafter referred to as “large winning prize cumulative (10 sets)”) (S207). The main CPU 71 calculates the value of the grand prize winning total (10 sets) by adding up the values stored in the 10 sets of buffer areas related to the big winning prize winning ball (large winning prize cumulative). The main CPU 71 stores the calculated value of the grand prize winning total (10 sets) in a predetermined area in the storage area for totalization processing.

  Next, the main CPU 71 calculates a total of 10 sets of the consecutive winning prize winning balls (large winning prize cumulative) (hereinafter referred to as “large winning prize cumulative (10 consecutive sets)”) (S208). The main CPU 71 calculates the value of the grand prize winning total (10 consecutive sets) by adding the values stored in the 10 sets of buffer areas related to the consecutive winning prize winning ball (large winning prize cumulative). To do. The main CPU 71 stores the calculated value of the grand prize winning total (10 sets of consecutive games) in a predetermined area in the storage area for totalization processing.

  Next, the main CPU 71 calculates a total of 10 sets of prize balls (hereinafter referred to as “prize balls (10 sets)”) (S209). Specifically, the main CPU 71 stores the total number of navels (10 sets), the total number of electric chews (10 sets), the total number of winning prizes (10 sets), and the big prizes stored in a predetermined area of the storage area for totalization processing. The value of the total number of prize balls (10 sets) is calculated by adding the total of the mouth totals (10 sets).

  Next, the main CPU 71 calculates an accessory ratio based on the values stored in the ten sets of buffer areas of the tabulation processing storage area (hereinafter referred to as “object ratio (10 sets)”) (S210). ). Specifically, the main CPU 71 divides a value obtained by adding up the electric chew total (10 sets) and the grand prize winning total (10 sets) by the value of the total prize ball (10 sets) and obtains the result of the division. By multiplying the obtained value by 100, a ratio, that is, an accessory ratio (10 sets) is calculated.

  Next, the main CPU 71 calculates a continuous character ratio (hereinafter referred to as “continuous character ratio (10 sets)”) based on values stored in the ten sets of buffer areas in the storage area for tabulation processing. (S211). Specifically, the main CPU 71 divides the value of the total winning prize opening (10 sets of consecutive games) by the value of the total number of winning balls (10 sets) and multiplies the value obtained by the division by 100. To calculate the ratio, that is, the ratio of consecutive actors (10 sets)

  Next, the main CPU 71 determines an object ratio (hereinafter referred to as “object ratio”) based on the total accumulated value (the value obtained by adding all the values overwritten (erased) to the current 10 set accumulated values). (Sum total) ”is calculated (S212). Specifically, the main CPU 71 obtains a value obtained by dividing the total of the electric chew total (total total) and the grand prize winning total (total total) by the value of the total number of prize balls (total total) and dividing the value. By multiplying the obtained value by 100, a ratio, that is, an accessory ratio (total total) is calculated. The “all values” in the “all overwritten (erased) values” means one day, during business hours, from when the power is turned on until the power is turned off, or It may be all values overwritten (erased) under a predetermined condition (or within a predetermined period), such as while the “total total” is stored in the storage area.

  Next, the main CPU 71 calculates a continuous feature ratio (hereinafter referred to as “continuous feature ratio (total cumulative)”) based on the total cumulative value (S213). Specifically, the main CPU 71 divides the value of the grand prize winning total (combined total total) by the value of the total prize ball (total total) and multiplies the value obtained by the division by 100. Based on the above, the ratio, that is, the ratio of consecutive actors (total total) is calculated.

  After the process of S213, the main CPU 71 ends the counting process and moves the process to a switch input detection process (FIG. 63).

  In this way, in the counting process, the timing for storing in the ring buffer is when the total number of winning balls (one set) exceeds 6000 (see S192). With such a configuration, it is possible to reduce the swing range in which the total of 10 sets of prize balls rises and falls after the total cumulative number of prize balls exceeds 60000.

  Note that the timing stored in the ring buffer is not limited to the timing performed in the aggregation process as described above, and can be arbitrarily set, for example, the timing when the game ball is won. However, in any case, it is necessary to switch the ring buffer to be stored (the first set of ring buffers in which the latest contents are stored) in units of a total of 6,000 winning balls for one set. .

[Total processing (second embodiment)]
Next, with reference to FIG. 71 and FIG. 72, the aggregation process according to the second embodiment performed in S135 during the switch input process (see FIG. 63) will be described. FIG. 71 and FIG. 72 are flowcharts showing the procedure of the counting process in the present embodiment (second embodiment).

Note that in the tabulation processing according to the second embodiment, the difference from the first embodiment is that when the main CPU 71 calculates the continuous character ratio (10 sets) and the continuous character ratio (total total), it is a big prize. It is a point that does not use the cumulative total of mouths (ten sets of executives) and the total of winning prizes (totals of executives).
Hereinafter, for the sake of convenience, description of points that are the same as those of the first embodiment will be omitted, and differences from the first embodiment will be described.

  After the process of S200, the main CPU 71 performs the process of S203 (without performing the processes of S201 and S202 as in the first embodiment).

  Further, after the process of S207, the main CPU 71 performs the process of S209 (without performing the process of S208 as in the first embodiment).

  Further, the main CPU 71 performs the process of S221 after the process of S210. In S <b> 221, the main CPU 71 calculates the continuous combination ratio (10 sets) of the storage area for aggregation processing. Specifically, the main CPU 71 divides the value of the grand prize opening total (10 sets) (not the big prize opening total (10 sets)) by the value of the total prize balls (10 sets), and By multiplying the value obtained by the division by 100, a ratio, that is, a continuous character ratio (10 sets) is calculated.

  Further, the main CPU 71 performs the process of S223 after the process of S212. In S223, the main CPU 71 calculates a continuous character ratio (total cumulative total). Specifically, the main CPU 71 divides the value of the grand prize winning total (total cumulative total) (not the grand prize winning total (role total)) by the value of the winning ball total (total cumulative), and By multiplying the value obtained by the division by 100, a ratio, that is, a continuous character ratio (total number) is calculated.

[Display process for euphoria (first embodiment)]
Next, with reference to FIG. 73, the display process for gambling according to the first embodiment performed in S125 in the system timer interrupt process (see FIG. 62) will be described. FIG. 73 is a flowchart showing the procedure of display processing for euphoria in the present embodiment (first embodiment).

  First, the main CPU 71 determines whether or not the power is on (S301). Thus, the main CPU 71 determines whether or not the power switch 38 is pressed.

  When the main CPU 71 determines in S301 that the power is not turned on (NO in S301), the main CPU 71 determines whether or not the RWM initialization switch 39 is pressed (S302). .

  If the main CPU 71 determines in S302 that the RWM initialization switch 39 has not been pressed (NO in S302), the main CPU 71 ends the display processing for joyfulness. On the other hand, when the main CPU 71 determines in S302 that the RWM initialization switch 39 has been pressed (YES in S302), the main CPU 71 performs the process of S303. Specifically, the case of YES determination in S302 indicates that the RWM initialization switch 39 has been pressed after the power is turned on (not when the power is turned on).

  In S303, the main CPU 71 generates predetermined display-related command data to be transmitted from the main control circuit 70 to the sub-control circuit 200. When the display related command thus generated is received by the sub control circuit 200 (host control circuit 210), the host control circuit 210 causes the display device 13 to display a display corresponding to the command. In the present embodiment, the display corresponding to the command includes a display of the accumulated payout number of the normal winning slot currently stored.

  After the process of S303, the main CPU 71 generates a predetermined output signal and transmits it to the main board display unit 34 (S304). Thus, when the main board display unit 34 receives the output signal, the main board display unit 34 performs operation control according to the output signal. Thus, the main board display unit 34 performs display according to the received output signal. In the present embodiment, the display corresponding to the output signal includes the currently stored 10-piece cumulative feature ratio (the bonus ratio (10 sets)), the 10-set cumulative feature ratio (the continuous bonus ratio). (10 sets)), total cumulative feature ratio (functional ratio (total cumulative)), and total cumulative feature ratio (continuous functional ratio (total cumulative)).

  As described above, when the RWM initialization switch 39 is pressed after the power is turned on, the display for gambling is performed. On the other hand, when the RWM initialization switch 39 is pressed when the power is turned on (YES in S302), the work area (game information) in the main RAM 533 is initialized.

  In S301, when the main CPU 71 determines that the power is on (YES in S301), the main CPU 71 presses the effect button 23 based on the detection signal output from the effect button switch 23a. It is determined whether or not an operation has been performed (S311).

  If the main CPU 71 determines in S <b> 311 that the press operation of the effect button 23 has not been performed (NO determination in S <b> 311), the main CPU 71 ends the display process for joyfulness. On the other hand, when the main CPU 71 determines in S <b> 311 that the operation button 23 has been pressed (YES in S <b> 311), the main CPU 71 performs the process of S <b> 312.

In S <b> 312, the main CPU 71 generates predetermined display-related command data to be transmitted from the main control circuit 70 to the sub-control circuit 200. When the display related command thus generated is received by the sub control circuit 200 (host control circuit 210), the host control circuit 210 causes the display device 13 to display a display corresponding to the command. In the present embodiment, display according to the command includes display of a hall menu. Note that the display of the hall menu includes a plurality of items that can be selected using the effect button 23 in order to view various information related to the pachinko gaming machine 1.

  In S313, when the main CPU 71 determines that an item for displaying the history of a normal winning opening is selected from a plurality of items displayed on the hall menu based on a detection signal output from the effect button switch 23a, a predetermined process is performed. The display related command is generated and transmitted from the main control circuit 70 to the sub control circuit 200. When the display-related command thus generated is received by the sub-control circuit 200 (host control circuit 210), the host control circuit 210 displays the past (daily total) cumulative payout of the normal winning slot as a display corresponding to the command. The number is displayed on the display device 13.

  After the process of S304, after the process of S313, in the case of NO determination in S302, or in the case of NO determination in S311, the main CPU 71 ends the display process for gambling.

  As described above, in this embodiment (first embodiment), when the RWM initialization switch 39 is pressed (YES in S302), the cumulative number of payouts of the normal winning slot currently stored is as follows. Is displayed on the display device 13 and the currently stored 10-piece cumulative character ratio (physical character ratio (10 sets)), the ten-set cumulative continuous character ratio (continuous character ratio (10 sets)), It is possible to display on the main board display unit 34 the total cumulative feature ratio (composition ratio (total cumulative)) and the total cumulative feature ratio (continuous bonus ratio (total cumulative)).

  Further, in this embodiment, when the power switch 38 and the effect button 23 are pressed, the past (daily total) cumulative payout number of the normal winning opening can be displayed on the display device 13.

[Display processing for euphoria (second embodiment)]
Next, with reference to FIG. 74, the display process for gambling according to the second embodiment performed in S125 during the system timer interrupt process (see FIG. 62) will be described. FIG. 73 is a flowchart showing a procedure of display processing for euphoria in the second embodiment.

  In the display process for gambling according to the second embodiment, the point different from the first embodiment is that the main CPU 71 performs processes such as S323 after the process of S312. Hereinafter, for the sake of convenience, description of points that are the same as those of the first embodiment will be omitted, and differences from the first embodiment will be described.

  In S323, which is performed after the processing of S312, the main CPU 71 displays the history of the normal winning opening from power-on among a plurality of items displayed in the hall menu based on the detection signal output from the effect button switch 23a. When it is determined that the item is selected, a predetermined display-related command is generated and transmitted from the main control circuit 70 to the sub-control circuit 200. Thus, when the generated display-related command is received by the sub-control circuit 200 (host control circuit 210), the host control circuit 210 displays the cumulative number of payouts of the normal winning opening from power-on as a display corresponding to the command. Is displayed on the display device 13.

  Next, in S324, the main CPU 71 selects an item for displaying an accessory ratio / continuous accessory ratio from among a plurality of items displayed on the hall menu based on the detection signal output from the effect button switch 23a. If it is determined that it has been determined, a predetermined display-related command is generated and transmitted from the main control circuit 70 to the sub-control circuit 200. When the generated display-related command is received by the sub-control circuit 200 (host control circuit 210) in this way, the host control circuit 210 displays a total of 10 sets of currently stored features as a display corresponding to the command. Ratio (actual ratio (10 sets)), continuous set ratio of 10 sets (consecutive ratio (10 sets)), total cumulative ratio (functional ratio (total)), continuous total An accessory ratio (continuous accessory ratio (total)) is displayed on the display device 13.

  The items to be displayed on the display device 13 include the currently-stored ten-piece cumulative feature ratio (subject ratio (10 sets)), the ten-set cumulative feature ratio (continuous feature ratio (10 sets) )), Total cumulative feature ratio (functional ratio (total cumulative)), total cumulative continuous ratio (continuous functional ratio (total)) A combination or all of the items may be displayed. In addition, among these items, for example, it is possible to display the items on the screen separately for 10 sets and totals, or to display the items separately for the feature ratio and the continuous feature ratio. Is possible.

  Furthermore, as for the display mode, a display form different from that of the main board display unit 34 may be used so that the display is easy to understand even when viewed by a third party other than the player or the game hall related person. For example, even if the ratio is 100% on the main board display unit 34, the display is performed with 99%, while the display device 13 may display with the ratio 100%. Further, the main board display unit 34 may perform display with the decimal part rounded down, while the display device 13 may perform display of a percentage including the decimal point or may perform display with the decimal part rounded up. If the display device 13 performs display with the decimal part rounded up, the display device 13 may perform display by rounding off.

  In addition, the main board display unit 34 displays a reference numerical value (a numerical value at which the gaming machine can be determined to be normal, a numerical value at which the gaming machine can be determined to have a payout rate that reaches a certain reference). However, the display device 13 displays the reference numerical value together with the character ratio and the continuous character ratio, although only stickers are displayed on the substrate case 630 of the main control board 70a. Therefore, it is possible to display it to encourage understanding by a third party. In addition, as a result of comparison with the standard numerical value, the ratio of the consecutive character ratio, the character ratio, the cumulative number of payouts of the normal winning unit, the ratio of the cumulative number of payouts of the normal winning unit (the winning rate per hour, the normal winnings relative to the number of fires) It is assumed that the winning rate to the mouth, the ratio of the number of payouts of the normal winning mouth as seen from the total number of payouts, etc.).

  In this way, the game hall officials and third parties who have seen the display as described above, and thus the player, can set the gaming machine (adjustment of nails in the case of the pachinko gaming machine 1 and setting change in the case of the pachislot gaming machine 501) It is possible to determine whether or not the setting is normal, or whether or not a certain standard is satisfied. It can also be used as a standard for selecting machines. Moreover, even if it is a case where any display mode is used, the main substrate display part 34 and the display apparatus 13 may use the same display mode.

  After the process of S324, the main CPU 71 ends the display process for gambling.

  As described above, in the present embodiment (second embodiment), not only the past (daily total) cumulative payout number of the normal winning opening, but also the currently stored 10 set cumulative feature ratio (essential ratio (10 Set)), etc. 10 consecutive feature ratios (continuous feature ratio (10 sets)), total cumulative feature ratio (actual ratio (total)), total cumulative consecutive feature ratio (continuous role) The object ratio (total number) can be displayed on the display device 13.

  In this embodiment (second embodiment), when the generated display-related command is received by the sub-control circuit 200 (host control circuit 210) in S323, the accumulation of the normal winning opening from the power-on. Although the number of payouts is displayed on the display device 13, it is not limited to this. The cumulative payout number of the normal winning a prize to be displayed on the display device 13 is added as long as the main RAM 73 of the main control circuit 70 stores the accumulated payout number of the normal winning prize as long as it is stored (not from power-on). The cumulative number of payouts at the winning opening may be displayed.

[Display processing for euphoria (third embodiment)]
Next, with reference to FIG. 75, the display process for euphoria according to the third embodiment performed in S125 during the system timer interrupt process (see FIG. 62) will be described. FIG. 75 is a flowchart showing the procedure of display processing for euphoria in the third embodiment.

  In addition, in the display process for gambling according to the third embodiment, the difference from the first embodiment is that the main CPU 71 performs processes such as S335 after the process of S304 or S323, or the process of S323 after the process of S312. It is a point to process. Hereinafter, for the sake of convenience, description of points that are the same as those of the first embodiment will be omitted, and differences from the first embodiment will be described.

  In S323, which is performed after the processing of S312, the main CPU 71 displays the history of the normal winning opening from power-on among a plurality of items displayed in the hall menu based on the detection signal output from the effect button switch 23a. When it is determined that the item is selected, a predetermined display-related command is generated and transmitted from the main control circuit 70 to the sub-control circuit 200. Thus, when the generated display-related command is received by the sub-control circuit 200 (host control circuit 210), the host control circuit 210 displays the cumulative number of payouts of the normal winning opening from power-on as a display corresponding to the command. Is displayed on the display device 13.

  After the process of S304 or after the process of S323, in S335, the main CPU 71 determines whether or not the operation button 23 has been pressed based on the detection signal output from the effect button switch 23a.

  In S335, when the main CPU 71 determines that the press operation of the effect button 23 has not been performed (NO determination in S335), the main CPU 71 ends the display process for joyfulness. On the other hand, when the main CPU 71 determines in S335 that the press operation of the effect button 23 has been performed (YES determination in S335), the main CPU 71 performs the process of S336.

  In S336, the main CPU 71 ends the display performed in S303 and S304 or the display performed in S323.

  More specifically, in S336 performed after the processing of S304 and S335, the main CPU 71 generates a command for ending the display on the display device 13, and transmits the command from the main control circuit 70 to the sub-control circuit 200. Thus, when the command is received by the sub-control circuit 200 (host control circuit 210), the host control circuit 210 displays the cumulative number of payouts of the normal winning opening displayed on the display device 13 in accordance with the command. End.

  Further, the main CPU 71 generates a predetermined output signal for ending the display on the main board display unit 34 and transmits it to the main board display unit 34. In this way, when the main board display unit 34 receives the output signal, it performs operation control according to the output signal, and finishes display of the 10-set cumulative accessory ratio (object ratio (10 sets)) and the like. Let

  In S336 performed after the processing of S323 and S335, the main CPU 71 generates a command for ending the display on the display device 13 and transmits the command from the main control circuit 70 to the sub-control circuit 200. Thus, when the command is received by the sub-control circuit 200 (host control circuit 210), the host control circuit 210 accumulates the normal winning opening from the power-on displayed on the display device 13 according to the command. The display of the number of payouts is terminated.

  After the process of S336 or when NO is determined in S335, the main CPU 71 ends the display process for gambling.

  In this embodiment, the display is controlled to be terminated when the effect button 23 is pressed. However, the present invention is not limited to this. For example, when the first effect button is pressed, the display is ended. If the second effect button is pressed, control may be performed so that display can be selected. In this way, when performing display of a plurality of items, by determining the start or end of display with the first effect button and controlling the content to be displayed with the second effect button, It is possible to specify in detail the contents that can be displayed. Note that the selection and termination of the display with such effect buttons may be executable only for the display of the display device 13, but when the main control board 70a can receive the signal of the effect button. It is also possible to start, end, and select the display on the main board display unit 34 with the effect buttons.

  In addition, the display of the cumulative payout number of the normal winning opening on the display device 13 (or display for gambling) is started by means that the player cannot operate, and the display of the means that the player can operate is terminated. You may control as follows.

  Further, the first display on the display device 13 (display of the cumulative payout number of the normal winning opening, etc.) is started by means that can be operated by the player and / or means that the player cannot operate, and the player cannot operate it. When the first means is operated, the first display is terminated, the second display (such as the display of an accessory ratio or an accessory continuous ratio) is started, and the player and / or the player can operate. May be controlled to end the second display by means that cannot be operated.

  By using the operating means that cannot be operated by the player and the operating means that can be operated by the player, the display for gambling is performed, so that the player can view the back and the inside of the gaming machine more than necessary. It is possible to make only necessary information visible without making it visible. Here, when the structure of the gaming machine is shown to the player, for example, an island device (such as a bill or IC card transport device, a game ball or medal transport device) or the like installed on the back of the game machine, If the security devices installed inside the device are disclosed to the player more than necessary, the risk of crime prevention (specifically, the possibility that banknotes may be illegally extracted or the game media may be illegally extracted) It is assumed that there is an increased possibility of fraudulent behavior by inserting a fraudulent tool into the gaming machine so as to avoid a crime prevention device. However, as described above, the crime prevention risk can be reduced by controlling the display using the operation means that the player cannot operate and the operation means that the player can operate.

  As described above, in this embodiment (third embodiment), when the RWM initialization switch 39 is pressed (YES in S302), the cumulative number of payouts of the normal winning slot currently stored is stored. Is displayed on the display device 13 and when the operation button 23 is pressed (YES in S335), the display of the cumulative payout amount of the normal winning opening can be ended (S336).

[Display processing for euphoria (fourth embodiment)]
Next, with reference to FIG. 76, the display process for gambling according to the fourth embodiment performed in S125 during the system timer interrupt process (see FIG. 62) will be described. In addition, FIG. 76 is a flowchart which shows the procedure of the display process for joyfulness in 4th embodiment.

  In the display process for gambling according to the fourth embodiment, the point different from the first embodiment is that the process such as S344 is performed after the process of S303, the process of S349 is performed after the process of S312; In this case, the first display area 34a and the second display area 34b of the main board display unit 34 are used in different display modes. Hereinafter, for the sake of convenience, description of points that are the same as those of the first embodiment will be omitted, and differences from the first embodiment will be described.

  After the processing of S312, in S349, the main CPU 71, based on the detection signal output from the effect button switch 23a, among the items displayed on the hall menu, the item for displaying the history of the normal winning opening from power-on. When it is determined that is selected, a predetermined display-related command is generated and transmitted from the main control circuit 70 to the sub-control circuit 200. Thus, when the generated display-related command is received by the sub-control circuit 200 (host control circuit 210), the host control circuit 210 displays the cumulative number of payouts of the normal winning opening from power-on as a display corresponding to the command. Is displayed on the display device 13.

  In S349, the cumulative number of payouts of the normal winning opening from the power-on displayed on the display device 13 is accumulated for each type of gaming state (for example, normal gaming state, probability variation gaming state, short-time gaming state, etc.). The number of payouts is included.

  Further, after the process of S303, the main CPU 71 generates a predetermined output signal and transmits it to the main board display unit 34 (S344). Thus, when the main board display unit 34 receives the output signal, the main board display unit 34 performs operation control according to the output signal. Thus, the main board display unit 34 performs display according to the received output signal. In the present embodiment, the display corresponding to the output signal includes the currently stored 10-piece cumulative feature ratio (the bonus ratio (10 sets)), the 10-set cumulative feature ratio (the continuous bonus ratio). (10 sets)), total cumulative feature ratio (functional ratio (total cumulative)), and total cumulative feature ratio (continuous functional ratio (total cumulative)).

  In S344, the mode (display mode) displayed in the first display area 34a and the second display area 34b of the main board display unit 34 is a third mode described later.

  After the processing of S344, the main CPU 71 determines whether the total cumulative total of the winning balls that will be the cumulative number of winning balls (the total of the winning balls (total total) has satisfied the reference number of winning balls (6000 in the present embodiment)). It is determined whether or not (S345).

  In S345, when the main CPU 71 determines that the total number of prize balls that will be the cumulative number of prize balls (the total number of prize balls (total number) has satisfied the standard number of prize balls (in the case of YES determination in S345), The main CPU 71 performs the process of S347, which will be described later, while the main CPU 71 does not satisfy the reference number of winning balls (the total number of winning balls (the total number of winning balls) that is the total number of winning balls). Is determined (NO in S345), the main CPU 71 performs the process of S346.

  In S346, the main CPU 71 changes the mode (display mode) displayed in the first display area 34a and the second display area 34b of the main board display unit 34 to the first mode described later, which is different from the third mode. change.

  In S347, the main CPU 71 determines whether or not the information such as the total cumulative feature ratio displayed on the main board display unit 34 (the bonus ratio (total cumulative)) exceeds a reference ratio. In the present embodiment, the total cumulative feature ratio (continuous feature ratio (total cumulative)) exceeds 60%, and the total cumulative feature ratio (functional ratio (total cumulative)) is 70%. Is exceeded, it is determined that the reference ratio has been exceeded.

  In S347, when the main CPU 71 determines that the reference ratio has been exceeded (YES determination in S347), the main CPU 71 performs the process of S348.

In S348, the main CPU 71 sets the mode (display mode) displayed in the first display area 34a and the second display area 34b of the main board display unit 34, which will be described later, different from the third mode and the first mode. Change to the second mode.
A detailed description of the mode (display mode) displayed in the first display area 34a and the second display area 34b of the main board display unit 34 will be described later.

  After the process of S348, after the process of S349, in the case of NO determination in S302, or in the case of NO determination in S311, the main CPU 71 ends the display process for gambling.

  As described above, in the present embodiment (fourth embodiment), the accumulated payout number of the normal winning opening from the power-on displayed on the display device 13 includes the type of game state (for example, the normal game state and the probability variation game). The cumulative number of payouts per state, short-time gaming state, etc.) can be included (S349). Moreover, in this embodiment, the aspect (display aspect) displayed on the 1st display area 34a and the 2nd display area 34b of the main board | substrate display part 34 can be made into a different display aspect according to predetermined conditions. (S344 to S348).

[Display contents of main board display part of pachinko machine]
Next, the display contents of the main board display unit 34 will be described with reference to FIG.

  As shown in FIG. 77A, the main board display unit 34 displays an identification symbol for indicating the classification and display contents (type) in the second display area 34b among the four independent display areas. . In addition, the main substrate display unit 34 displays an identification symbol for indicating a reference ratio (%) in the first display region 34a among the four independent display regions.

  Specifically, “y6.” Is displayed in the second display area 34b in order to indicate 6000 prize balls and combination as the classification and display contents. Further, “y7.” Is displayed in the second display area 34b in order to indicate the 6000 prize balls and the role ratio as classification and display contents. In addition, “A6.” Is displayed in the second display area 34b in order to indicate the cumulative total and combination as the classification and display content. Further, “A7.” Is displayed in the second display area 34b in order to indicate the cumulative total and the role ratio as the classification and display content.

  In addition, “60” is displayed in the first display area 34a in order to indicate 6000 prize balls and a ratio (%) serving as a reference for the combination. In addition, “70” is displayed in the first display area 34a in order to indicate 6000 prize balls and a ratio (%) that serves as a reference for the winning ratio. Further, “60” is displayed in the first display area 34a in order to indicate the ratio (%) that is the reference for the cumulative total and the combination. In addition, “70” is displayed in the first display area 34a in order to indicate a ratio (%) that is a reference for the cumulative total and the role ratio.

  In such a configuration, the identification symbol displayed in the second display area 34b and the identification symbol displayed in the first display area 34a are blinked as necessary. Thus, the mode in which the identification symbol displayed in the second display area 34b is lit up corresponds to the first mode. Moreover, the aspect by which the identification symbol displayed on the 1st display area 34a is light-displayed corresponds to the said 2nd aspect. Further, a mode in which neither the identification symbol displayed in the second display area 34b nor the identification symbol displayed in the first display area 34a is blinked corresponds to the third mode.

  In this embodiment, the mode in which the identification symbol displayed in the second display area 34b is lit up corresponds to the first mode, and the identification symbol displayed in the first display area 34a is lit up. A mode corresponds to the second mode, and a mode in which neither the identification symbol displayed in the second display area 34b nor the identification symbol displayed in the first display area 34a is displayed blinking corresponds to the third mode. However, the first to third aspects are not limited to these.

  For example, the mode in which the identification symbol displayed in the second display area 34b is not lit and displayed corresponds to the first mode, and the mode in which the identification symbol displayed in the first display area 34a is not lit and displayed is the second mode. And the mode in which the identification symbol displayed in the second display area 34b and the identification symbol displayed in the first display area 34a are both displayed blinking may correspond to the third mode. The third aspect can be set arbitrarily. Further, the change in the display mode of the first display area 34a and the second display area 34b is not limited to lighting display or the like, but may be, for example, a change in emission color or a change in character size. Thus, the change in the display mode of the first display area 34a and the second display area 34b is, for example, a person related to a game hall or the like who can see the change in the display of these display areas. Good.

<Description of operation of main control circuit of pachislot machine>
Next, the contents of various processes executed by the main CPU 531 of the main control circuit 571 of the pachislot machine 501 will be described.

[Main control main processing]
First, with reference to FIGS. 78 and 79, main control main processing by the control of the main CPU 531 will be described. 78 and 79 are flowcharts showing a procedure of main control main processing of the pachislot machine 501 in the present embodiment.

  First, when power is turned on to the pachislot machine 501, the main CPU 531 performs power-on processing (S 501). In this power-on process, it is determined whether the backup is normal or the setting has been changed appropriately, and an initialization process is executed according to the determination result.

  Next, the main CPU 531 performs initialization processing at the end of one game (unit game) (S502). In this process, the main CPU 531 specifies and initializes a storage area for initialization at the end of one game, for example. By this initialization process, data stored in the internal winning combination storage area and the display combination storage area of the main RAM 533 is cleared.

  Subsequently, the main CPU 531 performs medal acceptance / start check processing (S503). In this process, the main CPU 531 determines whether the upper stage-upper stage-upper stage is valid and a start operation is possible based on the number of inserted sheets. In the medal acceptance / start check process, the number of games is counted. The number of games includes the number of games for one set (that is, 400 times in the present embodiment), the total number of games since the power is turned on (total number), and the like.

  Next, the main CPU 531 extracts random values and stores them in the random value storage area (S504). This random value is used in an internal lottery process (S506) described later. Subsequently, the main CPU 531 extracts the effect random number value and stores it in the effect random number storage area (S505). This effect random number value is used in the lock determination process. Subsequently, the main CPU 531 performs an internal lottery process (S506). In this process, the main CPU 531 determines an internal winning combination.

  Subsequently, the main CPU 531 performs reel stop initial setting processing (S507). In this process, the main CPU 531 initializes an area related to control for stopping the rotation of the reels 503L, 503C, and 503R.

  Next, the main CPU 531 generates start command data, and stores the generated start command data in the communication data storage area of the main RAM 533 (S508). The start command data stored in the communication data storage area is transmitted from the main control circuit 571 to the sub control circuit 572 in a communication data transmission process described later. The start command includes various kinds of information (internal winning combination, gaming state, etc.) necessary for production such as internal winning combination. Thereby, the sub control circuit 572 can produce an effect according to the start operation.

  Next, the main CPU 531 performs a game start lock process (S509). In this process, the main CPU 531 determines whether to delay the timing for starting the rotation of the reels 503L, 503C, and 503R based on the internal winning combination.

  Subsequently, the main CPU 531 performs a wait process (S510). In this process, the main CPU 531 waits until a predetermined time (for example, 4.1 seconds) elapses from the start of the previous game or until a lock time (for example, 5 seconds) set in the game start lock process elapses. To do. The lock time set by the game start lock process may be digested by invalidating the stop operation of the stop buttons 507L, 507C, and 507R after the start of rotation. In this case, the player can recognize that the player is locked because the stop operation is not possible despite the rotation being started. Further, during this locking, the reel may be rotated slowly or reversely (reel action) to make it easier to recognize that it is being locked.

  Subsequently, the main CPU 531 performs a reel rotation start process (S511). In this process, the main CPU 531 requests the start of rotation of the reels 503L, 503C, and 503R, and stores a reel rotation start command in the communication data storage area of the main RAM 533 (S512). The reel rotation start command data stored in the communication data storage area is transmitted from the main control circuit 571 to the sub control circuit 572 in the communication data transmission process. By this processing, the sub control circuit 572 can recognize the start of reel rotation, and can determine the timing for executing various effects.

  Next, the main CPU 531 performs a pull-in priority storage process (S513). Subsequently, the main CPU 531 performs a reel stop control process (S514).

  Next, the main CPU 531 performs a winning search process (S515). In this process, the main CPU 531 collates the symbol combination displayed along the active line with the symbol combination table after the reels 503L, 503C, and 503R are stopped, determines the display combination, and determines the number of medals to be paid out. Do. The detailed description of the winning search process will be described later.

  Next, the main CPU 531 performs RT control processing (S516). In this process, the RT gaming state flag is updated according to the display combination.

  Next, the main CPU 531 pays out medals based on the payout number of medals determined in the process of S515 (S517). Subsequently, the main CPU 531 stores the winning operation command data in the communication data storage area of the main RAM 533 (S518). The stored winning action command data is transmitted to the sub control circuit 572 in a communication data transmission process of an interrupt process described later.

  Next, the main CPU 531 performs a lock process at the end of the game (S519). In this process, the main CPU 531 determines whether to lock the progress of the game based on the internal winning combination.

  Subsequently, the main CPU 531 performs a bonus end check process (S520). In this process, the main CPU 531 ends the operation of the bonus game when a condition for ending the bonus game is satisfied. Subsequently, the main CPU 531 performs a bonus operation check process (S521), and then performs a process of S502. In this process, the main CPU 531 starts the operation of the bonus game when the condition for starting the bonus game is satisfied, and operates the re-game when the condition for re-game is satisfied.

[Interrupt processing]
In the pachislot machine 501 of the present embodiment, the main CPU 531 interrupts the main process at a predetermined cycle (for example, every 1.1173 mS) and executes the interrupt process even during execution of the main process. FIG. 80 is a flowchart showing the procedure of interrupt processing in the present embodiment.

  First, the main CPU 531 saves the register (S531). Subsequently, the main CPU 531 performs an input port check process (S532). In this process, the main CPU 531 confirms the presence / absence of a signal transmitted to the microcomputer 530. For example, the main CPU 531 stores the on-edge and off-edge of the start switch 506S, the stop switch 507S, etc. for each interrupt process. Further, the main CPU 531 stores an input state command including information on the on-edge and off-edge of various switches in the communication data storage area of the main RAM 533. The stored input state command is transmitted to the sub control circuit 572 in a command data transmission process of an interrupt process described later. As a result, various effects can be executed using operating means such as the start lever 506 and the stop buttons 507L, 507C, and 507R.

  Subsequently, the main CPU 531 performs timer update processing (S533). Next, the main CPU 531 performs display for joyfulness described later (S534). Next, the main CPU 531 performs communication data transmission processing to be described later (S535). In this process, the command stored in the communication data storage area is transmitted to the sub control circuit 572. Subsequently, the main CPU 531 performs a process of controlling the rotation of the reels 503L, 503C, and 503R (S536). More specifically, the main CPU 531 starts the rotation of the reels 503L, 503C, and 503R in response to a request for starting the rotation of the reels 503L, 503C, and 503R, that is, in response to the start operation. Control is performed so that 503L, 503C, and 503R rotate. Further, in accordance with the stop operation, control is performed so that the rotation of the reels 503L, 503C, and 503R corresponding to the stop operation stops.

  Subsequently, the main CPU 531 performs a lamp / 7SEG driving process (S537). For example, the main CPU 531 displays the number of credited medals, the number of payouts, etc. on various display units. Subsequently, the main CPU 531 restores the register (S538), and terminates the interrupt processing that occurs periodically.

[Communication data transmission processing]
FIG. 81 is a flowchart showing a communication data transmission process subroutine called in the process of S535 in FIG. First, the main CPU 531 subtracts 1 from the communication data transmission timer (S541), and then determines whether the communication data transmission timer is 0 (S542). When the communication data transmission timer is 0 (when S542 is YES), the main CPU 531 moves the process to S543. On the other hand, when the communication data transmission timer is not 0 in S542 (when S542 is NO), the main CPU 531 ends this subroutine.

  In S543, the main CPU 531 determines whether there is untransmitted data in the communication data storage area. When there is untransmitted data (when S543 is YES), the main CPU 531 moves the process to S545, and when there is no untransmitted data (when S543 is NO), the process moves to S544.

  In S544, the main CPU 531 generates no-operation command data, and stores the generated no-operation command in the communication data storage area of the main RAM 533. That is, when there is no untransmitted data in the communication data storage area, the main CPU 531 stores no-operation command data in the communication data storage area. As a result, a state in which command data to be transmitted is always stored in the communication data storage area is generated. Specifically, the main CPU 531 generates the operation state stored in the main RAM 533 as a no-operation command in the input port check process (S532) described above. The data indicating the operation state generated as the no-operation command satisfies the condition for transmitting the no-operation command (the state where the input state command has been transmitted and cleared) in the subsequent communication data transmission process (S546). In this case, the data is transmitted from the main control circuit 571 to the sub control circuit 572. The input state command is command data related to the effect, and means an operation corresponding command for the effect corresponding to the operation of the switch or the like. On the other hand, the no-operation command is a command (operation non-corresponding command) transmitted when an operation corresponding command such as an input state command is not transmitted.

  In S545, the main CPU 531 sets an initial value (16) in the communication data transmission timer. That is, since the communication data transmission timer is 0 in S542 described above, the main CPU 531 sets the initial value (16) in the communication data transmission timer again in S545. As a result, every time the communication data transmission process is performed from the next communication data transmission process, the communication data transmission timer is sequentially decremented by one to obtain the timing for transmitting the communication data.

  After the process of S545, the main CPU 531 transmits the communication data stored in the communication data storage area (S546). In this case, in the communication data storage area, command data (for example, initialization command data, medal insertion command data, start command data, reel rotation start) stored in the communication data storage area by the processing in the main control circuit 571 so far. Command data, reel stop command data, winning action command data, bonus start command data, bonus end command data, input state command data, etc.) or if there is no data to be transmitted, the data stored in S544 above is stored. Since the operation command data is stored, some command data is always transmitted.

  After the process of S546, the main CPU 531 updates the communication data storage area (S547), and then ends this subroutine.

  In this way, the main CPU 531 transmits the command data stored in the communication data storage area to the sub control circuit 572 at every predetermined timing counted by the communication data transmission timer by executing the communication data transmission process. . In this embodiment, no-operation command data is transmitted when there is no data to be transmitted, but no-operation command data may or may not be transmitted when there is no data to be transmitted. There may be a case of not transmitting.

[Winning Search Processing (First Embodiment)]
Next, with reference to FIGS. 82 to 84, the winning search process according to the first embodiment performed in S515 in the main control main process (see FIG. 79) will be described. 82 to 84 are flowcharts showing the procedure of the winning search process in the present embodiment (first embodiment).

  First, the main CPU 531 determines whether or not the first type special bonus item is paid out (S601). In S601, when the main CPU 531 determines that it is not paying out the first type special combination (when S601 is NO), the main CPU 531 performs the process of S605 described later. On the other hand, when the main CPU 531 determines in S601 that the first-type special combination is paid out (when S601 is YES), the main CPU 531 performs the process of S602.

  Note that the payout of the first type special combination corresponds to payout of RB (regular bonus) or RB payout in BB (big bonus). However, in the general BB, even when the accessory continuous operation device is operating, if the first type special accessory is not established, other small roles may be established, A small payout when such an accessory continuous actuating device is operating may be recorded in the cumulative total of the consecutive roles described later.

  In S <b> 602, the main CPU 531 performs the first type special object in one set (more specifically, for example, in the current one set started after the end of the previous one set or in the first set after power-on). 1 type payout information is added to the 1 type total (1 set) in order to calculate the total of the payout (hereinafter referred to as “1 type total (1 set)”).

  In step S <b> 603, the main CPU 531 adds one type of payout information to the combined service cumulative (total cumulative) in order to calculate the total combined service combined total (hereinafter referred to as “total combined (total)”). To do.

  Next, in step S604, the main CPU 531 adds one type of payout information to the accumulated feature (total) in order to calculate the accumulated total of items paid out (hereinafter referred to as “accumulated items (total)”). To do. After the process of S604, the main CPU 531 performs a process of S611 described later.

  In S601, when the main CPU 531 determines that the first type special feature is not paid out (when S601 is NO), the main CPU 531 determines whether or not the second type special feature is paid out. (S605).

  It should be noted that the payout of the second type special character corresponds to payout of CT (challenge time), CB (challenge bonus), and MB (middle bonus).

  In S605, when the main CPU 531 determines that it is not paying out the second type special combination (when S605 is NO), the main CPU 531 performs the process of S608 described later. On the other hand, when the main CPU 531 determines in S605 that the second-type special combination is paid out (when S605 is YES), the main CPU 531 performs the process of S606.

  In step S <b> 606, the main CPU 531 calculates the cumulative total of the second type special feature payouts in one set (hereinafter referred to as “two types total (one set)”). Add two types of payout information.

  Next, in S607, the main CPU 531 adds the two types of payout information to the accumulated feature (total) in order to calculate the accumulated feature (total). After the process of S607, the main CPU 531 performs a process of S611 described later.

  In S605, when the main CPU 531 determines that it is not paying out the second-type special combination (when S605 is NO), the main CPU 531 determines whether or not the small combination is paying out (S608).

  In S608, when the main CPU 531 determines that it is not a small payout (when S608 is NO), the main CPU 531 performs a process of S611 described later. On the other hand, when the main CPU 531 determines in S608 that the small role has been paid out (when S608 is YES), the main CPU 531 performs the process of S609.

  In step S <b> 609, the main CPU 531 calculates small role payout information in the small role total (1 set) in order to calculate the small role payout total (hereinafter referred to as “small role total (1 set)”) in one set. to add.

  Next, in S610, the main CPU 531 adds the small role payout information to the small role total (total total) in order to calculate the total total of small role payout (hereinafter referred to as “small role total (total total)”). To do. After the process of S610, the main CPU 531 performs the process of S611.

  In S611, the main CPU 531 determines whether or not the number of games in one set (the number of games (one set)) has reached 400 times. When the main CPU 531 determines that the number of games (one set) has not reached 400 (NO in S611), the process of S618 described below is performed. On the other hand, when the main CPU 531 determines that the number of games (one set) has reached 400 (in the case of YES determination in S611), the main CPU 531 performs the process of S612.

  In S612, the main CPU 531 calculates the total payout of one set by adding up the small combination total (one set), the one type total (one set), and the two types total (one set). Specifically, the main CPU 531 adds up the counter values for the small part total (1 set), 1 type total (1 set), and 2 type total (1 set). Calculate the payout value. The main CPU 531 stores (registers) the calculated value in the first set total payout ring buffer in which the latest contents are stored in the 15 sets of buffer areas of the search processing storage area.

  Next, in step S613, the main CPU 531 adds up one type of cumulative total (one set) and two types of cumulative total (one set) to calculate one set of item payout. Specifically, the main CPU 531 calculates the value of one set of item payouts by adding the values of the counters for the one-type total (one set) and the two-type total (one set). The main CPU 531 stores (registers) the calculated value in the first set of accessory payout ring buffers in which the latest contents are stored in the 15 sets of buffer areas of the search processing storage area.

  Next, in S614, the main CPU 531 sets the counter value for one type of accumulation (one set) as the first set of linkages in which the latest contents are stored in the 15 buffer areas of the search processing storage area. Store (register) in the payout ring buffer.

  Next, in S615, the main CPU 531 sets the value of a predetermined counter for the small combination total (one set) to 0. In step S616, the main CPU 531 sets the value of a predetermined counter for one type of accumulation (one set) to zero. Next, in S617, the main CPU 531 sets the value of a predetermined counter for two types of accumulation (one set) to zero.

  After the process of S617 or when NO is determined in S611, the main CPU 531 performs the process of S618.

  In step S618, the main CPU 531 calculates a total set of 15 payouts (hereinafter referred to as a total payout (15 sets total)). Specifically, the main CPU 531 calculates the value of the total payout (15 sets cumulative) by adding the values stored in the 15 sets of buffer areas related to the total payout. The main CPU 531 stores the calculated total payout (15 sets cumulative) value in a predetermined area in the search processing storage area.

  Next, in S619, the main CPU 531 calculates the 15-set total of the payout of the accessory (hereinafter referred to as the “offering of the accessory (15-set total)”). Specifically, the main CPU 531 calculates the value of the paying out of the bonus item (15 sets cumulative) by adding the values stored in the 15 sets of buffer areas related to the payout of the bonus item. The main CPU 531 stores the calculated reward item payout (total of 15 sets) in a predetermined area in the search processing storage area.

  Next, in S620, the main CPU 531 calculates a combined set payout of 15 sets (hereinafter referred to as a combined set payout (15 sets accumulated)). Specifically, the main CPU 531 calculates the value of the combined payout (15 sets cumulative) by adding the values stored in the 15 sets of buffer areas related to the combined payout. The main CPU 531 stores the calculated combined payout (15 sets cumulative) value in a predetermined area in the search processing storage area.

  Next, in S621, the main CPU 531 sums up the small part total (total total) and the accumulative total (total total), and refers to the total total of total payout (hereinafter referred to as “total payout (total total)”). .) Is calculated. The main CPU 531 stores the calculated value in a predetermined area in the search processing storage area.

  Next, in S622, the main CPU 531 calculates an accessory ratio (hereinafter referred to as “object ratio (15 sets)”) based on the values stored in the 15 sets of buffer areas of the search processing storage area. To do. Specifically, the main CPU 531 calculates an accessory ratio (15 sets) by dividing the value of the bonus item payout (15 sets cumulative) by the value of the total payout (15 sets cumulative).

  Next, in S623, the main CPU 531 has a continuous character ratio (hereinafter referred to as “continuous character ratio (15 sets)”) based on the values stored in the 15 sets of buffer areas of the search processing storage area. Is calculated. Specifically, the main CPU 531 calculates the consecutive character ratio (15 sets) by dividing the value of the combined payout (15 sets cumulative) by the value of the total payout (15 sets cumulative).

  Next, in S624, the main CPU 531 calculates an object ratio (hereinafter referred to as “object ratio (total number)”) based on the total value. Specifically, the main CPU 531 calculates an accessory ratio (total cumulative amount) by dividing the value of the total payout (total cumulative amount) by the value of the total payout (total cumulative amount).

  Next, in S625, the main CPU 531 calculates a continuous character ratio (hereinafter referred to as “continuous character ratio (total cumulative)”) based on the total cumulative value. Specifically, the main CPU 531 calculates the consecutive character ratio (total number) by dividing the value of the combined payout (total number) by the value of the total amount (total number).

[Winning Search Process (Second Embodiment)]
Next, with reference to FIG. 85, the winning search process according to the second embodiment performed in S515 in the main control main process (see FIG. 79) will be described. FIG. 85 is a part of a flowchart (more specifically, a procedure from S610 to S621 according to the first embodiment) showing a procedure of a winning search process in the present embodiment (second embodiment).

  In addition, in the tabulation process according to the second embodiment, the point different from the first embodiment is that the payout of the ordinary feature is taken into consideration. Hereinafter, for the sake of convenience, description of points that are the same as those of the first embodiment will be omitted, and differences from the first embodiment will be described.

  The main CPU 531 performs the process of S651 after the process of S610. In S <b> 651, the main CPU 531 determines whether or not the ordinary bonus item is paid out. In S651, when the main CPU 531 determines that it is not a payout of an ordinary accessory (when S651 is NO), the main CPU 531 performs a process of S611 described later. On the other hand, when the main CPU 531 determines in S651 that the payout is an ordinary accessory (when S651 is YES), the main CPU 531 performs the process of S652. In the present embodiment, it corresponds to an ordinary actor, for example, a single bonus (SB). Also, the payout at the time of winning a bonus may or may not be included in the payout of the ordinary character.

  In step S652, the main CPU 531 adds the normal payout information to the normal total (one set) in order to calculate the total of the payouts of the normal items in one set (hereinafter referred to as “normal total (1 set)”). To do.

  Next, in S652, the main CPU 531 adds the normal payout information to the accumulated feature (total) in order to calculate the accumulated feature (total). After the process of S652, the main CPU 531 performs the process of S611.

  In S611, when the main CPU 531 determines that the number of games (one set) has reached 400 (in the case of YES determination in S611), the main CPU 531 performs the process of S662.

  In S662, the main CPU 531 adds up the small part total (1 set), the 1st class total (1 set), the 2nd class total (1 set), and the ordinary total (1 set), and gives one set total payout. calculate. Specifically, the main CPU 531 adds the counter values for the small total (1 set), 1 type total (1 set), 2 type total (1 set), and normal total (1 set). Thus, the value of the total payout of one set is calculated. The main CPU 531 stores (registers) the calculated value in the first set total payout ring buffer in which the latest contents are stored in the 15 sets of buffer areas of the search processing storage area.

  Next, in S663, the main CPU 531 adds up one type total (one set), two types total (one set), and a normal total (one set), and calculates one set of payouts. Specifically, the main CPU 531 adds one counter value for each of the one-type cumulative (one set), the two-type cumulative (one set), and the normal total (one set), thereby obtaining one set of functions. Calculate the payout value. The main CPU 531 stores (registers) the calculated value in the first set of accessory payout ring buffers in which the latest contents are stored in the 15 sets of buffer areas of the search processing storage area. The main CPU 531 performs the process of S614 after the process of S663.

  Next, in S614, the main CPU 531 sets the counter value for one type of accumulation (one set) as the first set of linkages in which the latest contents are stored in the 15 buffer areas of the search processing storage area. Store (register) in the payout ring buffer.

  Next, in S654, the main CPU 531 sets the value of a predetermined counter for normal accumulation (one set) to zero. Next, the main CPU 531 performs the process of S615. Note that the processing from S615 to S620 is the same as the processing from S615 to S620 according to the first embodiment.

  As described above, in the winning search process according to the second embodiment, the value of one set of total payout or the payout of the bonus item can be calculated and stored in the ring buffer in consideration of the payout of the normal bonus item. .

  After the process of S625, the main CPU 531 ends the winning search process and moves the process to the RT control process (S516) of the main control main process.

[Display process for euphoria (first embodiment)]
Next, with reference to FIG. 86, the display process for gambling according to the first embodiment performed in S534 during the interrupt process (see FIG. 80) will be described. FIG. 86 is a flowchart showing the procedure of display processing for euphoria in the present embodiment (first embodiment).

  First, the main CPU 531 determines whether or not the power is on (S701). Thus, the main CPU 531 determines whether or not the power switch 545 has been pressed.

  If the main CPU 531 determines that the power is not turned on in S701 (NO in S701), the main CPU 531 determines whether or not the RWM initialization switch 544 is pressed (S702). .

  In S702, when the main CPU 531 determines that the RWM initialization switch 544 has not been pressed (NO in S702), the main CPU 531 ends the display process for gambling. On the other hand, when the main CPU 531 determines in S702 that the RWM initialization switch 544 has been pressed (YES in S702), the main CPU 531 performs the processing in S703.

  In step S <b> 703, the main CPU 531 generates predetermined display-related command data to be transmitted from the main control circuit 571 to the sub control circuit 572. When the display related command thus generated is received by the sub control circuit 572, the sub CPU 581 causes the liquid crystal display device 505 to display a display corresponding to the command. In the present embodiment, the display corresponding to the command includes the display of the currently stored small combination total (total total).

  After the processing of S703, the main CPU 531 generates a predetermined output signal and transmits it to the display unit drive circuit 548 in S704. Thus, when the display unit driving circuit 548 receives the output signal, the display unit driving circuit 548 controls the operation of the main substrate display unit 634 according to the output signal. Accordingly, the main board display unit 634 performs display according to the received output signal. In the present embodiment, as the display corresponding to the output signal, the currently stored character ratio (10 sets), continuous character ratio (10 sets), character ratio (total), continuous character ratio ( Total) is displayed.

  In S701, when the main CPU 531 determines that the power is on (YES in S701), the main CPU 531 determines the input button 595 (effect) based on the detection signal output from the input button switch 595S. It is determined whether or not a button is pressed (S711).

  If the main CPU 531 determines in S711 that the input button 595 has not been pressed (NO in S711), the main CPU 531 ends the display processing for gambling. On the other hand, when the main CPU 531 determines in S711 that the input button 595 has been pressed (YES in S711), the main CPU 531 performs the process of S712.

  In step S <b> 712, the main CPU 531 generates predetermined display-related command data to be transmitted from the main control circuit 571 to the sub-control circuit 572. When the display related command thus generated is received by the sub control circuit 572, the sub CPU 581 causes the liquid crystal display device 505 to display a display corresponding to the command. In the present embodiment, display according to the command includes display of a hall menu. Note that the display of the hall menu includes a plurality of items that can be selected using the input button 595 in order to view various information related to the pachislot machine 501.

  In S713, when the main CPU 531 determines that the item for displaying the history of the normal winning opening is selected from the plurality of items displayed on the hall menu based on the detection signal output from the input button switch 595S. Is generated and transmitted from the main control circuit 571 to the sub-control circuit 572. When the display-related command thus generated is received by the sub control circuit 572, the sub CPU 581 displays the past (daily total) history related to the small role total (total total) as a display corresponding to the command. 505 is displayed.

  After the process of S704, after the process of S713, if NO is determined in S702, or if NO is determined in S711, the main CPU 531 ends the display process for gambling.

  As described above, in the present embodiment (first embodiment), when the RWM initialization switch 544 is pressed (YES in S702), the currently stored small combination total (total total) is stored. Is displayed on the liquid crystal display device 505, and the currently stored feature ratio (10 sets), continuous feature ratio (10 sets), accessory ratio (total), continuous feature ratio ( Total sum) can be displayed on the main board display portion 634.

  Further, in this embodiment, when the power switch 545 and the input button 595 (effect button) are pressed, the past (daily total) history regarding the small role total (total total) is stored in the liquid crystal display device 505. Can be displayed.

[Display processing for euphoria (second embodiment)]
Next, with reference to FIG. 87, the display process for gambling according to the second embodiment performed in S534 during the interrupt process (see FIG. 80) will be described. FIG. 87 is a flowchart showing the procedure of display processing for gambling in this embodiment (second embodiment).

  In the display process for gambling according to the second embodiment, the difference from the first embodiment is that the main CPU 531 performs the process of S749 after the process of S712. Hereinafter, for the sake of convenience, description of points that are the same as those of the first embodiment will be omitted, and differences from the first embodiment will be described.

  In S749, which is performed after the processing of S712, the main CPU 531 determines the total of the small roles (total total from the power-on) among a plurality of items displayed on the hall menu based on the detection signal output from the input button switch 595S. ) Is selected, a predetermined display-related command is generated and transmitted from the main control circuit 571 to the sub-control circuit 572. Thus, when the generated display-related command is received by the sub control circuit 572, the sub CPU 581 causes the liquid crystal display device 505 to display the small combination total (total total) since power-on as a display corresponding to the command. .

  Next, in S724, the main CPU 531 selects an item for display of an accessory ratio / continuous accessory ratio from a plurality of items displayed on the hall menu based on the detection signal output from the input button switch 595S. If it is determined that the command has been received, a predetermined display-related command is generated and transmitted from the main control circuit 571 to the sub-control circuit 572. When the display-related command thus generated is received by the sub control circuit 572, the sub CPU 581 displays the currently stored combination ratio (10 sets) and continuous combination ratio (10) as the display corresponding to the command. Set), the ratio of the actors (total), and the ratio of the consecutive actors (total) are displayed on the liquid crystal display device 505.

  After the process of S724, the main CPU 531 ends the display process for gambling.

  As described above, in the present embodiment (second embodiment), not only the past (daily total) history related to the small role total (total total), but also the currently memorized proportion (10) Set), continuous feature ratio (10 sets), feature ratio (total), and continuous feature ratio (total) can be displayed on the liquid crystal display device 505.

[Display processing for euphoria (third embodiment)]
Next, with reference to FIG. 88, the display process for gambling according to the third embodiment performed in S534 during the interrupt process (see FIG. 80) will be described. FIG. 88 is a flowchart showing the procedure of display processing for euphoria in the present embodiment (third embodiment).

  In the display processing for gambling according to the third embodiment, the difference from the first embodiment is that the main CPU 531 performs processing such as S735 after the processing of S704 or S713, or the processing of S749 after the processing of S712. It is a point to process. Hereinafter, for the sake of convenience, description of points that are the same as those of the first embodiment will be omitted, and differences from the first embodiment will be described.

  In S749, which is performed after the processing of S712, the main CPU 531 determines the total of the small roles (total total from the power-on) among a plurality of items displayed on the hall menu based on the detection signal output from the input button switch 595S. ) Is selected, a predetermined display-related command is generated and transmitted from the main control circuit 571 to the sub-control circuit 572. Thus, when the generated display-related command is received by the sub control circuit 572, the sub CPU 581 causes the liquid crystal display device 505 to display the small combination total (total total) since power-on as a display corresponding to the command. .

  After the processing of S704 or after the processing of S749, in S735, the main CPU 531 determines whether or not the input button 595 (effect button) has been pressed based on the detection signal output from the input button switch 595S. Determine.

  If the main CPU 531 determines in S735 that the input button 595 has not been pressed (NO in S735), the main CPU 531 ends the display processing for gambling. On the other hand, when the main CPU 531 determines in S735 that the input button 595 has been pressed (YES in S735), the main CPU 531 performs the process of S736.

  In S736, the main CPU 531 ends the display performed in S703 and S704 or the display performed in S749.

  More specifically, in S736 performed after the processing of S704 and S735, the main CPU 531 generates a command for ending the display on the liquid crystal display device 505, and transmits the command from the main control circuit 571 to the sub-control circuit 572. . Thus, when the command is received by the sub control circuit 572, the sub CPU 581 terminates the display of the small combination total (total total) displayed on the liquid crystal display device 505 in accordance with the command.

  Further, the main CPU 531 generates a predetermined output signal for ending the display on the main board display unit 634 and transmits it to the display unit drive circuit 548. Thus, when the display unit driving circuit 548 receives the output signal, the display unit driving circuit 548 controls the operation of the main substrate display unit 634 according to the output signal. In this way, the main board display unit 634 terminates the display of the bonus rate (10 sets), the continuous bonus rate (10 sets), the bonus rate (total cumulative), and the continuous bonus rate (total cumulative).

  In S736 performed after the processing of S749 and S735, the main CPU 531 generates a command for ending the display on the liquid crystal display device 505, and transmits the command from the main control circuit 571 to the sub-control circuit 572. In this way, when the command is received by the sub control circuit 572, the sub CPU 581 terminates the display of the total of small bonuses (total total) from the power-on displayed on the liquid crystal display device 505 in accordance with the command. .

  After the process of S736 or when NO is determined in S735, the main CPU 531 ends the display process for gambling.

  As described above, in this embodiment (third embodiment), when the RWM initialization switch 544 is pressed (YES in S702), the currently stored small combination total (total total) is stored. Is displayed on the liquid crystal display device 505, and when the input button 595 (effect button) is pressed (YES in S735), the display of the total of the small roles (total) can be terminated. (S736).

[Display processing for euphoria (fourth embodiment)]
Next, with reference to FIG. 89, the display processing for gambling according to the fourth embodiment performed in S534 during the interrupt processing (see FIG. 80) will be described. FIG. 89 is a flowchart showing the procedure of display processing for euphoria in the present embodiment (fourth embodiment).

  Note that in the display processing for joyfulness according to the fourth embodiment, the points different from the first embodiment are that the processing of S744 and the like is performed after the processing of S703, the processing of S749 is performed after the processing of S712, and the predetermined processing. In this case, the first display area 634a and the second display area 634b of the main board display unit 634 are used in different display modes. Hereinafter, for the sake of convenience, description of points that are the same as those of the first embodiment will be omitted, and differences from the first embodiment will be described.

  After the processing of S712, in S749, the main CPU 531 calculates the cumulative total of small roles (total total) from power-on among a plurality of items displayed on the hall menu based on the detection signal output from the input button switch 595S. When it is determined that the item is selected, a predetermined display related command is generated and transmitted from the main control circuit 571 to the sub control circuit 572. Thus, when the generated display-related command is received by the sub control circuit 572, the sub CPU 581 causes the liquid crystal display device 505 to display the small combination total (total total) since power-on as a display corresponding to the command. .

  Note that in S749, the cumulative total of small roles (total total) from power-on displayed on the liquid crystal display device 505 includes the total for each type of gaming state.

  Also, after the processing of S703, the main CPU 531 generates a predetermined output signal and transmits it to the main board display unit 634 in S744. Thus, when the display unit driving circuit 548 receives the output signal, the display unit driving circuit 548 controls the operation of the main substrate display unit 634 according to the output signal. Accordingly, the main board display unit 634 performs display according to the received output signal. In the present embodiment, as the display corresponding to the output signal, the currently stored character ratio (15 sets), continuous character ratio (15 sets), character ratio (total), continuous character ratio ( Total) is displayed.

  In S744, the mode (display mode) displayed in the first display area 634a and the second display area 634b of the main board display unit 634 is a third mode described later.

  After the process of S744, the main CPU 531 determines whether or not the total number of games to be stored satisfies a reference number of rotations (6000 in this embodiment) (S745).

  In S745, when the main CPU 531 determines that the total number of games to be stored satisfies the reference number of rotations (in the case of YES determination in S745), the main CPU 531 performs the process of S747 described later. On the other hand, when the main CPU 531 determines that the total number of games stored does not satisfy the reference number of rotations (NO determination in S745), the main CPU 531 performs the process of S746.

  In S746, the main CPU 531 changes the mode (display mode) displayed in the first display area 634a and the second display area 634b of the main board display unit 634 to the first mode described later, which is different from the third mode. change.

  In step S747, the main CPU 531 determines whether or not the information such as the percentage of items (total total) displayed on the main board display unit 634 exceeds a reference ratio. In the present embodiment, it is determined that the reference ratio has been exceeded when the consecutive feature ratio (total cumulative) exceeds 60% and the bonus ratio (total cumulative) exceeds 70%.

  In S747, when the main CPU 531 determines that the above reference ratio has been exceeded (YES in S747), the main CPU 531 performs the process of S748.

  In S748, the main CPU 531 changes the mode (display mode) displayed in the first display area 634a and the second display area 634b of the main board display unit 634, which will be described later, different from the third mode and the first mode. Change to the second mode.

  After the process of S748, after the process of S749, in the case of NO determination in S702, or in the case of NO determination in S711, the main CPU 531 ends the display process for joyfulness.

  Thus, in the present embodiment (fourth embodiment), the total for each type of gaming state can be included in the small role total (total total) from power-on displayed on the liquid crystal display device 505. (S749). In this embodiment, the mode (display mode) displayed in the first display area 634a and the second display area 634b of the main board display unit 634 can be set to a different display mode according to a predetermined condition. (S744 to S748).

[Display contents of main board display section of pachislot machine]
Next, the display content of the main board display unit 634 will be described with reference to FIG.

  As shown in FIG. 77 (b), the main board display unit 634 displays an identification symbol for indicating the classification and display contents (type) in the second display area 634b among the four independent display areas. . In addition, the main substrate display unit 634 displays an identification symbol for indicating a reference ratio (%) in the first display area 634a among the four independent display areas.

  Specifically, “Ur.” Is displayed in the second display area 634b in order to indicate the cumulative and advantageous section ratio as the classification and display contents. Further, “y6.” Is displayed in the second display area 634b in order to indicate 6000 games (number of rotations) and combination as the classification and display contents. Further, “y7.” Is displayed in the second display area 634b in order to indicate the 6000 games (number of rotations) and the role ratio as classification and display contents. Further, “A6.” Is displayed in the second display area 634b in order to indicate the cumulative total and the combination as the classification and display content. Further, “A7.” Is displayed in the second display area 634b in order to indicate the cumulative total and the role ratio as the classification and display content.

  In addition, “70” is displayed in the first display area 634a in order to indicate a ratio (%) that is a reference of the advantageous section ratio. In addition, “60” is displayed in the first display area 634a in order to indicate the 6000 game (number of rotations) and the ratio (%) serving as the reference for the combination. In addition, “70” is displayed in the first display area 634a in order to indicate the 6000 game (number of rotations) and the ratio (%) that is the basis of the winning ratio. In addition, “60” is displayed in the first display area 634a in order to indicate the ratio (%) that is the reference for the total and combination. In addition, “70” is displayed in the first display area 634a in order to indicate a ratio (%) that serves as a reference for the cumulative total and the winning ratio.

  In such a configuration, the identification symbol displayed in the second display area 634b and the identification symbol displayed in the first display area 634a are blinked as necessary. Thus, the aspect in which the identification symbol displayed in the second display area 634b is lit up corresponds to the first aspect. In addition, a mode in which the identification symbol displayed in the first display area 634a is lit and displayed corresponds to the second mode. Further, a mode in which neither the identification symbol displayed in the second display area 634b nor the identification symbol displayed in the first display area 634a is blinking corresponds to the third aspect.

<Description of operation of sub-control circuit>
Next, the operation of the sub-control circuit of the gaming machine (pachinko gaming machine 1 and pachislot gaming machine 501) will be described. The operations of the sub-control circuits of the pachinko gaming machine 1 and the pachislot machine 501 are substantially the same. Therefore, in the following description, the operation of the sub-control circuit 200 of the pachinko gaming machine 1 will be described, and the sub-control of the pachislot machine 501 will be described. The operation of the circuit 572 is omitted unless there is a particular difference.

  Below, the content of the various processes performed by the various control circuits in the sub board | substrate 202 of the sub control circuit 200 is demonstrated. The sub control circuit 200 receives various commands transmitted from the main control circuit 70 and performs various processes based on the various commands.

[Sub control main process]
First, with reference to FIG. 90, the sub control main process executed by the host control circuit 210 will be described. FIG. 90 is a flowchart showing the procedure of the sub control main process in the present embodiment. The sub-control main process is a process started when the power is turned on.

  First, the host control circuit 210 performs initialization processing (S1201). In this process, the host control circuit 210 performs various initial setting processes such as hardware initialization, device initialization, application (various processing) initialization, backup data restoration initialization, and the like.

  Next, the host control circuit 210 clears the counter of the watchdog timer (S1202). At the time of activation, a reset time (for example, 200 msec) of the watchdog timer is set. After that, when the service pulse is not written (timeout), the power interruption process is started. In addition, the timing for clearing the watchdog timer counter is the start of the main loop process (the process of S1202 to S1210) in the sub control main process, the start of the device initialization process, the start of the application initialization process, and the power interruption At the start of processing.

  Next, the host control circuit 210 performs operation means input processing (S1203). In this process, the host control circuit 210 performs a process for determining whether or not an operation has been performed on an operation means such as a button or a jog dial by the player, and an operation content information acquisition process.

  Next, the host control circuit 210 performs main / sub command control processing (S1204). In this processing, the host control circuit 210 performs command data reading processing (command reception processing) when command data is received from the main CPU 71 and command data storage processing (reception data storage processing) in the sub work RAM 210a. Details of the main / sub command control process will be described later with reference to FIGS. 94 and 95 described later.

  Next, the host control circuit 210 performs command analysis processing (S1205). In this process, the host control circuit 210 analyzes the contents of the command stored in the sub work RAM 210a and acquires various types of information included in the command. Details of the command analysis process will be described later.

  Next, the host control circuit 210 performs an effect mode determination process (animation request construction process) (S1206). In this process, the host control circuit 210 generates an animation request required when performing the presentation control using the display device 13, and responds to the animation request based on the animation request (corresponding to the animation request. Various requests (sound request, lamp request, and accessory) for operating various rendering devices (which can be expressed as, for example, corresponding to rendering control (display) in the display device 13 executed based on the animation request) Request).

  In the present embodiment, as described above, the number of command packets (number of bytes) differs depending on the type of command. When the host control circuit 210 receives a plurality of command data and the total number of packets of all the command data is less than or equal to the predetermined maximum number of packets, the command analysis process (S1205) and effects described above are performed. The mode determination process (S1206) is performed on the received plurality of command data in the same frame. However, when the total number of packets of a plurality of received command data exceeds a predetermined maximum number of packets, command data corresponding to the predetermined maximum number of packets among the received plurality of command data is commanded in the same frame. An analysis process (S1205) and an effect mode determination process (S1206) are performed, and a command analysis process (S1205) and an effect mode determination process (animation request construction process) (S1206) for command data for the remaining number of packets are performed in the next frame. Is done.

  Next, the host control circuit 210 performs a drawing control process (S1207). In this process, the host control circuit 210 generates a moving image command and a drawing request based on the animation request, and transmits the generated moving image command and the drawing request generated in the previous frame to the display control circuit 230. At this time, the display control circuit 230 performs various processes for displaying (drawing) the effect image on the display device 13 based on the received moving image command and the drawing request.

  Next, the host control circuit 210 performs voice control processing (S1208). In this processing, the host control circuit 210 transmits a sound request (command) to the voice / LED control circuit 220. At this time, the sound / LED control circuit 220 performs sound reproduction control processing by the speaker 11 based on the received sound request. Details of the audio reproduction processing will be described later with reference to FIG. 97 described later.

  Next, the host control circuit 210 performs lamp control processing (S1209). In this process, the host control circuit 210 transmits a lamp request (command) to the sound / LED control circuit 220. At this time, the sound / LED control circuit 220 performs light emission control of the lamp group 18 based on the received lamp request. The details of the lamp control process will be described later with reference to FIG.

  Next, the host control circuit 210 performs an accessory control process (S1210). In this process, the host control circuit 210 transmits excitation data for driving the accessory 20 to the motor controller 270 (motor driver 271) via the I2C controller 261 based on the generated accessory request. Further, the motor driver 271 outputs the received excitation data to the corresponding motor 272 to drive the accessory 20.

  When the host control circuit 210 performs the accessory control process in S1210, the host control circuit 210 returns the process to S1202, and repeats the processes after S1202.

[Operating means input processing]
Next, with reference to FIGS. 91 to 93, the operation means input process performed in S1203 in the sub control main process (see FIG. 90) will be described. FIG. 91 is a diagram showing an outline of the operation of the operation means input process in the present embodiment. FIG. 92 is a flowchart showing the procedure of the operation input timer interrupt process performed in the operation means input process of the present embodiment, and FIG. 93 shows the operation input information acquisition process performed in the operation means input process. It is a flowchart which shows a procedure.

  In the operation means input process of the present embodiment, when a player performs a predetermined operation related to the effect on various operation means such as the effect button 23 provided in the pachinko gaming machine 1, as shown in FIG. A signal corresponding to the predetermined operation (input signal in FIG. 91) is output from the driver of the operation means to the host control circuit 210. Then, the host control circuit 210 acquires information on an input state by a predetermined operation of the player based on the input signal.

  In the operation means input process, an operation input timer interrupt process performed as a timer interrupt process (measurement timer update process) with a period of 1 msec and a preset FPS period (for example, 16.7 msec or 33.3 msec) Operation input information acquisition processing to be performed is performed. Hereinafter, specific procedures of the operation input timer interrupt process and the operation input information acquisition process will be described with reference to the flowcharts of FIGS. 92 and 93, respectively.

(1) Operation Input Timer Interrupt Process In the operation input timer interrupt process, first, as shown in FIG. 92, the host control circuit 210 determines whether or not there is an operation input signal input from the driver of the operation means. (S1231).

  If the host control circuit 210 determines in S1231 that there is no operation input signal input (NO in S1231), the host control circuit 210 ends the operation input timer interrupt process.

  On the other hand, when the host control circuit 210 determines in S1231 that the operation input signal is input (YES in S1231), the host control circuit 210 determines the operation input state based on the operation input signal. Then, the operation input state information is stored in the sub work RAM 210a (S1232). Then, after the processing of S1232, the host control circuit 210 ends the operation input timer interrupt processing.

(2) Operation Input Information Acquisition Processing In the operation input information acquisition processing, the host control circuit 210 refers to the sub work RAM 210a as shown in FIG. 93, and if the operation input status information is stored in the sub work RAM 210a. Then, information on the operation input state is acquired (S1241). Then, after the processing of S1241, the host control circuit 210 ends the operation input information acquisition processing.

  In the processing of S1241, for example, when the operation input is an operation input for a button, information such as the type of the operated button and the number of times of pressing is acquired as the operation input state information. For example, when the operation input is an operation input to the jog dial, information such as the rotation direction, rotation angle, and rotation speed of the jog dial is acquired as operation input state information. The information on the operation input state acquired in S1241 is used when determining (setting) the contents of the effect (such as effect of the effect) to be executed based on the player's operation input to the operation means.

[Main / sub command control processing]
Next, with reference to FIGS. 94 and 95, the main / sub-command control process performed in S1204 in the sub-control main process (see FIG. 90) will be described. FIG. 94 is a flowchart showing a procedure of command reception processing performed in the main / sub-command control processing of the present embodiment, and FIG. 95 shows received data storage performed in the main / sub-command control processing. It is a flowchart which shows the procedure of a process.

  In this embodiment, when a command is transmitted from the main control circuit 70 (main CPU 71) to the sub control circuit 200 (host control circuit 210) and the host control circuit 210 receives the command, the host control circuit 210 Inter-command control processing is performed as interrupt processing. In the main / sub-command control process, a command reception process performed as an interrupt process at the time of command reception and a received data storage process executed after the command reception process are performed. Hereinafter, specific procedures of the command receiving process and the received data storing process will be described with reference to the flowcharts of FIGS. 94 and 95, respectively. In the pachinko gaming machine 1 as in the present embodiment, the command received by the sub control circuit 200 (host control circuit 210) is a command transmitted from the main control circuit 70 (main CPU 71). On the other hand, in the pachislot machine 501, the command received by the sub control circuit 572 is a command transmitted from the main control circuit 571 (main CPU 531).

(1) Command reception processing (reception interrupt processing)
In the command reception process, first, when receiving the command transmitted from the main control circuit 70, the host control circuit 210 determines whether or not a command reception error has occurred as shown in FIG. 94 (S1251).

  In S1251, when the host control circuit 210 determines that no command reception error has occurred (when S1251 is NO), the host control circuit 210 performs the process of S1253 described later. On the other hand, if the host control circuit 210 determines in S1251 that a command reception error has occurred (S1251 is YES), the host control circuit 210 performs error information setting processing (S1252).

  After the processing of S1252 or when S1251 is NO, the host control circuit 210 performs command data reception processing (S1253). In this processing, the host control circuit 210 writes the received command to the ring buffer in the host control circuit 210. If a command reception error occurs and error information is set in S1252, the set information of the received command and error information is written to the ring buffer. Then, after the processing of S1253, the host control circuit 210 ends the command reception processing.

(2) Received Data Storage Process In the received data storage process, as shown in FIG. 95, the host control circuit 210 stores the received command data written in the ring buffer by the above-described command receiving process in the sub work RAM 210a (S1261). ). With this processing, the received command is stored in the sub work RAM 210a. In this process, the received command data is transferred byte by byte from the ring buffer to the sub work RAM 210a.

  Then, after the processing of S1261, the host control circuit 210 ends the received data storage processing.

[Command analysis processing]
Next, with reference to FIG. 96, the command analysis process performed in S1205 in the sub control main process (see FIG. 90) will be described. FIG. 96 is a flowchart showing the procedure of command analysis processing in this embodiment. Note that the command analysis processing described below is controlled by the host control circuit 210 (sub-control circuit 200).

  First, the host control circuit 210 acquires a received command stored in the sub work RAM 210a and performs a process of analyzing the acquired received command (S1271). At this time, if there is error information associated with the received command, the host control circuit 210 discards the received command.

  In addition, the host control circuit 210 identifies the type of the command in the analysis of the received command. In this process, the host control circuit 210 stores information on the specified command type in the sub work RAM 210a. Note that, as described above, the command type is specified based on the information (preset value) stored in the command type portion (first byte area) of each command. For example, when the received command is a demonstration display command, the command type “80H” is stored in the sub work RAM 210a.

  If the host control circuit 210 determines that there is no command type corresponding to the command received in the command type specifying process, the host control circuit 210 discards the received command. The host control circuit 210 confirms the number of parameters included in the received command, and discards the received command if the number of parameters is different from the number of parameters corresponding to the specified command type.

  Next, the host control circuit 210 performs processing (command parameter check processing) for checking the consistency of the received command (S1272). In this processing, the host control circuit 210 checks the contents of information (hereinafter referred to as command parameters) in various parameters set for each command. Specifically, the host control circuit 210, for example, always checks the zero area provided in a predetermined bit area in the parameter, checks the valid range of each data stored in the parameter, and stores the stored data Check the combination.

  Further, the host control circuit 210 checks whether or not the command parameter included in the received command is normal in checking the consistency of the received command. Specifically, the host control circuit 210 determines whether or not the command parameter is normal (whether or not the command is valid). If the host control circuit 210 determines that the command parameter included in the received command is not normal, the host control circuit 210 discards the data of the received command.

  On the other hand, when the host control circuit 210 determines that the command parameter included in the received command is normal, the host control circuit 210 reflects (registers) the command parameter (information such as game status) in the game data. In addition, the host control circuit 210 stores the game data reflecting the command parameters in a predetermined area in the sub work RAM 210a. The “game data” includes parameter information in the command and the like, and is a data structure (a storage area or a variable) referred to in various lottery processes and animation request construction processes performed by the host control circuit 210. (Aggregate). In the “game data”, as will be described later, information on lottery results of various lottery processes (eg, production patterns) is also registered.

  Next, the host control circuit 210 performs a sub lottery process (S1273). In this process, the host control circuit 210 obtains various random numbers for effects, and performs a lottery process related to the determination of effect contents corresponding to the command type of the received command.

  For example, when the received command is a special symbol effect start command, the host control circuit 210 determines a change effect pattern (“EN00” to “EN44”) by a lottery process using the change effect table. Further, for example, when the received command is a hold addition command, the host control circuit 210 performs an effect pattern (“HE00” to “HE”) related to the color change effect of the symbols for hold by a lottery process using the hold effect table. HE19 ") is determined, and effect patterns (" SE00 "to" SE19 ") related to the prefetch effect are determined by a lottery process using the prefetch effect table.

  In the process of S1273, the host control circuit 210 stores the lottery result of the sub lottery process (for example, information on the various effect patterns described above) in a predetermined area in the subwork RAM 210a.

  Next, the host control circuit 210 performs an effect pattern selection process (S1274). In this process, the host control circuit 210 selects a lottery result (effect pattern) obtained by the sub lottery process of S1273. Specifically, the host control circuit 210 stores the effect pattern obtained by the sub lottery process of S1273 (for example, the effect pattern related to the color change effect of the holding symbol and the effect pattern related to the pre-read effect) in the sub work RAM 210a. It is reflected (registered) in the game data. After the process of S1274, the host control circuit 210 ends the command analysis process, and moves the process to S1206 of the sub control main process (see FIG. 90).

  In the present embodiment, as described above, in the command analysis process, the received command may be discarded. However, the command is completely transmitted from the main CPU 71 to the host control circuit 210 before the discarded received command. If not, no animation request is generated, and a black image is displayed on the display screen of the display device 13. On the other hand, if a command is transmitted from the main CPU 71 to the host control circuit 210 before the discarded received command, an animation request based on the discarded received command is not generated, and the display screen of the display device 13 displays the discarded request. The image generated by the animation request based on the command before the received command is maintained and displayed.

[Voice control processing]
Next, with reference to FIG. 97A and FIG. 97B, the voice control process performed in S1208 in the sub control main process (see FIG. 90) will be described. FIG. 97A is a flowchart showing the procedure of the voice control process executed by the host control circuit 210. FIG. 97B is a flowchart showing a procedure of processing executed by the voice / LED control circuit 220 when a sound request is output from the host control circuit 210 to the voice / LED control circuit 220 in the voice control processing.

(1) Audio control processing executed by the host control circuit The host control circuit 210 outputs the sound request stored in the request buffer in the sound pattern selection processing to the audio / LED control circuit 220 (S1301).

  After the process of S1301, the host control circuit 210 ends the voice control process, and moves the process to S1209 of the sub control main process (see FIG. 90).

(2) Processing of voice / LED control circuit executed during voice control processing First, the sound request output from the host control circuit 210 is input to the voice / LED control circuit 220 (S1302). Next, the voice / LED control circuit 220 determines whether or not there is a free execution system capable of executing the process (code) among the four execution systems for voice reproduction (S1303).

  In S1303, when the voice / LED control circuit 220 determines that there is no vacant execution system among the four execution systems for voice reproduction (when S1303 is NO), the voice / LED control circuit 220 is vacant. The system waits until an execution system is generated (S1304).

  After the processing of S1304, or in S1303, when the voice / LED control circuit 220 determines that there are vacant execution systems among the four execution systems for voice reproduction (when S1303 is YES), the voice / LED The control circuit 220 sets an access number in a predetermined execution system that is free (S1305).

  Next, the voice / LED control circuit 220 reads the access data associated with the access number from the CGROM board 204 based on the access number in the execution system in which the access number is set (S1306).

  Next, the voice / LED control circuit 220 sequentially sets each of a plurality of setting data defined in the access data to a corresponding address based on the access data, and starts a code (processing) execution process. (S1307). With this process, the sound reproduction effect by the speaker 11 is started. In the present embodiment, the audio reproduction control is executed by simple access control.

  Next, the voice / LED control circuit 220 determines whether or not there is a plurality of accesses to the code being referred to (S1308). Specifically, the voice / LED control circuit 220 determines whether or not there is an access from another execution system with respect to a code (setting data) being referred to that is executed in the execution system in which the access number is set. To do. In S1308, when the voice / LED control circuit 220 determines that there is no plurality of accesses to the code being referred to (when S1308 is NO), the voice / LED control circuit 220 performs the process of S1310 described later. Do.

  On the other hand, when the voice / LED control circuit 220 determines in S1308 that there are multiple accesses to the code being referred to (when S1308 is YES), the voice / LED control circuit 220 executes the code. Is executed based on the latest sound request (S1309). Specifically, for example, code 1, code 2 and code 3 are executed in a predetermined execution system based on a predetermined sound request, and code 3 is executed in another execution system based on the next sound request. When executing the code 4 and the code 5, the sound reproduction of the code 3 having a plurality of accesses is executed based on the next sound request.

  After the processing of S1309 or when S1308 is NO, the voice / LED control circuit 220 sets a simple access end code (S1310). Then, after the processing of S1310, the voice / LED control circuit 220 ends the above-described series of processing at the time of the voice control processing, and the processing is performed in a predetermined control state (for example, standby state, voice control) of the voice / LED control circuit 220. Control state before processing, control state of processing executed after voice control processing, etc.).

[Lamp control processing]
Next, with reference to FIGS. 98A and 98B, the lamp control process performed in S1209 in the sub-control main process (see FIG. 90) will be described. FIG. 98A is a flowchart showing a procedure of lamp control processing executed by the host control circuit 210. FIG. 98B is a flowchart showing a procedure of processes executed by the sound / LED control circuit 220 in the lamp control process.

(1) Lamp Control Process Performed by Host Control Circuit The host control circuit 210 outputs the lamp request stored in the request buffer in the sound pattern selection process to the sound / LED control circuit 220 (S1321).

  Then, after the processing of S1321, the host control circuit 210 ends the lamp control processing and shifts the processing to S1210 of the sub-control main processing (see FIG. 90).

(2) Processing of voice / LED control circuit executed during lamp control processing First, the lamp request output from the host control circuit 210 is input to the voice / LED control circuit 220 (S1322).

  Next, the voice / LED control circuit 220 designates the LED animation and data table information to be read from the CGROM 206 based on the lamp request (including the LED animation ID) (S1323). If LED animation is designated by this processing, LED data to be output to each LED 281 can be designated. If data table information is specified by this process, it is possible to specify data of a reproduction method, a channel, an extinction data identification, a control part, and an LED data name (for debugging).

  Next, the audio / LED control circuit 220 refers to the designated data table information and acquires data such as a channel (sequencer, layer) for executing the LED animation (S1324). Next, the sound / LED control circuit 220 determines whether or not there are a plurality of lamp requests in the same channel (S1325).

  In S1325, when the voice / LED control circuit 220 determines that there are a plurality of lamp requests in the same channel (when S1325 is YES), the voice / LED control circuit 220 is based on the last received lamp request. The LED animation is set to the channel (S1326). By this process, the data table information currently registered in the channel registration buffer is overwritten by the data table information acquired based on the last received lamp request.

  On the other hand, if the sound / LED control circuit 220 determines that there are not a plurality of lamp requests in the same channel in S1325 (if S1325 is NO), the sound / LED control circuit 220 sets the LED animation for the channel. (S1327). With this process, the data table information acquired based on the lamp request received this time is registered in the channel registration buffer.

  After the processing of S1326 or S1327, the audio / LED control circuit 220 sets LED data (output data) to be set to a predetermined port of a control target (in the control part) in a predetermined channel based on the set LED animation. (S1328). The processing after S1328 is executed for each port.

  Next, the audio / LED control circuit 220 determines whether there is an overlap of LED data (output data) between channels at a predetermined port, that is, whether it is necessary to synthesize LED data among a plurality of channels. Is discriminated (S1329).

  In S1329, when the voice / LED control circuit 220 determines that there is no duplication of LED data between channels at a predetermined port (when S1329 is NO), the voice / LED control circuit 220 performs S1331 described later. Process. On the other hand, if the voice / LED control circuit 220 determines in S1329 that there is duplication of LED data between channels at a predetermined port (when S1329 is YES), the voice / LED control circuit 220 pre- LED data in a predetermined port is determined based on the execution priority order of the LED data set in (S1330).

  In the process of S1330, for example, if the LED data is not set in the predetermined port to be processed before this process, the LED data acquired this time is set in the predetermined port. Further, for example, when the LED data of a predetermined port set before this processing is LED data of a channel whose execution priority is lower than that of the currently processed channel, the LED data acquired this time To overwrite the LED data of a predetermined port. Further, for example, when the LED data of a predetermined port set before this processing is LED data of a channel whose execution priority is higher than that of the channel to be processed this time, the LED data acquired this time And the LED data of a predetermined port is not overwritten (maintained). By repeating such processing for each channel, the LED data of a plurality of channels is synthesized at a predetermined port to be processed (the LED data of the channel having the highest execution priority among the plurality of channels is set). )

  After the process of S1330 or when S1329 is NO, the voice / LED control circuit 220 has executed the processes of S1328 to S1330 for the predetermined port for all channels (eight channels in this embodiment). It is determined whether or not (S1331).

  If the voice / LED control circuit 220 determines in S1331 that the processing of S1328 to S1330 for the predetermined port has not been executed for all channels (if S1331 is NO), the voice / LED control circuit 220 220 returns the process to S1328, changes the channel to be processed, and repeats the processes after S1328. On the other hand, when the voice / LED control circuit 220 determines in S1331 that the processing of S1328 to S1330 for the predetermined port has been executed for all channels (when S1331 is YES), the voice / LED control circuit 220 determines whether or not port direct designation data for a predetermined port is included in the lamp request. If the port direct designation data is included in the lamp request, the voice / LED control circuit 220 The LED data of the port is overwritten with the port direct designation data (S1332).

  Next, the sound / LED control circuit 220 determines whether or not the processing of S1328 to S1332 described above has been executed for all ports (S1333). Here, “all ports” means all ports set in the LED registration process, but the present invention is not limited to this. The “all ports” may be any port that can be physically set regardless of the ports set in the LED registration process, or selected from the ports set in the LED registration process. Some ports may be used.

  In S1333, when the voice / LED control circuit 220 determines that the processing of S1328 to S1332 is not executed for all ports (when S1333 is NO), the voice / LED control circuit 220 performs processing. Returning to S1328, the processing target port is changed, and the processing after S1328 is repeated. On the other hand, when the voice / LED control circuit 220 determines in S1333 that the processing of S1328 to S1332 has been executed for all ports (when S1333 is YES), the voice / LED control circuit 220 performs lamp control. The above-described series of processing at the time of processing is ended, and processing is performed in a predetermined control state of the voice / LED control circuit 220 (for example, standby state, control state before lamp control processing, control state of processing executed after lamp control processing, etc. ) Return to time processing.

[Data communication processing between voice / LED control circuit and LED driver]
Next, communication processing performed between the audio / LED control circuit 220 and the LED driver 280 will be described with reference to FIGS. 99A and 99B. FIG. 99A is a flowchart illustrating a procedure of signal and data transmission processing executed by the voice / LED control circuit 220 in the communication processing between the voice / LED control circuit 220 and the LED driver 280. FIG. 99B is a flowchart illustrating a procedure of signal and data reception processing executed by the LED driver 280 in the communication processing between the sound / LED control circuit 220 and the LED driver 280.

  In this embodiment, when a lamp request is input from the host control circuit 210 to the sound / LED control circuit 220, the sound / LED control circuit 220 converts the lamp output data (LED data) into a lamp group based on the lamp request. 18 to each LED driver 280 included in 18. At this time, since the audio / LED control circuit 220 and the LED driver 280 are connected by the SPI bus as described above, signals and serial data are communicated between them by the SPI method. In this embodiment, the communication form between the sound / LED control circuit 220 and the LED driver 280 is a form in which signals and serial data are unilaterally transmitted from the sound / LED control circuit 220 to the LED driver 280.

  The specific procedures of the signal and serial data transmission processing executed by the voice / LED control circuit 220 and the data reception processing executed by the LED driver 280 based on the lamp request are shown in FIG. 99A. This will be described with reference to the flowchart of FIG. 99B.

(1) Audio / LED Control Circuit Serial / Data Transmission Processing First, as shown in FIG. 99A, the audio / LED control circuit 220 transmits data “1” continuously to the LED driver 280 16 times or more ( S1351). That is, the audio / LED control circuit 220 transmits data in an area in which data “1”, which is arranged at the head of serial data, is continuously stored for 16 bits or more, to the LED driver 280.

  Next, the voice / LED control circuit 220 transmits the device address to the LED driver 280 (S1352). Next, the voice / LED control circuit 220 transmits the register address to the LED driver 280 (S1353).

  Next, the sound / LED control circuit 220 performs LED data output processing for transmitting lamp output data (LED data) to the LED driver 280 (S1354). After the process of S1354, the voice / LED control circuit 220 ends the serial data transmission process.

(2) LED driver reception processing (state transition processing based on received data)
First, the LED driver 280 sets a sleep state as shown in FIG. 99B (S1361). “To enter the sleep state” means to set the operation state of the LED driver 280 to a sleep (pause) state and to a standby state. The set sleep state is canceled when the LED driver 280 receives (detects) the first data “1” from the sound / LED control circuit 220.

  Next, the LED driver 280 determines whether or not the data “1” has been received (detected) 16 times continuously from the voice / LED control circuit 220 (S 1362).

  If it is determined in S1362 that the LED driver 280 has not received (detected) the data “1” from the voice / LED control circuit 220 continuously 16 times (when S1362 is NO), the LED driver 280 Is returned to S1361, and the processing after S1361 is repeated. On the other hand, when it is determined in S1362 that the LED driver 280 has received (detected) data “1” 16 times continuously from the voice / LED control circuit 220 (when S1362 is YES), the LED driver 280 starts. The standby state is set (S1363).

  Next, the LED driver 280 determines whether or not data “0” has been received (S1364). In this process, the LED driver 280 determines whether or not data “0” (see FIG. 43) stored in the first bit of the device address has been received.

  In S1364, when the LED driver 280 determines that the data “0” has not been received (S1364 is NO), the LED driver 280 returns the process to S1363 and repeats the processes after S1363. If the LED driver 280 has not received data “0” for a predetermined time and the start standby state continues, the LED driver 280 may perform a process of returning the operation state to the sleep state as a timeout process. .

  On the other hand, when the LED driver 280 determines in S1364 that the data “0” has been received (S1364 is YES), the LED driver 280 sets a device address standby state (S1365).

  Next, the LED driver 280 receives the device address transmitted from the voice / LED control circuit 220, and determines whether or not the device address matches that set in the LED driver 280 (S1366). In S1366, when the LED driver 280 determines that the received device address does not match that set in the LED driver 280 (when S1366 is NO), the LED driver 280 returns the process to S1361, and after S1361 Repeat the process. On the other hand, when the LED driver 280 determines in S1366 that the received device address matches that set in the LED driver 280 (when S1366 is YES), the LED driver 280 sets a register address standby state. (S1367).

  Next, the LED driver 280 receives the register address transmitted from the voice / LED control circuit 220, and determines whether or not the register address is a register address (S1368). In S1368, when the LED driver 280 determines that the received register address is not a register address that exists (when S1368 is NO), the LED driver 280 returns the process to S1361, and repeats the processes after S1361.

  On the other hand, when the LED driver 280 determines in S1368 that the received register address is a register address that exists (when S1368 is YES), the LED driver 280 sets the data reception state (S1369). Thereby, the reception process of the lamp output data (LED data) transmitted from the sound / LED control circuit 220 is started. Next, the LED driver 280 determines whether or not data “0FFH (1111111B)” indicating the final data of the lamp output data (LED data) has been received (S1370).

  In S1370, when the LED driver 280 determines that the data “0FFH” has not been received (S1370 is NO), the LED driver 280 returns the process to S1369 and repeats the processes after S1369. On the other hand, if it is determined in S1370 that the LED driver 280 has received the data “0FFH” (S1370 is YES), the LED driver 280 returns the process to S1361, and repeats the processes after S1361.

  Here, as described in, for example, Japanese Patent Application Laid-Open No. 2015-142840, a gaming machine such as a pachinko gaming machine or a pachislot gaming machine is conventionally known. In such a gaming machine, when a predetermined start condition is established and a prize is won, a value medium such as a game ball is paid out based on preset payout information.

  However, for example, when playing a game machine installed in a game hall, it is difficult to grasp whether the value medium actually paid out is based on preset payout information. There was a problem that could not be done.

  The present invention has been made in view of the above-described problems, and an object thereof is to provide a gaming machine that allows a player to play a game with peace of mind.

Specifically, in the pachinko gaming machine 1 according to one embodiment of the present invention,
An operation of the power switch 38 and the effect button 23 (first operation) for displaying a hall menu that the player cannot operate, and
An operation (second operation) of the RWM initialization switch 39 that is different from the first operation and cannot be operated by the player,
When the second operation is performed, the cumulative number of payouts of the normal winning opening since power-on is displayed (S304),
When the first operation is performed, it is possible to display the cumulative number of payouts of the normal winning opening counted before the power is turned on (S313).

In the pachislot machine 501 according to the embodiment of the present invention,
An operation (first operation) of the power switch 545 and the input button 595 for displaying a hall menu that the player cannot operate;
An operation (second operation) of the RWM initialization switch 544 that is different from the first operation and cannot be operated by the player,
When the second operation is performed, the cumulative payout number of the small role since power-on is displayed (S704),
When the first operation is performed, it is possible to display the cumulative payout number of small roles counted before the power is turned on (S713).

  With such a configuration, the administrator can easily check whether the value medium actually paid out is based on preset payout information. That is, since it is assumed that the gaming machines (pachinko gaming machine 1 and pachislot gaming machine 501) that perform the game do not have any trouble with respect to payout, the player can play the game with peace of mind.

In the pachinko gaming machine 1 according to one embodiment of the present invention,
A main board display unit 34 (first display means) that is provided at a position where the player cannot visually recognize, and displays first information that is information on the ratio of the bonuses and the consecutive bonuses;
A display device 13 (second display means) for displaying second information, which is the cumulative number of payouts of a normal winning opening since power-on,
A main control circuit 70 (first control means) for controlling the game progress of the gaming machine;
A sub-control circuit 200 (second control means) for receiving a command from the first control means and controlling the display content on the second display means,
The main control circuit 70 (first control means) displays the information on the accessory ratio and continuous accessory ratio (first information) on the main board display unit 34 (first display means), and the sub-control. A command related to the information on the accessory ratio and the continuous accessory ratio (first information) is sent to the circuit 200 (second control means);
When the sub-control circuit 200 (second control means) receives the command from the main control circuit 70 (first control means), the display device 13 (second display means) receives a normal winning opening from the power-on. Together with the cumulative payout number (second information), information on the above-mentioned accessory ratio and continuous accessory ratio (first information) is displayed (S313, S324).

In the pachislot machine 501 according to the embodiment of the present invention,
A main board display unit 634 (first display means) that is provided at a position where the player cannot visually recognize, and displays first information that is information on the ratio of the bonuses and the consecutive bonuses;
A liquid crystal display device 505 (second display means) for displaying second information that is the cumulative number of small payouts since power-on;
A main control circuit 571 (first control means) for controlling the game progress of the gaming machine;
A sub-control circuit 572 (second control means) for receiving a command from the first control means and controlling display contents on the second display means,
The main control circuit 571 (first control means) displays the information on the accessory ratio and the continuous accessory ratio (first information) on the main board display unit 634 (first display means), and also performs the sub-control. A command related to the first information is transmitted to the circuit 572 (second control means);
When the sub control circuit 572 (second control means) receives the command from the main control circuit 571 (first control means), the liquid crystal display device 505 (second display means) plays a small role after the power is turned on. Are displayed together with the cumulative payout number (second information) and the information on the above-mentioned accessory ratio and continuous accessory ratio (first information) (S713, S724).

  With such a configuration, the administrator can easily check whether the value medium actually paid out is based on preset payout information. That is, since it is assumed that the gaming machines (pachinko gaming machine 1 and pachislot gaming machine 501) that perform the game do not have any trouble with respect to payout, the player can play the game with peace of mind.

In the pachinko gaming machine 1 according to one embodiment of the present invention,
An RWM initialization switch 39 (initialization operation means) that initializes game information when operated when the power is turned on;
An effect button 23 (effect operation means) that can be used in a predetermined effect executed during the game,
A main board display unit 34 (display means) for displaying the cumulative number of payouts of the normal winning opening since power-on,
The display of the cumulative payout number is started when the RWM initialization switch 39 (initialization operation means) is operated (YES determination in S302, S303) and is ended when the effect button 23 (effect operation means) is operated ( S335 is YES, S336).

In the pachinko machine 1,
A second display area 34b (first display means) and a main board display section of the main board display section 34, which are provided at a position where the player cannot visually recognize, and display first information which is information of a combination ratio and a continuous combination ratio. 34 first display areas 34a (third display means);
A display device 13 (second display means) for displaying second information which is the cumulative number of payouts of the normal winning opening since the power is turned on;
A main control circuit 70 (cumulative award ball number management means) for managing a cumulative payout number that is the total of each award ball,
When it is determined that the total number of prize balls, which is the sum of the prize balls, is less than the standard number of prize balls, the display in the second display area 34b (first display means) of the main board display unit 34 is turned on. Display in the display (first mode),
When it is determined that the first information exceeds a reference ratio, the display in the first display area 34a (third display means) of the main board display unit 34 is displayed in a lighting display (second mode),
The display device 13 (second display means) displays the second information calculated for each gaming state when displaying the cumulative number of payouts (second information) of the normal winning opening since the power is turned on. is there.

In the pachislot machine 501 according to the embodiment of the present invention,
An RWM initialization switch 544 (initialization operation means) that initializes game information when operated at power-on;
An input button 595 (production operation means) that can be used in a predetermined production executed during the game;
A main board display unit 634 (display means) for displaying the cumulative payout number of the small role since power-on,
The display of the cumulative payout number is started when the RWM initialization switch 544 (initialization operation means) is operated (YES determination in S702, S703), and is ended when the input button 595 (effect operation means) is operated ( S735 is YES, S736).

In the pachislot machine 501,
A second display area 634b (first display means) and a main board display section of the main board display section 634, which are provided at a position where the player cannot visually recognize, and display first information which is information on the ratio of the winning combination and the continuous winning ratio. A first display area 634a (third display means) 634;
A liquid crystal display device 505 (second display means) for displaying second information which is the cumulative payout number of the small part since the power is turned on;
A main control circuit 571 (cumulative award ball number management means) for managing a cumulative payout number that is the total of each award ball,
When it is determined that the total number of prize balls, which is the sum of the prize balls, is less than the standard number of prize balls, the display in the second display area 34b (first display means) of the main board display unit 34 is turned on. Display in the display (first mode),
When it is determined that the first information exceeds a reference ratio, the display in the first display area 34a (third display means) of the main board display unit 34 is displayed in a lighting display (second mode),
When the liquid crystal display device 505 (second display means) displays the cumulative payout number (second information) of the small role since the power is turned on, the second information calculated for each gaming state is displayed. is there.

  With such a configuration, the administrator can easily check whether the value medium actually paid out is based on preset payout information. That is, since it is assumed that the gaming machines (pachinko gaming machine 1 and pachislot gaming machine 501) that perform the game do not have any trouble with respect to payout, the player can play the game with peace of mind.

  In addition, the game hall officials and third parties who have seen the display on each display means, and thus the player, set the gaming machine (adjustment of nails in the case of the pachinko gaming machine 1, and setting change in the case of the pachislot gaming machine 501) It is possible to determine whether or not a maximum of 6 possible settings) is normal, or whether or not a certain standard is satisfied. It can also be used as a reference for selecting gaming machines.

In the pachinko gaming machine 1 according to one embodiment of the present invention,
A main board display unit 34 (first display means) that is provided at a position where the player cannot visually recognize, and displays first information that is information on the ratio of the bonuses and the consecutive bonuses;
A display device 13 (second display means) for displaying second information, which is the cumulative number of payouts of a normal winning opening since power-on,
A main control circuit 70 (cumulative award ball number management means) for managing a cumulative payout number that is the total of each award ball,
When the main board display section 34 (first display means) determines that the cumulative number of prize balls is less than the standard number of prize balls (6000), the main board display section 34 (first display means). ) Is displayed in the first mode (lighting display of the second display area 34b), and the main substrate display unit 34 (first display means) is determined when it is determined that the first information exceeds a reference ratio. ) In the second mode (lighting display of the first display area 34a),
The display device 13 (second display means) displays the second information calculated for each gaming state when displaying the cumulative number of payouts (second information) of the normal winning opening since the power is turned on. is there.

In the pachinko machine 1,
A second display area 34b (first display means) and a main board display section of the main board display section 34, which are provided at a position where the player cannot visually recognize, and display first information which is information of a combination ratio and a continuous combination ratio. 34 first display areas 34a (third display means);
A display device 13 (second display means) for displaying second information, which is the cumulative number of payouts of a normal winning opening since power-on,
A main control circuit 70 (cumulative award ball number management means) for managing a cumulative payout number that is the total of each award ball,
When it is determined that the cumulative number of prize balls is less than the standard number of prize balls, the display in the second display area 34b (first display means) of the main board display unit 34 is turned on (first mode). Display with
When it is determined that the first information exceeds a reference ratio, the display in the first display area 34a (third display means) of the main board display unit 34 is displayed in a lighting display (second mode),
The display device 13 (second display means) displays the second information calculated for each gaming state when displaying the cumulative number of payouts (second information) of the normal winning opening since the power is turned on. is there.

In the pachislot machine 501 according to the embodiment of the present invention,
A main board display unit 634 (first display means) that is provided at a position where the player cannot visually recognize, and displays first information that is information on the ratio of the bonuses and the consecutive bonuses;
A liquid crystal display device 505 (second display means) for displaying second information that is the cumulative number of small payouts since power-on;
A main control circuit 571 (cumulative award ball number management means) for managing a cumulative payout number that is the total of each award ball,
When the main board display unit 634 (first display unit) determines that the cumulative number of prize balls is less than the reference number of prize balls, the main board display unit 634 (first display unit) displays the display. When displaying in the first mode (lighting display of the second display area 634b) and it is determined that the first information exceeds a reference ratio, the display on the main board display unit 634 (first display means) is displayed. (Lighting display of the first display area 634a) Display in the second mode,
When the liquid crystal display device 505 (second display means) displays the cumulative payout number (second information) of the small role since the power is turned on, the second information calculated for each gaming state is displayed. is there.

In the pachislot machine 501,
A second display area 634b (first display means) and a main board display section of the main board display section 634, which are provided at a position where the player cannot visually recognize, and display first information which is information on the ratio of the winning combination and the continuous winning ratio. A first display area 634a (third display means) 634;
A liquid crystal display device 505 (second display means) for displaying second information that is the cumulative number of small payouts since power-on;
A main control circuit 571 (cumulative award ball number management means) for managing a cumulative payout number that is the total of each award ball,
When it is determined that the cumulative number of prize balls is less than the standard number of prize balls, the display in the second display area 34b (first display means) of the main board display unit 34 is turned on (first mode). Display with
When it is determined that the first information exceeds a reference ratio, the display in the first display area 34a (third display means) of the main board display unit 34 is displayed in a lighting display (second mode),
When the liquid crystal display device 505 (second display means) displays the cumulative payout number (second information) of the small role since the power is turned on, the second information calculated for each gaming state is displayed. is there.

  With such a configuration, the administrator can easily check whether the value medium actually paid out is based on preset payout information. That is, since it is assumed that the gaming machines (pachinko gaming machine 1 and pachislot gaming machine 501) that perform the game do not have any trouble with respect to payout, the player can play the game with peace of mind.

  In addition, the game hall officials and third parties who have seen the display on each display means, and thus the player, set the gaming machine (adjustment of nails in the case of the pachinko gaming machine 1, and setting change in the case of the pachislot gaming machine 501) It is possible to determine whether or not a maximum of 6 possible settings) is normal, or whether or not a certain standard is satisfied. It can also be used as a reference for selecting gaming machines.

  Although one embodiment has been described as described above, the present invention is not limited to the above-described configuration, and various modifications can be made within the scope of the invention described in the claims. In the following description, for the sake of convenience, the pachinko gaming machine 1 is taken up as an example of various modifications of the present invention, but the same applies to the pachislot gaming machine 501.

  In the present embodiment, the pachinko gaming machine 1 displays a bonus rate (10 sets), a continuous bonus rate (10 sets), a bonus rate (total), and a continuous bonus rate (total). Although the main substrate display unit 34 is provided as the display unit, the configuration of the display unit is not limited to the configuration of the main substrate display unit 34 in the present embodiment.

  For example, in the present embodiment, the first display area 34a and the second display area 34b of the main board display unit 34 are arranged side by side with no gap between them, but may be arranged apart from each other in the left and right. Further, for example, the first display area 34a and the second display area 34b may be arranged side by side without any gap. In the present embodiment, the main board display unit 34 is provided on the main control board 70a, but may be provided on the sub control board 200a. In the main board display unit 34, the first display area 34a (or the second display area 34b) is provided on the main control board 70a, and the second display area 34b (or the first display area 34a) is sub-controlled. It may be provided on the substrate 200a.

  Further, in the present embodiment, the main board display section 34 is provided as a display section for displaying gambling, that is, a display of the ratio of the actors (10 sets). The configuration of the display section is the main board in the present embodiment. The configuration of the display unit 34 is not limited. For example, in the pachinko gaming machine 1, a display area (specifically, a balance display section or the like) such as a frequency or a payout provided on the upper plate 21 may be used as the display section. In the pachislot machine 501, a credit display unit, a payout display unit, or a bet display unit provided on the front door 502 may be used as the display unit.

  As described above, when the balance display unit is used in the pachinko gaming machine 1 and the credit display unit, the payout display unit, the bet display unit, or the like is used in the pachislot machine 501 as the display unit, It is desirable that the base door 3 or the cabinet 560 be opened as a precondition for the display. With such a configuration, in a state in which a player is playing a game, information that the player wants to know (information that should be displayed) is displayed, and only when the administrator performs an inspection, the ratio of the bonuses (10 Set) etc. can be displayed.

  In addition, the display relating to gambling can include not only the display of the ratio of the actors (10 sets) and the like in the present embodiment, but also the display relating to the game nail, the setting, the display relating to the appearance, and the like.

  In the present embodiment, the trigger for displaying on the display device 13 and the main board display unit 34 is the operation of the effect button 23, the RWM initialization switch 39, and the power switch 38. Or a switch can be used. For example, instead of using an existing switch such as the RWM initialization switch 39, a (dedicated) confirmation switch for displaying an accessory ratio (10 sets) or the like may be provided.

  Further, in the pachinko gaming machine 1, the information displayed on the display device 13 and the main board display unit 34 can be various information as well as the information described in the embodiments.

  Further, in the pachinko gaming machine 1, the total storage area is provided in the main RAM 73 of the main control circuit 70, but the invention is not limited to this. For example, the storage area for aggregation processing may be a payout control board, a sub-control board, or the like, or may be configured to be provided on the board with a separate board.

  In the present embodiment, the number of game balls (number of shot balls) emitted from the launching device 15 is roughly counted by counting the number of prize balls. However, the present invention is not limited to this. For example, if the pachinko gaming machine 1 is an enclosed gaming machine, the number of shot balls may be counted. Further, if the number of outs can be counted, the number of game balls (number of fired balls) fired from the launching device 15 may be roughly counted by counting the number of outs.

  Also, in this embodiment, the operation means that can be operated by the player (the effect button 23 in the present embodiment) and the operation means that cannot be operated by the player (the RWM initialization switch 39 in the present embodiment) Depends on the physical position, but the present invention is not limited to this, and it may be determined whether or not the operation is possible in terms of time or time.

  Further, for example, buttons on the back of the gaming machine or inside the gaming machine (inside the cabinet) are operation means that are not normally operable by the player. On the other hand, the effect buttons installed on the front surface of the gaming machine are operation means that can be operated by the player if normal. Here, for example, an effect button may be used as an operation means for performing determination and selection in the hall menu displayed after power-on. In this case, the period during which the hall menu is displayed is the effect button. However, it can be said that this is an operation means that cannot be operated by the player. However, since this may differ depending on the operation of the game hall, if the hall menu is displayed even during fluctuation, the effect button is an operating means that can be operated by the player even if the hall menu is displayed. You can say that.

  As described above, the operation means that can be operated by the player and the operation means that cannot be operated by the player are not limited depending on the installation position and period, and the player or a person other than the player ( For example, an operation means that can be operated by a game hall manager) can be recognized as corresponding to either an operation means that can be operated by the player or an operation means that cannot be operated by the player. For such recognition, for example, when there are two operation means that can be operated by a player or a person other than the player, one is handled as an operation means that can be operated by the player, and the other is operated by the player. This suggests that it can be handled as an impossible operation means.

  In addition, an operation that requires simultaneous operation of an operation means that can be operated by the player and an operation means that cannot be operated by the player (for example, turning on the power while pressing the effect button to display the hall menu) Is an operation using an operation means that the player cannot operate, so that the display relating to gambling is recognized as a result of operating the operation means that the player cannot operate. You can also On the other hand, as described above, if the operation can be executed even when the operation is fluctuating (in a state where it is recognized that the player is playing a game), the player can perform the operation. Since it can be said that it is the result of operating the operating means, any expression can be used.

1 Pachinko machine 23 Production button 38 Power switch 39 RWM initialization switch 501 Pachislot machine 544 RWM initialization switch 545 Power switch 595 Input button

Claims (4)

A first display means that is provided at a position where the player cannot visually recognize, and displays first information that is information on an accessory ratio and a continuous accessory ratio;
A second display means for displaying second information which is the cumulative number of payouts of a normal winning opening since power-on;
A cumulative prize ball number management means for managing the cumulative number of payouts, which is the total of each prize ball,
When the first display means determines that the cumulative number of prize balls is less than a reference number of prize balls, the display on the first display means is displayed in a first mode, and the first information is a reference When it is determined that the ratio exceeds, the display on the first display means is displayed in the second mode,
When the second information is displayed on the second display means, the second information calculated for each gaming state is displayed. A first display unit and a third display unit which are provided at a position where the player cannot visually recognize, and display first information which is information on a ratio of a combination item and a continuous combination of items;
A second display means for displaying second information which is the cumulative number of payouts of a normal winning opening since power-on;
A cumulative prize ball number management means for managing the cumulative number of payouts, which is the total of each prize ball,
When it is determined that the cumulative number of prize balls is less than the standard number of prize balls, the display on the first display means is displayed in the first mode;
When it is determined that the first information exceeds a reference ratio, the display on the third display means is displayed in the second mode,
When the second information is displayed on the second display means, the second information calculated for each gaming state is displayed. A first display means that is provided at a position where the player cannot visually recognize, and displays first information that is information on an accessory ratio and a continuous accessory ratio;
A second display means for displaying second information that is the cumulative number of small payouts since power-on;
A cumulative prize ball number management means for managing the cumulative number of payouts, which is the total of each prize ball,
When the first display means determines that the cumulative number of prize balls is less than a reference number of prize balls, the display on the first display means is displayed in a first mode, and the first information is a reference When it is determined that the ratio exceeds, the display on the first display means is displayed in the second mode,
When the second information is displayed on the second display means, the second information calculated for each gaming state is displayed. A first display unit and a third display unit which are provided at a position where the player cannot visually recognize, and display first information which is information on a ratio of a combination item and a continuous combination of items;
A second display means for displaying second information that is the cumulative number of small payouts since power-on;
A cumulative prize ball number management means for managing the cumulative number of payouts, which is the total of each prize ball,
When it is determined that the cumulative number of prize balls is less than the standard number of prize balls, the display on the first display means is displayed in the first mode;
When it is determined that the first information exceeds a reference ratio, the display on the third display means is displayed in the second mode,
When the second information is displayed on the second display means, the second information calculated for each gaming state is displayed.

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