JP2017504838A - 暗号アルゴリズムに対するサイドチャネル攻撃への対抗策 - Google Patents
暗号アルゴリズムに対するサイドチャネル攻撃への対抗策 Download PDFInfo
- Publication number
- JP2017504838A JP2017504838A JP2016548377A JP2016548377A JP2017504838A JP 2017504838 A JP2017504838 A JP 2017504838A JP 2016548377 A JP2016548377 A JP 2016548377A JP 2016548377 A JP2016548377 A JP 2016548377A JP 2017504838 A JP2017504838 A JP 2017504838A
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- Prior art keywords
- algorithm
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- intermediate data
- cryptographic algorithm
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- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09C—CIPHERING OR DECIPHERING APPARATUS FOR CRYPTOGRAPHIC OR OTHER PURPOSES INVOLVING THE NEED FOR SECRECY
- G09C1/00—Apparatus or methods whereby a given sequence of signs, e.g. an intelligible text, is transformed into an unintelligible sequence of signs by transposing the signs or groups of signs or by replacing them by others according to a predetermined system
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/002—Countermeasures against attacks on cryptographic mechanisms
- H04L9/003—Countermeasures against attacks on cryptographic mechanisms for power analysis, e.g. differential power analysis [DPA] or simple power analysis [SPA]
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/06—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols the encryption apparatus using shift registers or memories for block-wise or stream coding, e.g. DES systems or RC4; Hash functions; Pseudorandom sequence generators
- H04L9/0618—Block ciphers, i.e. encrypting groups of characters of a plain text message using fixed encryption transformation
- H04L9/0631—Substitution permutation network [SPN], i.e. cipher composed of a number of stages or rounds each involving linear and nonlinear transformations, e.g. AES algorithms
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/08—Key distribution or management, e.g. generation, sharing or updating, of cryptographic keys or passwords
- H04L9/0861—Generation of secret information including derivation or calculation of cryptographic keys or passwords
- H04L9/0869—Generation of secret information including derivation or calculation of cryptographic keys or passwords involving random numbers or seeds
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L2209/00—Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
- H04L2209/08—Randomization, e.g. dummy operations or using noise
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L2209/00—Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
- H04L2209/12—Details relating to cryptographic hardware or logic circuitry
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L2209/00—Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
- H04L2209/24—Key scheduling, i.e. generating round keys or sub-keys for block encryption
Landscapes
- Engineering & Computer Science (AREA)
- Computer Security & Cryptography (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Storage Device Security (AREA)
- Mobile Radio Communication Systems (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US14/171,558 US20150222421A1 (en) | 2014-02-03 | 2014-02-03 | Countermeasures against side-channel attacks on cryptographic algorithms |
| US14/171,558 | 2014-02-03 | ||
| PCT/US2015/014294 WO2015117144A1 (en) | 2014-02-03 | 2015-02-03 | Countermeasures against side-channel attacks on cryptographic algorithms using permutations |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2017504838A true JP2017504838A (ja) | 2017-02-09 |
| JP2017504838A5 JP2017504838A5 (enExample) | 2018-02-22 |
Family
ID=52629659
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2016548377A Pending JP2017504838A (ja) | 2014-02-03 | 2015-02-03 | 暗号アルゴリズムに対するサイドチャネル攻撃への対抗策 |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US20150222421A1 (enExample) |
| EP (1) | EP3103109A1 (enExample) |
| JP (1) | JP2017504838A (enExample) |
| KR (1) | KR20160115963A (enExample) |
| CN (1) | CN105940439B (enExample) |
| WO (1) | WO2015117144A1 (enExample) |
Families Citing this family (26)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE102012018924A1 (de) * | 2012-09-25 | 2014-03-27 | Giesecke & Devrient Gmbh | Seitenkanalgeschützte Maskierung |
| WO2015146431A1 (ja) * | 2014-03-28 | 2015-10-01 | ソニー株式会社 | 暗号処理装置、および暗号処理方法、並びにプログラム |
| ITUB20152708A1 (it) * | 2015-07-31 | 2017-01-31 | St Microelectronics Srl | Procedimento per operare una crittografia con mascheratura di dati sensibili, apparato di crittografia e prodotto informatico corrispondente |
| GB2544452B (en) * | 2015-08-26 | 2019-09-11 | Advanced Risc Mach Ltd | Data processing systems |
| DE102015222968A1 (de) * | 2015-11-20 | 2017-05-24 | Robert Bosch Gmbh | Betriebsverfahren für eine elektronische Vorrichtung und elektronische Vorrichtung |
| EP3217307B1 (en) * | 2016-02-22 | 2018-11-07 | Eshard | Method of testing the resistance of a circuit to a side channel analysis of second order or more |
| US10256973B2 (en) * | 2016-09-30 | 2019-04-09 | Intel Corporation | Linear masking circuits for side-channel immunization of advanced encryption standard hardware |
| US10911218B2 (en) * | 2016-10-09 | 2021-02-02 | Lg Electronics Inc. | Lightweight block cipher |
| KR101879809B1 (ko) * | 2017-09-19 | 2018-08-16 | 국민대학교산학협력단 | 부채널 분석에 안전한 연산 장치 및 방법 |
| KR102602696B1 (ko) | 2017-10-13 | 2023-11-16 | 삼성전자주식회사 | 암호화 장치 및 복호화 장치, 이들의 동작방법 |
| KR102510077B1 (ko) * | 2018-04-24 | 2023-03-14 | 삼성에스디에스 주식회사 | 부채널 공격에 안전한 연산 장치 및 방법 |
| US11386237B2 (en) | 2019-06-19 | 2022-07-12 | Facebook Technologies, Llc | Scalable encryption engine having partitionable data paths |
| US11283593B2 (en) | 2019-06-19 | 2022-03-22 | Facebook Technologies, Llc | Adaptive signal synchronization and glitch suppression for encryption engines |
| US11165557B2 (en) * | 2019-06-19 | 2021-11-02 | Facebook Technologies, Llc | Encryption engine having randomized round scheduling to prevent side channel attacks |
| US11087029B1 (en) | 2019-10-09 | 2021-08-10 | Facebook Technologies, Llc | Encryption engine and decryption engine with glitch randomization to prevent side channel attacks |
| US11599680B2 (en) * | 2019-11-20 | 2023-03-07 | Meta Platforms Technologies, Llc | Encryption and decryption engines with hybrid masking to prevent side channel attacks |
| WO2021124195A1 (en) * | 2019-12-18 | 2021-06-24 | Ra Side Channel Cyber Security Private Limited | A docking method and a system thereof to avoid side-channel attacks |
| US11303618B2 (en) * | 2020-02-17 | 2022-04-12 | International Business Machines Corporation | Encryption management |
| CN111478742B (zh) * | 2020-04-07 | 2022-04-29 | 南方电网科学研究院有限责任公司 | 一种sm4算法的分析方法、系统以及设备 |
| US11599679B2 (en) * | 2020-06-23 | 2023-03-07 | Arm Limited | Electromagnetic and power noise injection for hardware operation concealment |
| US12015622B2 (en) * | 2021-03-01 | 2024-06-18 | Old Dominion University | Privacy-preserving online botnet classification system utilizing power footprint of IoT connected devices |
| WO2023164567A2 (en) * | 2022-02-24 | 2023-08-31 | FortifyIQ, Inc. | Carry-based differential power analysis and its application to testing for vulnerability of sha-2 and hmac-sha-2 to side-channel attack |
| CN115037485B (zh) * | 2022-08-12 | 2022-11-08 | 北京智芯微电子科技有限公司 | 轻量级认证加密算法的实现方法、装置及设备 |
| CN116055030B (zh) * | 2023-02-10 | 2025-07-08 | 山东云海国创云计算装备产业创新中心有限公司 | 一种用于对抗功耗攻击的dma系统、方法、设备及介质 |
| CN116388956B (zh) * | 2023-03-16 | 2024-06-18 | 中物院成都科学技术发展中心 | 一种基于深度学习的侧信道分析方法 |
| WO2025005925A1 (en) * | 2023-06-30 | 2025-01-02 | Pqsecure Technologies, Llc | Hardware-based and software-based method for enhancing resistance against side-channel attacks in a cryposystem |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008131108A (ja) * | 2006-11-16 | 2008-06-05 | Fujitsu Ltd | 共通鍵暗号のための暗号化装置 |
| JP2010166402A (ja) * | 2009-01-16 | 2010-07-29 | Mitsubishi Electric Corp | 暗号処理装置及び暗号処理方法及び暗号処理プログラム |
| WO2011101994A1 (ja) * | 2010-02-22 | 2011-08-25 | 株式会社東芝 | 暗号化装置 |
| JP2012070048A (ja) * | 2010-09-21 | 2012-04-05 | Toshiba Corp | 暗号化装置および復号装置 |
Family Cites Families (25)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2789776B1 (fr) * | 1999-02-17 | 2001-04-06 | Gemplus Card Int | Procede de contre-mesure dans un composant electronique mettant en oeuvre un algorithme de cryptographie a cle secrete |
| WO2001082524A1 (en) * | 2000-04-20 | 2001-11-01 | Matchett Noel D | Cryptographic system for data encryption standard |
| US7428305B1 (en) * | 2000-05-02 | 2008-09-23 | Qualcomm Incorporated | Generation of keyed integer permutations for message authentication codes |
| WO2002003605A1 (en) * | 2000-07-04 | 2002-01-10 | Koninklijke Philips Electronics N.V. | Substitution-box for symmetric-key ciphers |
| JP4045777B2 (ja) * | 2001-10-30 | 2008-02-13 | 株式会社日立製作所 | 情報処理装置 |
| US7295671B2 (en) * | 2002-05-23 | 2007-11-13 | Atmel Corporation | Advanced encryption standard (AES) hardware cryptographic engine |
| GB0211812D0 (en) * | 2002-05-23 | 2002-07-03 | Koninkl Philips Electronics Nv | S-box encryption in block cipher implementations |
| KR100456599B1 (ko) * | 2002-11-12 | 2004-11-09 | 삼성전자주식회사 | 병렬 디이에스 구조를 갖는 암호 장치 |
| EP1733502B1 (fr) * | 2004-03-29 | 2009-09-30 | Stmicroelectronics Sa | Processeur d'execution d'un algorithme de type aes |
| TWI290426B (en) * | 2005-02-03 | 2007-11-21 | Sanyo Electric Co | Encryption processing circuit |
| EP1722502B1 (en) * | 2005-05-10 | 2007-09-05 | Research In Motion Limited | Key masking for cryptographic processes |
| US8509427B2 (en) * | 2005-08-01 | 2013-08-13 | Eric Myron Smith | Hybrid mode cryptographic method and system with message authentication |
| US7587614B1 (en) * | 2005-08-30 | 2009-09-08 | Altera Corporation | Encryption algorithm optimized for FPGAs |
| FR2893796B1 (fr) * | 2005-11-21 | 2008-01-04 | Atmel Corp | Procede de protection par chiffrement |
| US20130227286A1 (en) * | 2006-04-25 | 2013-08-29 | Andre Jacques Brisson | Dynamic Identity Verification and Authentication, Dynamic Distributed Key Infrastructures, Dynamic Distributed Key Systems and Method for Identity Management, Authentication Servers, Data Security and Preventing Man-in-the-Middle Attacks, Side Channel Attacks, Botnet Attacks, and Credit Card and Financial Transaction Fraud, Mitigating Biometric False Positives and False Negatives, and Controlling Life of Accessible Data in the Cloud |
| US8422668B1 (en) * | 2006-12-15 | 2013-04-16 | Spansion Llc | Table lookup operation on masked data |
| EP2001154A1 (fr) * | 2007-06-05 | 2008-12-10 | Nicolas Reffe | Procédé et dispositif de chiffrement/déchiffrement d'une séquence de données d'entrée |
| US8311222B2 (en) * | 2008-08-26 | 2012-11-13 | GlobalFoundries, Inc. | Hardware based multi-dimensional encryption |
| JP5458611B2 (ja) * | 2009-03-13 | 2014-04-02 | ソニー株式会社 | 暗号処理装置 |
| FR2949887B1 (fr) * | 2009-09-04 | 2013-02-08 | Oberthur Technologies | Procede de traitement cryptographique de donnees |
| US8406334B1 (en) * | 2010-06-11 | 2013-03-26 | Xilinx, Inc. | Overflow resistant, fixed precision, bit optimized systolic array for QR decomposition and MIMO decoding |
| JP5060606B2 (ja) * | 2010-09-17 | 2012-10-31 | 株式会社東芝 | 暗号化装置 |
| KR101977823B1 (ko) * | 2012-04-02 | 2019-05-13 | 삼성전자주식회사 | 랜덤 순열 생성 방법, 랜덤 순열 생성 장치 및 이를 구비하는 암복호화 장치 |
| US9025768B2 (en) * | 2013-03-08 | 2015-05-05 | Broadcom Corporation | Securing variable length keyladder key |
| US9645793B2 (en) * | 2013-12-05 | 2017-05-09 | Infineon Technologies Ag | Random permutation generator and method for generating a random permutation sequence |
-
2014
- 2014-02-03 US US14/171,558 patent/US20150222421A1/en not_active Abandoned
-
2015
- 2015-02-03 KR KR1020167023777A patent/KR20160115963A/ko not_active Withdrawn
- 2015-02-03 JP JP2016548377A patent/JP2017504838A/ja active Pending
- 2015-02-03 WO PCT/US2015/014294 patent/WO2015117144A1/en not_active Ceased
- 2015-02-03 CN CN201580006205.3A patent/CN105940439B/zh not_active Expired - Fee Related
- 2015-02-03 EP EP15708360.1A patent/EP3103109A1/en not_active Withdrawn
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008131108A (ja) * | 2006-11-16 | 2008-06-05 | Fujitsu Ltd | 共通鍵暗号のための暗号化装置 |
| JP2010166402A (ja) * | 2009-01-16 | 2010-07-29 | Mitsubishi Electric Corp | 暗号処理装置及び暗号処理方法及び暗号処理プログラム |
| WO2011101994A1 (ja) * | 2010-02-22 | 2011-08-25 | 株式会社東芝 | 暗号化装置 |
| JP2012070048A (ja) * | 2010-09-21 | 2012-04-05 | Toshiba Corp | 暗号化装置および復号装置 |
Non-Patent Citations (1)
| Title |
|---|
| CHRISTOPH HERBST ET.AL.: "An AES Smart Card Implementation Resistant to Power Analysis Attacks", APPLIED CRYPTOGRAPHY AND NETWORK SECURITY(ACNS)2006 LECTURE NOTES IN COMPUTER SCIENCE, vol. 第3989号, JPN6018047532, 2006, pages 239 - 252, ISSN: 0003931138 * |
Also Published As
| Publication number | Publication date |
|---|---|
| EP3103109A1 (en) | 2016-12-14 |
| CN105940439B (zh) | 2020-01-17 |
| CN105940439A (zh) | 2016-09-14 |
| KR20160115963A (ko) | 2016-10-06 |
| US20150222421A1 (en) | 2015-08-06 |
| WO2015117144A1 (en) | 2015-08-06 |
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