JP2017187342A5 - - Google Patents
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- JP2017187342A5 JP2017187342A5 JP2016075278A JP2016075278A JP2017187342A5 JP 2017187342 A5 JP2017187342 A5 JP 2017187342A5 JP 2016075278 A JP2016075278 A JP 2016075278A JP 2016075278 A JP2016075278 A JP 2016075278A JP 2017187342 A5 JP2017187342 A5 JP 2017187342A5
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- memory
- voltage
- processing unit
- signal processing
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- 238000005259 measurement Methods 0.000 claims 1
Claims (5)
前記第１電圧より高い第２電圧で動作し、前記第１メモリーより高い周波数で動作可能な第２メモリーと、
前記第２電圧で動作するＲＦ信号処理部と、
前記第２電圧の外部供給の制御、前記ＲＦ信号処理部の動作制御、及び、演算処理用のメモリーとして使用する前記第１メモリー或いは前記第２メモリーの切り替え制御を行う前記第１電圧で動作する演算部と、
を備えた集積回路。 A first memory that operates at a first voltage generated by a circuit operating power supply;
A second memory operable at a second voltage higher than the first voltage and operable at a higher frequency than the first memory;
An RF signal processing unit operating at the second voltage;
Operates at the first voltage for controlling the external supply of the second voltage, the operation control of the RF signal processor, and the switching control of the first memory or the second memory used as a memory for arithmetic processing. An arithmetic unit;
Integrated circuit with.
前記演算部は、測位演算を行って計測結果を出力する頻度に応じて、前記第１メモリー或いは前記第２メモリーの前記切り替え制御を行う、
請求項１に記載の集積回路。 The RF signal processing unit is a processing unit that receives a signal from a positioning satellite;
The calculation unit performs the switching control of the first memory or the second memory according to the frequency at which the positioning calculation is performed and the measurement result is output.
The integrated circuit according to claim 1.
請求項２に記載の集積回路。 The calculation unit further performs operation control of an external motion sensor, and performs the positioning calculation by causing any one of the RF signal processing unit and the motion sensor to function.
The integrated circuit according to claim 2.
請求項３に記載の集積回路。 The arithmetic unit, when stopping the operation of the RF signal processing unit and operating the motion sensor, uses a mode in which the first memory is used as the memory for the arithmetic processing, and the second memory is used as the memory. Switch between modes used as memory for computation processing,
The integrated circuit according to claim 3.
前記第２電圧の外部供給の制御及び前記ＲＦ信号処理部の動作制御を行うことと、
演算処理用のメモリーとして使用する前記第１メモリー或いは前記第２メモリーの切り替え制御を行うことと、
を含む動作モード切替制御方法。 A first memory that operates at a first voltage generated by a circuit operating power supply; a second memory that operates at a second voltage higher than the first voltage and that can operate at a frequency higher than the first memory; and An operation mode switching control method for an integrated circuit including an RF signal processing unit that operates on voltage,
Controlling the external supply of the second voltage and controlling the operation of the RF signal processing unit;
Performing switching control of the first memory or the second memory used as a memory for arithmetic processing;
An operation mode switching control method including:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2016075278A JP6686642B2 (en) | 2016-04-04 | 2016-04-04 | Integrated circuit and operation mode switching control method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2016075278A JP6686642B2 (en) | 2016-04-04 | 2016-04-04 | Integrated circuit and operation mode switching control method |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2017187342A JP2017187342A (en) | 2017-10-12 |
| JP2017187342A5 true JP2017187342A5 (en) | 2019-04-04 |
| JP6686642B2 JP6686642B2 (en) | 2020-04-22 |
Family
ID=60046416
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2016075278A Active JP6686642B2 (en) | 2016-04-04 | 2016-04-04 | Integrated circuit and operation mode switching control method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP6686642B2 (en) |
Family Cites Families (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0247743A (en) * | 1988-08-09 | 1990-02-16 | Nec Ic Microcomput Syst Ltd | Microcomputer |
| CN1113250C (en) * | 1995-10-09 | 2003-07-02 | 快速追踪有限公司 | GPS receiver and method for processing GPS signals |
| JP2002215597A (en) * | 2001-01-15 | 2002-08-02 | Mitsubishi Electric Corp | Multiprocessor device |
| JP2003086693A (en) * | 2001-09-12 | 2003-03-20 | Nec Corp | Semiconductor integrated circuit |
| JP4313986B2 (en) * | 2002-06-05 | 2009-08-12 | パナソニック株式会社 | Semiconductor integrated circuit and manufacturing method thereof |
| JP2006178854A (en) * | 2004-12-24 | 2006-07-06 | Toshiba Corp | Electronic circuit |
| JP5465022B2 (en) * | 2010-01-25 | 2014-04-09 | シチズンホールディングス株式会社 | Electronic circuit |
| JP5664053B2 (en) * | 2010-09-16 | 2015-02-04 | カシオ計算機株式会社 | Satellite signal receiver |
-
2016
- 2016-04-04 JP JP2016075278A patent/JP6686642B2/en active Active
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