JP2017135291A - Detection diode - Google Patents

Detection diode Download PDF

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JP2017135291A
JP2017135291A JP2016014769A JP2016014769A JP2017135291A JP 2017135291 A JP2017135291 A JP 2017135291A JP 2016014769 A JP2016014769 A JP 2016014769A JP 2016014769 A JP2016014769 A JP 2016014769A JP 2017135291 A JP2017135291 A JP 2017135291A
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semiconductor layer
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barrier
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JP6489701B2 (en
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伊藤 弘樹
Hiroki Ito
弘樹 伊藤
清水 誠
Makoto Shimizu
誠 清水
石橋 忠夫
Tadao Ishibashi
忠夫 石橋
伊藤 弘
Hiroshi Ito
弘 伊藤
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NTT Electronics Corp
Kitasato Institute
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/20Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
    • H01L29/201Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds including two or more compounds, e.g. alloys
    • H01L29/205Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds including two or more compounds, e.g. alloys in different semiconductor regions, e.g. heterojunctions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/861Diodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/861Diodes
    • H01L29/868PIN diodes

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Abstract

PROBLEM TO BE SOLVED: To provide a HBD ensuring good detection characteristics, by performing zero bias operation in a THz frequency band, thereby suppressing deterioration of the I-V characteristics.SOLUTION: A detection diode includes a semiconductor multilayer structure where a high concentration n-type first semiconductor layer 11, a second semiconductor layer having a smaller electron affinity compared with the first semiconductor layer, and an n-type third semiconductor layer 13A are laminated in order, a heterobarrier is formed on the second semiconductor layer side of a boundary surface of the first semiconductor layer 11 and second semiconductor layer, the barrier height of the heterobarrier is adjusted by adjusting the doping level of the first semiconductor layer 11, an anode electrode 14 is formed on the first semiconductor layer 11, and a cathode electrode 15 is formed on the third semiconductor layer 13. The second semiconductor layer includes an undoped barrier layer 12A in contact with the first semiconductor layer 11, and an n-type barrier layer 12B in contact with the third semiconductor layer 13A.SELECTED DRAWING: Figure 3

Description

本発明は、検波ダイオードに関し、より詳細には、THz周波数帯(0.1〜10THz)のRF電気信号を受信し、ゼロバイアスで動作する低雑音で高速な半導体検波ダイオードに関する。   The present invention relates to a detection diode, and more particularly to a low-noise and high-speed semiconductor detection diode that receives an RF electrical signal in a THz frequency band (0.1 to 10 THz) and operates at zero bias.

従来、THz周波数帯の無線システムにおける検波手段として、一般的に、ダイオードの非線形電流電圧特性(I−V特性)が利用されている。典型的には、Schottky Barrier Diode(SBD)、Backward Diode、Planar Doped Barrier(PDB)Diode等が用いられている。例えば、SBDを用いた包絡線検波において、微弱な信号を検出する際には、電源ノイズの影響を抑制すべく、ゼロバイアスで動作させることが望ましく、良好な感度を得るためには、飽和電流値Isを大きくする必要がある。また、THz周波数帯で動作する受信器を構成する場合、半導体基板に形成した純抵抗アンテナのインピーダンスZ0が約75Ωと低いために、インピーダンス整合が取りにくい。このとき、結合効率を確保するためには、SBDの微分抵抗値RDをZ0に近づけるために、飽和電流値Isを大きくする必要がある。 Conventionally, nonlinear current-voltage characteristics (IV characteristics) of diodes are generally used as detection means in a radio system in the THz frequency band. Typically, Schottky Barrier Diode (SBD), Backward Diode, Planar Doped Barrier (PDB) Diode, etc. are used. For example, when detecting a weak signal in envelope detection using SBD, it is desirable to operate at zero bias in order to suppress the influence of power supply noise. To obtain good sensitivity, saturation current It is necessary to increase the value Is. When a receiver operating in the THz frequency band is configured, impedance matching is difficult to achieve because the impedance Z 0 of the pure resistance antenna formed on the semiconductor substrate is as low as about 75Ω. At this time, in order to ensure the coupling efficiency, it is necessary to increase the saturation current value Is in order to bring the differential resistance value R D of SBD closer to Z 0 .

飽和電流値Isを大きくするために、バリア高さφBが小さくなる、すなわち飽和電流密度Jc(A/cm2)が大きくなる半導体材料としてInPに格子整合したInGaAsPを用いたSBDが知られている。しかしながら、数百GHz以上の高周波動作を行う場合には、必要な接合面積が極めて小さくなるので、InPに格子整合したInGaAsP系の材料を用いるかぎり、所望の飽和電流値Isを得られる程度にバリア高さφBを小さくすることができない。そこで、バリア高さφBを任意に制御できるHetero Barrier Diode (HBD)が提案されている(例えば、非特許文献1参照)。 In order to increase the saturation current value Is, an SBD using InGaAsP lattice-matched to InP is known as a semiconductor material in which the barrier height φ B decreases, that is, the saturation current density Jc (A / cm 2 ) increases. Yes. However, when a high-frequency operation of several hundred GHz or more is performed, the necessary junction area is extremely small. Therefore, as long as an InGaAsP-based material lattice-matched to InP is used, a barrier can be obtained to a desired saturation current value Is. The height φ B cannot be reduced. Accordingly, a hetero barrier diode (HBD) that can arbitrarily control the barrier height φ B has been proposed (see, for example, Non-Patent Document 1).

図1に、従来のHBDの構造を示す。高濃度のn+−InPカソード層3(第3の半導体層)、アンドープ(=低濃度)のInPバリア層2(第2の半導体層)、高濃度のn+−InGaAsアノード層1(第1の半導体層)が順に積層され、カソード層3にカソード電極5が形成され、アノード層1にアノード電極4が形成されている。バリア層2は、アノード層1と比較してより小さな電子親和力を有し、両者の界面(InGaAs/InP界面)のバリア層2側に、電子に対するエネルギーバリア(ヘテロバリア)が形成されている。バリア高さφBは、n+−InGaAsアノード層1のフェルミ準位から測った量であるため、アノード層1のドーピングレベルを調整することにより、φB=0まで任意に小さくできる。 FIG. 1 shows the structure of a conventional HBD. High concentration n + -InP cathode layer 3 (third semiconductor layer), undoped (= low concentration) InP barrier layer 2 (second semiconductor layer), high concentration n + -InGaAs anode layer 1 (first semiconductor layer) Of the semiconductor layer), the cathode layer 5 is formed on the cathode layer 3, and the anode electrode 4 is formed on the anode layer 1. The barrier layer 2 has a smaller electron affinity than the anode layer 1, and an energy barrier (heterobarrier) against electrons is formed on the barrier layer 2 side of the interface between them (InGaAs / InP interface). Since the barrier height φ B is an amount measured from the Fermi level of the n + -InGaAs anode layer 1, it can be arbitrarily reduced to φ B = 0 by adjusting the doping level of the anode layer 1.

以下に、各パラメータと焦点となるダイオードの微分抵抗値RDとの関係を説明する。HBDの非線形I−V特性は、飽和電流値Is、熱電圧VT、準方向電流の理想係数nを用いると、
D(V)=Is{exp[V×(nVT-1]−exp[−V×(n−1)×(nVT-1]} (1)
と表現できる(例えば、非特許文献2)。さらに、飽和電流値Isは、ダイオードの接合面積をSj、バリアの材料のRichardson常数をA*、温度をT(K)をとして、
Is(Sj、T)=Sj×A*×T2×exp(−qφB/VT) (2)
で与えられる。
Below, the relationship between each parameter and the differential resistance value R D of the focus diode will be described. The non-linear IV characteristic of the HBD is obtained by using the saturation current value Is, the thermal voltage V T , and the ideal coefficient n of the quasi-direction current.
I D (V) = Is {exp [V × (nV T ) −1 ] −exp [−V × (n−1) × (nV T ) −1 ]} (1)
(For example, Non-Patent Document 2). Further, the saturation current value Is is defined by assuming that the junction area of the diode is S j , the Richardson constant of the barrier material is A * , and the temperature is T (K).
Is (S j , T) = S j × A * × T 2 × exp (−qφ B / V T ) (2)
Given in.

例えば、Sj=1μm2、T=300K、A*=9.2A/cm2/Kとして、仮にqφB=85meV、n=1.2に設定すると、ダイオードの微分抵抗値RD(=dV/dI)は、(1)式から、84Ωと計算される。この微分抵抗値RDは、Si半球レンズ上に形成された自己相補アンテナ(Self-Complementary Antenna)のインピーダンスZ0(75Ω)に近いことがわかる。Sj=1μm2の様に、THz周波数帯の動作に必要な小さな接合面積であっても、十分に低い微分抵抗値RDを実現できる。従って、このHBDは、THz周波数帯で動作し、ゼロバイアスで動作する低雑音の検波手段として、適用することができる。 For example, if S j = 1 μm 2 , T = 300 K, A * = 9.2 A / cm 2 / K, and qφ B = 85 meV and n = 1.2, the differential resistance value R D (= dV) of the diode is set. / DI) is calculated as 84Ω from the equation (1). This differential resistance value R D is close to the impedance Z 0 (75Ω) of the self-complementary antenna formed on the Si hemisphere lens. A sufficiently low differential resistance value R D can be realized even with a small junction area necessary for operation in the THz frequency band, such as S j = 1 μm 2 . Therefore, this HBD can be applied as a low noise detection means that operates in the THz frequency band and operates at zero bias.

H. Ito and T. Ishibashi, “Fermi-level managed barrier diode for broadband and low-noise terahertz-wave detection,” Electronics Letters, Vol. 51 , Issue 18, pp. 1440 - 1442, 2015.H. Ito and T. Ishibashi, “Fermi-level managed barrier diode for broadband and low-noise terahertz-wave detection,” Electronics Letters, Vol. 51, Issue 18, pp. 1440-1442, 2015. M. S. Tyagi et al., “Metal-Semiconductor Schottky Barrier Junctions and Their Applications,” edited by B. L. Sharma _Plenum, New York, 1984, Chap.1, p.19.M. S. Tyagi et al., “Metal-Semiconductor Schottky Barrier Junctions and Their Applications,” edited by B. L. Sharma _Plenum, New York, 1984, Chap.1, p.19. S. M. Sze, “Physics of Semiconductor Devices,” John Wiley and Sons, 1981, Chap.5, p.250.S. M. Sze, “Physics of Semiconductor Devices,” John Wiley and Sons, 1981, Chap.5, p.250.

しかしながら、低濃度のInPバリア層を用いたHBDは、バリア高さqφBを小さくすることにより、以下のような問題があった。 However, the HBD using a low concentration InP barrier layer has the following problems by reducing the barrier height qφ B.

図2に、従来のHBDの伝導帯端のプロファイルの一例を示す。バンドの非放物線性と電子電荷のエネルギー分布を考慮して、InGaAs/InP界面にヘテロ構造を有するHBDの伝導帯端のプロファイル(バンドプロファイル)を計算した結果である。HBDの構造は、アンドープのInPバリア層2の厚さを1000A,n+−InPカソード層3のキャリア濃度を1×1018/cm3とした。電子のエネルギーは、n+−InGaAsアノード層1の伝導帯端EC1=0とし、アノード層1のフェルミ準位(Ef)の位置を破線で示す。 FIG. 2 shows an example of a conduction band edge profile of a conventional HBD. This is a result of calculating a conduction band edge profile (band profile) of an HBD having a heterostructure at the InGaAs / InP interface in consideration of the non-parabolicity of the band and the energy distribution of the electronic charge. In the structure of the HBD, the thickness of the undoped InP barrier layer 2 is 1000 A, and the carrier concentration of the n + -InP cathode layer 3 is 1 × 10 18 / cm 3 . The electron energy is the conduction band edge E C1 = 0 of the n + -InGaAs anode layer 1, and the position of the Fermi level (Ef) of the anode layer 1 is indicated by a broken line.

フェルミ準位(Ef)を変化させたときの、バリア層2の伝導帯端(EC2)を示し、バリア高さqφBをパラメータとして、
(A)Ef−EC1=140meV,qφB=100meV
(B)Ef−EC1=114meV,qφB=126meV
(C)Ef−EC1=88meV,qφB=152meV
の場合を示している。
The conduction band edge (E C2 ) of the barrier layer 2 when the Fermi level (Ef) is changed is shown, and the barrier height qφ B is used as a parameter.
(A) Ef−E C1 = 140 meV, qφ B = 100 meV
(B) Ef−E C1 = 114 meV, qφ B = 126 meV
(C) Ef−E C1 = 88 meV, qφ B = 152 meV
Shows the case.

バリア高さqφBが高い(C)の場合、InGaAs/InPヘテロ界面付近のInPバリアは、三角形形状のポテンシャル形状を成しているが、フェルミ準位を上昇させて、バリア高さqφBを縮小するにつれて(B)〜(A)、ヘテロ界面付近のバンド形状が平坦化される様子がわかる。このバンドの曲りは、アンドープのInPバリア層2中に広がって分布する電子のマイナス電荷によるものであり、バリア高さqφBが小さくなるほど、フェルミ準位よりも上にエネルギーが分布する電子の全電荷量が増えるので、平坦化の影響が強く出てくる。 When the barrier height qφ B is high (C), the InP barrier near the InGaAs / InP hetero interface has a triangular potential shape, but the Fermi level is raised to increase the barrier height qφ B. It can be seen that the band shape in the vicinity of the hetero interface is flattened as the size is reduced (B) to (A). This bending of the band is due to the negative charge of electrons spread and distributed in the undoped InP barrier layer 2, and as the barrier height qφ B decreases, all of the electrons whose energy is distributed above the Fermi level. Since the amount of charge increases, the influence of planarization is strong.

上述したように、第1の半導体層のドーピングレベルを調整することにより、フェルミ準位の位置を上下させて、へテロバリアのバリア高さを調整することができる。しかしながら、計算結果から明らかなように、フェルミ準位Efが上がるにつれて、バンド形状が上方に凸状になり、平坦な形状となる傾向が見られる。最適なバリア高さqφBは100meV程度、またはそれ以下の値であるので、従来のHBDでは、ヘテロ界面付近のバンド形状が平坦化してしまうという問題があった。 As described above, by adjusting the doping level of the first semiconductor layer, the position of the Fermi level can be raised and lowered to adjust the barrier height of the heterobarrier. However, as is clear from the calculation results, as the Fermi level Ef increases, the band shape tends to be convex upward and become flat. Since the optimum barrier height qφ B is about 100 meV or less, the conventional HBD has a problem that the band shape in the vicinity of the heterointerface is flattened.

InGaAs/InPヘテロ界面付近のInPバリアが平坦となる問題は、第1に、理想係数n値の劣化(=n値の増大)にある。電子に対する「実効的な」ポテンシャルのピーク位置xmはヘテロ界面にはない。これは、InGaAs/InP界面付近の電子に対して、イメージ力が働くことにより、
xm ∝ 界面付近の電界強度-1/2
に従って、界面からInP側に遠ざかることによる。バリア高さqφBが小さいほど電界強度は下がるので、xmは大きくなり、HBDのn値が増大してしまう。その結果、HBDのI−V特性の非線形性が弱くなり、検波性能が劣化してしまう。
The first problem that the InP barrier near the InGaAs / InP heterointerface becomes flat is the deterioration of the ideal coefficient n value (= n value increase). The peak position xm of the “effective” potential for electrons is not at the heterointerface. This is because the image power works on electrons near the InGaAs / InP interface.
xm 電 界 electric field strength near the interface -1/2
And away from the interface to the InP side. Since the electric field strength decreases as the barrier height qφ B decreases, xm increases and the n value of the HBD increases. As a result, the non-linearity of the IV characteristic of the HBD becomes weak, and the detection performance deteriorates.

第2に、InGaAs/InPヘテロ界面付近のバリア形状が平坦になると、ダイオード電流そのものが変調され、低下することである。これは、バリアの電界強度の低下に伴い、(2)式に示した界面付近の電子熱放出電流を支配するパラメータが、熱放出で律速される状態から、拡散で律速される状態に変化する傾向があることによる(例えば、非特許文献3)。電子輸送メカニズムが拡散律速の傾向になると、実効的なIS(Sj,T)が下がり、HBD電流そのものが低下して、微分抵抗値RDの増大と検波電流の減少をもたらす。微分抵抗値RDを下げるべくダイオード面積を増大させると、接合容量の増大が起こるので、周波数特性が劣化してしまう。 Second, when the barrier shape near the InGaAs / InP hetero interface becomes flat, the diode current itself is modulated and lowered. This is because, as the electric field strength of the barrier decreases, the parameter governing the electron heat emission current in the vicinity of the interface shown in Equation (2) changes from the state controlled by heat emission to the state controlled by diffusion. This is because there is a tendency (for example, Non-Patent Document 3). When the electron transport mechanism tends to be diffusion-controlled, the effective I S (S j , T) decreases, the HBD current itself decreases, and the differential resistance value R D increases and the detection current decreases. When the diode area is increased to reduce the differential resistance value R D , the junction capacitance increases, and therefore the frequency characteristics deteriorate.

本発明の目的は、THz周波数帯でゼロバイアス動作させるHBDにおいて、I−V特性の劣化を抑制することにより、良好な検波特性を確保することにある。   An object of the present invention is to ensure good detection characteristics by suppressing deterioration of IV characteristics in an HBD that performs zero bias operation in the THz frequency band.

本発明は、このような目的を達成するために、一実施態様は、高濃度のn形の第1の半導体層と、前記第1の半導体層と比較してより小さな電子親和力を有する第2の半導体層と、n形の第3の半導体層1とが順に積層され、前記第1の半導体層と前記第2の半導体層との界面の前記第2の半導体層側にヘテロバリアが形成され、前記第1の半導体層のドーピングレベルを調整することにより、前記へテロバリアのバリア高さが調整されており、前記第1の半導体層上にアノード電極が形成され、前記第3の半導体層上にカソード電極が形成された半導体積層構造を備え、前記第2の半導体層は、前記第1の半導体層と接するアンドープのバリア層と、前記第3の半導体層と接するn形のバリア層とを含むことを特徴とする。   In order to achieve the above object, according to one embodiment of the present invention, a high-concentration n-type first semiconductor layer and a second electron affinity smaller than that of the first semiconductor layer are provided. And the n-type third semiconductor layer 1 are sequentially stacked, and a heterobarrier is formed on the second semiconductor layer side of the interface between the first semiconductor layer and the second semiconductor layer, By adjusting the doping level of the first semiconductor layer, the barrier height of the heterobarrier is adjusted, an anode electrode is formed on the first semiconductor layer, and on the third semiconductor layer A semiconductor stacked structure in which a cathode electrode is formed, wherein the second semiconductor layer includes an undoped barrier layer in contact with the first semiconductor layer and an n-type barrier layer in contact with the third semiconductor layer. It is characterized by that.

従来の典型的なHBDにおける「電子のマイナス電荷によるバリア層のバンドの曲り」の問題を解決するため、本発明においては、適切なバリア形状を実現するための手段を提供する。すなわち、第2の半導体層の一部、カソード(第3の半導体層)側にn形のドーピング(ドナーの導入)を施した領域を設けることにより、へテロバリアのバンドプロファイルを改善することができ、THz周波数帯においてゼロバイアス動作させるHBDのI−V特性の劣化の問題を解決し、良好な検波特性を確保することができる。   In order to solve the problem of “bending of the barrier layer band due to the negative charge of electrons” in the conventional typical HBD, the present invention provides means for realizing an appropriate barrier shape. That is, by providing a part of the second semiconductor layer, a region where n-type doping (introduction of donor) is performed on the cathode (third semiconductor layer) side, the band profile of the heterobarrier can be improved. It is possible to solve the problem of deterioration of the IV characteristics of the HBD that is operated with zero bias in the THz frequency band, and to ensure good detection characteristics.

従来のHBDの構造を示す図である。It is a figure which shows the structure of the conventional HBD. 従来のHBDの伝導帯端のプロファイルの一例を示す図である。It is a figure which shows an example of the profile of the conduction band edge of the conventional HBD. 本発明の一実施形態にかかるHBDの構造を示す図である。It is a figure which shows the structure of HBD concerning one Embodiment of this invention. 本発明の一実施形態にかかるHBDの伝導帯端のプロファイルの第1の例を示す図である。It is a figure which shows the 1st example of the profile of the conduction band edge of HBD concerning one Embodiment of this invention. 本発明の一実施形態にかかるHBDの伝導帯端のプロファイルの第2の例を示す図である。It is a figure which shows the 2nd example of the profile of the conduction band edge of HBD concerning one Embodiment of this invention.

以下、図面を参照しながら本発明の実施形態について詳細に説明する。   Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

図3に、本発明の一実施形態にかかるHBDの構造を示す。高濃度のn+−InGaAsサブカソード層13B、高濃度のn+−InPカソード層13A(第3の半導体層)、n−InPバリア層12B、アンドープ(=低濃度)のInPバリア層12A(第2の半導体層)、高濃度のn+−InGaAsアノード層11(第1の半導体層)が順に積層され、サブカソード層13Bにカソード電極15が形成され、アノード層11にアノード電極14が形成されている。 FIG. 3 shows the structure of an HBD according to an embodiment of the present invention. High concentration n + -InGaAs sub-cathode layer 13B, high concentration n + -InP cathode layer 13A (third semiconductor layer), n-InP barrier layer 12B, undoped (= low concentration) InP barrier layer 12A (second concentration) Semiconductor layer), a high-concentration n + -InGaAs anode layer 11 (first semiconductor layer) are sequentially stacked, a cathode electrode 15 is formed on the sub-cathode layer 13B, and an anode electrode 14 is formed on the anode layer 11. Yes.

このHBDを製作するには、MO−VPE法もしくはMBE法により、半絶縁性InP基板上に、サブカソード層13Bからアノード層11まで順にエピタキシャル成長させ、その基板をメサエッチング加工する。その後、アノード電極14とカソード電極15とをパタニングして、オーミック接触を形成する。従来のHBTでは、InPバリア層をアンドープ(=低濃度)としていたのに対して、本実施形態では、InPバリア層の一部、カソード側にn形のドーピング(ドナーの導入)を施した領域を設ける。このn形のドーピング領域のドナー分布は、一様であってもよいし、カソード側に向かって増大する形状であっても良い。   In order to manufacture this HBD, the sub-cathode layer 13B to the anode layer 11 are sequentially epitaxially grown on the semi-insulating InP substrate by MO-VPE method or MBE method, and the substrate is subjected to mesa etching. Thereafter, the anode electrode 14 and the cathode electrode 15 are patterned to form ohmic contact. In the conventional HBT, the InP barrier layer is undoped (= low concentration). In the present embodiment, a part of the InP barrier layer, a region where n-type doping (introduction of donor) is performed on the cathode side. Is provided. The donor distribution in the n-type doping region may be uniform or may increase toward the cathode side.

本実施形態においては、上述したように、フェルミ準位よりも上にエネルギーが分布する「負の電子電荷」によるバンド形状の平坦化を抑制するために、「正のドナー電荷」によってバンドの曲りを補償する。より詳細には、エネルギーに依存する電子電荷量分布n(x)とドナー電荷量Nd(x)のバランスによって、バンドプロファイル(ポテンシャル変化)が一意に決まるので、InPバリア層のn+−InPカソード層13A側にドーピングを施したn−InPバリア層12Bを設けて、バンドプロファイルを調整する。この様な設計により、カソード側の伝導帯を下降させ、バンドプロファイルが直線的にカソード側に下降するようにし、InGaAs/InPヘテロ界面付近のInPバリアが三角形形状となるようにする。電子に対するポテンシャルのピーク位置xmは、界面付近の電界の上昇に伴ってn+−InGaAsアノード層に近づくので、n値の劣化が抑えられる。 In the present embodiment, as described above, in order to suppress the flattening of the band shape due to the “negative electron charge” in which energy is distributed above the Fermi level, the band bending due to the “positive donor charge” is suppressed. To compensate. More specifically, since the band profile (potential change) is uniquely determined by the balance between the energy-dependent electron charge distribution n (x) and the donor charge amount Nd (x), the n + -InP cathode of the InP barrier layer A band profile is adjusted by providing a doped n-InP barrier layer 12B on the layer 13A side. With such a design, the conduction band on the cathode side is lowered so that the band profile linearly descends on the cathode side, and the InP barrier near the InGaAs / InP heterointerface is triangular. Since the peak position xm of the potential with respect to the electrons approaches the n + -InGaAs anode layer as the electric field near the interface increases, deterioration of the n value can be suppressed.

このようにして、本実施形態によれば、従来のHBDにおける「電子電荷によるバンドの曲り」を補償して、「ヘテロ界面付近のバンド平坦化」の問題を改善することにより、良好なI−V特性を確保し、THz周波数帯における受信感度を改善することができる。   In this way, according to the present embodiment, by compensating for the “band bending due to electronic charges” in the conventional HBD and improving the problem of “flattening the band near the heterointerface”, a good I− The V characteristic can be ensured and the reception sensitivity in the THz frequency band can be improved.

図4に、本発明の一実施形態にかかるHBDの伝導帯端のプロファイルの第1の例を示す。フェルミ準位から測るバリア高さqφB=100meVとし、n+−InPカソード層13A側にドーピングを施したn−InPバリア層12Bを設ける。n−InPバリア層12Bについては、n+−InGaAsアノード層11とInPバリア層12Aとの界面付近のバリア層内のキャリア濃度と同程度の、一定濃度(ND)のドーピングを用い、ドーピング領域を最適な位置に配置した場合のバンドプロファイルの計算結果である。n−InPバリア層12Bの位置は、バリア高さqφBと、バリア層(12A、12B)の幅により調整されるが、InPバリア層のカソード側に1/2〜2/3程度の幅で配置することで良好なバンドプロファイルが得られる。この実施形態のHBDの構造の例においては、n+−InGaAsアノード層11のキャリア濃度を5×1018/cm3とし、n−InPバリア層12Bのカソード側には、幅700A、ND=1×1017/cm3でn形不純物を導入している。バリア高さqφB=100meVを考慮すると、界面付近のバリア層内のキャリア濃度は、n+−InGaAsアノード層11のキャリア濃度の概ね1/50と見積もることができ、これはn−InPバリア層12Bのドーピング濃度と同程度になっている。 FIG. 4 shows a first example of a conduction band edge profile of an HBD according to an embodiment of the present invention. The barrier height qφ B measured from the Fermi level is set to qφ B = 100 meV, and the doped n-InP barrier layer 12B is provided on the n + -InP cathode layer 13A side. For the n-InP barrier layer 12B, doping with a constant concentration (N D ) similar to the carrier concentration in the barrier layer near the interface between the n + -InGaAs anode layer 11 and the InP barrier layer 12A is used. It is the calculation result of the band profile when arrange | positioning in the optimal position. The position of the n-InP barrier layer 12B is adjusted by the barrier height qφB and the width of the barrier layers (12A, 12B), but is arranged with a width of about 1/2 to 2/3 on the cathode side of the InP barrier layer. By doing so, a good band profile can be obtained. In the example of the structure of the HBD of this embodiment, the carrier concentration of the n + -InGaAs anode layer 11 is 5 × 10 18 / cm 3, and the width of 700 A and N D = N is present on the cathode side of the n-InP barrier layer 12B. An n-type impurity is introduced at 1 × 10 17 / cm 3 . Considering the barrier height qφ B = 100 meV, the carrier concentration in the barrier layer near the interface can be estimated to be approximately 1/50 of the carrier concentration of the n + -InGaAs anode layer 11, which is the n-InP barrier layer. It is about the same as the doping concentration of 12B.

従来例における計算結果である図2のプロファイル(A)の場合(qφB=100meV)と比較すると、図4では、InGaAs/InPヘテロ界面付近のInPバリア部分が三角形の形状に回復している様子がわかる。界面における電界強度は7.1kV/cmと計算され、InPの移動度を4,000cm2/Vsと仮定すると、実効的拡散速度はvD=2.8×107cm/sと見積もることができる。一方、熱放出速度は、vth=1×107cm/s程度であり、vth<vDとなることから、HBDの電子輸送メカニズムが熱放出で律速される状態となることがわかる。従って、本実施形態によれば、従来のHBDにおける「電子電荷によるバンドの曲り」を補償して、「ヘテロ界面付近のバンド平坦化」の問題を改善することにより、良好なI−V特性を確保し、THz周波数帯における受信感度を改善することができる。 Compared with the profile (A) in FIG. 2 (qφ B = 100 meV), which is a calculation result in the conventional example, in FIG. 4, the InP barrier portion near the InGaAs / InP heterointerface is restored to a triangular shape. I understand. Assuming that the electric field strength at the interface is 7.1 kV / cm and the mobility of InP is 4,000 cm 2 / Vs, the effective diffusion rate can be estimated as v D = 2.8 × 10 7 cm / s. it can. On the other hand, the heat release rate is about v th = 1 × 10 7 cm / s and v th <v D , indicating that the electron transport mechanism of HBD is limited by heat release. Therefore, according to the present embodiment, by compensating for “band bending due to electronic charge” in the conventional HBD and improving the problem of “band flattening in the vicinity of the hetero interface”, good IV characteristics can be obtained. And the reception sensitivity in the THz frequency band can be improved.

図5に、本発明の一実施形態にかかるHBDの伝導帯端のプロファイルの第2の例を示す。n−InPバリア層12Bのドーピングをより適正に調整して配置した場合のバンドプロファイルの計算結果である。アンドープのInPバリア層12Aのカソード側には、n−InPバリア層12Bとして、幅800A、バリア層12Aからカソード層13Aに向けてND(x)=4×1016/cm3から4×1017/cm3まで指数関数的に濃度が増加するようにn形不純物を導入している。 FIG. 5 shows a second example of the conduction band edge profile of the HBD according to one embodiment of the present invention. It is a calculation result of the band profile when the doping of the n-InP barrier layer 12B is more appropriately adjusted and arranged. On the cathode side of the undoped InP barrier layer 12A, as an n-InP barrier layer 12B, a width 800A and N D (x) = 4 × 10 16 / cm 3 to 4 × 10 from the barrier layer 12A to the cathode layer 13A. An n-type impurity is introduced so that the concentration increases exponentially up to 17 / cm 3 .

図4に示したバンドプロファイルと比較して、InGaAs/InPヘテロ界面付近のInPバリア部分がより良好な三角形の形状になっていることがわかる。n−InPバリア層12Bにおける電子のエネルギー分布が指数関数的に変化しているので、上述した一定濃度のバリア層12よりも、良好なバンドプロファイルが得られる。このようにして、本実施形態によれば、従来のHBDにおける「電子電荷によるバンドの曲り」を補償して、「ヘテロ界面付近のバンド平坦化」の問題を改善することにより、良好なI−V特性を確保し、THz周波数帯における受信感度を改善することができる。   Compared with the band profile shown in FIG. 4, it can be seen that the InP barrier portion near the InGaAs / InP heterointerface has a better triangular shape. Since the energy distribution of electrons in the n-InP barrier layer 12B changes exponentially, a better band profile can be obtained than the barrier layer 12 having a constant concentration described above. In this way, according to the present embodiment, by compensating for the “band bending due to electronic charges” in the conventional HBD and improving the problem of “flattening the band near the heterointerface”, a good I− The V characteristic can be ensured and the reception sensitivity in the THz frequency band can be improved.

1,11 高濃度のn+−InGaAsアノード層
2,12A アンドープ(=低濃度)のInPバリア層
3,13A 高濃度のn+−InPカソード層
4,14 アノード電極
5,15 カソード電極
12B n−InPバリア層
13B 高濃度のn+−InGaAsサブカソード層
1,11 High concentration n + -InGaAs anode layer 2,12A Undoped (= low concentration) InP barrier layer 3,13A High concentration n + -InP cathode layer 4,14 Anode electrode 5,15 Cathode electrode 12B n- InP barrier layer 13B High concentration n + -InGaAs sub-cathode layer

Claims (5)

高濃度のn形の第1の半導体層と、
前記第1の半導体層と比較してより小さな電子親和力を有する第2の半導体層と、
n形の第3の半導体層1とが順に積層され、
前記第1の半導体層と前記第2の半導体層との界面の前記第2の半導体層側にヘテロバリアが形成され、前記第1の半導体層のドーピングレベルを調整することにより、前記へテロバリアのバリア高さが調整されており、
前記第1の半導体層上にアノード電極が形成され、前記第3の半導体層上にカソード電極が形成された半導体積層構造を備え、
前記第2の半導体層は、前記第1の半導体層と接するアンドープのバリア層と、前記第3の半導体層と接するn形のバリア層とを含むことを特徴とする検波ダイオード。
A high concentration n-type first semiconductor layer;
A second semiconductor layer having a smaller electron affinity compared to the first semiconductor layer;
The n-type third semiconductor layer 1 is sequentially stacked,
A hetero barrier is formed on the second semiconductor layer side of the interface between the first semiconductor layer and the second semiconductor layer, and the barrier of the hetero barrier is adjusted by adjusting the doping level of the first semiconductor layer. The height has been adjusted,
A semiconductor stacked structure in which an anode electrode is formed on the first semiconductor layer and a cathode electrode is formed on the third semiconductor layer;
The detection diode, wherein the second semiconductor layer includes an undoped barrier layer in contact with the first semiconductor layer and an n-type barrier layer in contact with the third semiconductor layer.
前記n形のバリア層は、一定の濃度のn形不純物が導入されていることを特徴とする請求項1に記載の検波ダイオード。   2. The detection diode according to claim 1, wherein the n-type barrier layer is doped with an n-type impurity having a constant concentration. 前記n形のバリア層は、前記アンドープのバリア層から前記第3の半導体層に向けて、n形不純物の濃度が指数関数的に増大するように導入されていることを特徴とする請求項1に記載の検波ダイオード。   2. The n-type barrier layer is introduced so that an n-type impurity concentration increases exponentially from the undoped barrier layer toward the third semiconductor layer. The detection diode according to 1. 前記第1の半導体層は、InGaAsからなり、前記第2の半導体層は、InPからなることを特徴とする請求項1、2または3に記載の検波ダイオード。   4. The detection diode according to claim 1, wherein the first semiconductor layer is made of InGaAs, and the second semiconductor layer is made of InP. 5. 高濃度のn形のInGaAsアノード層と、
前記アノード層と比較してより小さな電子親和力を有するInPバリア層と、
n形のInPカソード層とが順に積層され、
前記アノード層と前記バリア層との界面の前記バリア層側にヘテロバリアが形成され、
前記アノード層上にアノード電極が形成され、前記カソード層上にカソード電極が形成された半導体積層構造を備え、
前記バリア層は、前記アノード層と接するアンドープのInPバリア層と、前記カソード層と接するn形のInPバリア層とを含むことを特徴とする検波ダイオード。
A high concentration n-type InGaAs anode layer;
An InP barrier layer having a lower electron affinity compared to the anode layer;
An n-type InP cathode layer is sequentially laminated,
A heterobarrier is formed on the barrier layer side of the interface between the anode layer and the barrier layer,
An anode electrode is formed on the anode layer, and a semiconductor laminated structure in which a cathode electrode is formed on the cathode layer,
The detection diode, wherein the barrier layer includes an undoped InP barrier layer in contact with the anode layer and an n-type InP barrier layer in contact with the cathode layer.
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