JP2017134882A - Charged particle beam device and charge elimination method therefor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce an influence on an observation screen caused by electrification during observation or measurement.SOLUTION: Provided is a charged particle beam device including a wafer lift mechanism which executes the lifting movement for lifting a sample from an electrostatic chuck and the lowering movement for placing the lifted sample on the electrostatic chuck again at least once until the sample is unloaded out of a sample chamber from loaded into the chamber.SELECTED DRAWING: Figure 6A

Description

  The present invention relates to a charged particle beam apparatus used for measuring and inspecting a sample and a method for removing the charge.

  With the progress of miniaturization and three-dimensionalization of semiconductor devices in recent years, observation and measurement of deep holes and deep groove bottoms having a large aspect ratio are required. In addition, the importance of managing the superposition of patterns between different processes is increasing due to miniaturization. In observation of the bottom of such a deep hole or deep groove or inside the device, it is necessary to irradiate charged particles with a high acceleration voltage. Further, in the observation of the same structure, secondary electrons and reflected electrons output from the sample are reduced as compared with the surface observation. For this reason, a high irradiation current is required as compared with the conventional method.

  In addition, the observation surface of the semiconductor wafer is required to be flat. For this reason, electrostatic chucks are widely used in which a voltage is applied to a semiconductor wafer through a dielectric layer on the surface to generate an electrostatic force and the semiconductor wafer is held on the wafer holding surface by the electrostatic force. However, in the electrostatic check, the semiconductor wafer is not electrically connected to the outside. For this reason, there is a concern about the influence of the progress of global charging of the semiconductor wafer caused by the current irradiated for observation on the performance (for example, imaging quality). Further, when residual adsorption occurs due to charging, there arises a problem that the semiconductor wafer cannot be normally removed from the wafer holding surface.

  A technique for solving this problem is disclosed in Patent Document 1. The abstract of Patent Document 1 states that “One embodiment of the present invention relates to a method of releasing a semiconductor wafer that is in electrical contact with a surface of an electrostatic chuck by a trapping voltage. In this method, the trapping voltage is released. For a period after this release, the first region of the wafer is lifted from the surface of the electrostatic chuck by a first distance while the second region of the wafer is kept in close contact with the surface of the electrostatic chuck. The predetermined condition is monitored, and when the predetermined condition is satisfied, the second region is lifted from the surface of the electrostatic chuck.

  In addition to Patent Document 1, a method of discharging a semiconductor wafer by contacting a ground contact from the upper side of the semiconductor wafer, a protrusion of a contact pin inserted from the back surface of the semiconductor wafer, and electrically contacting the semiconductor wafer. There are known methods for static elimination.

Special table 2012-511831 gazette

  However, the method described in Patent Document 1 is intended to safely take out the semiconductor wafer after all the process processing is completed, and does not take account of charge removal during the processing of the semiconductor wafer. For this reason, the method of the cited document 1 cannot cope with the influence of the charging during the observation of the semiconductor wafer on the observation screen. In addition, the charge removal method using the contact pin cannot be discharged because it is not conductive depending on the type of the insulating film on the back surface. Further, if the contact pins are pressed against the semiconductor wafer with a strong force in order to ensure conduction, there is a problem of damaging the back surface of the semiconductor wafer.

  In order to solve the above-mentioned problems, the inventors adopt, for example, the configuration described in the claims. The present specification includes a plurality of means for solving the above-described problems. For example, “the sample is lifted from the electrostatic chuck between the time when the sample is loaded into the sample chamber and the time when the sample is unloaded. It is characterized by a charged particle beam apparatus that performs a set of an ascending operation and a descending operation for placing the lifted sample on the electrostatic chuck again.

  According to the present invention, it is possible to eliminate static electricity without destroying a sample even during inspection or measurement of the sample, and it is possible to always realize stable inspection, measurement, and the like by preventing deterioration in image quality due to charging. Problems, configurations, and effects other than those described above will become apparent from the following description of embodiments.

1 is a diagram illustrating a schematic configuration of a charged particle beam apparatus according to Embodiment 1. FIG. FIG. 3 is a diagram showing a schematic cross-sectional configuration of a sample holding mechanism in Embodiment 1. FIG. 2 is a diagram showing a schematic top configuration of a sample holding mechanism in Embodiment 1. FIG. 3 is a diagram illustrating the trajectory of secondary electrons according to the first embodiment. The figure explaining the relationship between a wafer surface potential and the brightness of a secondary electron image. The figure explaining the conduction | electrical_connection confirmation method. The figure explaining the relationship between the offset electric potential of an electrostatic chuck, and the brightness of a secondary electron image. The figure explaining the relationship between wafer observation time and a wafer charge amount. 5 is a flowchart illustrating a recipe execution process in the first embodiment. The flowchart which shows a continuity confirmation process. The flowchart which shows a static elimination process. The figure which shows the example of the setting screen (GUI) of a static elimination function. FIG. 3 is a diagram illustrating a schematic configuration of a charged particle beam apparatus according to a second embodiment. FIG. 5 is a diagram showing a schematic cross-sectional configuration of a sample holding mechanism in Embodiment 2. FIG. 6 is a diagram for explaining a trajectory of secondary electrons according to the second embodiment. The figure explaining the relationship between secondary electron energy and the number of secondary electrons generated. The figure explaining the relationship between the intensity | strength of an energy filter, and the brightness of a secondary electron image. 10 is a flowchart showing a recipe execution process in Embodiment 2. The flowchart which shows an electrification measurement process. FIG. 10 is a diagram for explaining a wafer surface potential correction operation in the second embodiment. FIG. 6 is a diagram illustrating a schematic configuration of a charged particle beam apparatus according to a third embodiment. 10 is a flowchart illustrating a recipe execution process according to the third embodiment.

  Hereinafter, a scanning electron microscope will be described as an example of a charged particle beam apparatus. However, the scanning electron microscope is merely an example of the present invention, and the present invention is not limited to the embodiments described below. In the present invention, the charged particle beam apparatus widely includes an apparatus that captures an image of a sample using a charged particle beam. As an example of the charged particle beam apparatus, an inspection apparatus using a scanning electron microscope, a review apparatus, and a pattern measurement apparatus can be given. Further, the present invention can be applied to a sample observation apparatus using various ions, a sample processing apparatus using a charged particle beam, and a sample analysis apparatus. In the following description, the charged particle beam device includes a system in which the above charged particle beam devices are connected by a network and a composite device of the above charged particle beam devices. In the following, a case where a semiconductor wafer on which a pattern is formed (hereinafter referred to as “wafer”) is used as a sample will be described. However, the sample in the present invention is not limited to a semiconductor wafer.

[Example 1]
[Device configuration]
FIG. 1 shows a schematic configuration example of a scanning electron microscope. The microscope main body includes a column 1 and a sample chamber 2 which are electron optical systems. The column 1 includes an electron gun 3, a condenser lens 4, an objective lens 5, a deflector 6, a secondary electron detector 7, an E × B filter 8, and a reflected electron detector 9. The primary electron beam (irradiated electrons) generated from the electron gun 3 is converged by the condenser lens 4 and the objective lens 5 and irradiates the wafer 10 placed on the electrostatic chuck 11. The primary electron beam is deflected by the deflector 6 and scans along the surface of the wafer 10. The deflection of the primary electron beam by the deflector 6 is controlled in accordance with a signal given from the beam scanning controller 16.

  Secondary electrons generated from the wafer 10 by the irradiation of the primary electron beam are directed toward the secondary electron detector 7 by the E × B filter 8 and detected by the secondary electron detector 7. The reflected electrons from the wafer 10 are detected by the reflected electron detector 9. The configuration of the optical system is not limited to the above-described configuration, and may include, for example, other lenses, electrodes, and detectors, or a part of the configuration may be different from the above configuration.

  The XY stage 12 installed in the sample chamber 2 moves the position of the wafer 10 relative to the column 1 within the XY plane (within a horizontal plane) according to a control signal given from the stage controller 17. On the XY stage 12, a standard sample 13 for beam calibration is attached. The scanning electron microscope has an optical microscope 14 for wafer alignment. Detection signals output from the secondary electron detector 7 and the backscattered electron detector 9 are sent to the image processing board 18 and imaged. The wafer 10 is loaded into the sample chamber 2 through the load lock chamber 15. The load lock chamber 15 is kept in a vacuum state like the column 1 and the sample chamber 2. In this specification, the loading of the wafer 10 from the external space at atmospheric pressure to the sample chamber 2 in the vacuum state is called loading, and on the contrary, the unloading of the wafer 10 from the sample chamber 2 to the external space at atmospheric pressure is unloaded. Call it. The operation of the entire microscope is controlled by the computer 19.

  2A and 2B show a schematic configuration of a sample holding mechanism including the electrostatic chuck 11. As described above, the wafer 10 is held on the upper surface of the electrostatic chuck 11. A positive electrode 33 and a negative electrode 34 are embedded in the electrostatic chuck 11, and a positive potential Vp is applied to the positive electrode 33 and a negative potential Vn is applied to the negative electrode 34 during electrostatic chucking. An electrostatic force is generated by applying both potentials, and the wafer 10 is attracted and held on the electrostatic chuck 11 by the generated electrostatic force. It should be noted that no potential is applied to the positive electrode 33 and the negative electrode 34 during periods other than the electrostatic chuck (for example, during loading or unloading). Further, the electrostatic chuck 11 of the present embodiment has a structure capable of applying a retarding voltage Vr. The symbols indicating the power supplies in the figure indicate that the applied voltage can be varied.

  The electrostatic chuck 11 is provided with one hole that accommodates a conductive contact mechanism 35 and reaches the surface from the back surface of the electrostatic chuck 11. The contact mechanism 35 includes a contact pin made of a conductive material and a spring mechanism (not shown). The tip of the contact pin is hemispherical or conical. The contact pins are pressed against the back surface of the wafer 10 with a weak force by a spring mechanism so as to always contact the wafer 10 placed on the electrostatic chuck 11. The contact by the push-up force ensures conduction between the tip of the contact pin and the back surface of the wafer 10. However, if this pushing force is too strong, the back surface of the wafer 10 will be damaged. Further, as described above, in the case where an insulating film is formed on the back surface of the wafer 10, conduction cannot be ensured between the back surface of the wafer 10 by contact with the contact pins. If continuity cannot be ensured, the wafer 10 is charged during irradiation with the primary electron beam. Therefore, the scanning electron microscope of this embodiment has a charge eliminating function other than the contact mechanism 35. The static elimination function will be described later.

The following electrical relationship is established between each electrode and the wafer 10. Here, the capacitance of the capacitor formed by the positive electrode 33 and the wafer 10 is Cp, the capacitance of the capacitor formed by the negative electrode 34 and the wafer 10 is Cn, and the surface potential of the wafer 10 is V. Even if there is no conduction between the wafer 10 and the contact mechanism 35, when the wafer 10 is not charged, the charges stored in the two capacitors are equal, and therefore, the following relational expression holds. Note that the offset voltage ΔV is zero.
Cp * {(Vp + Vr) −V} = Cn * {V− (Vr + Vn)} (1)
In a strict sense, the influence of other stray capacitances can be considered, but they are sufficiently smaller than Cn and Cp, and can be omitted in the calculation formula.

When formula (1) is developed with respect to the surface potential V of the wafer 10, the following formula is obtained.
V = {Cp * (Vp + Vr) + Cn * (Vr + Vn)) / (Cp + Cn) (2)
In the electrostatic chuck 11, assuming that Cp = Cn, the following relational expression is established.
V = (Vp + Vn) / 2 + Vr Equation (3)

  The lift mechanism is used to temporarily lift the wafer 10 from the mounting surface of the electrostatic chuck 11 when the wafer 10 is loaded, unloaded, or during static elimination such as during observation proposed in the present embodiment. In this embodiment, the lift mechanism is composed of three lift pins 36a to 36c and a drive mechanism 37 (for example, a motor). The three lift pins 36 a to 36 c are arranged at equal angles in the circumferential direction of the electrostatic chuck 11. In the example of FIG. 2B, they are arranged 120 degrees apart. With this arrangement, the wafer 10 is held by lift pins 36a to 36c at three positions on the back surface side at positions lifted from the surface of the electrostatic chuck 11. The electrostatic chuck 11 is formed with three holes for accommodating the three lift pins 36a to 36c. Each hole reaches the surface from the back surface of the electrostatic chuck 11.

  The tip portions (contact surfaces with the wafer 10) of the lift pins 36a to 36c are substantially flat, and at least the tip portions are formed of an elastic conductor. This conductor is always connected to ground potential. But the whole lift pins 36a-c do not need to be a conductor. Further, the tip portions of the lift pins 36a to 36c (contact surfaces with the wafer 10) need not be entirely conductive. The structure of the lift pins may be different from that described in the present embodiment as long as the tip of the lift pins that are in contact with the wafer is an elastic conductor and connected to the ground. For example, a doughnut-shaped elastic conductor may be disposed at the tip portions (contact surfaces with the wafer 10) of the lift pins 36a to 36c. Here, the conductor having elasticity is, for example, conductive rubber. By having elasticity, it is considered important that the contact surface of the conductive elastic body is deformed when it comes into contact with the wafer and the contact area is increased. The inventors attach an elastic conductor having a donut shape having an outer diameter (diameter) of 8 mm and a conductor width of 2 mm to the tip of the lift pins 36a to 36c, and the thickness of the oxide film on the back surface of the wafer 10 is 500 nm. In the case of, it was confirmed that there was a static elimination effect. The drive mechanism 37 operates to lift the tip portions of the lift pins 36a to 36c upward by about 3 mm from the mounting surface of the electrostatic chuck 11 at least during static elimination. It should be noted that when the tip portions of the lift pins 36 a to c push up the electrostatic chuck 11, the force that contacts the back surface of the electrostatic chuck 11 is greater than the force that the contact pin 35 contacts the back surface of the electrostatic chuck 11.

[Relationship between wafer surface potential and brightness of secondary electron image]
FIG. 3A shows the trajectory of the secondary electrons 44 generated in the vicinity of the surface of the wafer 10 by the irradiation of the primary electron beam. The secondary electrons 44 are detected as secondary electron signals by the secondary electron detector 7 in the objective lens 5. When the wafer 10 has a positive potential with respect to the objective lens 5, the secondary electrons 45 generated near the surface of the wafer 10 are pulled back to the wafer 10 by an electric field and are not detected by the secondary electron detector 7. . FIG. 3B shows the brightness (vertical axis) of the secondary electron image formed by arranging the secondary electron signal in accordance with the scanning position of the primary electron beam, and the surface potential (horizontal axis) of the wafer 10. Showing the relationship. A curve 46 represents a relationship in which the brightness of the secondary electron image starts to gradually decrease when the surface potential V of the wafer 10 becomes positive, and becomes almost zero when it exceeds a certain potential.

[Confirmation method of continuity]
Next, a method for confirming the presence / absence of conduction proposed in this embodiment will be described with reference to FIG. This method for confirming the presence or absence of conduction is a method for confirming whether or not the contact mechanism 35 and the wafer 10 are in a conduction state. When conduction is confirmed, the surface potential V of the wafer 10 is always kept at a constant retarding voltage Vr (<0), so the wafer 10 is not charged and the charge removal process is executed. It is unnecessary. This confirmation method of the presence / absence of conduction is used to determine whether or not it is necessary to execute a charge removal process. The horizontal axis of FIG. 4 is a potential corresponding to the surface potential V shown by the equation (3), and the vertical axis is the brightness of the secondary electron image. In this embodiment, the retarding voltage Vr is set to a fixed potential, and an offset potential ΔV is added to Vp and Vn. That is, Vp + ΔV is applied to the positive electrode 33 and Vn + ΔV is applied to the negative electrode 34. Substituting these potentials with the offset potential ΔV into Vp and Vn in Equation (3) yields the following equation.
V = (Vp + Vn) / 2 + Vr + ΔV Equation (4)
Here, when Vp = −Vn and Vr = 0V, the surface potential V of the wafer 10 becomes an offset potential ΔV. Therefore, the horizontal axis of FIG. 4 indicates the offset potential of the electrostatic chuck 11.

  Here, when there is no continuity between the wafer 10 and the contact mechanism 35 (when the back surface of the wafer 10 is an insulating film), the brightness of the secondary electron image is a negative potential as shown by the curve 51 where the offset potential ΔV is a negative potential. When the offset potential ΔV increases beyond a certain potential, the brightness of the secondary electron image becomes almost zero. The shape of the curve 51 is the same as the curve 46 shown in FIG. 3B. On the other hand, when conduction is ensured between the wafer 10 and the contact mechanism 35, the surface potential V of the wafer 10 is always equal to the retarding voltage Vr. Here, since Vr is a negative potential, the brightness of the secondary electron image is always the same brightness without depending on the offset potential ΔV, as indicated by a straight line 52 (indicated by a dotted line).

  As can be seen from FIG. 4, in the state where a positive potential is applied as the offset potential ΔV of the electrostatic chuck, the brightness of the secondary electron image varies greatly depending on the presence or absence of conduction between the wafer 10 and the contact mechanism 35. In this embodiment, paying attention to the difference in brightness, the ratio between the brightness of the secondary electron image when the offset potential ΔV is 0 V and the brightness of the secondary electron image when +10 V is applied to the offset potential ΔV is used. Based on this, the presence / absence of conduction between the wafer 10 and the contact mechanism 35 is determined. The determination process based on the brightness ratio of the secondary electron image is executed by the computer 19 based on a predetermined program.

[Charging and charging correction]
Next, referring to FIGS. 5A and 5B, the state of charge correction according to the present embodiment will be described. A curve 53 (solid line) in FIG. 5A is a brightness characteristic of the secondary electron image with respect to the offset potential ΔV of the electrostatic chuck when the wafer 10 is not charged. When the wafer 10 is observed with a high acceleration voltage of 3 kV or more, the irradiated electrons reach the inside of the wafer, and the ratio of the amount of secondary electrons to the amount of irradiated electrons is as small as 0.2 or less. For this reason, the wafer 10 is negatively charged by the electrons accumulated inside the wafer. If the charge amount accumulated on the wafer 10 is Q, the following relationship is established.
Cp * {(Vp + Vr) −V} + Q = Cn * {V− (Vr + Vn)} (5)

When formula (5) is expanded for V, the following formula is obtained.
V = {Cp * (Vp + Vr) + Cn * (Vr + Vn)) / (Cp + Cn) + Q / (Cp + Cn) (6)
From the equation (6), it can be seen that the surface potential V of the wafer 10 is shifted by V ₀ = Q / (Cp + Cn) depending on the charge amount Q accumulated in the wafer 10. Here, a curve 54 (dotted line) indicates the brightness characteristic of the secondary electron image with respect to the electrostatic chuck potential when the wafer 10 is negatively charged by V ₀ . Since the wafer 10 is negatively charged, the range in which the secondary electron image appears bright is shifted to the range where the offset potential ΔV is positive.

  By the way, if the shift potential after irradiating the wafer 10 with the primary electron beam for a predetermined time is measured in advance, information on the charging speed of the wafer 10 with respect to the irradiation conditions (acceleration voltage, probe current, etc.) of the primary electron beam can be acquired. it can. FIG. 5B shows the relationship between the wafer observation time and the wafer charge amount. The horizontal axis represents the wafer observation time, and the vertical axis represents the wafer charge amount. When the recipe does not include the charge removal process as in the conventional method, the wafer charge amount increases in proportion to the wafer observation time as shown by the straight line 55 (dotted line). For this reason, if the wafer observation time becomes long, the wafer charge amount exceeds the allowable value for obtaining the required accuracy. In order to keep the wafer charge amount below the allowable value within the operation time determined by the recipe, a periodic charge removal operation is necessary. When a periodic charge removal operation is performed, the time change of the wafer charge amount becomes a continuous line 56 (solid line) indicated by a sawtooth pattern. The pattern represented by the continuous line 56 is the effect of the charge removal process proposed in this embodiment.

[Recipe processing of embodiment]
FIG. 6A shows a processing procedure of the recipe processing (step 61) proposed in the present embodiment. The recipe processing is executed by the computer 19 by reading a recipe (a program in which settings for specifying measurement conditions and inspection conditions, parameters, various commands, and the like are registered) from a storage area (not shown).

  First, the computer 19 loads the wafer 10 to be observed into the sample chamber 2 (step 62), and starts measuring the wafer observation time T when the loading is completed (step 63). Next, the computer 19 performs continuity confirmation for determining whether or not a static elimination operation is necessary (step 64). Details of the conduction process will be described later. When an insulating film is formed on the back surface of the wafer 10, conduction by the contact mechanism 35 is not ensured.

  Next, the computer 19 performs wafer alignment using an optical microscope image and an SEM (Scanning Electron Microscope) image (step 65). The alignment is a process of associating the wafer coordinate system with the coordinate system of the apparatus with reference to a pre-registered pattern position. After the alignment is completed, the computer 19 moves to the first designated point set in the recipe and takes a secondary electron image (step 66). After completion of imaging, the computer 19 determines whether or not imaging for all designated points set in the recipe has been completed (step 67). If imaging has been completed for all designated points, the wafer 10 is removed. Unloading is performed (step 75), and the recipe is terminated (step 76).

On the other hand, if there are still points to be imaged, the computer 19 determines the presence / absence of continuity (in other words, the necessity of charge removal) based on the determination result in the continuity confirmation step (step 64) (step 68). If continuity is ensured (in the case of OK), there is no need for static elimination, so the computer 19 returns to the process of step 66 and continues imaging all the remaining designated points. On the other hand, if the continuity is not ensured (for NG), the computer 19 determines whether the wafer observation time T exceeds the predetermined value T ₀ (step 69). Here, the specified value T ₀ is a threshold value that gives a static elimination cycle. Because if not exceeded the prescribed value T ₀ is capable of measuring within the allowable range, the computer 19 returns to step 66. On the other hand, if the specified value T ₀ is exceeded, the computer 19 executes a static elimination process (step 70). Details of the charge removal process will be described later.

  After the charge removal process, the computer 19 resets the wafer observation time T to zero (step 71) and executes realignment of the wafer 10 (step 72). Thereafter, the computer 19 compares the realignment result with the alignment result in step 65, and determines whether or not the positional deviation of the wafer 10 exceeds a specified value (step 73). This is because, in the charge removal process, the wafer 10 is moved up and down several millimeters with respect to the wafer placement surface by the lift pins 36a to 36c, so that there is a possibility that the wafer 10 may be displaced when it is placed again on the wafer placement surface. If there is a deviation amount exceeding the specified value, the computer 19 once unloads the wafer 10 into the atmosphere, reloads it onto the stage of the electrostatic chuck 11 (step 74), and executes the alignment of step 72 again. To do. If the amount of deviation in step 73 is less than or equal to the specified value, the computer 19 returns to the processing in step 66.

  The detailed operation of the continuity check executed in step 64 will be described with reference to FIG. 6B. First, the computer 19 adjusts the gain of the detection system circuit so that the brightness of the secondary electron image acquired with the offset potential ΔV set to 0 V is appropriate (step 64a), and the first image Is acquired (step 64b). Next, the computer 19 changes the balance (offset potential ΔV) of the electrostatic chuck 11 so that the wafer surface potential becomes +10 V (step 64c), and acquires the second image without changing the gain of the detection system. (Step 64d). Thereafter, the computer 19 compares the brightness of the two images, and determines that the continuity is NG if the average brightness of the second image is 50% or less of the average brightness of the first image. If it is greater than 50%, it is determined that conduction is OK (step 64e). Of course, this determination method is an example.

  The detailed operation of the charge removal process executed in step 70 will be described with reference to FIG. 6C. First, the computer 19 controls the voltage application to the electrostatic chuck 11 to be turned off (step 70a). As a result, no electrostatic force is generated between the electrostatic chuck 11 and the wafer 10. Next, the computer 19 lifts up the wafer 10 by 3 mm from the surface of the electrostatic chuck 11 using the lift pins 36a to 36c (step 70b). This operation is merely a lift-up operation and does not involve the discharge of atmospheric pressure to the external space as in the case of unloading. In this lift-up, an elastic conductor connected to the ground potential supports (contacts) the back surface (insulating film) of the wafer 10. Incidentally, the inventors experimented that the insulating film formed on the back surface of the wafer 10 can be neutralized when an O-ring having a diameter of about 8 mm and a width of 2 mm is used at the tip of each lift pin with respect to an oxide film having a thickness of 500 nm. It is confirmed by.

  After the lift-up, the computer 19 lifts down the wafer 10 and places it again on the surface of the electrostatic chuck 11 (step 70c). Subsequently, the computer 19 applies a voltage (a positive potential Vp to the static electrode 33 and a negative potential Vn to the negative electrode 34) to the electrostatic chuck 11 (step 70d). As a result, the wafer 10 is again attracted to the surface of the electrostatic chuck 11.

[Charging function setting screen]
FIG. 7 shows an example of a static elimination function setting screen mounted on the scanning electron microscope according to the embodiment. The GUI (Graphical User Interface) 81 has a map display area 82, an image display area 83, an image acquisition position display area 84, and a wafer charge removal setting area 85. In the map display area 82, either a wafer map or a chip map is selectively displayed. The map is switched by selecting the wafer map selection button 82a and the chip map selection button 82b. For selection input, for example, a mouse (not shown) is used. In the image display area 83, either an optical microscope image or an SEM image is selectively displayed. The image is switched by a selection operation of the optical microscope image selection button 83a and the SEM image selection button 83b. The display magnification of the image display area 83 can be changed by a magnification change button 83c. Further, image acquisition can be instructed by operating the image acquisition button 83d. The image acquisition condition is set after the image condition setting window is launched by operating the image condition setting button 83e.

  The image acquisition position is designated by the in-chip coordinates and the image acquisition chip. First, a procedure for registering image acquisition coordinates in the chip will be described. The chip map is displayed in the map display area 82 by the chip map selection button 82b. In this state, when the pointer is moved to an arbitrary position on the chip map and the mouse is clicked, an image of the clicked place is acquired. When an image is clicked in the image display area, the location is registered as an image acquisition coordinate, and an image acquisition position corresponding to the image acquisition position display area 84 is added. Here, as an initial state, only the origin chip (0, 0) is selected as the image acquisition chip. When changing the image acquisition chip, the wafer map is selected on the wafer map while the wafer map is displayed by the wafer map selection button 82a.

The wafer neutralization function under observation is enabled by checking the check box 85a in the wafer neutralization setting area 85. Further, the interval for executing the wafer neutralization (specified value T ₀ used in step 69) can be changed by inputting a numerical value in units of minutes in the static elimination interval setting box 85b.

[Summary]
As described above, the following technical effects are realized in the scanning electron microscope shown in the present embodiment.
(1) Even when conduction between the wafer 10 and the contact mechanism 35 cannot be ensured because an insulating film is formed on the back surface of the wafer 10, during the execution of observation, measurement, etc. of the wafer 10 based on the recipe, The wafer 10 can be periodically discharged (step 70). Thereby, the quality degradation of the imaged image can be improved. In addition, since this static elimination can be realized only by periodically performing lift-up (lifting operation) and lift-down (lowering operation) of the wafer 10 by the lift pins 36a to 36c without unloading, it is possible to achieve efficient and inexpensive static elimination. Can provide technology. Note that at least tip portions (contact surfaces with the wafer 10) of the lift pins 36a to 36c are flat, and an elastic conductor connected to the ground potential is attached. If continuity between the wafer 10 and the contact mechanism 35 is confirmed (NO in step 68), there is no need for periodic neutralization, and therefore no unnecessary neutralization operation is performed.

(2) This embodiment has a function of automatically performing static elimination for each specified value T ₀ registered based on the relationship between the wafer observation time measured in advance and the wafer charge amount (step 69). Thus, it is possible to execute an efficient charge removal process without reducing the throughput as much as possible. As described above, in this embodiment, the wafer 10 is lifted and lifted a plurality of times from the loading to the unloading of the wafer 10. However, since the static elimination process is performed at a necessary timing, the throughput decreases. Is minimal.
(3) In this embodiment, the user can specify whether or not to perform charge removal and the time interval at the time of execution using the setting screen shown in FIG. In this setting, the user can set the static elimination timing based on the brightness of the secondary electron image displayed in the image display area 83.

(4) In this embodiment, as shown in FIG. 5B, the relationship between the wafer observation time and the wafer charge amount is measured in advance, but the voltage applied to the electrostatic chuck 11 is changed to measure a plurality of the relationships. In addition, based on the brightness of a plurality of images acquired for the plurality of conditions, it is possible to determine the neutralization timing efficiently by determining the execution interval of the neutralization process suitable for the operation condition by calculation. Become.

[Example 2]
[Device configuration]
FIG. 8 shows a schematic configuration example of a scanning electron microscope according to the second embodiment. In FIG. 8, parts corresponding to those in FIG. The only difference between the configuration shown in FIG. 8 and the configuration shown in FIG. 1 is that an energy filter 20 is added to the column 1. Other configurations are basically the same as those of the first embodiment. The energy filter 20 is disposed on the passage path of secondary electrons between the E × B filter 8 and the reflected electron detector 9. Further, in the case of the present embodiment, it is assumed that the contact mechanism 35 is not provided on the electrostatic chuck 11.

FIG. 9 shows a schematic configuration of the sample holding mechanism used in this embodiment. As described above, the sample holding mechanism of this embodiment is not provided with the contact function 35. For this reason, it is necessary to always remove the charge during the execution of the recipe regardless of whether or not the insulating layer is formed on the back surface of the wafer 10. Other configurations of the sample holding mechanism are the same as those of the sample holding mechanism (FIG. 2) of the first embodiment. In the present embodiment, a positive potential Vp (= 500 V) is applied to the positive electrode 33, and a negative potential Vn (= −500 V) is applied to the negative electrode 34. Further, −1000 V is applied as the retarding voltage Vr. At this time, the surface potential V of the wafer 10 is given by the following equation.
V = (Vp + Vn) / 2 + Vr (7)
For this reason, the surface potential V of the wafer 10 is −1000V. In the case of this embodiment, the extraction voltage from the electron gun 3 is set to 11 kV, and electrons are irradiated to the wafer 10 having a surface potential V of −1000 V at 10 kV.

[Charging and charging correction]
The relationship between the energy filter and the brightness of the secondary electron image will be described with reference to FIGS. As shown in FIG. 10A, secondary electrons generated in the vicinity of the surface of the wafer 10 by the primary electron beam are detected by the secondary electron detector 7 as a detection signal. The energy filter 20 has a characteristic that the secondary electrons 95 with high energy are allowed to pass through and the secondary electrons 96 with low energy are returned to the wafer 10 side.

  FIG. 10B is a graph in which the vertical axis represents the number of secondary electrons and the horizontal axis represents the secondary electron energy. A curve 101 indicates the energy distribution of secondary electrons when the wafer 10 is not charged. When the wafer 10 is negatively charged, the secondary electrons are further accelerated upward by the electric field, so that the energy distribution of the secondary electrons is shifted to the high energy side as indicated by the curve 102. That is, the shift amount is proportional to the charge amount of the wafer 10.

FIG. 10C is a graph in which the vertical axis indicates the brightness of the secondary electron image and the horizontal axis indicates the intensity of the energy filter 20, and the curves 103 and 104 indicate the characteristics of the brightness of the secondary electron image with respect to the energy filter intensity. ing. The right side of the horizontal axis indicates that the absolute value of the negative potential applied to the energy filter 20 is large. A curve 103 is a characteristic of the brightness of the secondary electron image with respect to the strength of the energy filter 20 when the wafer 10 is not charged. As shown by the curve 103, when the strength of the energy filter 20 is increased (the negative potential to be applied is increased), the secondary electron image becomes darker from the point in time, and the potential of the energy filter 20 is −V ₀ [V]. The brightness of the image decreases to ½ of the brightness when the intensity of the energy filter 20 is 0V. A curve 104 is a characteristic when the wafer 10 is negatively charged. In the curve 104, the characteristic is shifted to the right by the charged potential. For this reason, the brightness when the potential of the energy filter 20 is −V ₁ [V] decreases to ½ of the brightness when the intensity of the energy filter 20 is 0V. Here, the charge amount of the wafer 10 can be obtained by the following equation.
ΔV = V ₀ −V ₁ Formula (8)

[Recipe processing of embodiment]
FIG. 11A shows the processing procedure of the recipe processing (step 101) proposed in this embodiment. The recipe process is executed by the computer 19 by reading a recipe (a program in which measurement conditions and inspection conditions are registered) from a storage area (not shown).

  First, the computer 19 loads the wafer 10 to be observed into the sample chamber 2 (step 102). In this embodiment, the computer 19 executes wafer alignment using the optical microscope image and the SEM image after the loading is completed (step 103). This is because in this embodiment, since the sample holding mechanism does not have the contact mechanism 35, it is not necessary to confirm conduction.

Next, the computer 19 moves to the first designated point set in the recipe (step 104). Subsequently, the computer 19 determines whether or not the designated point of the movement destination is the first point (step 105). In the case of the first point, the computer 10 measures the initial charge amount of the wafer 10 (step 106) and registers the measured value as an energy filter reference value (step 107). Details of the measurement process will be described later. Further, the energy filter reference value is an energy filter intensity at which the secondary electron intensity becomes ½, and corresponds to −V ₀ [V] in FIG. 10C.

  If the designated point of the movement destination is not the first point, the computer 19 determines whether or not it is a charging measurement point (step 108). The charging measurement point is set in advance in the recipe. For example, when the charging measurement is set to be performed every 10 points, the computer 19 determines whether the designated point for imaging is the 10th point, the 20th point, the 30th point, or the like. Do. If it is determined that the measurement point is a charge measurement point, the computer 19 performs charge measurement (step 109). Details of the charge measurement will be described later. Thereafter, the computer 19 determines whether or not the measured charge amount is greater than or equal to a threshold value (step 110). In this embodiment, the charging threshold is 50V. Of course, the threshold value is not limited to this value.

  When the measured charge amount is equal to or larger than the threshold value, the computer 19 drives and controls the lift pins 36a to 36c to lift up the wafer 10 from the mounting surface of the electrostatic chuck 11, and then lift down the wafer 10 to lift it up. Is removed (step 111). As described in the first embodiment, the static elimination operation does not include an unload operation. After completion of static elimination, the computer 19 instructs execution of alignment (step 112). On the other hand, if the charge is less than the threshold value, the computer 19 executes charge correction using the retarding voltage Vr (step 113). For example, if the charging of the wafer 10 is −20V, the retarding potential Vr is changed by + 20V, the potential on the surface of the electrostatic chuck 11 is changed to −980V, and the surface potential V of the wafer 10 is returned to −1000V. The corrected surface potential V is the potential at the start of measurement. In the case of the charge removal process in step 111, the retarding potential Vr is automatically changed to the initial value.

  When the processing necessary for the charge correction is completed, the computer 19 captures a secondary electron image of the designated point (step 114). Thereafter, the computer 19 determines whether or not imaging has been completed for all designated points specified in the recipe (step 115). If the designated points remain, the computer 19 moves to step 104 and becomes the next designated point. Move the imaging area. On the other hand, if all the imaging points specified by the recipe have been completed, the computer 19 unloads the wafer 10 from the sample chamber 2 (step 116) and ends the recipe (step 117).

  FIG. 11B explains the detailed operation of the charge measurement executed in steps 106 and 109. First, the computer 19 sets the energy filter to 0 V (step 106a) and adjusts the brightness of the image (step 106b). Thereafter, the computer 19 acquires a secondary electron image (106c) and measures the average brightness of the secondary electron image (step 106d). Next, the computer 19 determines whether or not the energy filter setting value is the final stage of the variable range (step 106e). If not, the computer 19 changes the setting of the energy filter 20 to the next setting value. After that (step 106f), the process returns to step 106c to acquire a secondary electron image for the next set value. This operation is repeated until a positive result is obtained in step 106e. By this iterative process, energy filter strength and brightness characteristic data of the secondary electron image as shown in FIG. 10C are acquired.

  When a positive result is obtained in step 106e (when the brightness measurement of the secondary electron image is completed for all energy filter intensities), the computer 19 calculates the surface potential V of the wafer 10 from the acquired characteristic data. (Step 106g). In the case of the present embodiment, the surface potential V of the wafer 10 is obtained as an energy filter intensity at which the brightness of the secondary electron image is 50% of the initial value (the brightness of the secondary electron image at the energy filter 0V). Of course, the method of obtaining the surface potential V of the wafer 10 is not limited to this method, and may be calculated as, for example, the energy filter strength at a certain brightness other than 50% of the initial value. Alternatively, the charging measurement may be terminated when the brightness of the secondary electron image becomes 50% or less of the initial value. Alternatively, the charge measurement may be speeded up by continuously changing the energy filter strength.

FIG. 12 illustrates an operation for correcting the surface potential V of the wafer 10 according to this embodiment, which is executed during the execution of the recipe. FIG. 12 shows how the charge measurement value (step 106g), the retarding voltage, and the wafer surface potential change. The surface potential of the wafer 10 gradually changes to a negative potential due to beam irradiation as indicated by the continuous line 121, and returns to 0V when the charge removal is executed. The reason why the continuous line 121 changes in a staircase pattern is to perform charging measurement at every 10 imaging points in the present embodiment, and the width of each staircase corresponds to the imaging time of 10 times. Although the initial value of the retarding potential of this embodiment is set to −1000 V, if the potential charged on the wafer is ΔV (<0), the charging potential is measured every time (however, the measured power failure potential is measured). Is less than the threshold value), the retarding voltage Vr is corrected as follows.
Vr = −1000−ΔV (9)

  Therefore, the continuous line 122 representing the retarding voltage Vr increases stepwise. For example, if ΔV measured in step 109 (step 106g) is −10V, the retarding voltage Vr is corrected to −990V. As shown in FIG. 12, when the charged potential of the wafer 10 returns to 0V due to static elimination, the retarding voltage Vr also returns to −1000V. It should be noted that the surface potential V of the wafer 10 gradually increases with every imaging until the charge measurement is executed, and thus changes to a sawtooth shape as indicated by the continuous line 123. Note that the surface potential V of the wafer 10 returns to −1000 V every time the charge is measured by charge correction (correction of the retarding voltage Vr) without performing the charge removal process.

In the above-described embodiment, the retarding voltage Vr is corrected or neutralized based on the result of charging measurement, but the charging speed is calculated from the recipe conditions (acceleration voltage, irradiation current, image capturing time, etc.). You can also That is, the correction of the retarding voltage Vr or the charge removal may be executed by calculation without performing the charge measurement. In this case, the retarding voltage Vr is corrected by ΔV according to the calculated charging potential. Further, the charge removal process is executed at intervals determined by the following equation.
(Charging interval) = (Charging threshold) / (Calculated charge per imaging point) Equation (10)
For example, when the charging threshold is −50 V and the charge calculation value per imaging point is −0.5 V, the static elimination interval is set to 100 designated points.

[Summary]
As described above, in the scanning electron microscope shown in the present embodiment, the following technical effects are realized in addition to the basic effects of the first embodiment.
(1) In this embodiment, the brightness of the secondary electron image immediately after loading the wafer 10 is measured and set as a reference value, and the reference value and the brightness of the secondary electron image measured periodically are determined. By determining the presence / absence of charging of the wafer 10 and the charged potential (amount) from the change, static elimination is automatically executed (step 111). For this reason, an efficient static elimination process can be executed without reducing the throughput as much as possible. Note that the surface potential of the wafer 10 can be measured by acquiring a plurality of secondary electron images while changing the energy filter strength as described with reference to FIG. 11B. As described above, the surface potential of the wafer 10 may be calculated from the recipe conditions (acceleration voltage, irradiation current, image capturing time, etc.).
(2) Further, in this embodiment, since the retarding voltage Vr is corrected according to the measured value of the charging potential, the fluctuation of the surface potential V of the wafer 10 during the measurement until the charge removal execution can be minimized, Variations in the quality of the secondary electron image to be captured can be improved.

[Example 3]
[Device configuration]
FIG. 13 shows a schematic configuration example of a scanning electron microscope according to the third embodiment. In FIG. 13, parts corresponding to those in FIG. The only difference between the configuration shown in FIG. 13 and the configuration shown in FIG. 1 is that a charged electrometer 21 is added to the side surface of the column 1. The charging potentiometer 21 measures the charging potential of the wafer 10 in a non-contact manner. Other configurations are basically the same as those of the first embodiment. However, the configuration of the sample holding mechanism assumes a case where the contact mechanism 35 is not provided in the electrostatic chuck 11 as in the second embodiment.

[Recipe processing of embodiment]
FIG. 14 shows the processing procedure of the recipe processing (step 131) proposed in this embodiment. The recipe process is also executed by the computer 19 by reading the recipe from a storage area (not shown).

  First, the computer 19 loads the wafer 10 to be observed into the sample chamber 2 (step 132). In this embodiment, the computer 19 executes wafer alignment using the optical microscope image and the SEM image after the loading is completed (step 133). This is because in this embodiment, since the sample holding mechanism does not have the contact mechanism 35, it is not necessary to confirm conduction. Next, the computer 19 moves to the designated point of the first recipe and takes a secondary electron image of the designated point (step 134). Thereafter, the computer 19 determines whether or not imaging of all designated points has been completed (step 135). When the imaging of all the designated points has been completed, the computer 19 unloads the wafer 10 from the sample chamber 2 (step 146) and ends the recipe (step 147).

  On the other hand, when there are remaining designated points to be imaged, the computer 19 measures the charged potential of the wafer 10 by the charge potential meter 21 (step 136). Each time the charging potential is measured for a new designated point, the computer 19 determines whether or not the charging potential exceeds “threshold 1” (step 137). If the charging potential is within “threshold 1”, the computer 19 returns to step 134 and images the next designated point. On the other hand, when the charged potential exceeds “threshold value 1”, the computer 19 executes a charge removal process (step 138). The charge removal process is the same process as in the first embodiment.

  After the charge removal, the computer 19 again measures the charged potential at the same designated point (step 139), and determines whether or not the charge potential after the charge removal is smaller than “threshold 2” (step 140). If the charged potential is equal to or greater than “threshold 2” even after static elimination, the computer 19 forcibly ends the operation of the recipe, and displays on the GUI that the static elimination could not be executed normally (step 141). For example, the occurrence of an error is notified. On the other hand, when the charge potential after static elimination becomes smaller than “threshold value 2”, the computer 19 executes realignment of the wafer 10 (step 142), and the wafer position change amount with respect to the alignment immediately after the wafer loading is within a specified value. Whether or not (step 143).

  When the position change amount is larger than the specified value, the computer 19 adjusts the wafer position by moving the wafer 10 to the load chamber in a vacuum and then returning it to the stage of the electrostatic chuck 11 (step 144). Thereafter, realignment is performed (step 145).

  In this embodiment, “threshold 1” is −50 and V, and “threshold 2” is −25V. Of course, the set value is not limited to this. Further, “threshold 1” and “threshold 2” may be the same. Further, the “threshold value” of the wafer position change amount is set to 1 mm. However, this value may be in a range where the observation of the edge portion on the electrostatic chuck 11 and the unloading operation are normally performed.

[Summary]
In the scanning electron microscope shown in the present embodiment, the following technical effects are realized.
(1) In the case of the present embodiment, since the charged potential of the wafer 10 is measured in a non-contact manner using a dedicated sensor, the measurement accuracy of the charged potential of the wafer can be improved.
(2) In the case of the present embodiment, in the charge removal process (charge removal by lifting and lowering the lift pins 36a to c), if the charge of the wafer 10 cannot be removed, the correct measurement operation cannot be continued, so the execution of the recipe is forcibly stopped. In addition, the user can be notified of the occurrence of an error.

[Other embodiments]
The present invention is not limited to the configuration of the embodiment described above, and includes various modifications. For example, in the above-described embodiment, the existing lift pins 36a to 36c are connected to the ground potential and used for static elimination, but a static elimination dedicated pin may be provided separately from the existing lift pins. Further, the present invention does not necessarily have all the configurations described in the above-described embodiments. Further, a part of a certain embodiment can be replaced with the configuration of another embodiment, and the configuration of another embodiment can be added to the configuration of a certain embodiment. It is also possible to add other configurations to the configuration of each embodiment, replace a partial configuration of each embodiment with another configuration, or delete a partial configuration of each embodiment.

  Moreover, you may implement | achieve some or all of each structure, a function, a process part, a process means, etc. which were mentioned above as an integrated circuit or other hardware, for example. Information such as recipes (programs), tables, and files executed by the computer 19 is stored in a storage device such as a memory, a hard disk, an SSD (Solid State Drive), or a storage medium such as an IC card, an SD card, or a DVD. Can do. Control lines and information lines indicate what is considered necessary for the description, and do not represent all control lines and information lines necessary for the product. In practice, it can be considered that almost all components are connected to each other.

DESCRIPTION OF SYMBOLS 1 ... Column 2 ... Sample chamber 3 ... Electron gun 4 ... Condenser lens 5 ... Objective lens 6 ... Deflector 7 ... Secondary electron detector 8 ... E * B filter 9 ... Reflected electron detector 10 ... Wafer 11 ... Electrostatic chuck 12 XY stage 13 Standard sample 14 Optical microscope 15 Load lock chamber 16 Beam scanning controller 17 Stage controller 18 Image processing board 19 Computer 20 Energy filter 21 Charged electrometer 33 Positive electrode 34 Negative electrode 35 ... contact mechanism 36 ... lift mechanism 81 ... GUI
82 ... Map display area 82a ... Wafer map selection button 82b ... Chip map selection button 83 ... Image display area 83a ... Optical microscope image selection button 83b ... SEM image selection button 83c ... Magnification change button 83d ... Image acquisition button 83e ... Image condition setting Button 84 ... Image acquisition position display area 85 ... Wafer charge removal setting area 85a ... Check box 85b ... Charge removal interval setting box

Claims (25)

A charged particle source that irradiates the sample with charged particles;
An electrostatic chuck for holding the sample in a sample chamber;
A lowering operation for placing the sample on the mounting surface of the electrostatic chuck, and an elevating mechanism for performing an ascending operation for lifting the sample from the mounting surface;
A controller that controls the elevating mechanism and executes an operation that sets the ascending operation and the descending operation as a set between the time when the sample is loaded into the sample chamber and the time when the sample is unloaded;
A charged particle beam apparatus. The charged particle beam apparatus according to claim 1,
The charged particle beam apparatus, wherein the control unit detects a charged state of the sample and determines an execution timing of an operation that includes the ascending operation and the descending operation as a set. The charged particle beam apparatus according to claim 1,
The charged particle beam apparatus according to claim 1, wherein the control unit receives, through a GUI on a display screen, the presence / absence and execution interval of an operation including the ascending operation and the descending operation as a set. The charged particle beam apparatus according to claim 1,
The charged particle, wherein the control unit executes the set of the ascending operation and the descending operation a plurality of times from when the sample is loaded into the sample chamber to when it is unloaded. Wire device. The charged particle beam apparatus according to claim 1,
The charged particle beam apparatus, wherein the control unit determines an execution timing of an operation that includes the ascending operation and the descending operation as a set based on brightness of a captured image of the sample. The charged particle beam apparatus according to claim 1,
The controller sets, as a reference value, the brightness of a captured image acquired immediately after loading the sample into the sample chamber, and based on a comparison result between the brightness of the captured image acquired sequentially and the reference value. An execution timing of an operation that sets the ascending operation and the descending operation as a set is determined. A charged particle beam device, comprising: The charged particle beam apparatus according to claim 1,
The control unit measures brightness for each of a plurality of captured images with different voltage conditions applied to the electrostatic chuck, and based on a comparison result of the measured brightness, the ascending operation and the descending operation The charged particle beam apparatus characterized by determining the execution timing of operation | movement which makes 1 set. The charged particle beam apparatus according to claim 1,
An energy filter that adjusts the brightness of a captured image obtained by controlling the passage of secondary signal particles generated by the irradiation of the charged particles;
The control unit measures brightness for each of a plurality of captured images with different voltage conditions applied to the energy filter, and performs the ascending operation and the descending operation based on a comparison result of the measured brightnesses. A charged particle beam apparatus characterized by determining execution timing of a set of operations. The charged particle beam apparatus according to claim 1,
The control unit calculates a charging speed of the sample based on a recipe condition, and determines an execution timing of an operation that combines the ascending operation and the descending operation based on a calculation result. Particle beam device. The charged particle beam apparatus according to claim 1,
The control unit measures the charged potential of the sample after execution of an operation that combines the ascending operation and the descending operation, and performs error notification when the measured value exceeds a predetermined threshold value. Charged particle beam device. The charged particle beam apparatus according to claim 1,
The elevating mechanism has a plurality of lift pins that support the sample from the back side, and contact surfaces of the plurality of lift pins with the sample are made of an elastic conductor. Wire device. The charged particle beam apparatus according to claim 1,
The charged particle beam apparatus, wherein the control unit executes alignment processing of the sample after performing the ascending operation and the descending operation. The charged particle beam apparatus according to claim 12,
When the alignment deviation amount of the sample after the alignment process is equal to or greater than a specified value, the control unit performs the alignment process again after moving the sample to another chamber in a vacuum. Charged particle beam equipment. A charged particle source for irradiating the sample with charged particles, an electrostatic chuck for holding the sample in a sample chamber, a lowering operation for mounting the sample on a mounting surface of the electrostatic chuck, and the sample from the mounting surface In a charging removal method for a charged particle beam apparatus having an elevating mechanism for performing a lifting operation for lifting and a control unit,
A charged particle having a process in which the control unit causes the lifting mechanism to perform a set of the ascending operation and the descending operation during a period from when the sample is loaded into the sample chamber to when it is unloaded. Method for removing charge from wire device. The charge removal method according to claim 14.
The control unit detects a charged state of the sample, and determines an execution timing of an operation that includes the ascending operation and the descending operation as a set. The charge removal method according to claim 14.
The control unit receives presence / absence and execution interval of an operation including the ascending operation and the descending operation as a set through a GUI on a display screen. The charge removal method according to claim 14.
The controller performs the operation of combining the ascending operation and the descending operation a plurality of times from when the sample is loaded into the sample chamber to when it is unloaded. Method. The charge removal method according to claim 14.
The charge removal method, wherein the control unit determines an execution timing of an operation including the ascending operation and the descending operation as a set based on brightness of a captured image of the sample. The charge removal method according to claim 14.
The controller sets, as a reference value, the brightness of a captured image acquired immediately after loading the sample into the sample chamber, and based on a comparison result between the brightness of the captured image acquired sequentially and the reference value. An execution timing of an operation that sets the ascending operation and the descending operation as a set is determined. The charge removal method according to claim 14.
The control unit measures brightness for each of a plurality of captured images with different voltage conditions applied to the electrostatic chuck, and based on a comparison result of the measured brightness, the ascending operation and the descending operation The charge removal method characterized by determining the execution timing of the operation | movement which makes 1 set. The charge removal method according to claim 14.
When the charged particle beam device further includes an energy filter that adjusts the brightness of a captured image acquired by controlling the passage of secondary signal particles generated by irradiation of the charged particles,
The control unit measures brightness for each of a plurality of captured images with different voltage conditions applied to the energy filter, and performs the ascending operation and the descending operation based on a comparison result of the measured brightnesses. An electrification removal method characterized by determining execution timing of a set of operations. The charge removal method according to claim 14.
The control unit calculates a charging speed of the sample based on a recipe condition, and determines an execution timing of an operation that combines the ascending operation and the descending operation based on a calculation result. Removal method. The charge removal method according to claim 14.
The control unit measures the charged potential of the sample after execution of an operation that combines the ascending operation and the descending operation, and performs error notification when the measured value exceeds a predetermined threshold value. Charge removal method. The charge removal method according to claim 14.
The control unit performs alignment processing of the sample after execution of the ascending operation and the descending operation. 25. The charge removal method according to claim 24.
When the alignment deviation amount of the sample after the alignment process is equal to or greater than a specified value, the control unit performs the alignment process again after moving the sample to another chamber in a vacuum. Charge removal method.

Images