JP2017126783A5 - - Google Patents
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- JP2017126783A5 JP2017126783A5 JP2017075445A JP2017075445A JP2017126783A5 JP 2017126783 A5 JP2017126783 A5 JP 2017126783A5 JP 2017075445 A JP2017075445 A JP 2017075445A JP 2017075445 A JP2017075445 A JP 2017075445A JP 2017126783 A5 JP2017126783 A5 JP 2017126783A5
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- Prior art keywords
- semiconductor layer
- conductor
- groove
- solid
- imaging device
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- 239000004065 semiconductor Substances 0.000 claims description 47
- 239000004020 conductor Substances 0.000 claims description 42
- 238000003384 imaging method Methods 0.000 claims description 23
- 230000000149 penetrating Effects 0.000 claims description 5
- 239000002184 metal Substances 0.000 claims 11
- 238000006243 chemical reaction Methods 0.000 claims 2
- 239000007787 solid Substances 0.000 claims 1
Description
本発明の1つの側面は、固体撮像装置に係り、第1面とその反対側の第2面とを有する半導体層と、前記半導体層の前記第1面側に配された第1導電パターン及び第2導電パターンと、前記半導体層を貫通して前記第1導電パターンに接続された第1導電体と、前記半導体層を貫通して前記第2導電パターンに接続された第2導電体と、を備え、前記第1導電体及び前記第2導電体を通り且つ前記第1面に対して垂直な断面において、前記半導体層には、それぞれ、前記半導体層を貫通する、第1の溝、第2の溝、及び第3の溝が設けられ、前記断面において、前記第1の溝は、前記第1導電体と前記第2導電体との間に位置し、前記断面において、前記第1導電体は、前記第2の溝と前記第1の溝の間に位置し、前記断面において、前記第2導電体は、前記第1の溝と前記第3の溝の間に位置し、前記断面において、前記第1導電体は、前記第1の溝側の側面および前記第2の溝側の側面の双方で前記半導体層に直接接触し、且つ、前記第2導電体は、前記第1の溝側の側面および前記第3の溝側の側面の双方で前記半導体層に直接接触していることを特徴とする。 One aspect of the present invention relates to a solid-state imaging device, a semiconductor layer having a first surface and a second surface opposite to the first surface, a first conductive pattern disposed on the first surface side of the semiconductor layer, and A second conductor pattern, a first conductor penetrating the semiconductor layer and connected to the first conductor pattern, a second conductor penetrating the semiconductor layer and connected to the second conductor pattern, Each of the semiconductor layers includes a first groove, a second groove, and a first groove that penetrates the semiconductor layer in a cross section that passes through the first conductor and the second conductor and is perpendicular to the first surface. 2 and a third groove are provided, and in the cross section, the first groove is located between the first conductor and the second conductor, and in the cross section, the first conductive A body is located between the second groove and the first groove, and The conductor is located between the first groove and the third groove. In the cross section, the first conductor is formed on the side surface on the first groove side and the side surface on the second groove side. Both are in direct contact with the semiconductor layer, and the second conductor is in direct contact with the semiconductor layer on both the side surface on the first groove side and the side surface on the third groove side. Features.
Claims (20)
前記半導体層の前記第1面側に配された第1導電パターン及び第2導電パターンと、A first conductive pattern and a second conductive pattern disposed on the first surface side of the semiconductor layer;
前記半導体層を貫通して前記第1導電パターンに接続された第1導電体と、A first conductor penetrating the semiconductor layer and connected to the first conductive pattern;
前記半導体層を貫通して前記第2導電パターンに接続された第2導電体と、A second conductor penetrating the semiconductor layer and connected to the second conductive pattern;
を備え、With
前記第1導電体及び前記第2導電体を通り且つ前記第1面に対して垂直な断面において、前記半導体層には、それぞれ、前記半導体層を貫通する、第1の溝、第2の溝、及び第3の溝が設けられ、In a cross section that passes through the first conductor and the second conductor and is perpendicular to the first surface, the semiconductor layer includes a first groove and a second groove that penetrate the semiconductor layer, respectively. And a third groove,
前記断面において、前記第1の溝は、前記第1導電体と前記第2導電体との間に位置し、In the cross section, the first groove is located between the first conductor and the second conductor,
前記断面において、前記第1導電体は、前記第2の溝と前記第1の溝の間に位置し、In the cross section, the first conductor is located between the second groove and the first groove,
前記断面において、前記第2導電体は、前記第1の溝と前記第3の溝の間に位置し、In the cross section, the second conductor is located between the first groove and the third groove,
前記断面において、前記第1導電体は、前記第1の溝側の側面および前記第2の溝側の側面の双方で前記半導体層に直接接触し、且つ、前記第2導電体は、前記第1の溝側の側面および前記第3の溝側の側面の双方で前記半導体層に直接接触しているIn the cross section, the first conductor is in direct contact with the semiconductor layer on both the side surface on the first groove side and the side surface on the second groove side, and the second conductor is The semiconductor layer is in direct contact with both the side surface on the first groove side and the side surface on the third groove side.
ことを特徴とする固体撮像装置。A solid-state imaging device.
前記断面において、前記半導体層の、前記第2導電体に接する第3部分と、前記半導体層の、前記第3の溝に対して、前記第2導電体と反対側に位置する第4部分とは、電気的に分離されている請求項1に記載の固体撮像装置。A third portion of the semiconductor layer that is in contact with the second conductor, and a fourth portion of the semiconductor layer that is opposite to the second conductor with respect to the third groove; The solid-state imaging device according to claim 1, which is electrically separated.
前記第1半導体層の前記第1面側に配された第2半導体層と、A second semiconductor layer disposed on the first surface side of the first semiconductor layer;
前記第1半導体層と前記第2半導体層の間に配された第1導電パターン及び第2導電パターンと、A first conductive pattern and a second conductive pattern disposed between the first semiconductor layer and the second semiconductor layer;
前記第1半導体層を貫通して前記第1導電パターンに接続された第1導電体と、A first conductor penetrating the first semiconductor layer and connected to the first conductive pattern;
前記第1半導体層を貫通して前記第2導電パターンに接続された第2導電体と、A second conductor passing through the first semiconductor layer and connected to the second conductive pattern;
を備え、With
前記第1導電体及び前記第2導電体を通り且つ前記第1面に対して垂直な断面において、前記第1半導体層には、それぞれ、前記第1半導体層を貫通する、第1の溝、第2の溝、及び第3の溝が設けられ、In a cross section that passes through the first conductor and the second conductor and is perpendicular to the first surface, each of the first semiconductor layers includes a first groove that penetrates the first semiconductor layer, A second groove and a third groove are provided;
前記断面において、前記第1の溝は、前記第1導電体と前記第2導電体との間に位置し、In the cross section, the first groove is located between the first conductor and the second conductor,
前記断面において、前記第1導電体は、前記第2の溝と前記第1の溝の間に位置し、In the cross section, the first conductor is located between the second groove and the first groove,
前記断面において、前記第2導電体は、前記第1の溝と前記第3の溝の間に位置し、In the cross section, the second conductor is located between the first groove and the third groove,
前記断面において、前記第1導電体は、前記第1の溝側の側面および前記第2の溝側の側面の双方で前記第1半導体層に直接接触し、且つ、前記第2導電体は、前記第1の溝側の側面および前記第3の溝側の側面の双方で前記第1半導体層に直接接触しているIn the cross section, the first conductor is in direct contact with the first semiconductor layer on both the first groove side surface and the second groove side surface, and the second conductor is: Both the first groove side surface and the third groove side surface are in direct contact with the first semiconductor layer.
ことを特徴とする固体撮像装置。A solid-state imaging device.
前記断面において、前記第1半導体層の、前記第2導電体に接する第3部分と、前記第1半導体層の、前記第3の溝に対して、前記第2導電体と反対側に位置する第4部分とは、電気的に分離されている請求項7に記載の固体撮像装置。In the cross section, the third portion of the first semiconductor layer that is in contact with the second conductor and the third groove of the first semiconductor layer are located on the opposite side of the second conductor. The solid-state imaging device according to claim 7, wherein the solid-state imaging device is electrically separated from the fourth portion.
前記第1乃至前記第3の溝の少なくとも1つは、前記絶縁層の内部まで到達する請求項10に記載の固体撮像装置。The solid-state imaging device according to claim 10, wherein at least one of the first to third grooves reaches the inside of the insulating layer.
前記固体撮像装置から出力される信号を処理する処理部と、A processing unit for processing a signal output from the solid-state imaging device;
を備えることを特徴とするカメラ。A camera comprising:
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2017075445A JP6236181B2 (en) | 2017-04-05 | 2017-04-05 | Solid-state imaging device and manufacturing method thereof |
Applications Claiming Priority (1)
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---|---|---|---|
JP2017075445A JP6236181B2 (en) | 2017-04-05 | 2017-04-05 | Solid-state imaging device and manufacturing method thereof |
Related Parent Applications (1)
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JP2012044299A Division JP6124502B2 (en) | 2012-02-29 | 2012-02-29 | Solid-state imaging device and manufacturing method thereof |
Related Child Applications (1)
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JP2017206330A Division JP6701149B2 (en) | 2017-10-25 | 2017-10-25 | Imaging device and camera |
Publications (3)
Publication Number | Publication Date |
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JP2017126783A JP2017126783A (en) | 2017-07-20 |
JP2017126783A5 true JP2017126783A5 (en) | 2017-10-05 |
JP6236181B2 JP6236181B2 (en) | 2017-11-22 |
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Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
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JP4525129B2 (en) * | 2004-03-26 | 2010-08-18 | ソニー株式会社 | Solid-state imaging device and manufacturing method thereof, and semiconductor integrated circuit device and manufacturing method thereof |
JP4609497B2 (en) * | 2008-01-21 | 2011-01-12 | ソニー株式会社 | Solid-state imaging device, manufacturing method thereof, and camera |
JP4655137B2 (en) * | 2008-10-30 | 2011-03-23 | ソニー株式会社 | Semiconductor device |
JP2011086709A (en) * | 2009-10-14 | 2011-04-28 | Toshiba Corp | Solid-state imaging device and method for manufacturing same |
JP5442394B2 (en) * | 2009-10-29 | 2014-03-12 | ソニー株式会社 | SOLID-STATE IMAGING DEVICE, ITS MANUFACTURING METHOD, AND ELECTRONIC DEVICE |
JP5568969B2 (en) * | 2009-11-30 | 2014-08-13 | ソニー株式会社 | SOLID-STATE IMAGING DEVICE, ITS MANUFACTURING METHOD, AND ELECTRONIC DEVICE |
JP5630027B2 (en) * | 2010-01-29 | 2014-11-26 | ソニー株式会社 | Solid-state imaging device, manufacturing method thereof, electronic apparatus, and semiconductor device |
JP2012084609A (en) * | 2010-10-07 | 2012-04-26 | Sony Corp | Solid state image pickup device, manufacturing method for the device, and electronic apparatus |
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