JP2017111362A - Manufacturing method of wiring board, wiring board, display device and electronic apparatus - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a manufacturing method of wiring board capable of preventing current leakage through residue of wiring.SOLUTION: The manufacturing method of wiring board includes the steps of: forming a first metal film over a base material 16; forming a scan line 28 by patterning the first metal film; forming an element layer interlayer insulating film 18b over the scan line 28; forming second metal film over the element layer interlayer insulating film 18b; forming a data signal line 27 by patterning the second metal film; and removing residue 32 which is formed on the side face of the scan line 28 when patterning the second metal film. When removing the residue 32, a part of the element layer interlayer insulating film 18b is also removed.SELECTED DRAWING: Figure 5

Description

  The present invention relates to a method for manufacturing a wiring board, a wiring board, a display device, and an electronic apparatus.

  Display devices in which display elements such as liquid crystal, organic EL (Electro Luminescence), and electrophoretic elements are arranged in a matrix form are widely used. These display devices are installed on an element substrate including a switching element that drives each display element. The switching element is an element that controls a voltage applied to the display element, and includes a transistor or the like. Similarly to the display element, the switching elements are arranged in a matrix pattern, and scanning lines and data signal lines are connected to each switching element.

The wiring is made of, for example, an aluminum alloy, and is patterned using a photolithography method and a dry etching method. In the dry etching method, a halogen gas such as Cl ₂ , BCl ₃ , or HBr is used. A part of the halogen gas adheres to the resist film, and when the atmosphere contains moisture, an acidic liquid is generated. And an aluminum alloy and an acidic liquid react and a compound is formed. The phenomenon in which this compound is formed is called corrosion.

  Patent Document 1 discloses a method for removing a compound formed by corrosion. Patent Document 1 describes that an aluminum alloy compound and a resist film used in an etching process are removed by ashing. Furthermore, it is described that the aluminum alloy is prevented from being oxidized by washing with an alkaline aqueous solution.

Japanese Patent Laid-Open No. 9-298188

  However, when the compound is removed by ashing as in Patent Document 1, the compound protruding in the thickness direction of the element substrate is removed, but the compound protruding in the plane direction of the substrate on the side surface of the wiring is difficult to remove. . In addition, a wiring that is a scanning line may be provided on the element substrate as described above, and a wiring that may be a data signal line may be provided on the scanning line through an insulating film. In many cases, the scanning line and the data signal line are orthogonal to each other. When the compound protrudes from the side surface of the scanning line, the insulating film covering the compound also has a shape protruding from the side surface. A concave portion is formed between the element substrate and the protruding compound on the side surface side of the scanning line.

  In order to install a wiring that is a data signal line, an aluminum alloy is placed on the insulating film formed on the scanning line and patterned. At this time, a residue of the aluminum alloy may remain in the recess, and if the residue causes current leakage between the data signal lines, the display device cannot display a normal screen. Therefore, there has been a demand for a method of manufacturing a wiring board that can prevent current from leaking through wiring residues.

  SUMMARY An advantage of some aspects of the invention is to solve at least one of the above problems or problems, and the invention can be implemented as the following forms or application examples.

[Application Example 1]
In the method for manufacturing a wiring board according to this application example, a first metal film is placed on the substrate, the first metal film is patterned, the first wiring is placed, the first wiring is covered, and the first insulating film is covered And installing a second metal film on the first insulating film, patterning the second metal film to install a second wiring, patterning the second metal film, and then on a side surface of the first wiring. A residue of the second metal film to be formed is removed.

  According to this application example, the first metal film is disposed on the substrate, and the first metal film is patterned to form the first wiring. When patterning, the metal constituting the first wiring may react with a chemical used for etching to form a compound. This compound has an uneven shape and is formed on the side surface side of the first wiring. Then, a first insulating film is provided to cover the first wiring. At this time, since the first insulating film is installed so as to cover the spherical compound, the appearance of the first insulating film is partially uneven.

  A second metal film is disposed on the first insulating film. The second metal film also has an uneven shape at a place where the first insulating film has an uneven shape. Next, the second metal film is patterned to install a second wiring. In the patterning step, part of the second metal film is removed by etching. At this time, in the place where the first metal film has an uneven shape, the side surface side of the first insulating film becomes a depression, and the second metal film located in the depression may remain. The second metal film remaining in the depression is a residue. When the residue is connected, the current leaks through the residue. However, since this residue is removed in this application example, it is possible to prevent current from leaking between the second wirings through the residue.

[Application Example 2]
In the method of manufacturing a wiring board according to the application example, it is preferable that a part of the first insulating film is also removed when the residue is removed.

  According to this application example, when the residue is removed, a part of the first insulating film is also removed. Since the residue is located on the first insulating film, there is a high possibility that the residue will remain on the first insulating film when only the residue is removed while leaving the first insulating film. On the other hand, when removing a part of the first insulating film in addition to the residue, the residue can be surely removed.

[Application Example 3]
In the method for manufacturing a wiring board according to the application example described above, it is preferable that the second insulating film is provided so as to cover the second wiring, between the installation of the second wiring and the removal of the residue.

  According to this application example, the second insulating film is provided to cover the second wiring before removing the residue. Since the second insulating film covers the second wiring, it is possible to prevent dust and the like from adhering to the second wiring. Accordingly, it is possible to prevent current from leaking from the second wiring through the dust and the like.

[Application Example 4]
In the method for manufacturing a wiring board according to the application example described above, it is preferable that a third insulating film is provided in a place where the residue is removed.

  According to this application example, the third insulating film is installed at the place where the residue is removed. The place where the residue is removed is close to the first wiring, and the first wiring may be exposed when the residue is removed. Even if the first wiring is exposed, since the third insulating film covers the first wiring, it is possible to prevent dust and the like from adhering to the first wiring. Accordingly, it is possible to prevent current from leaking from the first wiring through dust or the like.

[Application Example 5]
In the method for manufacturing a wiring board according to the application example, it is preferable that the first wiring has a convex portion protruding in a planar direction of the substrate, and the place where the residue is removed is the convex portion.

  According to this application example, the first wiring has a protrusion protruding in the planar direction of the substrate. The planar direction of the substrate is a direction orthogonal to the thickness direction of the substrate, and is a direction parallel to the surface of the substrate. And the residue in a convex part is removed. When removing the residue, part of the first wiring may be removed. At this time, since the portion where the first wiring is partially removed is a convex portion, it is possible to prevent the cross-sectional area of the first wiring from being locally reduced. Therefore, it is possible to prevent the resistance value of the first wiring from being increased.

[Application Example 6]
In the method for manufacturing a wiring board according to the application example described above, it is preferable that a plurality of the second wirings are installed so as to intersect with the first wiring, and the residue between the adjacent second wirings is removed.

  According to this application example, a plurality of second wirings are installed crossing the first wiring. And the residue between adjacent 2nd wiring is removed. Therefore, it is possible to prevent the current from leaking through the residue between the adjacent second wirings.

[Application Example 7]
A wiring board according to this application example, the board, the first wiring installed on the board, the first insulating film installed to cover the first wiring, and the first insulating film installed on the first insulating film And a recessed portion in which the first insulating film is recessed on a side surface side of the first wire.

  According to this application example, in the wiring board, the first wiring, the first insulating film, and the second wiring are stacked on the board in this order. And the recessed part is installed in the 1st insulating film in the side surface side of 1st wiring. On the first insulating film, a residue may be formed on the side surface of the first wiring, and current leaks due to the residue. When the recess is provided in the first insulating film, the residue is removed together with the first insulating film. Therefore, since the residue is interrupted, it is possible to prevent the current from leaking between the second wires through the residue.

[Application Example 8]
The display device according to this application example includes a wiring board on which a switching element and wiring connected to the switching element are installed, and the wiring board is the wiring board described above.

  According to this application example, the display device includes the wiring board. The wiring board is provided with a switching element and wiring connected to the switching element. In the wiring board, even when there is a residue on the side surface side of the wiring, a part of the residue is removed and current is prevented from leaking. Therefore, the display device can be a device including a substrate in which current is prevented from leaking.

[Application Example 9]
An electronic apparatus according to this application example includes: a display unit; and a control unit that supplies information displayed by the display unit, wherein the display unit is the display device described above.

  According to this application example, the electronic device includes a display unit and a control unit, and the control unit supplies information to be displayed on the display unit. The display device is a device including a substrate that prevents current from leaking between wirings. Therefore, the electronic device can be a device including a substrate in which current is prevented from leaking between the wirings on the wiring substrate of the display portion.

1 is a schematic plan sectional view showing a structure of an electrophoretic display device according to a first embodiment. FIG. 3 is a schematic side cross-sectional view illustrating a structure of an electrophoretic display device. The principal part schematic side sectional view which shows the structure of an element substrate. The circuit diagram of a wiring board. The principal part schematic perspective view which shows the structure of a wiring board. The principal part schematic plan sectional view which shows the structure of a wiring board. The principal part schematic side sectional view which shows the structure of a wiring board. The principal part schematic side sectional view which shows the structure of a wiring board. The principal part schematic side sectional view which shows the structure of a wiring board. The flowchart of the manufacturing method of a wiring board. The schematic diagram for demonstrating the manufacturing method of a wiring board. The schematic diagram for demonstrating the manufacturing method of a wiring board. The schematic diagram for demonstrating the manufacturing method of a wiring board. The schematic diagram for demonstrating the manufacturing method of a wiring board. The schematic diagram for demonstrating the manufacturing method of a wiring board. The schematic diagram for demonstrating the manufacturing method of a wiring board. The schematic diagram for demonstrating the manufacturing method of a wiring board. The schematic diagram for demonstrating the manufacturing method of a wiring board. The schematic diagram for demonstrating the manufacturing method of a wiring board. The schematic diagram for demonstrating the manufacturing method of a wiring board. The schematic diagram for demonstrating the manufacturing method of a wiring board. The schematic diagram for demonstrating the manufacturing method of a wiring board. The schematic diagram for demonstrating the manufacturing method of a wiring board. The schematic diagram for demonstrating the manufacturing method of the wiring board in connection with 2nd Embodiment. The schematic diagram for demonstrating the manufacturing method of a wiring board. The schematic diagram for demonstrating the manufacturing method of a wiring board. The schematic diagram for demonstrating the manufacturing method of a wiring board. The schematic diagram for demonstrating the manufacturing method of a wiring board. The schematic perspective view which shows the structure of the electronic book concerning 3rd Embodiment. The schematic perspective view which shows the structure of a wristwatch.

  In the present embodiment, an electrophoretic display device, a wiring board used in the electrophoretic display device, and a characteristic example of manufacturing the wiring substrate will be described with reference to the drawings. The drawings used in the description are for convenience, and each member in each drawing is illustrated in a different scale so that each member has a size that can be recognized on each drawing. is there.

(First embodiment)
The electrophoretic display device according to this embodiment will be described with reference to FIGS. FIG. 1 is a schematic plan sectional view showing the structure of an electrophoretic display device, and FIG. 2 is a schematic side sectional view showing the structure of the electrophoretic display device. FIG. 1 is a view seen from a cross section taken along line BB in FIG. 2, and FIG. 2 is a view seen from a cross section taken along line AA in FIG.

  As shown in FIGS. 1 and 2, an electrophoretic display device 1 as a display device includes an element substrate 2. On the element substrate 2, switching elements (not shown) such as TFTs (Thin Film Transistors) are arranged in a matrix. Further, the element substrate 2 is provided with a drive circuit 3 for driving the switching element. Then, terminals 4 are arranged along one side of the element substrate 2, and a flexible cable (not shown) is installed on the terminals 4. Then, a control signal and a data signal for controlling the electrophoretic display device 1 are transmitted from the external device through the flexible cable.

  The element substrate 2 includes a base material, and a switching element and wiring are installed on the base material. The base material is a plate-like member having a thickness of about 30 μm to 100 μm, for example. Examples of the constituent material of the base material include inorganic substrates such as glass substrates, quartz substrates, silicon substrates, and gallium arsenide substrates, polyimides, polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polymethyl methacrylate (PMMA), and polycarbonate. Examples thereof include a plastic substrate composed of (PC), polyethersulfone (PES), aromatic polyester (liquid crystal polymer), and the like. In this embodiment, for example, a glass substrate is used as the material of the base material.

  A pixel electrode 5 is provided on the element substrate 2 at a location facing the switching element. The pixel electrodes 5 are arranged in a matrix like the switching elements.

  The thickness direction of the element substrate 2 is defined as the Z direction, and the directions in which the pixel electrodes 5 are arranged are defined as the X direction and the Y direction. The X direction and the Y direction are directions in which two sides of the element substrate 2 extend. The drive circuit 3 is located on the −Y direction side of the element substrate 2 and has a shape that is long in the X direction.

  A first adhesive film 6 is installed on the pixel electrode 5, and a microcapsule 7 is installed on the first adhesive film 6. The microcapsule 7 has a circular shape when viewed from the Z direction, and the diameter of the microcapsule 7 is 30 μm to 100 μm. The shape of the microcapsule 7 viewed from the X direction and the Y direction is substantially circular. The microcapsule 7 is a sealed container, and the dispersion medium 7a, black particles 7b, and white particles 7c are sealed inside the microcapsule 7. One of the black particles 7b and the white particles 7c is positively charged, and the other is negatively charged.

  The dispersion medium 7a includes water, alcohol solvents, various esters, ketones, aliphatic hydrocarbons, alicyclic hydrocarbons, aromatic hydrocarbons, halogenated hydrocarbons, carboxylates, and other various oils. Etc. can be used. In addition to using these materials alone in the dispersion medium 7a, a surfactant or the like can be blended with these mixtures.

  As the black particles 7b, particles made of a black pigment such as carbon black, aniline black, titanium oxynitride, polymer, and colloid can be used. A white pigment such as titanium dioxide can be used for the white particles 7c. These pigments include electrolytes, surfactants, metal soaps, resins, rubbers, oils, varnishes, charge control agents composed of particles such as compounds, titanium coupling agents, aluminum coupling agents, silanes as necessary. A dispersant such as a system coupling agent, a lubricant, a stabilizer, and the like may be added. By adding these additives, the black particles 7b and the white particles 7c can be moved with good reactivity and can be stably operated over a long period of time.

  Besides black particles 7b and white particles 7c, monoazo azo pigments, yellow pigments such as isoindolinone, monoazo azo pigments, red pigments such as quinacridone red, blue pigments such as phthalocyanine blue, and green colors such as phthalocyanine green One type or two or more types of pigments can be used.

  In the drawing, the pixel electrode 5 and the microcapsule 7 are arranged to face each other for easy viewing. The pixel electrode 5 and the microcapsule 7 do not have to face each other on a one-to-one basis. The microcapsules 7 may be irregularly arranged with respect to the pixel electrode 5. As compared with the case where the number of microcapsules 7 is smaller and the number is larger than the number of pixel electrodes 5, smooth lines can be displayed.

  On the microcapsule 7, a second adhesive film 8, a common electrode 9, and a transparent substrate 10 are stacked in this order. An electrophoretic sheet 11 is configured by the first adhesive film 6, the microcapsule 7, the second adhesive film 8, the common electrode 9, and the transparent substrate 10. The material of the pixel electrode 5 is not particularly limited as long as it is a conductive material. In addition to copper, aluminum, nickel, gold, silver, ITO (indium tin oxide), a nickel film or a gold film is formed on the copper foil. A laminated product or a product obtained by laminating a nickel film or a gold film on an aluminum foil can be used. In the present embodiment, for example, the pixel electrode 5 has a structure in which a gold film is provided on a wiring in which aluminum and copper are laminated.

  The common electrode 9 is not particularly limited as long as it is a transparent conductive film. For example, the common electrode 9 may be made of MgAg, IGO (Indium-gallium oxide), ITO (Indium Tin Oxide), ICO (Indium-Cerium Oxide), IZO (Indium / Zinc Oxide), or the like. In the present embodiment, for example, ITO is used for the common electrode 9.

  The material of the transparent substrate 10 is not particularly limited as long as it has optical transparency, strength, and insulation. As the material of the transparent substrate 10, a material having high light transmittance such as glass, acrylic resin, polyethylene terephthalate (PET), polyethersulfone (PES), polycarbonate (PC), or the like can be used. A moisture-proof sheet (not shown) or the like may be disposed on the surface on the + Z direction side of the transparent substrate 10.

  The common electrode 9 and the transparent substrate 10 protrude in the −X direction from the first adhesive film 6 and the second adhesive film 8. And in the place where the common electrode 9 and the transparent substrate 10 protrude, the conduction | electrical_connection part 12 is installed between the element substrate 2 and the common electrode 9. FIG. A voltage is applied to the common electrode 9 by the conducting portion 12.

  A frame portion 13 is installed on the element substrate 2 so as to surround the electrophoretic sheet 11, and a protective substrate 14 is installed on the + Z direction side of the frame portion 13. The electrophoretic sheet 11 and the protective substrate 14 are bonded by the third adhesive film 15. The frame portion 13 is located outside the electrophoretic sheet 11 and is provided on the element substrate 2. The frame portion 13 is sandwiched between the protective substrate 14 and the element substrate 2. The frame portion 13 is made of an organic material such as acrylic resin or PET. The protective substrate 14 and the element substrate 2 are in close contact with the peripheral portions, and the peripheral portions are fixed. Each of these members may be fixed by laser welding or may be bonded and fixed.

  The protective substrate 14 is provided on the viewing side of the electrophoretic display device 1. As the plate material of the protective substrate 14, a material that has high light transmittance, excellent flatness, and is hardly scratched is suitable, and an acrylic plate material, tempered glass, or the like can be used.

  The material of the first adhesive film 6, the second adhesive film 8, and the third adhesive film 15 is not particularly limited as long as it can adhere the respective members sandwiched and has an insulating property. For example, the material of the first adhesive film 6, the second adhesive film 8, and the third adhesive film 15 is polyurethane, polyurea, polyurea-polyurethane, urea-formaldehyde resin, melamine-formaldehyde resin, polyamide, polyester, polysulfonamide, etc. Can be used. In addition, for example, the material of the first adhesive film 6, the second adhesive film 8, and the third adhesive film 15 is an acrylic resin such as polycarbonate, polysulfinate, epoxy resin, polyacrylate, polymethacrylate, Polyvinyl acetate, gelatin, phenol resin, vinyl resin and the like can be used. In the present embodiment, for example, an ultraviolet curable acrylic resin or epoxy resin is used as the material of the first adhesive film 6, the second adhesive film 8, and the third adhesive film 15. It is preferable to use an optical adhesive having a high transparency for the second adhesive film 8 and the third adhesive film 15.

  FIG. 3 is a schematic side cross-sectional view of the main part showing the structure of the element substrate. As shown in FIG. 3, the element substrate 2 includes a base material 16 as a substrate. As the substrate 16, a plate obtained by grinding and polishing a glass plate to a predetermined thickness to reduce the surface roughness is used. A first interlayer insulating film 17 is provided on the substrate 16. The first interlayer insulating film 17 is a silicon oxide or silicon nitride film. The first interlayer insulating film 17 is formed using a sputtering method, a vacuum evaporation method, or a CVD (chemical vapor deposition) method.

  An element layer 18 is provided on the first interlayer insulating film 17. The element layer 18 is provided with a gate insulating film 18a, an element layer interlayer insulating film 18b as a first insulating film, and a switching element 21. A semiconductor film 21e is provided on the first interlayer insulating film 17, and a source region 21h, a drain region 21j, and a channel formation region 21k are provided on the semiconductor film 21e.

  The semiconductor film 21e is a polycrystalline silicon film obtained by crystallizing an amorphous silicon film having a thickness of about 50 nm formed by a CVD method or the like by a laser crystallization method or the like. The semiconductor film 21e is formed into an island shape by a photolithography method or the like. The source region 21h, the drain region 21j, and the channel formation region 21k are regions formed by implanting impurity ions into the semiconductor film 21e by an ion implantation method.

A gate insulating film 18 a is provided to cover the semiconductor film 21 e and the first interlayer insulating film 17. The gate insulating film 18a is a SiO ₂ film having a thickness of about 100 nm formed by a CVD method or the like. A gate electrode 21g is provided on the gate insulating film 18a at a location facing the channel formation region 21k of the semiconductor film 21e. The gate electrode 21g is an aluminum alloy film having a thickness of about 500 nm formed by a sputtering method or the like. The gate electrode 21g is a film formed into an island shape by photolithography.

An element layer interlayer insulating film 18b is provided so as to cover the gate insulating film 18a and the gate electrode 21g. The element layer interlayer insulating film 18b is a SiO ₂ film having a thickness of about 800 nm.

  A contact hole reaching the source region 21h is provided in the element layer interlayer insulating film 18b. A source electrode 21n is provided from the contact hole to the element layer interlayer insulating film 18b. The source electrode 21n is an aluminum alloy film having a thickness of about 500 nm formed by a sputtering method or the like. The source electrode 21n is a film formed into an island shape by a photolithography method. The source electrode 21n is connected to a wiring (not shown).

  Similarly, a contact hole reaching the drain region 21j is provided in the element layer interlayer insulating film 18b. A drain electrode 21p is provided from the contact hole to the element layer interlayer insulating film 18b. The drain electrode 21p is an aluminum alloy film having a thickness of about 500 nm formed by a sputtering method or the like. The drain electrode 21p is a film formed into an island shape by photolithography.

  The switching element 21 is configured by the semiconductor film 21e, the gate insulating film 18a, the gate electrode 21g, the source electrode 21n, the drain electrode 21p, and the like.

  A second interlayer insulating film 22 as a third insulating film is provided so as to cover the element layer interlayer insulating film 18b, the source electrode 21n, the drain electrode 21p, and the wiring. The second interlayer insulating film 22 is a resin film such as an acrylic resin. The second interlayer insulating film 22 is installed by applying a solution in which a resin is dissolved onto the element layer 18 with a spinner or a roll coater and then drying. A contact hole reaching the drain electrode 21p is provided in the second interlayer insulating film 22. Further, a third interlayer insulating film 23 is provided on the second interlayer insulating film 22. The third interlayer insulating film 23 is a silicon nitride film having a thickness of about 800 nm. The third interlayer insulating film 23 is a film formed by sputtering or the like, and the drain electrode 21p is exposed by photolithography.

  A through electrode 24 is provided in the contact hole, and a pixel electrode wiring 25 is provided on the third interlayer insulating film 23. The through electrode 24 and the pixel electrode wiring 25 are aluminum alloy films having a film thickness of about 500 nm. The through electrode 24 and the pixel electrode wiring 25 are films formed by sputtering or vapor deposition and patterned by a wet etching method.

  The pixel electrode 5 is provided so as to overlap the through electrode 24 and the pixel electrode wiring 25. The pixel electrode 5 is a gold film and is installed using an electroless plating method. A first adhesive film 6 of the electrophoretic sheet 11 is placed on the pixel electrode 5. A substrate including the base material 16, the first interlayer insulating film 17, the element layer 18, and the second interlayer insulating film 22 is referred to as a wiring substrate 26.

  FIG. 4 is a circuit diagram of the wiring board. As shown in FIG. 4, the wiring substrate 26 has a plurality of pixel electrodes 5 arranged in a matrix. Each of these pixel electrodes 5 is provided with a switching element 21 for pixel switching. The wiring board 26 is provided with wiring extending in the left-right direction in the drawing and data signal lines 27 as second wiring, wiring extending in the vertical direction in the drawing, and scanning line 28 as first wiring. A source electrode 21 n of the switching element 21 is connected to the data signal line 27. A gate electrode 21 g of the switching element 21 is connected to the scanning line 28. The drain electrode 21p is connected to the pixel electrode 5.

  A pixel signal is supplied from the driving circuit 3 to the data signal line 27, and a scanning signal is supplied from the driving circuit 3 to the scanning line 28. Then, the switching element 21 is switched between the on state and the off state by the scanning signal. A voltage supplied to the data signal line 27 is applied to the pixel electrode 5 when the switching element 21 is in the on state.

  The drive circuit 3 switches the pixel signal and the scanning signal in synchronization. Thereby, the drive circuit 3 can apply a predetermined voltage to each pixel electrode 5. In the microcapsule 7, the black particles 7 b and the white particles 7 c move according to the polarity of the potential difference between the common electrode 9 and the pixel electrode 5. When the black particles 7b move to the + Z side, the microcapsules 7 become black, and when the white particles 7c move to the + Z side, the microcapsules 7 become white.

  The drive circuit 3 controls the position of the microcapsule 7 displayed in black and the position of the microcapsule 7 displayed in white. Thereby, the electrophoretic display device 1 can display a figure composed of white and black.

  FIG. 5 is a main part schematic perspective view showing the structure of the wiring board, and is a schematic diagram for explaining the structure of the place where the scanning line 28 and the data signal line 27 intersect when viewed from the Z direction. FIG. 6 is a schematic plan cross-sectional view of the main part showing the structure of the wiring board, as seen from the surface side along the line CC in FIG. In the drawing, the second interlayer insulating film 22 is not provided on the wiring board 26.

  As shown in FIGS. 5 and 6, the scanning line 28 is provided on the gate insulating film 18a. The scanning line 28 extends in the Y direction. Further, an element layer interlayer insulating film 18b is provided on the gate insulating film 18a, and a data signal line 27 is provided on the element layer interlayer insulating film 18b. The data signal line 27 extends in the X direction. Therefore, the scanning line 28 and the data signal line 27 intersect when viewed from the Z direction. Since the element layer interlayer insulating film 18b is located between the data signal line 27 and the scanning line 28, the data signal line 27 and the scanning line 28 are not short-circuited.

  A first convex portion 28 a as a convex portion extending in the + X direction and a second convex portion 28 b as a convex portion extending in the −X direction are installed on the scanning line 28 at a location in the middle of the adjacent data signal lines 27. A concave portion 29 in which the element layer interlayer insulating film 18b is recessed is formed on the + X direction side of the first convex portion 28a. Similarly, a recess 29 in which the element layer interlayer insulating film 18b is recessed is also formed on the −X direction side of the second protrusion 28b.

  FIG. 7 is a schematic sectional side view of the main part showing the structure of the wiring board, as viewed from the sectional side along the line DD in FIGS. 5 and 6. FIG. 7 is a diagram in which the second interlayer insulating film 22 is installed on the wiring board 26. As shown in FIG. 7, the scanning line 28 has a protrusion 30 on the surface on the + Z direction side. The material of the scanning line 28 is an aluminum alloy. In the process of manufacturing the scanning line 28, a resist film is placed on the aluminum alloy film. Then, the resist film is exposed by a photolithography method and then patterned using a dry etching method.

In the dry etching method, a halogen gas such as Cl ₂ , BCl ₃ , or HBr is used. A part of the halogen gas adheres to the resist film. When the atmosphere contains moisture, an acidic liquid is generated. And an aluminum alloy and an acidic liquid react and a compound is formed. The phenomenon in which this compound is formed is called corrosion. Where the compound is formed, the volume of the aluminum alloy increases and protrudes. Then, the compound forms the protrusion 30. The size of the protrusion 30 is not uniform, and a large place and a small place are irregularly formed. The protrusion 30 formed on the + X direction side of the scanning line 28 is referred to as a first protrusion 30a, and the protrusion 30 formed on the −X direction side of the scanning line 28 is referred to as a second protrusion 30b.

  An element layer interlayer insulating film 18 b is provided so as to cover the scanning line 28. The element layer interlayer insulating film 18 b is disposed following the cross-sectional shape of the scanning line 28. Therefore, the element layer interlayer insulating film 18b also has a shape protruding in the + X direction at a place covering the first protrusion 30a. Since the first protrusion 30a protrudes in the + X direction on the surface on the + X direction side of the scanning line 28, the side surface of the element layer interlayer insulating film 18b is recessed in the −X direction between the first protrusion 30a and the gate insulating film 18a. Become a shape. Let this recessed side surface be the 1st recessed part 31a.

  The element layer interlayer insulating film 18b has a shape protruding in the −X direction even at a location covering the second protrusion 30b. Since the second protrusion 30b protrudes in the −X direction on the surface on the −X direction side of the scanning line 28, the side surface of the element layer interlayer insulating film 18b is recessed in the + X direction between the second protrusion 30b and the gate insulating film 18a. It becomes a shape. This concave side surface is defined as a second concave portion 31b.

  A data signal line 27 is provided on the element layer interlayer insulating film 18b. The process for manufacturing the data signal line 27 is the same as the process for manufacturing the scanning line 28. In the process of manufacturing the data signal line 27, a resist film is placed on the aluminum alloy film. Then, the resist film is exposed by a photolithography method and then patterned using a dry etching method.

  Unnecessary portions of the aluminum alloy film are removed by dry etching. At this time, since the 1st recessed part 31a and the 2nd recessed part 31b are dented, a halogen gas does not react easily. For this reason, an aluminum alloy may not be removed but a part may remain. This remaining metal is referred to as residue 32. The residue 32 is formed outside the element layer interlayer insulating film 18 b on the side surface of the scanning line 28. A data line insulating film 33 as a second insulating film is provided on the element layer interlayer insulating film 18b. The residue 32 is covered with the element layer interlayer insulating film 18 b and the data line insulating film 33.

  FIG. 8 is a schematic side cross-sectional view of the main part showing the structure of the wiring board, as viewed from the cross-sectional side along the line EE in FIGS. 5 and 6. FIG. 8 is a diagram in which the second interlayer insulating film 22 is installed on the wiring board 26. As shown in FIG. 8, an element layer interlayer insulating film 18 b is provided so as to cover the scanning line 28. A first recess 31a and a second recess 31b are formed on the side surface of the element layer interlayer insulating film 18b. Since the data signal line 27 is provided on the element layer interlayer insulating film 18b, a part of the data signal line 27 is located in the first recess 31a and the second recess 31b.

  FIG. 9 is a schematic side cross-sectional view of the main part showing the structure of the wiring board, as viewed from the cross-sectional side along the line FF in FIGS. 5 and 6. FIG. 9 is a diagram in which the second interlayer insulating film 22 is installed on the wiring board 26. As shown in FIG. 9, the element layer interlayer insulating film 18b, the data line insulating film 33, and the residue 32 are removed on the side surface of the first convex portion 28a on the + X direction side. The side surface on the + X direction side of the first convex portion 28 a is covered with the second interlayer insulating film 22. Similarly, the element layer interlayer insulating film 18b, the data line insulating film 33, and the residue 32 are removed on the side surface of the second convex portion 28b on the −X direction side. The side surface on the −X direction side of the second convex portion 28 b is also covered with the second interlayer insulating film 22.

  Returning to FIGS. 5 and 6, the residue 32 is formed along the first recess 31 a and the second recess 31 b formed in parallel with the scanning line 28. The residue 32 is connected to the data signal line 27. The data signal line 27 on the + Y direction side in the figure is a first data signal line 27a, and the data signal line 27 on the −Y direction side in the figure is a second data signal line 27b. The first data signal line 27a and the second data signal line 27b are adjacent data signal lines 27.

  A residue 32 is formed between the first data signal line 27a and the first convex portion 28a, and a residue 32 is also formed between the second data signal line 27b and the first convex portion 28a. In the recess 29, the residue 32 connected to the first data signal line 27a and the residue 32 connected to the second data signal line 27b are separated. Therefore, the residue 32 prevents the first data signal line 27a and the second data signal line 27b from being connected and short-circuited.

  Similarly, a residue 32 is formed between the first data signal line 27a and the second convex portion 28b, and a residue 32 is also formed between the second data signal line 27b and the second convex portion 28b. ing. In the recess 29, the residue 32 connected to the first data signal line 27a and the residue 32 connected to the second data signal line 27b are separated. Therefore, the residue 32 prevents the first data signal line 27a and the second data signal line 27b from being connected and short-circuited.

  Next, a method for manufacturing the above-described wiring board 26 will be described with reference to FIGS. FIG. 10 is a flowchart of a method for manufacturing a wiring board, and FIGS. 11 to 23 are schematic diagrams for explaining the method for manufacturing a wiring board. In the flowchart of FIG. 10, step S1 is a scanning line installation step. This step is a step of installing the scanning line 28 on the gate insulating film 18a. Next, the process proceeds to step S2. Step S2 is an element layer interlayer insulating film installation step. This step is a step of placing the element layer interlayer insulating film 18 b so as to overlap the scanning line 28. Next, the process proceeds to step S3. Step S3 is a data signal line installation step. This step is a step of installing the data signal line 27 on the element layer interlayer insulating film 18b. Next, the process proceeds to step S4. Step S4 is a data line insulating film installation step. This step is a step of installing the data line insulating film 33 on the data signal line 27. Next, the process proceeds to step S5. Step S5 is a residue removal process. This step is a step of removing the residue 32 located on the side surfaces of the first convex portion 28a and the second convex portion 28b. Next, the process proceeds to step S6. Step S6 is a second interlayer insulating film installation step. This step is a step of installing the second interlayer insulating film 22 on the data line insulating film 33. The wiring board 26 is completed through the above steps.

Next, the manufacturing method will be described in detail with reference to FIGS. 11 to 23 in association with the steps shown in FIG.
11 to 13 are diagrams corresponding to the scanning line installation step of step S1. As shown in FIG. 11, a base material 16 on which a gate insulating film 18a is installed is prepared. The substrate 16 is provided with a semiconductor film 21e, a gate insulating film 18a, and a gate electrode 21g. The installation method of the semiconductor film 21e, the gate insulating film 18a, and the gate electrode 21g is well known and will not be described.

  A first metal film 34 is provided on the gate insulating film 18a. The first metal film 34 is a film of the material of the scanning line 28 and is an aluminum alloy film. The first metal film 34 is formed using a sputtering method, a vacuum evaporation method, or a CVD method.

  As shown in FIG. 12, the scanning line 28 is provided by patterning the first metal film 34. First, a resist film is installed on the first metal film 34. Then, the resist film is exposed by a photolithography method and then patterned using a dry etching method. The scanning line 28 is provided with a first convex portion 28a partially protruding in the + X direction and a second convex portion 28b protruding in the −X direction.

  13 is a cross-sectional view taken along line GG in FIG. As shown in FIG. 13, when the scanning line 28 is etched, it reacts with the resist and the halogen gas to form the protrusions 30 of the first protrusion 30 a and the second protrusion 30 b on the scanning line 28. The protrusion 30 is formed on the surface of the scanning line 28, and is particularly easily formed at a corner.

FIG. 14 is a diagram corresponding to the element layer interlayer insulating film installation step of step S2. As shown in FIG. 14, in step S2, an element layer interlayer insulating film 18b is provided on the gate insulating film 18a and the scanning line. The element layer interlayer insulating film 18 b is provided so as to cover the scanning line 28. The element layer interlayer insulating film 18b is a SiO ₂ film and is formed by using a vacuum evaporation method or a CVD method. Since the element layer interlayer insulating film 18b is provided on the surface of the scanning line 28, the element layer interlayer insulating film 18b is a film along the surface of the scanning line 28. Therefore, the element layer interlayer insulating film 18b has a protruding shape at the protrusion 30. The element layer interlayer insulating film 18 b is recessed with respect to the protrusion 30 on the + X direction side and the −X direction side of the scanning line 28. On the + X direction side of the scanning line 28, the element layer interlayer insulating film 18b becomes the first recess 31a, and on the −X direction side of the scanning line 28, the element layer interlayer insulating film 18b becomes the second recess 31b.

  15 to 17 are diagrams corresponding to the data signal line installation step of step S3. As shown in FIG. 15, in step S3, the second metal film 35 is provided on the element layer interlayer insulating film 18b. The second metal film 35 is a film of the material of the data signal line 27, and is a film of an aluminum alloy. The second metal film 35 is formed using a sputtering method, a vacuum evaporation method, or a CVD method. The second metal film 35 is disposed following the surface shape of the element layer interlayer insulating film 18b.

  As shown in FIG. 16, the second metal film 35 is patterned to install the data signal line 27. First, a resist film is installed on the second metal film 35. Then, the resist film is exposed by a photolithography method and then patterned using a dry etching method. A first data signal line 27a is provided on the + Y direction side of the first and second convex portions 28a and 28b, and second data is provided on the −Y direction side of the first and second convex portions 28a and 28b. A signal line 27b is installed.

  17 is a cross-sectional view taken along the line HH in FIG. As shown in FIG. 17, the residue 32 which is the remainder of the etching of the second metal film 35 is formed in the first recess 31a and the second recess 31b. The residue 32 is formed along the side surface of the scanning line 28 in the Y direction. At this time, if the residue 32 remains continuously between the first data signal line 27a and the second data signal line 27b, the first data signal line 27a and the second data signal line 27b are short-circuited, and a correct signal is obtained. Is no longer transmitted.

18 to 20 are diagrams corresponding to the data line insulating film installing step in step S4. FIG. 19 is a schematic cross-sectional view of an essential part along the II plane in FIG. As shown in FIGS. 18 and 19, in step S4, the data line insulating film 33 is provided on the data signal line 27 and the element layer interlayer insulating film 18b. The data line insulating film 33 is a SiO ₂ film and is formed by sputtering, vacuum deposition or CVD. Since the data line insulating film 33 covers the data signal line 27, it is possible to prevent dust and the like from adhering to the data signal line 27. Therefore, current can be prevented from leaking from the data signal line 27 through dust or the like.

  The scanning line 28 is covered with the element layer interlayer insulating film 18b. The residue 32 remaining on the element layer interlayer insulating film 18 b and the element layer interlayer insulating film 18 b on the side surface side of the scanning line 28 is covered with the data line insulating film 33.

  20 is a schematic cross-sectional view of an essential part along the JJ plane in FIG. As shown in FIG. 20, on the side surface on the + X direction side of the first convex portion 28a, the element layer interlayer insulating film 18b, the residue 32, and the data line insulating film 33 are disposed so as to overlap in the + X direction. The residue 32 may connect the first data signal line 27a and the second data signal line 27b. At this time, since the first data signal line 27a and the second data signal line 27b are short-circuited, the signal transmitted by the data signal line 27 is not correctly transmitted.

  Similarly, the element layer interlayer insulating film 18b, the residue 32, and the data line insulating film 33 are also placed on the −X direction side surface on the side surface of the second convex portion 28b on the −X direction side. The residue 32 may connect the first data signal line 27a and the second data signal line 27b. Even at that time, the first data signal line 27a and the second data signal line 27b are short-circuited, so that the signal transmitted by the data signal line 27 is not correctly transmitted.

  21 and 22 are diagrams corresponding to the residue removing process in step S5. FIG. 21 is a schematic plan view of an essential part for explaining the recess 29, and FIG. 22 is a schematic side sectional view taken along the plane KK of FIG. Both show the state after the residue 32 is removed. As shown in FIGS. 21 and 22, in step S5, a concave portion 29 is formed on the + X direction side of the first convex portion 28a. Further, the concave portion 29 is formed on the −X direction side of the second convex portion 28b. In the recess 29, the scanning line 28 is exposed.

  Step S5 will be described. A resist film is provided on the data line insulating film 33. Then, the resist film is exposed by a photolithography method and then patterned using a dry etching method. The data line insulating film 33, the residue 32, and a part of the element layer interlayer insulating film 18b are removed by etching. By removing, the recess 29 is formed. Since the residue 32 is removed in the recess 29, the residue 32 connected to the first data signal line 27a and the residue 32 connected to the second data signal line 27b are separated. Therefore, it is possible to prevent the current from leaking through the residue 32 between the first data signal line 27a and the second data signal line 27b.

  When the residue is removed, the element layer interlayer insulating film 18b on the first interlayer insulating film 17 located in the recess 29 is also removed. Further, the data line insulating film 33, the residue 32, and a part of the element layer interlayer insulating film 18b on the + X direction side of the first protrusion 28a are removed. Further, the data line insulating film 33, the residue 32, and a part of the element layer interlayer insulating film 18b on the −X direction side of the second convex portion 28b are removed. Since the residue 32 is located on the element layer interlayer insulating film 18b, when only the residue 32 is removed while leaving the element layer interlayer insulating film 18b, the residue 32 is likely to remain on the element layer interlayer insulating film 18b. On the other hand, when removing the element layer interlayer insulating film 18b in addition to the residue 32, the residue 32 can be surely removed.

  Further, in the first convex portion 28a and the second convex portion 28b, the scanning line 28 viewed from the Y direction is wider than the places other than the first convex portion 28a and the second convex portion 28b. Therefore, even if the first convex portion 28a and the second convex portion 28b are removed, it is possible to suppress the cross-sectional area of the scanning line 28 from being reduced and the resistance value from being increased.

  FIG. 23 is a diagram corresponding to the second interlayer insulating film installation step of step S6. As shown in FIG. 23, in step S6, the second interlayer insulating film 22 is provided on the data line insulating film 33 and in the recess 29. In the recess 29, the second interlayer insulating film 22 covers the place where the scanning line 28 is exposed. Even if the scanning line 28 is exposed, the second interlayer insulating film 22 covers the scanning line 28, so that it is possible to prevent current from leaking from the scanning line 28 through dust or the like.

  The second interlayer insulating film 22 is a resin film such as an acrylic resin. A solution in which the resin is dissolved is applied onto the element layer 18 by a spinner or a roll coater and dried. Next, the second interlayer insulating film 22 is patterned using a photolithography method as necessary. The wiring board 26 is completed through the above steps.

As described above, this embodiment has the following effects.
(1) According to this embodiment, the residue 32 may remain in the first recess 31a and the second recess 31b. When the residue 32 is connected to the adjacent data signal lines 27, the current leaks through the residue 32. In the present embodiment, since a part of the residue 32 is removed in the residue removal process in step S5, it is possible to prevent the current from leaking through the residue 32.

  (2) According to the present embodiment, when the residue 32 is removed in the residue removal step of step S5, a part of the element layer interlayer insulating film 18b is also removed. Since the residue 32 is located on the element layer interlayer insulating film 18b, when only the residue 32 is removed while leaving the element layer interlayer insulating film 18b, the residue 32 is likely to remain on the element layer interlayer insulating film 18b. On the other hand, when part of the element layer interlayer insulating film 18b is removed in addition to the residue 32, the residue 32 can be surely removed.

  (3) According to the present embodiment, the data line insulating film 33 is provided so as to cover the data signal line 27 before the residue 32 is removed. Since the data line insulating film 33 covers the data signal line 27, it is possible to prevent dust and the like from adhering to the data signal line 27. Therefore, current can be prevented from leaking from the data signal line 27 through dust or the like.

  (4) According to the present embodiment, the second interlayer insulating film 22 is installed at the place where the residue 32 is removed. In the place where the residue 32 is removed, the scanning line 28 is exposed. Since the second interlayer insulating film 22 covers the scanning line 28, it is possible to prevent current from leaking from the scanning line 28 through dust and the like.

  (5) According to the present embodiment, the scanning line 28 has the first convex portion 28 a and the second convex portion 28 b that protrude in the planar direction of the base material 16. And the residue 32 in the 1st convex part 28a and the 2nd convex part 28b is removed. When the residue 32 is removed, a part of the scanning line 28 is removed. At this time, since the part where the scanning line 28 is partially removed is the first convex part 28a and the second convex part 28b, the resistance value of the scanning line 28 can be prevented from being increased.

  (6) According to the present embodiment, a plurality of data signal lines 27 are installed crossing the scanning lines 28. Then, the residue 32 between the adjacent first data signal line 27a and second data signal line 27b is removed. Therefore, it is possible to prevent current from leaking through the residue 32 between the adjacent data signal lines 27.

  (7) According to the present embodiment, on the wiring board 26, the scanning line 28, the element layer interlayer insulating film 18 b, and the data signal line 27 are disposed on the base material 16 in this order. Then, on the side surface side of the scanning line 28, a first recess 31a and a second recess 31b are provided in the element layer interlayer insulating film 18b. A residue 32 may be formed in the first recess 31 a and the second recess 31 b, and current may leak due to the residue 32. By forming the recess 29 in the element layer interlayer insulating film 18b, the residue 32 is removed together with the element layer interlayer insulating film 18b. Therefore, since the residue 32 is interrupted, it is possible to prevent current from leaking through the residue 32.

  (8) According to the present embodiment, the electrophoretic display device 1 includes the wiring board 26. The wiring board 26 is provided with a switching element 21 and a scanning line 28 connected to the switching element 21. In the wiring board 26, even when the residue 32 is present on the side surface of the scanning line 28, a part of the residue 32 is removed, and current leakage between the first data signal line 27a and the second data signal line 27b occurs. It is prevented. Therefore, the electrophoretic display device 1 can be a device including the wiring substrate 26 in which current leakage due to the residue 32 is prevented.

(Second Embodiment)
An embodiment different from the first embodiment will be described with reference to FIGS. The present embodiment is different from the first embodiment in that the first convex portion 28 a and the second convex portion 28 b are not provided on the scanning line 28. In addition, the same number is given about the component similar to 1st Embodiment, The description may be abbreviate | omitted. In addition, the flowchart of FIG. 10 can be diverted for description of the manufacturing method in this embodiment.

  24 and 25 are views showing a state in which the data line insulating film installation step in step S4 has been completed. FIG. 24 is a schematic plan view of the main part showing the structure of the wiring board 38. FIG. 25 is a schematic side sectional view showing a main part of the structure of the wiring board 38, and is a sectional view taken along line LL in FIG. As shown in FIGS. 24 and 25, the wiring board 38 installed in the electrophoretic display device 37 includes a base material 16. On the base material 16, a first interlayer insulating film 17 and a gate insulating film 18a are provided.

  A scanning line 41 is provided on the gate insulating film 18a. The scanning line 41 extends linearly in the Y direction. An element layer interlayer insulating film 18b is provided on the gate insulating film 18a and the scanning line 41. A data signal line 27 of a first data signal line 27a and a second data signal line 27b extending linearly in the X direction is provided on the element layer interlayer insulating film 18b. The data signal line 27 and the scanning line 41 are orthogonal to each other.

  A first recess 31a and a second recess 31b are formed on the side surface side of the element layer interlayer insulating film 18b. And the residue 32 is formed in the 1st recessed part 31a and the 2nd recessed part 31b. The first data signal line 27a and the second data signal line 27b are connected by the residue 32.

  FIG. 26 and FIG. 27 are diagrams corresponding to the residue removing process in step S5. 26 and 27 are views showing a state in which the residue removing process in step S5 is completed. FIG. 26 is a schematic plan view of an essential part showing the structure of the wiring board 38. FIG. 27 is a schematic side sectional view of the main part showing the structure of the wiring board 38, as viewed from the cross section along the line MM in FIG. As shown in FIG.26 and FIG.27, the recessed part 42 is installed in step S5. In the recess 42, the scanning line 41 is exposed.

  A resist film is provided on the data line insulating film 33. Then, the resist film is exposed by a photolithography method and then patterned using a dry etching method. In the etching, the scanning line 41, the data line insulating film 33, the residue 32, and a part of the element layer interlayer insulating film 18b are removed. Specifically, a part of the scanning line 41, the element layer interlayer insulating film 18b, the residue 32, and the data line insulating film 33 on the surface on the + X direction side and the surface on the −X direction side of the scanning line 41 is removed. Further, the element layer interlayer insulating film 18b and the data line insulating film 33 on the gate insulating film 18a are partially removed.

  By removing, the recess 42 is installed. Since the residue 32 is removed in the recess 42, the residue 32 connected to the first data signal line 27a and the residue 32 connected to the second data signal line 27b are separated. Therefore, it is possible to prevent the current from leaking through the residue 32 between the first data signal line 27a and the second data signal line 27b.

  When the recess 42 is installed, a part of the scanning line 41 is removed. Since the resistance of the scanning line 41 increases when the width of the scanning line 41 positioned between the concave portions 42 becomes narrow, the concave portion 42 needs to be installed with high positional accuracy.

  FIG. 28 is a diagram corresponding to the second interlayer insulating film installation step of step S6. As shown in FIG. 28, in step S6, the second interlayer insulating film 22 is provided on the data line insulating film 33 and in the recess 42. In the recess 42, the second interlayer insulating film 22 covers the place where the scanning line 41 is exposed. Even if the scanning line 41 is exposed, the second interlayer insulating film 22 covers the scanning line 41, so that it is possible to prevent current from leaking from the scanning line 41 through the dust.

As described above, this embodiment has the following effects.
(1) According to the present embodiment, the concave portion 42 is installed between the first data signal line 27a and the second data signal line 27b without installing the first convex portion 28a and the second convex portion 28b. . Therefore, even when the distance between the first data signal line 27a and the second data signal line 27b is short and the first convex portion 28a and the second convex portion 28b cannot be installed, the residue 32 causes the first data signal line 27a to It is possible to prevent the second data signal line 27b from being short-circuited.

(Third embodiment)
Next, an embodiment of an electronic device equipped with an electrophoretic display device will be described with reference to FIGS. FIG. 29 is a schematic perspective view showing the structure of an electronic book, and FIG. 30 is a schematic perspective view showing the structure of a wristwatch. As shown in FIG. 29, an electronic book 45 as an electronic device includes a plate-like case 46. A lid 48 is installed on the case 46 via a hinge 47. Further, the operation button 49 and a display unit 50 as a display device are installed in the case 46. The operator can operate the operation button 49 to operate the contents displayed on the display unit 50.

  Inside the case 46, a control unit 51 for controlling the electronic book 45 and a drive unit 52 for driving the display unit 50 are installed. The control unit 51 outputs display data to the drive unit 52. The drive unit 52 inputs display data and drives the display unit 50. Then, the drive unit 52 causes the display unit 50 to display content corresponding to the display data. Either the electrophoretic display device 1 or the electrophoretic display device 37 is used for the display unit 50. Therefore, the electronic book 45 can be a device including the wiring board 26 or the wiring board 38 in which current is prevented from leaking between adjacent data signal lines 27.

  As shown in FIG. 30, a wristwatch 55 as an electronic device includes a plate-like case 56. A band 57 is installed in the case 56, and the operator can wind the band 57 around the arm and fix the watch 55 on the arm. Further, the case 56 is provided with an operation button 58 and a display unit 59 as a display device. The operator can operate the operation button 58 to operate the contents displayed on the display unit 59.

  A control unit 60 that controls the wristwatch 55 and a drive unit 61 that drives the display unit 59 are installed inside the case 56. The control unit 60 outputs display data to the drive unit 61. The drive unit 61 inputs display data and drives the display unit 59. Then, the drive unit 61 causes the display unit 59 to display contents corresponding to the display data. In the display unit 59, either the electrophoretic display device 1 or the electrophoretic display device 37 is used. Therefore, the wristwatch 55 can be a device including the wiring board 26 or the wiring board 38 that prevents current from leaking between the adjacent data signal lines 27.

Note that the present embodiment is not limited to the above-described embodiment, and various changes and improvements can be added by those having ordinary knowledge in the art within the technical idea of the present invention. A modification will be described below.
(Modification 1)
In the first embodiment, the recess 29 is provided by using an etching method. At this time, the residue 32 was removed. The method of removing the residue 32 may be other than the etching method. For example, the residue 32 may be removed by irradiating the residue 32 with laser light. The etching method may be a wet etching method.

(Modification 2)
In the first embodiment, the concave portion 29 is provided at an intermediate location between the first data signal line 27a and the second data signal line 27b. The place where the recess 29 is installed may be a place close to the data signal line 27. The concave portion 29 may be installed at a place where the wiring board 26 can be easily installed. In addition, the recess 29 may be installed at all locations between the first data signal line 27a and the second data signal line 27b. Further, the number of the recesses 29 provided between the first data signal line 27a and the second data signal line 27b may be two or more.

(Modification 3)
In the first embodiment, the residue removal process of step S5 is performed after the data line insulating film installation process of step S4. Step S5 may be performed after the data signal line installation step of step S3. The residue 32 can be removed also in this process order.

(Modification 4)
In the first embodiment, the data signal line 27 is covered with the data line insulating film 33 and the data line insulating film 33 is further covered with the second interlayer insulating film 22. When the function of the data line insulating film 33 can be performed by the second interlayer insulating film 22, the data line insulating film 33 may not be provided. Since the data line insulating film installation step in step S4 can be omitted, the wiring board 26 can be manufactured with high productivity. The contents of Modifications 1 to 4 may be applied to the second embodiment.

(Modification 5)
In the first embodiment, the example of the element substrate 2 used in the electrophoretic display device 1 has been described. However, a method of manufacturing a wiring board in a device other than the electrophoretic display device 1 may be used. Even in a wiring board using this manufacturing method, current can be prevented from leaking through the residue 32.

  DESCRIPTION OF SYMBOLS 1 ... Electrophoretic display apparatus as a display apparatus, 16 ... Base material as a board | substrate, 18b ... Element layer interlayer insulation film as a 1st insulating film, 21 ... Switching element, 22 ... 2nd interlayer insulation as a 3rd insulation film Membrane, 26... Wiring substrate, 27... Data signal line as wiring and second wiring, 28... Scanning line as wiring and first wiring, 28 a... First convex as convex, 28 b. 2 convex portions, 29, 42 ... concave portions, 32 ... residue, 33 ... data line insulating film as second insulating film, 34 ... first metal film, 35 ... second metal film, 45 ... electronic book as electronic equipment, 50, 59... Display section, 51, 60... Control section, 55.

Claims (9)

Placing a first metal film on the substrate, patterning the first metal film and installing a first wiring;
Covering the first wiring with a first insulating film;
Placing a second metal film on the first insulating film, patterning the second metal film, and installing a second wiring;
A method of manufacturing a wiring board, comprising: removing a residue of the second metal film formed on a side surface of the first wiring after patterning the second metal film. It is a manufacturing method of the wiring board according to claim 1,
A method of manufacturing a wiring board, wherein when removing the residue, a part of the first insulating film is also removed. It is a manufacturing method of the wiring board according to claim 1 or 2,
Between the installation of the second wiring and the removal of the residue;
A method of manufacturing a wiring board, comprising: a second insulating film covering the second wiring. It is a manufacturing method of the wiring board according to any one of claims 1 to 3,
A method of manufacturing a wiring board, comprising: installing a third insulating film at a place where the residue is removed. It is a manufacturing method of the wiring board according to any one of claims 1 to 4,
The first wiring has a protrusion protruding in the plane direction of the substrate,
The place for removing the residue is the convex portion. It is a manufacturing method of the wiring board according to any one of claims 1 to 5,
A plurality of the second wirings are installed crossing the first wiring,
A method of manufacturing a wiring board, comprising removing the residue between the adjacent second wirings. A substrate,
A first wiring installed on the substrate;
A first insulating film installed to cover the first wiring;
A second wiring disposed on the first insulating film;
A wiring board comprising: a concave portion in which the first insulating film is recessed on a side surface side of the first wiring. A wiring board provided with a switching element and wiring connected to the switching element;
A display device, wherein the wiring board is the wiring board according to claim 7. A display unit;
A control unit for supplying information displayed by the display unit,
The electronic device according to claim 8, wherein the display unit is the display device according to claim 8.

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