JP2017085712A - Power converter - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a power converter capable of miniaturizing a control circuit board.SOLUTION: The power converter includes a plurality of semiconductor elements 20 and a control circuit board 3. On the control circuit board 3, a plurality of control circuits 4 for controlling switching operation of the semiconductor elements 20 are formed. The plurality of control circuits 4 are arranged in two rows. The control circuit board 3 is partitioned into a first region A1 and a second region A2 in which rows of the control circuit 4 are formed, respectively. The first region A1 and the second region A2 are adjacent to each other in the width direction (Y direction). A plurality of upper arm control circuits 4u are formed adjacent to each other in the arrangement direction (X direction) in each of the first region A1 and the second region A2. A plurality of lower arm control circuits 4d are formed adjacent to each other in the X direction.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a power conversion device including a plurality of semiconductor elements and a control circuit board that controls the operation of the semiconductor elements.

  2. Description of the Related Art As a power conversion device that performs power conversion between DC power and AC power, a device that includes a plurality of semiconductor elements and a control circuit board that controls the operation of the semiconductor elements is known (see Patent Document 1 below). ). The control circuit board is formed with a plurality of control circuits that are electrically connected to the semiconductor element via the control terminals. Switching operations of individual semiconductor elements are controlled by individual control circuits. Thereby, the DC power supplied from the DC power source is converted into AC power.

  The control circuit includes an upper arm control circuit connected to a semiconductor element on the upper arm side and a lower arm control circuit connected to a semiconductor element on the lower arm side. In the power converter, all upper arm control circuits are arranged in a line in a predetermined direction (arrangement direction) (see FIG. 13). Similarly, all the lower arm control circuits are arranged in a line in the arrangement direction. The upper arm control circuit and the lower arm control circuit are adjacent to each other in the width direction orthogonal to both the thickness direction and the arrangement direction of the control circuit board.

  As will be described later, when the upper arm semiconductor element is turned on, the potential of the control terminal may rise to about several hundred volts. Therefore, it is necessary to provide a sufficiently long insulation distance between the two upper arm control circuits adjacent in the arrangement direction.

  Further, when the lower arm semiconductor element is turned on, the potential of the control terminal rises only to about several tens of volts. Therefore, it is not necessary to provide a particularly long insulation distance between two lower arm control circuits adjacent in the arrangement direction, and the two lower arm control circuits can be brought close to each other.

JP 2013-51747 A

  However, the power conversion device has a problem that it is difficult to reduce the size of the control circuit board. That is, as described above, in the power converter, all the upper arm control circuits are arranged in a line in the arrangement direction. Further, it is necessary to provide a sufficiently long insulation distance between two upper arm control circuits adjacent in the arrangement direction. Therefore, with the above configuration, the insulation distance between the two upper arm control circuits is accumulated in the arrangement direction, and the arrangement direction length of the control circuit board becomes long. Therefore, it is difficult to reduce the size of the control circuit board.

  The present invention has been made in view of such a background, and an object of the present invention is to provide a power conversion device capable of downsizing a control circuit board.

One embodiment of the present invention includes a plurality of semiconductor elements (20),
A control circuit board (3) for controlling the switching operation of the semiconductor element,
The control circuit board is formed with a plurality of control circuits (4) electrically connected to the semiconductor elements via control terminals (22), and the switching operations of the individual semiconductor elements are controlled by the individual control circuits. And
The plurality of control circuits are arranged in at least two rows, and the control circuit board is divided into a first region (A1) and a second region (A2) in which the control circuit row (41) is formed. The first region and the second region are adjacent to each other in the width direction orthogonal to both the arrangement direction of the control circuits and the thickness direction of the control circuit board,
The control circuit includes an upper arm control circuit (4u) connected to the semiconductor element on the upper arm side, and a lower arm control circuit (4d) connected to the semiconductor element on the lower arm side, and the first region And a plurality of upper arm control circuits are formed adjacent to each other in the arrangement direction, and a plurality of lower arm control circuits are formed adjacent to each other in the arrangement direction. Is in the power converter (1).

In the power converter, a plurality of upper arm control circuits are formed adjacent to each other in the arrangement direction in each of the first region and the second region, and a plurality of lower arm control circuits are arranged. They are formed adjacent to each other in the direction.
Therefore, the control circuit board can be reduced in size. That is, with the above configuration, the upper arm control circuit is divided into the first region and the second region, so that all the upper arm control circuits are not arranged in a line. Therefore, it is possible to suppress the insulation distance between the two upper arm control circuits from accumulating in the arrangement direction. Therefore, the length of the control circuit board in the arrangement direction can be shortened, and the control circuit board can be downsized.

As mentioned above, according to the said aspect, the power converter device which can reduce a control circuit board in size can be provided.
In addition, the code | symbol in the parenthesis described in the means to solve a claim and a subject shows the correspondence with the specific means as described in embodiment mentioned later, and limits the technical scope of this invention. It is not a thing.

It is sectional drawing of the power converter device in Embodiment 1, Comprising: It is II sectional drawing of FIG. It is sectional drawing of the power converter device in Embodiment 1, Comprising: II-II sectional drawing of FIG. III-III sectional drawing of FIG. The circuit diagram of the power converter device in Embodiment 1. FIG. FIG. 3 is a conceptual diagram of a control circuit board in the first embodiment. FIG. 3 is a diagram for explaining the reason why a high voltage is applied between upper arm semiconductor elements in the first embodiment. 1 is a conceptual diagram of a power supply circuit in Embodiment 1. FIG. Sectional drawing of the power converter device in Embodiment 2. FIG. The circuit diagram of the power converter device in Embodiment 2. FIG. Sectional drawing of the power converter device in Embodiment 3. FIG. Sectional drawing of the power converter device in Embodiment 4. FIG. Sectional drawing of the power converter device in Embodiment 5. FIG. Sectional drawing of the power converter device in a comparison form.

  The said power converter device can be used as the vehicle-mounted power converter device mounted in an electric vehicle or a hybrid vehicle.

(Embodiment 1)
An embodiment according to the power conversion device will be described with reference to FIGS. As shown in FIGS. 2 and 3, the power conversion device 1 of this embodiment includes a plurality of semiconductor elements 20 and a control circuit board 3 that controls the switching operation of the semiconductor elements 20.
As shown in FIG. 1, a plurality of control circuits 4 that are electrically connected to the semiconductor element 20 via the control terminals 22 are formed on the control circuit board 3. Switching operations of the individual semiconductor elements 20 are controlled by the individual control circuits 4.

  The plurality of control circuits 4 are arranged in two rows. The control circuit board 3 is partitioned into a first area A1 and a second area A2 in which the columns 41 of the control circuit 4 are respectively formed. The first region A1 and the second region A2 are adjacent to each other in the width direction (Y direction) orthogonal to both the arrangement direction (X direction) of the control circuits 4 and the thickness direction (Z direction) of the control circuit board 3. Matching.

  The control circuit 4 includes an upper arm control circuit 4u connected to the upper arm side semiconductor element 20u (see FIG. 4) and a lower arm control circuit 4d connected to the lower arm side semiconductor element 20d. A plurality of upper arm control circuits 4u are formed adjacent to each other in the X direction in each of the first region A1 and the second region A2, and a plurality of lower arm control circuits 4d are adjacent to each other in the X direction. It is formed as follows.

  As shown in FIGS. 2 and 3, the semiconductor element 20 is built in the main body 21 of the semiconductor module 2. The control terminal 22 protrudes from the main body 21 and is connected to the control circuit 4. Further, as shown in FIG. 2, in this embodiment, the stacked body 10 is configured by stacking the semiconductor module 2 and the cooling pipe 12. The stacking direction of the stacked body 10 coincides with the arrangement direction (X direction).

  The power conversion device 1 of this embodiment is a vehicle-mounted power conversion device to be mounted on a vehicle such as an electric vehicle or a hybrid vehicle. As shown in FIG. 4, in this embodiment, an IGBT element is used as the semiconductor element 20. Each semiconductor element 20 is electrically connected to the positive bus bar 6p or the negative bus bar 6n. Further, the power conversion apparatus 1 includes a boosting reactor 72 and a smoothing capacitor 71.

  As shown in FIG. 4, the power conversion device 1 includes a first semiconductor element group 5a and a second semiconductor element group 5b. The first semiconductor element group 5a includes a plurality of upper arm semiconductor elements 20u and a plurality of lower arm semiconductor elements 20d, and is connected to the first AC load 8a. The second semiconductor element group 5b includes a plurality of upper arm semiconductor elements 20u and a plurality of lower arm semiconductor elements 20d, and is connected to the second AC load 8b. These semiconductor element groups 5a and 5b constitute inverter circuits 101 and 102, respectively.

  As shown in FIG. 4, the upper arm semiconductor element 20u and the lower arm semiconductor 20d form a third semiconductor element group 5c constituting the booster circuit 103. In this embodiment, the voltage of the DC power supply 81 is boosted by switching the semiconductor elements 20 included in the third semiconductor element group 5c. Further, the boosted DC voltage is smoothed by the capacitor 71. The boosted DC power is converted to AC power by switching the semiconductor elements 20 included in the first semiconductor element group 5a or the second semiconductor element group 5b. As a result, the AC load 8 (three-phase AC motor) is driven to drive the vehicle.

  As shown in FIG. 3, the semiconductor module 2 includes a power terminal 23 protruding from the main body 21. The power terminal 23 includes a positive terminal 23p connected to the positive bus bar 6p (see FIG. 4), a negative terminal 23n connected to the negative bus bar 6n, and an AC terminal 23c connected to the AC load 8.

  As shown in FIG. 2, the laminated body 10 is disposed in the case 17. The plurality of cooling pipes 12 adjacent to each other in the X direction are connected by connecting pipes 16 at both ends in the Y direction. Further, among the plurality of cooling pipes 12, an end cooling pipe 12a positioned at one end in the X direction is formed with an introduction pipe 13 for introducing the refrigerant 15 and a lead-out pipe 14 for leading out the refrigerant 15. Has been. When the refrigerant 15 is introduced from the introduction pipe 13, the refrigerant 15 flows through all the cooling pipes 12 through the connecting pipe 16 and is led out from the outlet pipe 14. Thereby, the semiconductor module 2 is cooled.

  Further, a pressure member 18 (leaf spring) is disposed between the laminate 10 and the wall portion 170 of the case 17. The pressurizing member 18 presses the laminated body 10 toward the capacitor 71. Thereby, the laminated body 10 is fixed in the case 17 while ensuring a contact pressure between the cooling pipe 12 and the semiconductor module 2.

  As shown in FIG. 1, a power supply circuit 31 for supplying power to the control circuit 4 is formed on the control circuit board 3. As described above, the control circuit 4 includes the upper arm control circuit 4u connected to the upper arm semiconductor element 20u (see FIG. 2) and the lower arm control circuit 4d connected to the lower arm semiconductor element 20d. A plurality of upper arm control circuits 4u adjacent to each other in the X direction and a plurality of lower arm control circuits 4d adjacent to each other in the X direction are formed in each of the first region A1 and the second region A2.

  A relatively wide insulating region (wide insulating region 48) is formed between two upper arm control circuits 4u adjacent in the X direction. A wide insulating region 48 is also formed between the upper arm control circuit 4u and the lower arm control circuit 4d. In addition, an insulating region (narrow insulating region 49) narrower than the wide insulating region 48 is formed between two lower arm control circuits 4d adjacent in the X direction.

As described above, in this embodiment, the plurality of semiconductor elements 20 form the first semiconductor element group 5a and the second semiconductor element group 5b. As shown in FIG. 1, the arm control circuit 4u _a on all connected to the first semiconductor element group 5a, all the lower arm control circuit 4d _b connected to the second semiconductor element group 5b is formed in the first region A1 Has been. Also, all of the lower arm control circuit 4d _a connected to the first semiconductor element group 5a, all the upper arm control circuit 4u _b connected to the second semiconductor element group 5b are formed in the second region A2.

As shown in FIG. 1, the control circuit board 3 is formed with two power supply circuits 31 including a first power supply circuit 31a and a second power supply circuit 31b. These power supply circuits 31a and 31b are formed between the first region A1 and the second region A2. The first power supply circuit 31a, the control circuit 4u _a for the first semiconductor element group 5a, and supplies power to 4d _a. The other of the power supply circuit 31b, the control circuit 4u _b for the second semiconductor element group 5b, 4d _b, and the third control circuit 4u _c for semiconductor element group 5c, and supplies power to 4d _c.

As shown in FIG. 1, all upper arm control circuits 4 u connected to the same power supply circuit 31 are formed in one area A of the two areas A of the first area A <b> 1 and the second area A <b> 2. In the region A, all the lower arm control circuits 4u connected to the same power supply circuit 31 are formed. For example, the first region A1, all the upper arm control circuit 4u _a connected to the first power supply circuit 31a is formed, the second region A2, all of the lower arm control circuit connected to the first power supply circuit 31a 4d _a Is formed. Further, in the first area A1, the second power supply circuit 31b all the lower arm control circuit _4d connected to b, 4d _c is formed, the second region A2, all of the upper arm control connected to the second power supply circuit 31b circuit 4u _b, 4u _c are formed.

Next, the reason why it is necessary to form the wide insulating region 48 between two upper arm control circuits 4u adjacent in the X direction will be described. As shown in FIG. 6, the upper arm semiconductor element 20u and the lower arm semiconductor element 20d are connected in series. Further, two upper arm semiconductor devices _20u x, 20u _y are adjacent, the two lower arm semiconductor element _20d x, 20d _y are adjacent.

Here, arm semiconductor devices 20u _x on included in one leg 9x is turned on, the lower arm semiconductor element 20d _x is turned off, the arm semiconductor devices 20u _y on included in the other leg 9y off, Given the state in which the lower arm semiconductor element 20d _y is turned on. A voltage is applied to the gate terminal 22g of the semiconductor element 20 with reference to the emitter terminal E. That is, when a voltage higher by, for example, several tens of volts is applied to the emitter terminal E, the semiconductor element 20 is turned on.

When one of the upper arm semiconductor element 20u _x is turned on, the emitter terminal E is substantially the same potential as the positive side bus bar 6p. Therefore, the potential of the emitter terminal E is, for example, about 200V. Therefore, the potential of the gate terminal 22g of one of the upper arm semiconductor element 20u _x is a value obtained by adding the ON voltage (10 several V) to 200V. Further, the arm semiconductor devices 20u _y above the other for off, the potential of the gate terminal 22g of the other upper arm semiconductor element 20u _y is almost 0V. Therefore, a voltage of 200 V or more is generated between these gate terminals 22g. Therefore, the control circuit 4 (upper arm control circuit 4a) connected to the gate terminal 22g of the upper arm semiconductor element 20 needs to be sufficiently insulated from the adjacent upper arm control circuit 4a, and the wide insulating region 48 needs to be formed. Occurs.

Further, when the other of the lower arm semiconductor element 20d _y is turned on, the emitter terminal E is the same potential, that is, the GND potential and the negative side bus bar 6n. Therefore, the potential of the gate terminal 22g of the lower arm semiconductor element 20d _y, ON voltage, i.e. only about 10 number V not rise. Further, since the adjacent lower arm semiconductor element 20d _x is off, the potential of the gate terminal 22g of the lower arm semiconductor element 20d _x is almost 0V. Therefore, a voltage of only about a few tens of volts is applied between the gate terminals 22g of the adjacent lower arm semiconductor elements 20 at the maximum. Therefore, it is sufficient that the control circuit 4 (lower arm control circuit 4d) connected to the gate terminal 22g of the lower arm semiconductor element 20 is provided with the narrow insulating region 49 between the adjacent lower arm control circuit 4d.

  Next, the configuration of the control circuit board 3 will be described. As shown in FIG. 5, a low potential circuit 400 is formed on the control circuit board 3 in addition to the control circuit 4 and the power supply circuit 31 described above. An insulating photocoupler 32 is provided between the low potential circuit 400 and the control circuit 4. The control circuit 4 includes a gate IC 43, a temperature detection circuit 44, a predrive circuit 45, a short circuit protection circuit 46, and an overcurrent protection circuit 47.

The gate IC 43 determines whether or not to interrupt the semiconductor element 20 in an emergency. The drive signal transmitted from the ECU 91 is input to the gate IC 43 via the photocoupler 32 and then input to the predrive circuit 45. In this embodiment, the drive voltage is amplified by the pre-drive circuit 45 and the semiconductor element 20 is switched. Further, the short circuit protection circuit 46 and the overcurrent protection circuit 47 are connected to the sense emitter SE of the semiconductor element 20. A part of the emitter current _IE is taken out from the sense emitter SE and detected by the short-circuit protection circuit 46 and the overcurrent protection circuit 47. When the semiconductor element 20 is short-circuited, the short-circuit protection circuit 46 interrupts the pre-drive circuit 45. When the overcurrent protection circuit 47 detects an overcurrent, the gate IC 43 stops the switching operation of the semiconductor element 20. The temperature detection circuit 44 is connected to the temperature sensitive diode 29 in the semiconductor module 2. Even when the temperature detection circuit 44 determines that the semiconductor module 2 is overheated, the gate IC 43 stops the switching operation of the semiconductor element 20.

  When an overcurrent is detected, a fail signal is generated from the gate IC 43, and this fail signal is transmitted to the ECU 91 via the photocoupler 32 and the holding circuit 401. The temperature signal generated from the temperature detection circuit 44 is transmitted to the ECU 91 via the photocoupler 32 and the temperature signal I / F circuit 402.

  Next, the power supply circuit 31 will be described. As shown in FIG. 7, the power supply circuit 31 includes a transformer 310, a switching circuit 311, a rectifier circuit 312, and a smoothing capacitor 313. The switching circuit 311 is connected to the primary coil 318 of the transformer 310. The transformer 310 includes a plurality of secondary coils 319. A rectifier circuit 312 and a smoothing capacitor 313 are connected to each secondary coil 319. The secondary coil 319 that supplies power to the upper arm control circuit 4u is divided into U, V, W phase, and booster circuits. This is because, as described above, a high voltage is generated between the gate terminals 22g of the upper arm semiconductor element 20u, so that sufficient isolation can be achieved. The secondary coil 319 that supplies power to the lower arm control circuit 4d is shared by the U, V, W phase, and the booster circuit. Since a high voltage is not generated between the gate terminals 22g of the lower arm semiconductor element 20d, the secondary coil 319 for the lower arm control circuit 4d can be shared.

Next, the effect of this form is demonstrated. As shown in FIG. 1, in this embodiment, a plurality of upper arm control circuits 4u are formed adjacent to each other in the X direction in each of the first region A1 and the second region A2, and a plurality of lower arms. The control circuits 4d are formed so as to be adjacent to each other in the X direction.
Therefore, the control circuit board 3 can be reduced in size. That is, with the above configuration, the upper arm control circuit 4u is divided into the first area A1 and the second area A2, so that all the upper arm control circuits 4u are not arranged in a line. Therefore, accumulation of the insulation distance between the two upper arm control circuits 4u in the X direction can be suppressed. Therefore, the length of the control circuit board 3 in the X direction can be shortened, and the control circuit board 3 can be downsized.

  If all upper arm control circuits 4u are formed in one area A (first area A1) of the two areas A (A1, A2) as shown in FIG. 4u are arranged in a line. Therefore, the insulation distance W between the upper arm control circuits 4u accumulates in the X direction, and the length of the control circuit board 3 in the X direction tends to be long. Therefore, the control circuit board 3 is easily increased in size. On the other hand, as shown in FIG. 1, if the configuration of this embodiment is adopted, the upper arm control circuits 4u are not arranged in a line. Therefore, accumulation of the insulation distance W between the two upper arm control circuits 4u in the X direction can be suppressed, and the length of the control circuit board 3 in the X direction can be shortened.

Further, in this embodiment, as shown in FIGS. 2 and 4, the first semiconductor element group 5 a and the second semiconductor element group 5 b are constituted by a plurality of semiconductor elements 20. Then, as shown in FIG. 1, all the upper arm control circuit connected to the first semiconductor element group 5a 4u _a and all of the lower arm control circuit connected to the second semiconductor element group 5b 4d _b and the first area A1 to form, all the lower arm control circuit 4d _a connected to the first semiconductor element group 5a, and a second all the upper arm control circuit connected to the semiconductor element groups 5b 4u _b formed in the second region A2 is there.
In this way, since all the upper arm control circuits 4u connected to the same semiconductor element group 5 are collectively formed on the same side in the Y direction, the layout of these upper arm control circuits 4u can be simplified. . Similarly, since all the lower arm control circuits 4d connected to the same semiconductor element group 5 are collectively formed on the same side in the Y direction, the layout of these lower arm control circuits 4d can be simplified.

As shown in FIG. 1, in this embodiment, all upper arm control circuits connected to the same power supply circuit 31 in one area A of the two areas A of the first area A1 and the second area A2. 4u is formed, and all the lower arm control circuits 4d connected to the same power supply circuit 31 are formed in the other region A.
Therefore, the layout of the control circuit board 3 can be simplified. That is, as described above, the transformer 310 included in the power supply circuit 31 needs to divide the secondary coil 319u connected to the upper arm control circuit 4u for each phase (see FIG. 7), and is connected to the lower arm control circuit 4d. The secondary coil 319d can be shared. Therefore, if all the lower arm control circuits 4d connected to the same power supply circuit 31 are collectively formed in the same region A, the lower arm control circuit 4d can be easily connected to the common secondary coil 319d. Is possible. Similarly, if all the upper arm control circuits 4u connected to the same power supply circuit 31 are collectively formed in the same region A, each upper arm control circuit 4u is connected to the secondary coil 319u for the upper arm. Cheap.

  As described above, according to this embodiment, it is possible to provide a power conversion device that can reduce the size of the control circuit board.

  In this embodiment, as shown in FIG. 3 and FIG. 4, one semiconductor element 20 is built in one semiconductor module 2, but the present invention is not limited to this, and one semiconductor module. 2 may incorporate two or more semiconductor elements 20.

(Embodiment 2)
In the following embodiments, the same reference numerals used in the drawings among the reference numerals used in the drawings represent the same constituent elements as those in the first embodiment unless otherwise indicated.

  This embodiment is an example in which the number of semiconductor elements 20 is changed. As shown in FIG. 9, in this embodiment, as in the first embodiment, a first semiconductor element group 5a, a second semiconductor element group 5b, and a third semiconductor element group 5c are formed. The total number (12) of the semiconductor elements 20 constituting the first semiconductor element group 5a is equal to the number (6) of the semiconductor elements 20 constituting the second semiconductor element group 5b and the semiconductor constituting the third semiconductor element group 5c. More than the sum (8) of the number of elements 20 (2).

  In the first semiconductor element group 5a, two semiconductor elements 20 are connected in parallel to each other. As a result, a large amount of current can flow through the AC load 8a.

As shown in FIG. 8, the arm control circuit 4u _a top for the first semiconductor element group 5a via the control terminal 22 of the two rows adjacent in the X direction, are connected to the two upper arms semiconductor element 20u .

In this embodiment, the first region A1, is formed with arm control circuit 4u _a top connected to the first semiconductor element group 5a. Further, in the second region A2, arm control circuit 4u _b on connected to the second semiconductor element group 5b and the third semiconductor element group 5c, is formed with 4u _c.
In this way, the control circuit board 3 can be easily downsized. That, X direction length L1 of the arm control circuit 4u _a top for the first semiconductor element group 5a, the other upper arm control circuit 4u _b, tends to be longer than the X-direction length L2 of the 4u _c. Therefore, if, in the first region A1, and the arm control circuit 4u _a top for the first semiconductor element group 5a, assuming that form an arm control circuit 4u _c on the other, tends to be longer X direction length first 1 and the arm control circuit 4u _a on the semiconductor element group 5a, will be a wide insulating region 48 for insulating the separate upper arm control circuit 4u _c is formed in the first region A1, the control circuit board 3 There is a possibility that the length in the X direction becomes excessively long. In contrast, as in this embodiment, the arm control circuit 4u _a top for the first semiconductor element group 5a formed in the first region A1, the arm control circuit on the other 4u _b, the 4u _c second region A2 In this case, the number of upper arm control circuits 4u formed in the first region A1 can be reduced, and the length of the control circuit board 3 in the X direction can be easily shortened.
In addition, the same configuration and operational effects as those of the first embodiment are provided.

(Embodiment 3)
In this embodiment, the position where the control terminal 22 is connected to the control circuit board 3 is changed. As shown in FIG. 10, in this embodiment, two semiconductor elements 20 adjacent to each other in the X direction are formed at positions shifted from each other in the Y direction.
In this way, the distance L3 between the control terminals 22 connected to the two semiconductor elements 20 adjacent to each other in the X direction can be increased. Therefore, it is easy to shorten the length of the wide insulating region 48 in the X direction. Therefore, the length of the control circuit board 3 in the X direction can be shortened, and the control circuit board 3 can be further downsized.
In addition, the same configuration and operational effects as those of the first embodiment are provided.

(Embodiment 4)
In this embodiment, the arrangement position of the upper arm control circuit 4u is changed. As shown in FIG. 11, in this embodiment, the arm control circuit 4u _a top connected to the first semiconductor element group 5a and the second semiconductor element group 5b, the 4u _b, respectively formed in the first region A1, the lower arm control circuit 4d _a, the 4d _b, Aru each formed in the second region A2. Furthermore, the arm control circuit 4u _c over to be connected to the third semiconductor element group 5c is formed in the second region A2, it is formed with the lower arm control circuit 4d _c in the first region A1.
In addition, the same configuration and operational effects as those of the first embodiment are provided.

(Embodiment 5)
In this embodiment, the arrangement position of the control circuit 4 is changed. As shown in FIG. 12, in this embodiment, the first region A1, and the arm control circuit 4u _b on for the second semiconductor element group 5b, and the lower arm control circuit 4d _c for the third semiconductor element group 5c, first It is formed with the lower arm control circuit 4d _a for semiconductor element group 5a. Further, in the second region A2, and the arm control circuit 4u _a top for the first semiconductor element group 5a, the arm control circuit 4u _c on for the third semiconductor element group 5c, the lower arm for the second semiconductor element group 5b It is formed with a control circuit 4d _b.
In addition, the same configuration and operational effects as those of the first embodiment are provided.

DESCRIPTION OF SYMBOLS 1 Power converter 20 Semiconductor element 3 Control circuit board 4 Control circuit 4u Upper arm control circuit 4d Lower arm control circuit A1 1st area | region A2 2nd area | region

Claims (5)

A plurality of semiconductor elements (20);
A control circuit board (3) for controlling the switching operation of the semiconductor element,
The control circuit board is formed with a plurality of control circuits (4) electrically connected to the semiconductor elements via control terminals (22), and the switching operations of the individual semiconductor elements are controlled by the individual control circuits. And
The plurality of control circuits are arranged in at least two rows, and the control circuit board is divided into a first region (A1) and a second region (A2) in which the control circuit row (41) is formed. The first region and the second region are adjacent to each other in the width direction orthogonal to both the arrangement direction of the control circuits and the thickness direction of the control circuit board,
The control circuit includes an upper arm control circuit (4u) connected to the semiconductor element on the upper arm side, and a lower arm control circuit (4d) connected to the semiconductor element on the lower arm side, and the first region And a plurality of upper arm control circuits are formed adjacent to each other in the arrangement direction, and a plurality of lower arm control circuits are formed adjacent to each other in the arrangement direction. A power conversion device (1).   A first semiconductor element group (5a) comprising a plurality of semiconductor elements on the upper arm side and a plurality of semiconductor elements on the lower arm side and connected to a first AC load (8a); and a plurality of the upper arm side And a second semiconductor element group (5b) connected to the second AC load (8b) and connected to the first semiconductor element group. All the upper arm control circuits and all the lower arm control circuits connected to the second semiconductor element group are formed in the first region, and all the lower arm controls connected to the first semiconductor element group are formed. The power conversion device according to claim 1, wherein a circuit and all the upper arm control circuits connected to the second semiconductor element group are formed in the second region.   The third semiconductor element group (5c), which is composed of the upper arm side semiconductor element and the lower arm side semiconductor element and constitutes the booster circuit (103), is formed, and the semiconductor constitutes the first semiconductor element group. The number of elements is larger than the sum of the number of semiconductor elements constituting the second semiconductor element group and the number of semiconductor elements constituting the third semiconductor element group, and the first semiconductor includes the first semiconductor in the first region. The upper arm control circuit connected to an element group is formed, and the upper arm control circuit connected to the second semiconductor element group and the third semiconductor element group is formed in the second region. The power converter device described in 1.   A plurality of power supply circuits (31) for supplying power to the control circuit are formed between the two regions, the first region and the second region, and the same region is formed in one of the two regions. All the upper arm control circuits connected to the power supply circuit are formed, and all the lower arm control circuits connected to the same power supply circuit are formed in the other region. Item 4. The power conversion device according to any one of Items 3 to 3.   5. The power conversion device according to claim 1, wherein the two semiconductor elements adjacent to each other in the arrangement direction are arranged at positions shifted from each other in the width direction.

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