JP2017077100A - Power conversion apparatus and method of controlling the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To suppress a voltage rise of a DC bus caused by change in an operation condition of a power conversion apparatus.SOLUTION: A power conversion apparatus 1 which converts power between a direct current and an alternate current, includes: a filter circuit 21 connected to an AC system and including an AC reactor 22; a DC/AC converter 11 provided between the filter circuit 21 and a DC bus 20; an intermediate capacitor 19 connected to the DC bus 20; a DC/DC converter 10 provided between a DC power supply 2 and the DC bus 20 and including a DC reactor 15; and a controller 12 which controls switching operation of the DC/AC converter 11 and the DC/DC converter 10 so as to have a stop period in a voltage half-period of the AC power and also controls the DC/DC converter 10 such that a current flowing in the DC reactor 15 is set to 0 periodically. The controller 12 changes a target value of a current flowing in the AC reactor 22 at timing when a current flowing in the DC reactor 15 is in the vicinity of 0.SELECTED DRAWING: Figure 2

Description

  The present invention relates to a power converter that performs conversion from direct current to alternating current.

  The power converter includes a DC / DC converter that performs DC / DC conversion and a DC / AC converter that performs DC / AC conversion. In general, both DC / DC converters and DC / AC converters always perform switching operations. On the other hand, a power conversion device of a minimum switching method that increases the efficiency by minimizing the number of switching times of both converters has also been proposed (see, for example, Patent Document 1).

  In such a minimum switching type power conversion device, the voltage across the intermediate capacitor located between the DC / DC converter and the DC / AC converter, that is, the DC bus voltage, can be reduced as compared with a constantly switching type power conversion device. it can. As a result, it is possible to use a semiconductor device or a capacitor having a lower breakdown voltage, and it is possible to realize a reduction in component cost, a reduction in size of the component, a reduction in loss of the semiconductor device, and the like.

  On the other hand, there is a power conversion device in which a plurality of DC / DC converters are provided in parallel with each other in order to operate a DC / DC converter without excess or deficiency with respect to a load (see, for example, Patent Documents 2 and 3). In this case, in order to equalize the burden on each DC / DC converter, a technique is adopted in which the number of operating parallels and the circuit combination are changed by operating time integration, power integration, etc. of each DC / DC converter. .

Japanese Patent No. 5618022 JP-A-11-127573 JP 2012-161215 A

  In recent years, photovoltaic power generation systems have become widespread, and as a result, there has been a problem of voltage rise in commercial power systems. Therefore, there is a case where output suppression of the solar power generation system is required. However, in response to such output suppression, when the output current target value of the power converter is suddenly reduced, the current flowing through the AC reactor in the output stage decreases more slowly than the target value due to the characteristics of the inductor. Here, in the power converter of the minimum switching method as described above, the capacity of the intermediate capacitor is small. For this reason, if the current target value is suddenly reduced when the current is flowing through the AC reactor of the output stage, the current flowing through the AC reactor cannot follow the target value, so the feedback control of the AC reactor current works, and the next in the DC / AC converter The on-duty in the control cycle decreases rapidly.

  As a result, the impedance seen from the intermediate capacitor on the DC / AC converter side on the average of the carrier cycle increases, DC reactor current flows more into the intermediate capacitor than during normal operation, and the intermediate capacitor voltage rises (event (a)). If the breakdown voltage of each component is set higher than that in a steady state in preparation for such a situation, one of the advantages of the minimum switching method may be impaired.

  On the other hand, in a power converter provided with a plurality of DC / DC converters in parallel, when the number of parallel operation circuits and the combination of operation circuits are changed during operation, the target value of the DC reactor current of each circuit is suddenly changed. For example, when the number of parallel circuits is decreased, the current that has been flowing through the circuit to be stopped is compensated for by the entire operation circuit, so that the current target value of each operation circuit increases rapidly. Therefore, the feedback control of the DC reactor current works, and the on-duty in the next control cycle in the DC / DC converter increases rapidly. At this time, the circuit topology differs between when the current of the DC / DC converter increases and when the current decreases.

  That is, the time displacement of the current in the transient state is different between when increasing and when decreasing. In particular, when it increases, it becomes a series circuit of a DC reactor with respect to the power source, so that the time displacement is larger than when it decreases. Therefore, in the transient state, the sum of the actual currents of the operating DC / DC converter exceeds the sum of the current target values. From these results, the current flowing to the DC / AC converter side and the current flowing to the intermediate capacitor increase, and the intermediate capacitor voltage, that is, the DC bus voltage rises (event (b)).

  Note that the above-described output suppression restriction target is the surplus power for reverse tide, and the private consumption is not the restriction target. For this reason, solar power generation can be used more effectively if power generation is not limited to the amount of output suppression but is generated up to the amount consumed by the person. However, this requires a quick follow-up to the load fluctuation. Then, when the follow-up of the generated power corresponding to the load fluctuation is slow, a phenomenon in which the voltage of the DC bus rises appears as a phenomenon similar to the events (a) and (b) (event (c)).

  Thus, how to suppress the voltage rise of the DC bus caused by the change in the operation status of the power converter is a further improvement problem of the power converter.

(Viewpoint of output control)
The present invention is a power conversion device that performs DC / AC power conversion between a DC power source and an AC system, the filter circuit being connected to the AC system and including an AC reactor, the filter circuit, and the DC A DC / AC converter provided between the DC bus, an intermediate capacitor connected to the DC bus, a DC / DC converter provided between the DC power source and the DC bus and including a DC reactor, The DC / DC converter and the DC / DC converter are switched so that there is a stop period within a half cycle of the voltage of the AC power, and the current flowing through the DC reactor is periodically zeroed. A control unit for controlling the converter, wherein the control unit is configured to control the AC rear at a timing when a current flowing through the DC reactor becomes near zero. To change the current target value flowing in Torr, a power conversion apparatus.

(Perspective of parallel multiplexing)
The present invention is also a power conversion device that performs DC / AC power conversion between a DC power source and an AC system, the filter circuit being connected to the AC system and including an AC reactor, and the filter circuit And a DC / AC converter provided between the DC bus, an intermediate capacitor connected to the DC bus, and the DC power source and the DC bus. A DC / DC converter including a DC reactor, and the DC / AC converter and the DC / DC converter are switched so that there is a stop period within a voltage half cycle of the AC power, and a current flowing through the DC reactor is A control unit that controls the DC / DC converter so as to periodically become 0, and the control unit includes a current flowing through the DC reactor. 0 Change the current load of the plurality of sets of the DC / DC converter at a timing to be near a power converter.

(Viewpoint of output control method)
The present invention also includes a filter circuit connected to an AC system and including an AC reactor, a DC / AC converter provided between the filter circuit and a DC bus, an intermediate capacitor connected to the DC bus, A power conversion device provided between a DC power source and the DC bus, and having a DC / DC converter including a DC reactor, and performing DC / AC power conversion between the DC power source and an AC system In the control method, the DC / AC converter and the DC / DC converter are switched so that there is a stop period within a half cycle of the voltage of the AC power, and the current flowing through the DC reactor is periodically zero. And the target value of the current flowing through the AC reactor is changed at a timing when the current flowing through the DC reactor becomes near zero. A control method of the apparatus.

(Perspective of parallel multiplexing method)
The present invention also includes a filter circuit connected to an AC system and including an AC reactor, a DC / AC converter provided between the filter circuit and a DC bus, an intermediate capacitor connected to the DC bus, A DC / DC converter provided between the DC power supply and the DC bus and provided in parallel with each other and including a DC reactor in each set, the DC power / A method for controlling a power conversion apparatus that performs power conversion of AC power, wherein the DC / AC converter and the DC / DC converter are switched so that there is a stop period within a voltage half cycle of the AC power, and Control is performed so that the current flowing through the DC reactor periodically becomes 0, and a plurality of sets of the D is performed at the timing when the current flowing through the DC reactor becomes close to 0. / Change the DC converter of the current load, a control method of the power converter.

  ADVANTAGE OF THE INVENTION According to this invention, the voltage rise of DC bus which arises by the change of the driving | running state of a power converter device can be suppressed.

It is a block diagram which shows an example of the system provided with the power converter device. It is an example of the circuit diagram of a power converter device. It is a block diagram of a control part. It is a graph which shows an example of the result of having calculated | required the time-dependent change of a DC input voltage detection value and a booster circuit current detection value by simulation. It is a figure which shows the aspect at the time of averaging the DC input voltage detection value Vg which an averaging process part performs. It is a control block diagram for demonstrating the control processing by a control processing part. It is a flowchart which shows the control processing of a booster circuit and an inverter circuit. (A) is a graph which shows an example of the result of having calculated | required the boost circuit current target value which the control processing part calculated | required in feedback control, and the boost circuit current detection value when controlling according to this, by simulation, (b). FIG. 5 is a graph showing an example of a result obtained by simulation of a booster circuit voltage target value obtained by a control processing unit in feedback control and a booster circuit voltage detection value when controlled according to the booster circuit voltage. FIG. It is a figure which shows an example of an inverter output voltage target value. (A) is a graph comparing a booster circuit carrier wave and a booster circuit reference wave, and (b) is a drive waveform for driving the switching element Qb generated by the booster circuit control unit. (A) is a graph comparing the inverter circuit carrier and the inverter circuit reference wave, (b) is a drive waveform for driving the switching element Q1 generated by the inverter circuit controller, and (c) is It is a drive waveform for driving the switching element Q3 which the inverter circuit control part produced | generated. It is the figure which showed an example of the current waveform of the alternating current power which a power converter device outputs with an example of a reference wave and the drive waveform of each switching element. (A) is the graph which showed each voltage waveform of the alternating voltage output from the inverter circuit, the commercial power system, and the both-ends voltage of an AC reactor, (b) showed the current waveform which flows into an AC reactor. It is a graph. It is an example of the connection diagram of the photovoltaic power generation in a consumer. For comparison, it is a waveform diagram showing a current change and an intermediate capacitor voltage (DC bus voltage) when the target current value flowing through the AC reactor is changed at the peak timing of the current flowing through the DC reactor. FIG. 16 is a waveform diagram obtained by further enlarging the time axis of FIG. 15 around a time of 0.245 seconds. It is a wave form diagram which shows an electric current change at the time of changing the output current target value which flows into an AC reactor at the timing when the electric current which flows into a DC reactor becomes 0, and an intermediate capacitor voltage (DC bus voltage). It is an example of the connection diagram of the photovoltaic power generation in a consumer. For comparison, it is a waveform diagram showing a current change and an intermediate capacitor voltage (DC bus voltage) when the target current value flowing through the AC reactor is changed at the peak timing of the current flowing through the DC reactor. It is a wave form diagram which shows an electric current change at the time of changing the electric current target value which flows into an AC reactor at the timing when the electric current which flows into a DC reactor becomes 0, and an intermediate capacitor voltage (DC bus voltage). For comparison, it is a waveform diagram showing a current change and an intermediate capacitor voltage (DC bus voltage) when the target current value flowing through the AC reactor is changed at the peak timing of the current flowing through the DC reactor. It is a wave form diagram which shows an electric current change at the time of changing the electric current target value which flows into an AC reactor at the timing when the electric current which flows into a DC reactor becomes 0, and an intermediate capacitor voltage (DC bus voltage). It is an example of the connection diagram of the photovoltaic power generation and storage battery charging / discharging in a consumer. It is another example of the connection diagram of the photovoltaic power generation and storage battery charging / discharging in a consumer. It is an example of the flowchart which shows the change process to the electric current target value according to output suppression shown in FIG. It is a block diagram which shows schematic structure of the power converter device with which 2 sets of DC / DC converters were provided in parallel with each other. It is an example of the circuit diagram of the power converter device which has two sets of DC / DC converters. For comparison, it is a waveform diagram showing the current change and the intermediate capacitor voltage (DC bus voltage) when the number of operating circuits is changed at the timing of the peak of the current flowing through the DC reactor. FIG. 26 is a waveform diagram obtained by further enlarging the time axis of FIG. 25 around a time of 0.245 seconds. It is a wave form diagram which shows an electric current change at the time of switching the number of operation circuits at the timing when the electric current which flows into a direct current reactor becomes 0, and an intermediate capacitor voltage (voltage of a DC bus). For comparison, it is a waveform diagram showing the current change and the intermediate capacitor voltage (DC bus voltage) when the number of operating circuits is changed at the timing of the peak of the current flowing through the DC reactor. It is a wave form diagram which shows an electric current change at the time of switching the number of operation circuits at the timing when the electric current which flows into a direct current reactor becomes 0, and an intermediate capacitor voltage (voltage of a DC bus). It is a block diagram which shows schematic structure of the power converter device by which DC / DC converters were provided in parallel with n sets (n is a natural number of 3 or more). It is an example of the flowchart which shows the control flow for the change of the electric current target value supposing the combination of the operation circuit. It is a figure which shows an example which changes a combination based on the frequency | count count when the direct current reactor current became zero. It is a block diagram which shows schematic structure of the other power converter device by which the DC / DC converter 10 was provided in parallel with n sets (n is a natural number of 3 or more).

[Summary of Embodiment]
The gist of the embodiment of the present invention includes at least the following.

  (1) This power converter performs DC / AC power conversion between a DC power source and an AC system, and is connected to the AC system and includes a filter circuit including an AC reactor, and the filter DC / AC converter provided between the circuit and the DC bus, an intermediate capacitor connected to the DC bus, a DC / DC converter provided between the DC power source and the DC bus and including a DC reactor The DC / AC converter and the DC / DC converter are switched so that there is a stop period within a half cycle of the voltage of the AC power, and the current flowing through the DC reactor is periodically zero. A control unit that controls a DC / DC converter, wherein the control unit is configured to control the current flowing through the DC reactor at a timing near zero. To change the current target value flowing in the flow reactor, a power conversion apparatus. Note that the DC power supply is not limited to a single power supply, and may be a plurality of DC power supplies. The AC system includes not only a commercial power system but also an AC load.

  In the power conversion device of (1), the current flowing through the AC reactor before and after the change is changed by changing the target current value flowing through the AC reactor at the timing when the current flowing through the DC reactor of the DC / DC converter becomes close to zero. And a rapid change in the voltage of the DC bus can be suppressed. Thereby, the withstand voltage conditions of the intermediate capacitor and the switching element connected to the DC bus are relaxed, and the withstand voltage can be further reduced. The low withstand voltage contributes to a reduction in component cost and size, and also contributes to a reduction in loss.

(2) Moreover, the power converter device of (1) is provided with the electric power monitoring part which monitors reverse flow electric power, and when suppressing reverse electric power, the said control part is set to the said DC reactor with respect to the said DC power supply. At the timing when the flowing current becomes close to 0, the generated power corresponding to at least suppression can be reduced.
In this case, it is possible to respond to the request for suppressing the reverse power flow without causing a sudden change in the voltage of the DC bus.

(3) Also, in the power conversion device of (2), when the load power increases or decreases, the control unit increases or decreases the output power or input power of the DC power supply while maintaining the reverse power flow constant. May be.
In this case, the output power or the input power of the DC power supply can be appropriately utilized and adjusted in response to the load increase / decrease while the reverse power is kept constant.

  (4) On the other hand, this power converter performs DC / AC power conversion between a DC power source and an AC system, and is connected to the AC system and includes a filter circuit including an AC reactor; Between the DC / AC converter provided between the filter circuit and the DC bus, an intermediate capacitor connected to the DC bus, the DC power source and the DC bus, and a plurality of sets are provided in parallel with each other, A DC / DC converter including a DC reactor in each set, and the DC / AC converter and the DC / DC converter are switched so that there is a stop period within a voltage half cycle of the AC power, and the DC reactor is A control unit that controls the DC / DC converter so that a flowing current periodically becomes 0, and the control unit flows to the DC reactor. That current changes the current load of the plurality of sets of the DC / DC converter at a timing to be near 0, a power conversion apparatus. Note that the DC power supply is not limited to a single unit, and may be a plurality of units and independent of each other. The AC system includes not only a commercial power system but also an AC load.

  In the power conversion device of (4) above, the DC load before and after the change is changed by changing the current burden of the plurality of DC / DC converters at the timing when the current flowing through the DC reactor of the DC / DC converter becomes close to zero. It is possible to suppress a sudden change in the sum of the current flowing through the reactor and the voltage of the DC bus. Thereby, the withstand voltage conditions of the intermediate capacitor and the switching element connected to the DC bus are relaxed, and the withstand voltage can be further reduced. The low withstand voltage contributes to a reduction in component cost and size, and also contributes to a reduction in loss.

(5) Further, in the power conversion device of (4), two sets of the DC / DC converters are provided, and the control unit is configured such that the two sets of the DC / DC converters operate alternately or both. However, the control may be performed so that the converter operation is performed with an even load of current.
The DC / DC converter in this case has a reduced operating rate or reduced current burden compared to the case where there is only one DC / DC converter, and as a result, two DC / DC converters are used over a long period of time. be able to.

(6) Further, in the power conversion device of (4), n sets of DC / DC converters are provided, assuming that n is a natural number of 3 or more and k is a natural number smaller than n. Each time a change is made, control may be performed so that k sets of the DC / DC converters, which are always different combinations from the n sets, perform the converter operation.
In this case, by using these combinations evenly, all the DC / DC converters can be used evenly and the overall life can be extended.

(7) Moreover, in the power converter of (6), the DC power source is a photovoltaic power generation panel, and the control unit includes a total amount of generated power of the photovoltaic power generation panel and a power threshold set in stages. The number of k may be determined based on the comparison with.
Thereby, when a direct-current power supply is a photovoltaic power generation panel in which generated power changes according to weather and time, an appropriate number k can be determined according to the total amount of generated power.

(8) Further, in the power conversion device of (6) or (7), the control unit selects the n sets of combinations so that the cumulative number of times that the current flowing through the DC reactor becomes zero is equalized. You may make it do.
In this case, since each DC / DC converter operates equally, the failure rate can be reduced. In addition, counting the cumulative number of times that the current flowing through the DC reactor becomes zero is light in calculation burden for the control unit.

  (9) From the viewpoint of the method, a filter circuit connected to an AC system and including an AC reactor, a DC / AC converter provided between the filter circuit and the DC bus, and an intermediate connected to the DC bus A DC / DC converter provided between a capacitor, a DC power source and the DC bus and including a DC reactor, and for converting DC power / AC power between the DC power source and the AC system A control method for a converter, wherein the DC / AC converter and the DC / DC converter are switched so that there is a stop period within a voltage half cycle of the AC power, and a current flowing through the DC reactor is a cycle. The target current value flowing through the AC reactor is changed at a timing when the current flowing through the DC reactor becomes close to 0. A control method of the power converter. Note that the DC power supply is not limited to a single power supply, and may be a plurality of DC power supplies. The AC system includes not only a commercial power system but also an AC load.

  In the case of the control method of the power conversion device of (9) above, by changing the target current value flowing through the AC reactor at the timing when the current flowing through the DC reactor of the DC / DC converter becomes close to 0, before and after the change, A sudden change in the current flowing through the AC reactor and the voltage of the DC bus can be suppressed. Thereby, the withstand voltage conditions of the intermediate capacitor and the switching element connected to the DC bus are relaxed, and the withstand voltage can be further reduced. The low withstand voltage contributes to a reduction in component cost and size, and also contributes to a reduction in loss.

  (10) From another viewpoint of the method, a filter circuit connected to an AC system and including an AC reactor, a DC / AC converter provided between the filter circuit and the DC bus, and the DC bus A DC / DC converter between the connected intermediate capacitor, a DC power source and the DC bus, provided in parallel with each other and each unit including a DC reactor, the DC power source and the AC system And a DC / AC converter and a DC / DC converter having a stop period within a half cycle of the AC power. Switching operation, and the current flowing through the DC reactor is controlled to periodically become 0, so that the current flowing through the DC reactor becomes near zero. To change the current load of the plurality of sets of the DC / DC converter in grayed, a control method of the power converter. Note that the DC power supply is not limited to a single unit, and may be a plurality of units and independent of each other. The AC system includes not only a commercial power system but also an AC load.

  In the case of the control method for the power converter of (10) above, before and after the change by changing the current burden of the plurality of sets of DC / DC converters at the timing when the current flowing through the DC reactor of the DC / DC converter becomes close to zero. Thus, it is possible to suppress a sudden change in the sum of the currents flowing through the DC reactor and the voltage of the DC bus. Thereby, the withstand voltage conditions of the intermediate capacitor and the switching element connected to the DC bus are relaxed, and the withstand voltage can be further reduced. The low withstand voltage contributes to a reduction in component cost and size, and also contributes to a reduction in loss.

[Details of the embodiment]
Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

<Minimum switching power converter>
First, a minimum switching type power converter having a grid interconnection function will be described in detail.

(About overall structure)
FIG. 1 is a block diagram illustrating an example of a system including a power conversion device according to an embodiment. In the figure, a photovoltaic power generation panel 2 as a DC power source is connected to the input end of the power conversion device 1, and an AC commercial power system 3 is connected to the output end. This system converts the direct current power generated by the solar power generation panel 2 into alternating current power, and performs an interconnection operation for output to the commercial power system 3.

  The power converter 1 is a booster circuit (DC / DC converter) 10 to which direct-current power output from the photovoltaic power generation panel 2 is applied, and converts the power supplied from the booster circuit 10 into AC power and outputs it to the commercial power system 3. And an inverter circuit (DC / AC converter) 11 and a control unit 12 for controlling the operations of both the circuits 10 and 11.

FIG. 2 is an example of a circuit diagram of the power conversion device 1.
The booster circuit 10 includes a DC reactor 15 and switching elements Qb and Qb2 made of, for example, IGBT (Insulated Gate Bipolar Transistor), and constitutes a boost chopper circuit. Anti-parallel diodes Db and Db2 are connected to the switching elements Qb and Qb2, respectively.
On the input side of the booster circuit 10, a first voltage sensor 17, a first current sensor 18, and a capacitor 26 for smoothing are provided.

The first voltage sensor 17 detects the DC input voltage detection value Vg (DC input voltage value) of the DC power output from the photovoltaic power generation panel 2 and input to the booster circuit 10, and outputs it to the control unit 12. The first current sensor 18 detects a booster circuit current detection value Iin (DC input current value) that is a current flowing through the DC reactor 15 and outputs it to the control unit 12. Note that a current sensor may be further provided in front of the capacitor 26 in order to detect the DC input current detection value Ig.
The control unit 12 has a function of calculating the input power Pin from the DC input voltage detection value Vg and the booster circuit current detection value Iin and performing MPPT (Maximum Power Point Tracking) control on the photovoltaic power generation panel 2. doing.

  Further, as will be described later, the switching element Qb of the booster circuit 10 is controlled so that the total number of switching operations combined with the inverter circuit 11 is minimized, and a stop period occurs. Therefore, the booster circuit 10 outputs the boosted power to the inverter circuit 11 during the period during which the switching operation is performed, and the photovoltaic power generation panel 2 outputs the booster circuit 10 during the period during which the switching operation is stopped. The DC input voltage value of the DC power input to is output to the inverter circuit 11 through the diode Db2 without being boosted.

  At this time, the switching element Qb2 may be turned off, or may be turned on by an inversion control signal of the switching element Qb. However, in order to prevent the switching element Qb and the switching element Qb2 from conducting simultaneously, a dead time of about 1 microsecond is provided when the drive pulse of one switching element shifts from OFF to ON.

A smoothing intermediate capacitor 19 is connected to the DC bus 20 (two lines) between the booster circuit 10 and the inverter circuit 11. The voltage across the intermediate capacitor 19, that is, the DC bus voltage is detected by the voltage sensor 27, and the detection signal is sent to the control unit 12.
The inverter circuit 11 includes switching elements Q1 to Q4 made of FET (Field Effect Transistor). These switching elements Q1 to Q4 constitute a full bridge circuit. Each of switching elements Q1 to Q4 has a body diode (reference numeral omitted).
Each of the switching elements Q1 to Q4 is connected to the control unit 12 and can be controlled by the control unit 12. The control unit 12 performs PWM control of the operation of each switching element Q1 to Q4. Thereby, the inverter circuit 11 converts the power given from the booster circuit 10 into AC power.

The power conversion device 1 includes a filter circuit 21 between the inverter circuit 11 and the commercial power system 3.
The filter circuit 21 includes an AC reactor 22 and a capacitor 23 (output smoothing capacitor) provided at a subsequent stage of the AC reactor 22. The filter circuit 21 has a function of removing high-frequency components contained in the AC power output from the inverter circuit 11. The AC power from which the high frequency component has been removed by the filter circuit 21 is supplied to the commercial power system 3.

  As described above, the booster circuit 10 and the inverter circuit 11 convert the DC power output from the photovoltaic power generation panel 2 into AC power, and output the converted AC power to the commercial power system 3 via the filter circuit 21. The conversion apparatus 1 is comprised.

  The filter circuit 21 is connected to a second current sensor 24 for detecting an inverter current detection value Iinv (current flowing through the AC reactor 22), which is a current value output from the inverter circuit 11. Further, a second voltage sensor 25 for detecting a voltage value on the commercial power system 3 side (system voltage detection value Va) is connected between the filter circuit 21 and the commercial power system 3.

The second voltage sensor 25 and the second current sensor 24 output the detected system voltage detection value Va (AC system voltage value) and the inverter current detection value Iinv to the control unit 12, respectively. As shown in the figure, the second current sensor 24 is provided in the front stage (left) of the capacitor 23, but a third current sensor for detecting the output current of the power conversion device 1 may be added to the rear stage of the capacitor 23. .
The control unit 12 controls the booster circuit 10 and the inverter circuit 11 based on the system voltage detection value Va and the inverter current detection value Iinv and the above-described DC input voltage detection value Vg and the booster circuit current detection value Iin.

(About the control unit)
FIG. 3 is a block diagram of the control unit 12. As shown in FIG. 3, the control unit 12 functionally includes a control processing unit 30, a booster circuit control unit 32, an inverter circuit control unit 33, and an averaging processing unit 34.
A part or all of the functions of the control unit 12 may be configured by a hardware circuit, or part or all of the functions may be realized by causing a computer (computer program) to be executed by a computer. . Software (computer program) for realizing the function of the control unit 12 is stored in a storage device (not shown) of the computer.

The booster circuit control unit 32 controls the switching element Qb of the booster circuit 10 based on the target value and the detection value given from the control processing unit 30, and causes the booster circuit 10 to output the electric power of the current corresponding to the target value. .
Further, the inverter circuit control unit 33 controls the switching elements Q1 to Q4 of the inverter circuit 11 based on the target value and the detection value given from the control processing unit 30, and the electric power of the current corresponding to the target value is the inverter circuit. 11 to output.

The control processing unit 30 is provided with a DC input voltage detection value Vg, a booster circuit current detection value Iin, a system voltage detection value Va, and an inverter current detection value Iinv.
The control processing unit 30 calculates the input power Pin and its average value <Pin> from the DC input voltage detection value Vg and the booster circuit current detection value Iin.
The control processing unit 30 sets the DC input current target value Ig * (to be described later) based on the input power average value <Pin> to perform MPPT control on the photovoltaic power generation panel 2, and includes the booster circuit 10 and the inverter Each circuit 11 has a function of feedback control.

  The DC input voltage detection value Vg and the booster circuit current detection value Iin are given to the averaging processing unit 34 and the control processing unit 30.

  The averaging processor 34 samples the DC input voltage detection value Vg and the booster circuit current detection value Iin given from the first voltage sensor 17 and the first current sensor 18 at predetermined time intervals set in advance, respectively. And the averaged DC input voltage detection value Vg and booster circuit current detection value Iin are provided to the control processing unit 30.

FIG. 4 is a graph showing an example of results obtained by simulating changes with time in the DC input voltage detection value Vg and the booster circuit current detection value Iin.
Further, the DC input current detection value Ig is a current value detected on the input side from the capacitor 26.

  As shown in FIG. 4, it can be seen that the DC input voltage detection value Vg, the booster circuit current detection value Iin, and the DC input current detection value Ig fluctuate in a cycle of ½ of the system voltage.

As shown in FIG. 4, the reason why the DC input voltage detection value Vg and the DC input current detection value Ig fluctuate periodically is as follows. That is, the booster circuit current detection value Iin varies greatly from approximately 0 A to the peak value in a half cycle of the AC cycle according to the operations of the booster circuit 10 and the inverter circuit 11. Therefore, the fluctuation component cannot be completely removed by the capacitor 26, and the DC input current detection value Ig becomes a pulsating flow including a component that fluctuates in a half cycle of the AC cycle. On the other hand, the output voltage of the photovoltaic power generation panel changes depending on the output current.
For this reason, the periodic fluctuation that occurs in the DC input voltage detection value Vg is ½ period of the AC power output from the power conversion device 1.
Note that the step-up circuit current detection value Iin periodically becomes 0 is significant in the control described later.

  The averaging processing unit 34 averages the DC input voltage detection value Vg and the booster circuit current detection value Iin in order to suppress the influence due to the above-described periodic fluctuation.

  FIG. 5 is a diagram illustrating an aspect when the DC input voltage detection value Vg performed by the averaging processing unit 34 is averaged.

  The averaging processing unit 34 samples a given DC input voltage detection value Vg a plurality of times at predetermined time intervals Δt in a period L from a certain timing t1 to a timing t2 (in the drawing, Black spot timing), and an average value of the obtained DC input voltage detection values Vg is obtained.

Here, the averaging processing unit 34 sets the period L to a length that is ½ of the periodic length of the commercial power system 3. In addition, the averaging processing unit 34 sets the time interval Δt to a period sufficiently shorter than the length of the ½ cycle of the commercial power system 3.
Thereby, the averaging process part 34 calculates | requires accurately the average value of the direct-current input voltage detected value Vg which fluctuates periodically synchronizing with the period of the commercial power system 3, shortening the sampling period as much as possible. Can do.
Note that the sampling time interval Δt can be set to, for example, 1/100 to 1/1000 of the cycle of the commercial power system 3, 20 microseconds to 200 microseconds, or the like.

The averaging processing unit 34 can also store the period L in advance, or can acquire the system voltage detection value Va from the second voltage sensor 25 and set the period L based on the cycle of the commercial power system 3. You can also
In addition, here, the period L is set to ½ the period length of the commercial power system 3, but if the period L is set to at least a ½ period of the commercial power system 3, the DC input The average value of the voltage detection value Vg can be obtained with high accuracy. This is because the DC input voltage detection value Vg periodically fluctuates with a length of ½ of the cycle length of the commercial power system 3 due to the operations of the booster circuit 10 and the inverter circuit 11 as described above.
Therefore, when it is necessary to set the period L longer, the period L is set to an integral multiple of the 1/2 cycle of the commercial power system 3, such as 3 or 4 times the 1/2 cycle of the commercial power system 3. do it. As a result, the voltage fluctuation can be grasped in units of cycles.

As described above, the booster circuit current detection value Iin also periodically fluctuates in a half cycle of the commercial power system 3, as with the DC input voltage detection value Vg.
Therefore, the averaging processing unit 34 also obtains an average value of the booster circuit current detection value Iin by a method similar to the DC input voltage detection value Vg shown in FIG.
The control processing unit 30 sequentially obtains the average value of the DC input voltage detection value Vg and the average value of the booster circuit current detection value Iin for each period L.

  The averaging processing unit 34 gives the average value of the obtained DC input voltage detection value Vg and the average value of the boost circuit current detection value Iin to the control processing unit 30.

  In the present embodiment, as described above, the averaging processing unit 34 performs the average value of the DC input voltage detection value Vg (DC input voltage average value <Vg>) and the average value of the boost circuit current detection value Iin (boost circuit current). The average value <Iin>) is obtained, and the control processing unit 30 uses these values to control the booster circuit 10 and the inverter circuit 11 while performing MPPT control on the solar power generation panel 2, and thus the solar power generation panel 2 Even when the DC current due to the fluctuation fluctuates and becomes unstable, the control unit 12 boosts the output from the photovoltaic power generation panel 2 with the DC input voltage average value <Vg> obtained by removing the fluctuation component due to the operation of the power conversion device 1 and the boost. The circuit current average value <Iin> can be obtained with high accuracy. As a result, MPPT control can be performed suitably and it can suppress effectively that the power generation efficiency of the photovoltaic power generation panel 2 falls.

In addition, as described above, when the operation of the power conversion device 1 causes fluctuations in the voltage (DC input voltage detection value Vg) or current (boost circuit current detection value Iin) of the DC power output from the photovoltaic power generation panel 2. The fluctuation cycle coincides with a half cycle of AC power output from the inverter circuit 11 (a half cycle of the commercial power system 3).
In this regard, in the present embodiment, during the period L set to ½ of the periodic length of the commercial power system 3, for each of the DC input voltage detection value Vg and the booster circuit current detection value Iin, Since sampling was performed a plurality of times at a time interval Δt shorter than a half cycle of the AC system, and the DC input voltage average value <Vg> and the booster circuit current average value <Iin> were obtained from the results, the DC current voltage and current Even if the frequency fluctuates periodically, the DC input voltage average value <Vg> and the booster circuit current average value <Iin> can be obtained with high accuracy while shortening the sampling period as much as possible.

The control processing unit 30 sets the DC input current target value Ig * based on the above-described input power average value <Pin>, and based on the set DC input current target value Ig * and the above value, the booster circuit 10 and the target values for the inverter circuit 11 are obtained.
The control processing unit 30 has a function of giving the obtained target value to the booster circuit control unit 32 and the inverter circuit control unit 33 and performing feedback control of the booster circuit 10 and the inverter circuit 11 respectively.

FIG. 6 is a control block diagram for explaining feedback control of the booster circuit 10 and the inverter circuit 11 by the control processing unit 30.
The control processing unit 30 includes a first calculation unit 41, a first adder 42, a compensator 43, and a second adder 44 as functional units for controlling the inverter circuit 11.
The control processing unit 30 includes a second calculation unit 51, a third adder 52, a compensator 53, and a fourth adder 54 as functional units for controlling the booster circuit 10.

FIG. 7 is a flowchart showing control processing of the booster circuit 10 and the inverter circuit 11. Each functional unit illustrated in FIG. 6 controls the booster circuit 10 and the inverter circuit 11 by executing the processing illustrated in the flowchart illustrated in FIG.
Hereinafter, control processing of the booster circuit 10 and the inverter circuit 11 will be described with reference to FIG.

First, the control processing unit 30 obtains the current input power average value <Pin> (step S9) and compares it with the input power average value <Pin> at the previous calculation to set the DC input current target value Ig *. (Step S1). The input power average value <Pin> is obtained based on the following formula (1).
Input power average value <Pin> = <Iin × Vg> (1)

In equation (1), Iin is a boost circuit current detection value, Vg is a DC input voltage detection value (DC input voltage value), and a DC input voltage average value that is an averaged value by the averaging processing unit 34. <Vg> and the booster circuit current average value <Iin> are used.
In each of the following equations related to control other than Equation (1), instantaneous values that are not averaged are used for the booster circuit current detection value Iin and the DC input voltage detection value Vg.
“<>” Indicates an average value in parentheses. The same applies hereinafter.

The control processing unit 30 gives the set DC input current target value Ig * to the first calculation unit 41.
In addition to the DC input current target value Ig *, the first calculation unit 41 is also provided with a DC input voltage detection value Vg and a system voltage detection value Va.

The 1st calculating part 41 calculates the average value <Ia *> of the output current target value as the power converter device 1 based on following formula (2). η is a constant representing the conversion efficiency of the power conversion device 1.
Average output current target value <Ia *> = η <Ig * × Vg> / <Va> (2)

Further, the first calculation unit 41 obtains the output current target value Ia * based on the following formula (3) (step S2).
Here, the first calculation unit 41 obtains the output current target value Ia * as a sine wave having the same phase as the system voltage detection value Va.
Output current target value Ia * = (2 ^1/2 ) × <Ia *> × sin ωt (3)

As described above, the first calculation unit 41 obtains the output current target value Ia * based on the input power average value <Pin> (DC power input power value) and the system voltage detection value Va.
Next, as shown in the following formula (4), the first calculation unit 41 calculates an inverter current target value Iinv * (current target value of the inverter circuit) that is a current target value for controlling the inverter circuit 11 ( Step S3).
Inverter current target value Iinv * = Ia * + s CaVa (4)

However, in Formula (4), Ca is the electrostatic capacitance of the capacitor | condenser 23 (output smoothing capacitor), s is a Laplace operator.
If the expression (4) is expressed using differentiation at time t,
Iinv * = Ia * + Ca × (d Va / dt) (4a)
It becomes. Also, if the current flowing in the capacitor 23 is detected and this is Ica,
Iinv * = Ia * + Ica (4b)
It becomes.
In the expressions (4), (4a), and (4b), the second term on the right side is a value added in consideration of the current flowing through the capacitor 23 of the filter circuit 21.
The output current target value Ia * is obtained as a sine wave having the same phase as the system voltage detection value Va, as shown in the above equation (3). That is, the control processing unit 30 controls the inverter circuit 11 so that the AC power current Ia (output current) output from the power conversion device 1 is in phase with the system voltage (system voltage detection value Va).

When the first calculation unit 41 obtains the inverter current target value Iinv *, it supplies the inverter current target value Iinv * to the first adder 42.
The inverter circuit 11 is feedback-controlled by this inverter current target value Iinv *.

In addition to the inverter current target value Iinv *, the current adder current detection value Iinv is given to the first adder 42.
The first adder 42 calculates the difference between the inverter current target value Iinv * and the current inverter current detection value Iinv, and gives the calculation result to the compensator 43.

When the difference is given, the compensator 43 performs an operation based on a proportional coefficient and the like, and further adds the system voltage Va by the second adder 44, thereby converging the difference and converting the inverter current detection value Iinv into the inverter. An inverter voltage reference value Vinv # that can be used as the current target value Iinv * is obtained. By giving the inverter circuit control unit 33 a control signal obtained by comparing the inverter voltage reference value Vinv # with the output voltage target value Vo * of the DC / DC converter supplied from the first calculation unit 41, the inverter circuit 11 To output a voltage according to the inverter voltage reference value Vinv #.
The voltage output from the inverter circuit 11 is given to the AC reactor 22 and fed back as a new inverter current detection value Iinv. Then, the difference between the inverter current target value Iinv * and the inverter current detection value Iinv is calculated again by the first adder 42, and the inverter circuit 11 is controlled based on this difference as described above.

  As described above, the inverter circuit 11 is feedback controlled by the inverter current target value Iinv * and the inverter current detection value Iinv (step S4).

On the other hand, in addition to the DC input voltage detection value Vg and the system voltage detection value Va, the inverter current target value Iinv * calculated by the first calculation unit 41 is given to the second calculation unit 51.
The second calculation unit 51 calculates the inverter output voltage target value Vinv * (voltage target value of the inverter circuit) based on the following formula (5) (step S5).
Inverter output voltage target value Vinv * = Va + ZaIinv * (5)

However, in Formula (5), Za is the impedance of an AC reactor and s is a Laplace operator.
If the expression (5) is expressed using differentiation at time t,
Vinv * = Va + RaIinv * + La × (d Iinv * / dt)
... (5a)
It becomes. However, Ra is the resistance of the AC reactor, La is the inductance of the AC reactor, and (Za = Ra + sLa).
The second term on the right side of Equation (5) and the second term and third term on the right side of (5a) are values added in consideration of the voltage generated at both ends of the AC reactor 22.
Thus, in this embodiment, the inverter current target which is a current target value for controlling the inverter circuit 11 so that the current phase of the AC power output from the power converter 1 is in phase with the system voltage detection value Va. Based on the value Iinv *, an inverter output voltage target value Vinv * is set.

  As described above, the output target value (Iinv *, Vinv *) of the inverter circuit 11 that is the target value on the AC side is the bridge output terminal of the inverter circuit 11, that is, the circuit connection point P between the inverter circuit 11 and the filter circuit 21. Set by. As a result, the system connection point where the set point of the target value is moved forward from the original system connection point (the circuit connection point between the commercial power system 3 and the filter circuit 21) and finally settles into an appropriate system connection point. The system is done.

When the inverter output voltage target value Vinv * is obtained, as shown in the following formula (6), the second calculation unit 51 generates the voltage Vg as the voltage V _DC on the DC power supply side or preferably the following DC voltage Vgf and the inverter The absolute value of the output voltage target value Vinv * is compared, and the larger one is determined as the boost circuit voltage target value Vo * (step S6). The DC voltage Vgf is a voltage in consideration of a voltage drop due to the impedance Z of the DC reactor 15 with respect to Vg, and Vgf = Vg−ZIin where the booster circuit current is Iin. Therefore,
Vo * = Max (absolute value of Vg−ZIin, Vinv *) (6)
It can be.
If the expression (6) is expressed using differentiation at time t,
Vo * = Max (Vg− (RIin + L (d Iin / dt), absolute value of Vinv *)
... (6a)
It is. Here, R is the resistance of the DC reactor, L is the inductance of the DC reactor, and (Z = R + sL).

Further, the second calculation unit 51 calculates the boost circuit current target value Iin * based on the following equation (7) (step S7).
Boost circuit current target value Iin * =
{(Iinv * × Vinv *) + (s C Vo *) × Vo *} / (Vg−ZIin)
... (7)

However, in Formula (7), C is the electrostatic capacitance of the intermediate capacitor 19, and s is a Laplace operator.
If the expression (7) is expressed using differentiation at time t,
Iin * =
{(Iinv * × Vinv *) + C × (d Vo * / dt) × Vo *} /
{Vg- (R + sL) Iin} (7a)
It becomes. Also, if the current flowing through the intermediate capacitor 19 is detected and this is taken as Ic,
Iin * =
{(Iinv * × Vinv *) + Ic × Vo *} / {Vg−ZIin}
... (7b)
It becomes.

  In the expressions (7), (7a), and (7b), the term added to the product of the inverter current target value Iinv * and the inverter output voltage target value Vinv * takes into account reactive power passing through the intermediate capacitor 19 It is the value. That is, the value of Iin * can be obtained more accurately by considering reactive power in addition to the power target value of the inverter circuit 11.

Furthermore, if the power loss P _LOSS of the power converter 1 is measured in advance, the above equation (7a) can also be expressed as follows.
Iin * =
{(Iinv * × Vinv *) + C × (d Vo * / dt) × Vo * + P _LOSS } / {Vg−ZIin} (7c)
Similarly, the above formula (7b) can also be expressed as follows.
Iin * =
{(Iinv * × Vinv *) + Ic × Vo * + P _LOSS } / {Vg−ZIin}
... (7d)
In this case, in addition to the power target value of the inverter circuit 11, the value of Iin * can be determined more strictly by considering the reactive power and the power loss P _LOSS .

Note that when the capacitance C and the power loss P _{LOSS of} the intermediate capacitor 19 are sufficiently smaller than (Iinv * × Vinv *), the following equation (8) is established. Iin * obtained by this equation (8) can be used as Iin included in the right side of equations (6), (6a), (7), (7a), (7b), (7c) and (7d).
Booster circuit current target value Iin * = (Iinv * × Vinv *) / Vg (8)

When the second calculation unit 51 obtains the booster circuit current target value Iin *, it supplies the booster circuit current target value Iin * to the third adder 52.
The booster circuit 10 is feedback-controlled by this booster circuit current target value Iin *.

In addition to the booster circuit current target value Iin *, the current booster circuit current detection value Iin is given to the third adder 52.
The third adder 52 calculates the difference between the booster circuit current target value Iin * and the current booster circuit current detection value Iin, and gives the calculation result to the compensator 53.

When the difference is given, the compensator 53 performs a calculation based on a proportional coefficient and the like, and further subtracts this from the DC input voltage detection value Vg by the fourth adder 54, thereby converging the difference and boosting the circuit. A booster circuit voltage reference value Vbc # that can make the current detection value Iin the booster circuit current target value Iin * is obtained. By giving the boost circuit control unit 32 a control signal obtained by comparing the boost circuit voltage reference value Vbc # with the output voltage target value Vo * of the DC / DC converter supplied from the first calculation unit 41, the boost circuit 10, the voltage according to the booster circuit voltage reference value Vbc # is output.
The electric power output from the booster circuit 10 is given to the DC reactor 15 and fed back as a new booster circuit current detection value Iin. Then, the difference between the booster circuit current target value Iin * and the booster circuit current detection value Iin is calculated again by the third adder 52, and the booster circuit 10 is controlled based on this difference as described above.

  As described above, the booster circuit 10 is feedback-controlled by the booster circuit current target value Iin * and the booster circuit current detection value Iin (step S8).

  After step S8, the control processing unit 30 obtains the current input power average value <Pin> based on the equation (1) (step S9).

  The control processing unit 30 compares the input power average value <Pin> at the previous calculation with the DC input current so that the input power average value <Pin> becomes the maximum value (follows the maximum power point). Set the target value Ig *.

  As described above, the control processing unit 30 controls the booster circuit 10 and the inverter circuit 11 while performing MPPT control on the photovoltaic power generation panel 2.

As described above, the control processing unit 30 feedback-controls the inverter circuit 11 and the booster circuit 10 with the current target value.
FIG. 8A is a graph showing an example of a result obtained by simulation of the booster circuit current target value Iin * obtained by the control processing unit 30 in the feedback control and the booster circuit current detection value Iin when controlled according to the target value. (B) shows an example of a result obtained by simulation of the booster circuit voltage target value Vo * obtained by the control processing unit 30 in the feedback control and the booster circuit voltage detection value Vo when controlled according to the booster circuit voltage. It is a graph.

As shown in FIG. 8A, it can be seen that the boost circuit current detection value Iin is controlled by the control processing unit 30 along the boost circuit current target value Iin *.
Further, as shown in FIG. 8B, since the booster circuit voltage target value Vo * is obtained by the above equation (6), the absolute value of the inverter output voltage target value Vinv * is approximately equal to the detected DC input voltage value. In the period of Vg or more, it changes so as to follow the absolute value of the inverter output voltage target value Vinv *, and in other periods, it changes so as to follow the DC input voltage detection value Vg.
It can be seen that the booster circuit voltage detection value Vo is controlled by the control processing unit 30 along the booster circuit voltage target value Vo *.

FIG. 9 is a diagram illustrating an example of the inverter output voltage target value Vinv *. In the figure, the vertical axis represents voltage and the horizontal axis represents time. The broken line indicates the voltage waveform of the commercial power system 3, and the solid line indicates the waveform of the inverter output voltage target value Vinv *.
The inverter circuit 11 outputs power with the inverter output voltage target value Vinv * shown in FIG. 9 as the voltage target value by the control according to the flowchart of FIG.
Therefore, the inverter circuit 11 outputs the electric power of the voltage according to the waveform of the inverter output voltage target value Vinv * shown in FIG.

  As shown in the figure, both waves have substantially the same voltage value and frequency, but the phase of the inverter output voltage target value Vinv * is advanced several times with respect to the voltage phase of the commercial power system 3. ing.

As described above, the control processing unit 30 of the present embodiment changes the phase of the inverter output voltage target value Vinv * to the voltage phase of the commercial power system 3 while executing the feedback control of the booster circuit 10 and the inverter circuit 11. The phase is advanced about 3 degrees.
The angle by which the phase of the inverter output voltage target value Vinv * is advanced with respect to the voltage phase of the commercial power system 3 may be several degrees, and is different from the voltage waveform of the commercial power system 3 as will be described later. Is set in a range where the phase is advanced by 90 degrees with respect to the voltage waveform of the commercial power system 3. For example, it is set in a range of values larger than 0 degree and smaller than 10 degrees.

The phase advance angle is determined by the system voltage detection value Va, the inductance La of the AC reactor 22, and the inverter current target value Iinv * as shown in the above equation (5). Among these, the system voltage detection value Va and the inductance La of the AC reactor 22 are fixed values that are not controlled, and therefore the phase advance angle is determined by the inverter current target value Iinv *.
The inverter current target value Iinv * is determined by the output current target value Ia * as shown in the above equation (4). As the output current target value Ia * increases, the phase-advanced component of the inverter current target value Iinv * increases, and the advance angle (angle to advance) of the inverter output voltage target value Vinv * increases.

  Since the output current target value Ia * is obtained from the above equation (2), the phase advance angle is adjusted by the DC input current target value Ig *.

(Regarding control of booster circuit and inverter circuit)
The booster circuit control unit 32 controls the switching element Qb of the booster circuit 10. Further, the inverter circuit control unit 33 controls the switching elements Q1 to Q4 of the inverter circuit 11.

  The booster circuit control unit 32 and the inverter circuit control unit 33 generate a booster circuit carrier wave and an inverter circuit carrier wave, respectively, and these carrier waves are booster circuit voltage reference values Vbc # that are target values given from the control processing unit 30, and Modulation is performed using the inverter voltage reference value Vinv # to generate a drive waveform for driving each switching element.

  The step-up circuit control unit 32 and the inverter circuit control unit 33 control each switching element based on the drive waveform, whereby an alternating current waveform approximate to the step-up circuit current target value Iin * and the inverter current target value Iinv *. Electric power is output to the booster circuit 10 and the inverter circuit 11.

FIG. 10A is a graph comparing the booster circuit carrier wave with the waveform of the booster circuit voltage reference value Vbc #. In the figure, the vertical axis represents voltage and the horizontal axis represents time. In FIG. 10A, the wavelength of the booster carrier wave is shown longer than the actual wavelength for easy understanding.
The booster circuit carrier wave generated by the booster circuit control unit 32 is a triangular wave having a minimum value of “0”, and the amplitude A1 is set to the booster circuit voltage target value Vo * given from the control processing unit 30.
In addition, the frequency of the booster circuit carrier wave is set by the booster circuit control unit 32 according to a control command from the control processing unit 30 so as to have a predetermined duty ratio.

  As described above, the booster circuit voltage target value Vo * is equal to the inverter output voltage target value Vinv * during the period W1 in which the absolute value of the inverter output voltage target value Vinv * is approximately equal to or greater than the DC input voltage detection value Vg. Following the absolute value, it changes so as to follow the DC input voltage detection value Vg in the other periods. Therefore, the amplitude A1 of the booster circuit carrier also changes according to the booster circuit voltage target value Vo *.

  In the present embodiment, it is assumed that the detected DC input voltage value Vg is 250 volts and the voltage amplitude of the commercial power system 3 is 288 volts.

  The waveform of the booster circuit voltage reference value Vbc # (hereinafter also referred to as booster circuit reference wave Vbc #) is a value obtained by the control processing unit 30 based on the booster circuit current target value Iin *, and is the inverter output voltage target value Vinv. The absolute value of * is a positive value in a period W1 in which the absolute value is larger than the DC input voltage detection value Vg. In the period W1, the booster circuit reference wave Vbc # has a waveform that approximates the waveform formed by the booster circuit voltage target value Vo *, and intersects the booster carrier wave.

  The booster circuit control unit 32 compares the booster circuit carrier wave with the booster circuit reference wave Vbc #, and the booster circuit reference wave Vbc #, which is the target value of the voltage across the DC reactor 15, becomes equal to or higher than the booster circuit carrier wave. A drive waveform for driving the switching element Qb is generated so as to be turned on in the portion and turned off in the portion below the carrier wave.

FIG. 10B shows a drive waveform for driving the switching element Qb generated by the booster circuit control unit 32. In the figure, the vertical axis represents voltage and the horizontal axis represents time. The horizontal axis is shown so as to coincide with the horizontal axis in FIG.
This drive waveform indicates the switching operation of the switching element Qb, and by applying it to the switching element Qb, the switching operation according to the drive waveform can be executed. The drive waveform constitutes a control command that turns off the switching element when the voltage is 0 volts and turns on the switching element when the voltage is positive.

The booster circuit control unit 32 generates a drive waveform so that the switching operation is performed in a period W1 in which the absolute value of the inverter output voltage target value Vinv * is equal to or greater than the DC input voltage detection value Vg. Therefore, the switching element Qb is controlled so as to stop the switching operation within the range of the DC input voltage detection value Vg or less.
Each pulse width is determined by the intercept of the carrier wave for the booster circuit which is a triangular wave. Therefore, the pulse width increases as the voltage increases.

  As described above, the booster circuit control unit 32 modulates the booster circuit carrier wave with the booster circuit reference wave Vbc #, and generates a drive waveform representing the pulse width for switching. The booster circuit control unit 32 performs PWM control of the switching element Qb of the booster circuit 10 based on the generated drive waveform.

  FIG. 11A is a graph comparing the carrier wave for the inverter circuit and the waveform of the inverter voltage reference value Vinv #. In the figure, the vertical axis represents voltage and the horizontal axis represents time. In FIG. 11 (a), the wavelength of the carrier wave for the inverter circuit is shown longer than the actual wavelength for easy understanding.

The inverter circuit carrier generated by the inverter circuit control unit 33 is a triangular wave having an amplitude center of 0 volts, and its one-side amplitude is set to the boost circuit voltage target value Vo * (the voltage target value of the capacitor 23). Therefore, the amplitude A2 of the carrier wave for the inverter circuit has a period that is twice (500 volts) the detected DC input voltage value Vg and a period that is twice the voltage of the commercial power system 3 (maximum 576 volts). .
Further, the frequency is set by the inverter circuit control unit 33 so as to have a predetermined duty ratio by a control command or the like by the control processing unit 30.

  As described above, the booster circuit voltage target value Vo * is equal to the inverter output voltage target value Vinv * during the period W1 in which the absolute value of the inverter output voltage target value Vinv * is approximately equal to or greater than the DC input voltage detection value Vg. Following the absolute value, in the period W2, which is the other period, it changes so as to follow the DC input voltage detection value Vg. Therefore, the amplitude A2 of the inverter circuit carrier also changes in accordance with the boost circuit voltage target value Vo *.

  The waveform of the inverter voltage reference value Vinv # (hereinafter also referred to as the inverter circuit reference wave Vinv #) is a value obtained by the control processing unit 30 based on the inverter current target value Iinv *, and is generally a voltage amplitude of the commercial power system 3. It is set to be the same as (288 volts). Therefore, the inverter circuit reference wave Vinv # intersects the inverter circuit carrier in a portion where the voltage value is in the range of −Vg to + Vg.

  The inverter circuit control unit 33 compares the inverter circuit carrier wave with the inverter circuit reference wave Vinv #, and is turned on when the inverter circuit reference wave Vinv #, which is the voltage target value, is greater than or equal to the inverter circuit carrier wave. A drive waveform for driving the switching elements Q1 to Q4 is generated so as to be turned off at the portion.

(B) of FIG. 11 is a drive waveform for driving the switching element Q1 generated by the inverter circuit control unit 33. In the figure, the vertical axis represents voltage and the horizontal axis represents time. The horizontal axis is shown so as to coincide with the horizontal axis in FIG.
The inverter circuit control unit 33 generates the drive waveform so that the switching operation is performed in the range W2 where the voltage of the inverter circuit reference wave Vinv # is in the range of −Vg to + Vg. Therefore, in the other range, the switching element Q1 is controlled so as to stop the switching operation.

(C) of FIG. 11 is a drive waveform for driving the switching element Q3 generated by the inverter circuit control unit 33. In the figure, the vertical axis represents voltage and the horizontal axis represents time.
For the switching element Q3, the inverter circuit control unit 33 compares the inverted wave of the inverter circuit reference wave Vinv # indicated by the broken line in the drawing with a carrier wave to generate a drive waveform.
Also in this case, the inverter circuit control unit 33 generates the drive waveform so that the voltage of the inverter circuit reference wave Vinv # (the inverted wave thereof) is switched in the range W2 between −Vg and + Vg. Therefore, in the other range, the switching element Q3 is controlled so as to stop the switching operation.

  The inverter circuit control unit 33 generates the inverted driving waveform of the switching element Q1 for the driving waveform of the switching element Q2, and inverts the driving waveform of the switching element Q3 for the driving waveform of the switching element Q4. To create

  As described above, the inverter circuit control unit 33 modulates the inverter circuit carrier wave with the inverter circuit reference wave Vinv #, and generates a drive waveform representing a pulse width for switching. The inverter circuit control unit 33 performs PWM control on the switching elements Q1 to Q4 of the inverter circuit 11 based on the generated drive waveform.

  The booster circuit control unit 32 of the present embodiment outputs power so that the current flowing through the DC reactor 15 matches the booster circuit current target value Iin *. As a result, the booster circuit 10 is caused to perform a switching operation in a period W1 (FIG. 10) in which the absolute value of the inverter output voltage target value Vinv * is approximately equal to or greater than the DC input voltage detection value Vg. The booster circuit 10 outputs power so that a voltage equal to or greater than the DC input voltage detection value Vg is approximated to the absolute value of the inverter output voltage target value Vinv * in the period W1. On the other hand, during the period in which the absolute value of the inverter output voltage target value Vinv * is approximately equal to or less than the DC input voltage detection value Vg, the booster circuit control unit 32 stops the switching operation of the booster circuit 10. Therefore, during the period equal to or less than the DC input voltage detection value Vg, the booster circuit 10 outputs the DC input voltage value of the DC power output from the photovoltaic power generation panel 2 to the inverter circuit 11 without boosting.

Moreover, the inverter circuit control part 33 of this embodiment outputs electric power so that the electric current which flows into the AC reactor 22 may correspond to inverter electric current target value Iinv *. As a result, the inverter circuit 11 is caused to perform a switching operation in a period W2 (FIG. 11) in which the inverter output voltage target value Vinv * is approximately −Vg to + Vg. That is, the inverter circuit 11 is caused to perform a switching operation in a period in which the absolute value of the inverter output voltage target value Vinv * is equal to or less than the DC input voltage detection value Vg.
Therefore, the inverter circuit 11 performs the switching operation while the booster circuit 10 stops the switching operation, and outputs AC power approximate to the inverter output voltage target value Vinv *.
Since the inverter circuit reference wave Vinv # and the inverter output voltage target value Vinv * are approximated, they overlap in FIG.

  On the other hand, the inverter circuit control unit 33 stops the switching operation of the inverter circuit 11 in a period other than the period W2 where the voltage of the inverter output voltage target value Vinv * is approximately −Vg to + Vg. During this time, the inverter circuit 11 is supplied with the electric power boosted by the booster circuit 10. Therefore, the inverter circuit 11 that has stopped the switching operation outputs the power supplied from the booster circuit 10 without stepping down.

  That is, the power conversion device 1 of the present embodiment switches the booster circuit 10 and the inverter circuit 11 so that there is a stop period within the voltage half cycle of AC power, and superimposes the power output by each, AC power having a voltage waveform approximate to the inverter output voltage target value Vinv * is output.

Thus, in this embodiment, when the absolute value of the inverter output voltage target value Vinv * is higher than the DC input voltage detection value Vg, the booster circuit 10 is operated, and the inverter output voltage target Control is performed so that the inverter circuit 11 is operated when the voltage of the portion where the absolute value of the value Vinv * is lower than the detected DC input voltage Vg. Therefore, since the inverter circuit 11 does not step down the power boosted by the booster circuit 10, the potential difference when the voltage is stepped down can be kept low, so that the loss due to switching of the booster circuit can be reduced and higher. AC power can be output with high efficiency.
Furthermore, since both the booster circuit 10 and the inverter circuit 11 operate based on the inverter output voltage target value Vinv * set by the control unit 12, the booster circuit power output so as to be switched alternately and the inverter circuit power It is possible to suppress the occurrence of displacement and distortion between the two.

FIG. 12 is a diagram illustrating an example of a current waveform of AC power output from the power conversion device 1 together with an example of a reference wave and a driving waveform of a switching element.
In FIG. 12, the reference wave Vinv # and carrier wave of the inverter circuit, the drive waveform of the switching element Q1, the reference wave Vbc # and carrier wave of the booster circuit, the drive waveform of the switching element Qb, and the power conversion device 1 are output in order from the top stage. The graph which shows the target value and measured value of the current waveform of alternating current power to represent is shown. The horizontal axis of each graph indicates time and is shown to coincide with each other.

As shown in the figure, it can be seen that the actual measured value Ia of the output current is controlled to coincide with the target value Ia *.
Further, it can be seen that the period of switching operation of the switching element Qb of the booster circuit 10 and the period of switching operation of the switching elements Q1 to Q4 of the inverter circuit 11 are controlled to be switched alternately.

  In the present embodiment, as shown in FIG. 8A, the booster circuit is controlled so that the current flowing through the DC reactor 15 matches the current target value Iin * obtained based on the above equation (7). The As a result, the voltages of the booster circuit and the inverter circuit have the waveforms shown in FIG. 8B. The high-frequency switching operations of the booster circuit 10 and the inverter circuit 11 each have a stop period, and the operation in which the switching operations are performed approximately alternately. Is possible.

  Ideally, it is preferable that the booster circuit 10 and the inverter circuit 11 perform “alternately” high-frequency switching so that the high-frequency switching timings do not overlap. If there is a period, the loss is reduced, which contributes to higher efficiency.

(About the current phase of the output AC power)
The booster circuit 10 and the inverter circuit 11 according to the present embodiment output AC power having a voltage waveform approximate to the inverter output voltage target value Vinv * to the filter circuit 21 connected to the subsequent stage under the control of the control unit 12. The power conversion device 1 outputs AC power to the commercial power system 3 via the filter circuit 21.

Here, the inverter output voltage target value Vinv * is generated as a voltage phase advanced by the control processor 30 several times with respect to the voltage phase of the commercial power system 3 as described above.
Therefore, the AC voltage output from the booster circuit 10 and the inverter circuit 11 is also a voltage phase advanced by several degrees with respect to the voltage phase of the commercial power system 3.

  Then, the AC reactor 22 (FIG. 2) of the filter circuit 21 is applied to both ends of the AC voltage of the booster circuit 10 and the inverter circuit 11 on one side and the commercial power system 3 on the other side. It will be different.

FIG. 13A is a graph showing the voltage waveforms of the AC voltage output from the inverter circuit 11, the commercial power system 3, and the voltage across the AC reactor 22, respectively. In the figure, the vertical axis represents voltage and the horizontal axis represents time.
As shown in the figure, when a voltage having a voltage phase shifted by several degrees is applied to both ends of the AC reactor 22, the voltage of both ends of the AC reactor 22 is a voltage applied to both ends of the AC reactor 22. Difference.

  Therefore, as shown in the figure, the phase of the voltage across the AC reactor 22 is a phase advanced by 90 degrees with respect to the voltage phase of the commercial power system 3.

FIG. 13B is a graph showing a waveform of a current flowing through the AC reactor 22. In the figure, the vertical axis represents current and the horizontal axis represents time. The horizontal axis is shown to coincide with the horizontal axis in FIG.
The current phase of AC reactor 22 is delayed by 90 degrees with respect to the voltage phase. Therefore, as shown in the figure, the current phase of the AC power output through the AC reactor 22 is synchronized with the current phase of the commercial power system 3.

Therefore, the voltage phase output from the inverter circuit 11 is advanced several times with respect to the commercial power system 3, but the current phase matches the current phase of the commercial power system 3.
Therefore, the current waveform output from the power converter 1 matches the voltage phase of the commercial power system 3 as shown in the graph shown in the lowermost stage of FIG.
As a result, since an alternating current having the same phase as the voltage of the commercial power system 3 can be output, it is possible to suppress a reduction in the power factor of the alternating power.

  Heretofore, the grid connection by the minimum switching type power conversion device 1 has been described in detail. The control unit 12 switches the DC / AC converter (inverter circuit 11) and the DC / DC converter (boost circuit 10) so that there is a stop period within the voltage half cycle of the AC power, and the DC / DC converter ( The current target value of the booster circuit 10) is set to synchronize with the AC power current.

(About power conversion in the reverse direction)
Although the said power converter device 1 demonstrated conversion from direct-current power to alternating current power, the power converter device 1 shown in FIG. 2 can also be a converter device from alternating current power to direct-current power. In that case, the photovoltaic power generation panel 2 in FIG. 1 is replaced with a rechargeable storage battery. Further, the inverter circuit 11 of FIG. 2 is a DC / AC converter 11 that can boost the voltage in cooperation with the AC reactor 22. The step-up circuit 10 is a step-down circuit 10 as a DC / DC converter. The control for charging the storage battery can be considered as a similar control in which the grid connection control is viewed in the reverse direction.

For example, various quantities in the power converter 1 in the reverse direction are as follows.
Ia *: input current target value from the commercial power system 3 Iin: step-down circuit current detection value Iin *: step-down circuit current target value Iinv *: target value of AC input current to the DC / AC converter 11 Ig *: direct current to the storage battery Input current target value Ic: current flowing in the capacitor 19 Ica: current flowing in the capacitor 23

Va: System voltage detection value Vg: Storage battery voltage value Vinv *: AC input voltage target value to DC / AC converter 11 Vo *: Input voltage target value to step-down circuit 10 Pin: Input power to storage battery P _LOSS : Power conversion Power loss of device 1 η: Power conversion efficiency of power conversion device 1

Therefore, the following relations corresponding to the above-mentioned formulas (1) to (8) can be applied.
The average value <Pin> of the input power Pin to the storage battery corresponding to the equation (1) is
<Pin> = <Iin × Vg> (R1)
It is.
The average value <Ia *> of the input current target values from the commercial power system 3 corresponding to Equation (2) is
<Ia *> = <Ig * × Vg> / (η × <Va>) (R2)
It is.
The input current target value Ia * corresponding to Equation (3) is
Ia * = (2 ^1/2 ) × <Ia *> × sinωt (R3)
It is.

The AC input current target value Iinv * corresponding to Equation (4) is
Iinv * = Ia * −s CaVa (R4)
It is.
If the expression (R4) is expressed using differentiation at time t,
Iinv * = Ia * −Ca × (d Va / dt) (R4a)
It becomes. Also, if the current flowing in the capacitor 23 is detected and this is Ica,
Iinv * = Ia * −Ica (R4b)
It becomes.

Further, the AC input voltage target value Vinv * corresponding to the equation (5) is
Vinv * = Va−Za Iinv * (R5)
It is.
If the expression (R5) is expressed using differentiation at time t,
Vinv * = Va− {RaIinv * + La × (d Iinv * / dt)
... (R5a)
It becomes.

Further, the input voltage target value Vo * to the step-down circuit 10 corresponding to Expression (6) is obtained by replacing Vgf, that is, (Vg−Z Iin) in Expression (6) with Vgr, that is, (Vg + Z Iin).
Vo * = Max (absolute value of Vg + Z Iin, Vinv *) (R6)
It can be.
If the expression (R6) is expressed using differentiation at time t,
Vo * =
Max (Vg + R Iin + L (d Iin / dt), absolute value of Vinv *)
... (R6a)
It becomes.

The step-down circuit current target value Iin * is
Iin * =
{(Iinv * × Vinv *) − (s C Vo *) × Vo *} /
(Vg + ZIin) (R7)
It is.
If the expression (R7) is expressed using differentiation at time t,
Iin * =
{(Iinv * × Vinv *) − C × (d Vo * / dt) × Vo *} /
{Vg + RIin + L (dIin / dt)) (R7a)
It becomes. Also, if the current flowing through the capacitor 19 is detected and this is taken as Ic,
Iin * =
{(Iinv * × Vinv *) − Ic × Vo *} / (Vg + ZIin)
... (R7b)
It becomes.

  In the expressions (R7), (R7a), and (R7b), the term added to the product of the AC input current target value Iinv * and the AC input voltage target value Vinv * takes into account reactive power passing through the capacitor 19 It is the value. That is, the value of Iin * can be obtained more accurately by considering reactive power in addition to the target power value of the DC / AC converter 11.

Furthermore, if the power loss P _LOSS of the power converter 1 is measured in advance, the above equation (R7a) can be expressed as follows.
Iin * =
{(Iinv * × Vinv *) − C × (d Vo * / dt) × Vo * −P _LOSS } / (Vg + ZIin) (R7c)
Similarly, the above formula (R7b) can also be expressed as follows.
Iin * =
{(Iinv * × Vinv *) − Ic × Vo * −P _LOSS } / (Vg + ZIin)
... (R7d)
In this case, in addition to the power target value of the DC / AC converter 11, the value of Iin * can be determined more strictly by considering the reactive power and the power loss P _LOSS .

When the electrostatic capacity C and the power loss P _{LOSS of} the capacitor 19 are sufficiently smaller than (Iinv * × Vinv *), the following formula (R8) is established. Iin * obtained by this formula (R8) can be used as Iin included in the right side of formulas (R6), (R6a), (R7), (R7a), (R7b), (R7c) and (R7d).
Iin * = (Iinv * × Vinv *) / Vg (R8)

  As described above, the control unit 12 reduces the voltage when the absolute value of the AC input voltage target value Vinv * to the DC / AC converter 11 is higher than the DC voltage (Vg + Z Iin). When the circuit 10 is operated to output a voltage in which the absolute value of the AC input voltage target value Vinv * to the DC / AC converter 11 is lower than the DC voltage (Vg + Z Iin), the DC / AC converter 11 is operated. It is controlled to let you. Therefore, the potential difference at the time of boosting by the DC / AC converter 11 can be kept low, the switching loss of the DC / AC converter 11 and the step-down circuit 10 can be reduced, and DC power can be output with higher efficiency.

  Furthermore, since both the step-down circuit 10 and the DC / AC converter 11 operate based on the target value set by the control unit 12, even if the operation is performed so that the high-frequency switching periods of both circuits are alternately switched, the DC / AC It is possible to suppress the occurrence of phase shift or distortion in the alternating current input to the converter 11.

<< Output control 1 of power converter (output suppression) >>
Next, output control of the power conversion device 1 on the premise of the minimum switching method as described above will be described.
In addition, the following description regarding control of the power converter device 1 is also a description regarding a control method of the power converter device (the same applies hereinafter).

  (A) of FIG. 14 is an example of the connection diagram of the solar power generation in a consumer. The photovoltaic power generation panel 2 is connected to a power converter 1 as a power conditioner. The power conversion device 1 is connected to the distribution board 61. The distribution board 61 is connected to the commercial power system 3 via the power meter 63. The power meter 63 serving as the “power monitoring unit” can measure, for example, the power and power amount of power purchase and power sale (reverse power). Further, the distribution board 61 is connected to a load such as an electric device in a consumer via an outlet 62, for example. It should be noted that the load and the commercial power system 3 can be considered as a broad sense AC system.

  The power generated by the photovoltaic power generation panel 2 is consumed by the load in the consumer, and surplus power can be sold. Here, for example, it is assumed that the generated power of the photovoltaic power generation panel 2 is 8 kW, the private power consumption is 1 kW, and the surplus power sales (reverse tide) is 7 kW.

  Now, the electric power company is constantly monitoring the commercial system voltage, and when the voltage of the commercial power system rises due to excessive reverse tide, it can issue an output suppression command to the power converter 1 of each consumer. For example, as shown in FIG. 14B, when an output suppression command is received that suppresses 7 kW of reverse tide to 3 kW, the power conversion device 1 suppresses the power drawn from the photovoltaic power generation panel 2 to 4 kW and Power consumption is 1 kW, and surplus power sales are 3 kW. Thus, the power converter device 1 may have to suppress the output rapidly. In addition, as an overheating prevention when the internal temperature of the power converter 1 rises, the power converter 1 may suppress the output itself. Anyway, the point that the power converter device 1 must suppress the output rapidly is the same.

  In such a case, the control unit 12 of the power conversion device 1 changes the target current value flowing through the AC reactor 22 at the timing when the current flowing through the DC reactor 15 becomes zero. The current flowing through the DC reactor 15 is, for example, shown in FIG. 4 as the boost circuit current detection value Iin. This current becomes zero periodically (1/2 period of the frequency of the commercial power system). Further, the current flowing through the AC reactor 22 is a current detection value Iinv detected by the second current sensor 24 (FIG. 2).

Here, the following specific numerical conditions are given to the power converter 1 to verify the operation.
Output power: Abrupt decrease from 8kW to 4kW Input voltage: 250V
Output voltage: 202V (effective value)
Carrier frequency: 20kHz
Inductance of DC reactor 15: 1 mH
Inductance of AC reactor 22: 1 mH
Capacitance of the intermediate capacitor 19: 100 μF

FIG. 15 is a waveform diagram showing the current change and the intermediate capacitor voltage (the voltage of the DC bus 20) when the target current value flowing through the AC reactor 22 is changed at the timing of the peak of the current flowing through the DC reactor 15 for comparison. It is. The upper part of the figure represents the current change, the middle part represents the change of the intermediate capacitor voltage, and the lower part represents the gate signal (PWM pulse) for the switching element (for example, Q1) of the inverter circuit 11. In addition, the current in the upper part of the figure represents the following three types of waveforms.
That is, the “DCL current” is a current that flows through the DC reactor 15. The “output current target value” is a target value (command value) of the current that should flow through the AC reactor 22. The “output current” is a current that actually flows through the AC reactor 22.

  When attention is paid to the portion surrounded by the ellipse in FIG. 15, output suppression is started at the time of 0.245 seconds when the DCL current reaches its peak value, and the output current target value decreases instantaneously. The output current decreases with a delay from the output current target value, slightly undershoots, and then converges to follow the output current target value. Further, the intermediate capacitor voltage suddenly increases by about 100 V after the start of output suppression, and then gradually decreases.

  FIG. 16 is a waveform diagram obtained by further enlarging the time axis of FIG. 15 around the time of 0.245 seconds. The upper stage omits the DCL current and shows only the output current target value and the output current. Even if the output current target value falls instantaneously at 0.245 seconds, the output current cannot follow. Therefore, feedback control based on the difference between the output current target value and the output current works, and the control is performed in the direction of suppressing the output current, that is, the direction of reducing the on-duty of the inverter circuit 11. The portion surrounded by the lower ellipse means a reduction in on-duty.

  As described above, when the target current value flowing through the AC reactor 22 is changed at the timing of the peak of the current flowing through the DC reactor 15, the output current temporarily cannot reach the output current target value, and the intermediate capacitor voltage Will soar.

  FIG. 17 is a waveform diagram showing the current change and the intermediate capacitor voltage (the voltage of the DC bus 20) when the target value of the output current flowing through the AC reactor 22 is changed at the timing when the current flowing through the DC reactor 15 becomes zero. The upper part of the figure represents the current change, the middle part represents the change of the intermediate capacitor voltage, and the lower part represents the gate signal (PWM pulse) for the switching element (for example, Q1) of the inverter circuit 11. The upper part of the figure represents the DCL current, the output current target value, and the output current, as in the comparative example (FIG. 15).

  When attention is paid to a portion surrounded by an ellipse or the like in FIG. 17, output suppression is started, for example, at time 0.240 seconds when the DCL current becomes zero. When the DCL current becomes zero, the output current target value is also zero. The output current target value suppresses the output from the current 0 as the starting point, since the rising slope after time 0.240 seconds becomes gentle. The output current matches the output current target value even when output suppression is started. Here, when attention is paid to the intermediate capacitor voltage, no increase in voltage is observed with the start of output suppression at time 0.240 seconds.

  As described above, when the target current value flowing through the AC reactor 22 is changed at the timing when the current flowing through the DC reactor 15 becomes zero, it is possible to prevent the intermediate capacitor voltage from rising. That is, it is possible to respond to the request for suppressing the reverse power flow without causing a sudden change in the voltage of the DC bus 20.

  The timing at which the current flowing through the DC reactor 15 becomes zero is ideally a timing of 0 [A], but near 0, for example, about 0 ± 0.1 [A], or the peak current On the other hand, even when the timing is in the range of about 0 ± 1 [%], an increase in the intermediate capacitor voltage can be prevented. That is, as the control that the control unit 12 should actually execute, the current target value flowing through the AC reactor 22 may be changed at a timing when the current flowing through the DC reactor 15 becomes close to zero. This also applies to the following examples.

<< Output control 2 of power conversion device (load fluctuation under output suppression) >>
Next, as another example of output control of the power converter 1, control for load fluctuation under output suppression will be described.

FIG. 18 is the same as FIG. 14 with respect to the configuration, and thus description thereof is omitted.
First, in FIG. 18A, for example, it is assumed that the generated power of the photovoltaic power generation panel 2 is 5 kW, the private power consumption is 1 kW, and the surplus power sales are 4 kW. An output suppression command (4 kW) is given to the power converter 1. Here, it is assumed that self-power consumption has increased rapidly from 1 kW to 4 kW. If the output of the power conversion device 1 is maintained at 4 kW, the insufficient 3 kW is purchased from the commercial power system 3, which is a loss in the operation of solar power generation.

  Therefore, in such a case, as shown in FIG. 18B, the power conversion device 1 draws out an output of 8 kW from the photovoltaic power generation panel 2 in accordance with an increase in the private power consumption, and enhances the output. Specifically, for example, since power purchase due to an increase in private power consumption can be detected by the power meter 63, the power conversion device 1 may increase the output by +3 kW in conjunction with the power meter 63.

  On the other hand, if the private power consumption decreases (4 kW → 1 kW) from the state shown in FIG. 18B, the power sale increases and the output suppression rule cannot be observed as it is. Therefore, the power conversion device 1 reduces the output of 8 kW drawn from the photovoltaic power generation panel 2 in accordance with the decrease in the private power consumption, and reduces it to 5 kW as shown in FIG. Specifically, for example, an increase in power sales due to a decrease in private power consumption can be detected by the power meter 63, so that the power conversion device 1 may reduce the output by −3 kW in conjunction with the power meter 63.

  In the case of such sudden output change, the control unit 12 of the power conversion device 1 changes the target current value flowing through the AC reactor 22 at the timing when the current flowing through the DC reactor 15 becomes close to zero.

Here, the following specific numerical conditions are given to the power converter 1 to verify the operation.
(In case of increase)
Output power: Rapid increase from 5kW to 8kW Input voltage: 250V
Output voltage: 202V (effective value)
Carrier frequency: 20kHz
Inductance of DC reactor 15: 1 mH
Inductance of AC reactor 22: 1 mH
Capacitance of the intermediate capacitor 19: 100 μF

  FIG. 19 is a waveform diagram showing the current change and the intermediate capacitor voltage (the voltage of the DC bus 20) when the target current value flowing through the AC reactor 22 is changed at the timing of the peak of the current flowing through the DC reactor 15 for comparison. It is. The upper part of the figure represents the current change, the middle part represents the change of the intermediate capacitor voltage, and the lower part represents the gate signal (PWM pulse) for the switching element (for example, Q1) of the inverter circuit 11. The upper part of the figure shows the DCL current, the output current target value, and the output current as before.

  When attention is paid to the portion surrounded by an ellipse in FIG. 19, output control is started at time 0.245 seconds when the DCL current reaches its peak value, and the output current target value increases instantaneously. The output current rises later than the output current target value, slightly overshoots, converges, and follows the output current target value. Further, the intermediate capacitor voltage greatly fluctuates after the start of the output control, reaches about 350 V, and then gradually decreases.

  As described above, when the target current value flowing through the AC reactor 22 is changed at the timing of the peak of the current flowing through the DC reactor 15, the output current temporarily cannot reach the output current target value, and the intermediate capacitor voltage Will soar.

  FIG. 20 is a waveform diagram showing the current change and the intermediate capacitor voltage (the voltage of the DC bus 20) when the target current value flowing through the AC reactor 22 is changed at the timing when the current flowing through the DC reactor 15 becomes zero. The upper part of the figure represents the current change, the middle part represents the change of the intermediate capacitor voltage, and the lower part represents the gate signal (PWM pulse) for the switching element (for example, Q1) of the inverter circuit 11. The upper part of the figure represents the DCL current, the output current target value, and the output current, as in the comparative example (FIG. 19).

  When attention is paid to a portion surrounded by an ellipse or the like in FIG. 20, the output control is started, for example, at time 0.240 seconds when the DCL current becomes zero. When the DCL current becomes zero, the output current target value is also zero. The output current target value increases the output from the current 0 as the starting point, and the rising gradient after 0.240 seconds becomes tight. Even when the output control is started, the output current coincides with the output current target value. Here, when attention is paid to the intermediate capacitor voltage, no increase in voltage is observed with the start of output control at time 0.240 seconds.

As described above, when the target current value flowing through the AC reactor 22 is changed at the timing when the current flowing through the DC reactor 15 becomes zero, it is possible to prevent the intermediate capacitor voltage from rising.
In addition, it is possible to appropriately utilize and adjust the generated power of the DC power source (solar power generation panel 2) in response to an increase in load while maintaining the reverse power to be constant.

Moreover, the following specific numerical conditions are given to the power converter 1, and operation | movement is verified.
(In case of decrease)
Output power: Abrupt decrease from 8kW to 5kW Input voltage: 250V
Output voltage: 202V (effective value)
Carrier frequency: 20kHz
Inductance of DC reactor 15: 1 mH
Inductance of AC reactor 22: 1 mH
Capacitance of the intermediate capacitor 19: 100 μF

  FIG. 21 is a waveform diagram showing the current change and the intermediate capacitor voltage (voltage of the DC bus 20) when the target current value flowing through the AC reactor 22 is changed at the timing of the peak of the current flowing through the DC reactor 15 for comparison. It is. The upper part of the figure represents the current change, the middle part represents the change of the intermediate capacitor voltage, and the lower part represents the gate signal (PWM pulse) for the switching element (for example, Q1) of the inverter circuit 11. The upper part of the figure shows the DCL current, the output current target value, and the output current as before.

  When attention is paid to the portion surrounded by the ellipse in FIG. 21, output control is started at time 0.245 seconds when the DCL current reaches its peak value, and the output current target value falls instantaneously. The output current falls later than the output current target value, slightly undershoots, and then converges to follow the output current target value. Further, the intermediate capacitor voltage largely fluctuates after the start of the output control, reaches about 390 V, and then gradually decreases.

  As described above, when the target current value flowing through the AC reactor 22 is changed at the timing of the peak of the current flowing through the DC reactor 15, the output current temporarily cannot reach the output current target value, and the intermediate capacitor voltage Will soar.

  FIG. 22 is a waveform diagram showing the current change and the intermediate capacitor voltage (the voltage of the DC bus 20) when the target current value flowing through the AC reactor 22 is changed at the timing when the current flowing through the DC reactor 15 becomes zero. The upper part of the figure represents the current change, the middle part represents the change of the intermediate capacitor voltage, and the lower part represents the gate signal (PWM pulse) for the switching element (for example, Q1) of the inverter circuit 11. The upper part of the figure represents the DCL current, the output current target value, and the output current, as in the comparative example (FIG. 19).

  When attention is paid to a portion surrounded by an ellipse or the like in FIG. 22, output control is started, for example, at a time of 0.240 seconds when the DCL current becomes zero. When the DCL current becomes zero, the output current target value is also zero. The output current target value decreases the output from the current 0 as the starting point, since the rising slope after time 0.240 seconds becomes gentle. Even when the output control is started, the output current coincides with the output current target value. Here, when attention is paid to the intermediate capacitor voltage, no increase in voltage is observed with the start of output control at time 0.240 seconds.

As described above, when the target current value flowing through the AC reactor 22 is changed at the timing when the current flowing through the DC reactor 15 becomes zero, it is possible to prevent the intermediate capacitor voltage from rising.
In addition, it is possible to appropriately utilize and adjust the generated power of the DC power supply (solar power generation panel 2) in response to a load decrease while maintaining the reverse power flow constant.

In addition, although said output control 1 and 2 demonstrated the case where there was one photovoltaic power generation panel 2, ie, DC power supply, the same control can be performed also when there exist several DC power supply.
For example, two examples of output control of the power conversion device 1 in the case of so-called double power generation in which a storage battery is used in combination with the solar power generation panel 2 will be supplementarily described below.

<< Output control 3 of power converter (load fluctuation under output suppression) >>
Since FIG. 23 is the same as FIG.
First, in FIG. 23A, for example, the generated power of the photovoltaic power generation panel 2 is 5 kW, the charge / discharge power of the storage battery 4 is 0 kW, the private power consumption is 1 kW, and the surplus power sales are 4 kW. An output suppression command (4 kW) is given to the power converter 1. Here, it is assumed that self-power consumption has increased rapidly from 1 kW to 4 kW.

  In such a case, as shown in FIG. 23B, 3 kW is output by discharging the storage battery 4, and the total output is increased together with the output of the photovoltaic power generation panel 2. Specifically, for example, an increase in power purchase due to an increase in private power consumption can be detected by the power meter 63, so that the power conversion device 1 starts discharging the storage battery 4 in conjunction with the power meter 63 and outputs +3 kW. You only need to increase it.

  On the other hand, if the private power consumption is reduced (4 kW → 1 kW) from the state shown in FIG. 23B, the power sale increases and the output suppression rule cannot be observed as it is. Then, the power converter device 1 stops the discharge of the storage battery 4 according to the reduction | decrease of private power consumption, and returns to the state shown to (a) of FIG. Specifically, for example, an increase in power sales due to a decrease in private power consumption can be detected by the power meter 63, so that the power conversion device 1 may stop discharging the storage battery 4 in conjunction with the power meter 63.

  Even in the case of such sudden output change, the control unit 12 of the power conversion device 1 changes the target current value flowing through the AC reactor 22 at the timing when the current flowing through the DC reactor 15 becomes close to zero.

<< Output control 4 of power converter (load fluctuation under output suppression) >>
FIG. 24 is the same as FIG. 14 with respect to the configuration, and thus description thereof is omitted.
First, in FIG. 24A, for example, the generated power of the solar power generation panel 2 is 8 kW, the charge / discharge power of the storage battery 4 is 0 kW, the private power consumption is 4 kW, and the surplus power sales are 4 kW. An output suppression command (4 kW) is given to the power converter 1. Here, it is assumed that the private power consumption is rapidly reduced from 4 kW to 1 kW.

  In such a case, as shown in FIG. 24B, 3 kW is consumed by charging the storage battery 4, and the output of the photovoltaic power generation panel 2 and the load are balanced. Specifically, for example, since an increase in power sales due to a decrease in private power consumption can be detected by the power meter 63, the power conversion device 1 starts charging the storage battery 4 in cooperation with the power meter 63, and the power of 3 kW Consume.

  On the other hand, if the private power consumption increases (1 kW → 4 kW) from the state shown in FIG. 24B, the power purchase increases as it is. Then, the power converter device 1 stops charge of the storage battery 4 according to the increase in private power consumption, and returns to the state shown to (a) of FIG. Specifically, for example, since an increase in power purchase due to an increase in private power consumption can be detected by the power meter 63, the power conversion device 1 may stop charging the storage battery 4 in conjunction with the power meter 63.

  Even in the case of such sudden output change, the control unit 12 of the power conversion device 1 changes the target current value flowing through the AC reactor 22 at the timing when the current flowing through the DC reactor 15 becomes close to zero.

<About control flow>
Next, a control flow for changing the current target value as the power conversion device 1 will be described. The execution subject of the control flow is the control unit 12.
FIG. 25 is an example of a flowchart illustrating a change process to the current target value according to output suppression illustrated in FIG. 14, for example. By starting the process, the control unit 12 determines whether or not there is an output suppression command (receives an output suppression command) (step S1). When there is an output suppression command, the control unit 12 checks the reverse power flow (step S2). Next, the control unit 12 determines the upper limit value of the generated power based on the maximum power that can be reversed by the output suppression command and the private power consumption (Step S3).

  Subsequently, the control unit 12 checks the DC reactor current (step S4) and waits for a timing of 0 [A]. When the timing of 0 [A] is reached, the control unit 12 sets the output current target value of the power conversion device 1 so as to be the upper limit value determined in step S3 (step S5). Then, it returns to step S1 and the control part 12 repeats the same process. While there is an output suppression command, the setting of the output current target value is repeated at the timing when the DC reactor current becomes zero while always checking the reverse power.

  When the power consumption increases under power suppression, the purchased power increases. Therefore, if the generated power can be increased, the control unit 12 can increase the upper limit by a necessary amount to suppress the purchased power. Further, when the private power consumption decreases from that state, the reverse power flow increases. Therefore, the control unit 12 can reduce the upper limit value to reduce the generated power by a necessary amount, and can keep the reverse power flow constant.

  When the output suppression command is canceled, the control unit 12 proceeds from step S1 to step S3, and can determine the upper limit value of the generated power according to the power generation capacity without being limited by the reverse power.

<Summary>
As described above, in both cases of (a) output control accompanying output suppression and (b) output control according to load fluctuation under output suppression, the current flowing through the DC reactor 15 of the DC / DC converter 10 By changing the target value of the current flowing through the AC reactor 22 at the timing when becomes close to 0, a rapid change in the current flowing through the AC reactor 22 and the voltage of the DC bus 20 before and after the change can be suppressed.
Thereby, the withstand voltage conditions of the intermediate capacitor 19 and the switching elements (Q1 to Q4, Qb, Qb2) connected to the DC bus 20 are relaxed, and the withstand voltage can be further reduced. The low withstand voltage contributes to a reduction in component cost and size, and also contributes to a reduction in loss.

<< Change of parallel circuit of DC / DC converter, etc. >>
Next, the control (control method) regarding the change of the parallel circuit of the DC / DC converter will be described. In addition, the said control may be used separately from the above-mentioned output control 1 and 2 of a power converter device, and may be used in combination.

  FIG. 26 is a block diagram showing a schematic configuration of the power conversion apparatus 1 in which two sets of DC / DC converters 10 are provided in parallel with each other. The parts corresponding to those in FIG. The power converter 1 is provided between a DC power source 2 and a commercial power system (or load) 3. In addition, when using DC power supply 2 and the power converter device 1 as an independent power supply, the load 3 will be connected to this. An expression that can include both a commercial power system and a load can be considered as an “AC system”.

In FIG. 26, the control unit 12 can operate the two sets of DC / DC converters 10 alternately, for example. Moreover, the control part 12 can also control so that both of two sets of DC / DC converters 10 may perform a converter operation | movement equally sharing an electric current.
The two sets of DC / DC converters 10 in these cases have a reduced operating rate or reduced current burden compared to the case where there is only one set of DC / DC converters. A DC converter 10 can be used.
The DC power supply 2 may be a single power supply common to the DC / DC converters 10 or may be a group of a plurality of DC power supplies 2 individually corresponding to the DC / DC converters 10. .

  FIG. 27 is an example of a circuit diagram of the power conversion device 1 having two sets of DC / DC converters 10. Two sets of DC / DC converters 10 (internal configuration is the same) are provided in parallel between the DC power supply 2 and the DC bus 20. Other circuit configurations are the same as those in FIG.

Here, the following specific numerical conditions are given to the power converter 1 (FIG. 27) to verify the operation.
The output power of the DC / DC converter 10 on the upper side of FIG. 27 is rapidly increased from 5 kW to 10 kW. Further, the output power of the DC / DC converter 10 on the lower side of FIG. 27 is rapidly reduced from 5 kW to 0 kW. That is, from the state in which the two sets of DC / DC converters 10 equally bear 5 kW of power (current burden), only one of the DC / DC converters 10 bears 10 kW and the other rests. Change. Accordingly, the number of operating circuits of the DC / DC converter 10 is changed from “2” to “1”.

Other numerical conditions are as follows.
Input voltage: 250V
Output voltage: 202V (effective value)
Carrier frequency: 20kHz
Inductance of DC reactor 15: 1 mH
Inductance of AC reactor 22: 1 mH
Capacitance of the intermediate capacitor 19: 100 μF

FIG. 28 is a waveform diagram showing the current change and the intermediate capacitor voltage (voltage of the DC bus 20) when the number of operating circuits is changed at the timing of the peak of the current flowing through the DC reactor 15 for comparison. The upper part of the figure represents the current change, and the lower part represents the change of the intermediate capacitor voltage. The upper part of the figure represents the following three types of waveforms.
That is, “DCL current 1” means the current flowing through the DC reactor 15 of the upper DC / DC converter 10 (5 kW → 10 kW) in FIG. 27, and “DCL current 2” means the lower DC / DC in FIG. This is a current flowing through the DC reactor 15 of the converter 10 (5 kW → 0 kW). In the current waveform from 0.235 seconds to 0.245 seconds, the upper waveform is the sum of the DCL current 1 and the DCL current 2. In addition, the lower waveforms are the DCL current 1 and the DCL current 2, and both appear to overlap because they have the same value.

  When attention is paid to the portion surrounded by an ellipse or circle in FIG. 28, the number of operating circuits is switched (2 → 1) at the time of 0.245 seconds when the DCL currents 1 and 2 reach the peak value, and the DCL current 1 rapidly increases. It increases and the DCL current 2 decreases slightly slowly. Since the DCL currents have different temporal displacements as described above, the sum of the DCL currents temporarily becomes a large value, and then settles to a value that should originally be. After switching the number of operating circuits, the intermediate capacitor voltage drops for a moment, then increases greatly, and then gradually settles.

  FIG. 29 is a waveform diagram obtained by further enlarging the time axis of FIG. 28 around the time of 0.245 seconds. The above state change can be seen more clearly than in FIG. That is, when the number of operating circuits is switched at the time of 0.245 seconds when the DCL currents 1 and 2 reach the peak value, the DCL current 1 increases rapidly and the DCL current 2 decreases slightly slowly. Due to the difference in time displacement, the sum of the DCL currents temporarily becomes a large value and then settles to a value that should be originally. After switching the number of operating circuits, the intermediate capacitor voltage decreases for a moment, then increases to about 350 V, and then gradually settles.

  As described above, when the number of operating circuits is switched at the timing of the peak of the current flowing through the DC reactor 15, the sum of the DC reactor currents temporarily increases and the intermediate capacitor voltage also increases.

  FIG. 30 is a waveform diagram showing a current change and an intermediate capacitor voltage (voltage of the DC bus 20) when the number of operating circuits is switched at the timing when the current flowing through the DC reactor 15 becomes zero. The upper part of the figure represents the current change, and the lower part represents the change of the intermediate capacitor voltage. Further, the upper part of the figure represents the DCL currents 1 and 2 and the sum as in the comparative example (FIGS. 28 and 29).

  In the current waveform from 0.235 seconds to 0.245 seconds, the upper waveform is the sum of the DCL current 1 and the DCL current 2. In addition, the lower waveforms are the DCL current 1 and the DCL current 2, and both appear to overlap because they have the same value.

  When attention is paid to a portion surrounded by an ellipse or the like in FIG. 30, the number of operating circuits is switched, for example, at time 0.240 seconds when the DCL currents 1 and 2 become 0. After 0.240 seconds, only the DCL current 1 bears the same current as before switching, and the DCL current 2 becomes zero. When attention is paid to the intermediate capacitor voltage, no increase in voltage due to switching of the number of operating circuits at time 0.240 seconds is observed.

  As described above, when the number of operating circuits is switched at the timing when the current flowing through the DC reactor 15 becomes zero, it is possible to prevent an increase in the intermediate capacitor voltage.

Next, the following other specific numerical conditions are given to the power converter 1 (FIG. 27) to verify the operation.
The output power of the DC / DC converter 10 on the upper side of FIG. 27 is rapidly reduced from 10 kW to 5 kW. Further, the output power of the DC / DC converter 10 on the lower side of FIG. 27 is rapidly increased from 0 kW to 5 kW. That is, from the state that only one DC / DC converter 10 of the two sets of DC / DC converters 10 bears 10 kW and the other rests, the two sets equally bear 5 kW of power (current burden). Change to Therefore, the number of operating circuits of the DC / DC converter 10 is changed from “1” to “2”.

Other numerical conditions are as follows.
Input voltage: 250V
Output voltage: 202V (effective value)
Carrier frequency: 20kHz
Inductance of DC reactor 15: 1 mH
Inductance of AC reactor 22: 1 mH
Capacitance of the intermediate capacitor 19: 100 μF

FIG. 31 is a waveform diagram showing the current change and the intermediate capacitor voltage (the voltage of the DC bus 20) when the number of operating circuits is changed at the timing of the peak of the current flowing through the DC reactor 15 for comparison. The upper part of the figure represents the current change, and the lower part represents the change of the intermediate capacitor voltage. The upper part of the figure represents the following three types of waveforms.
That is, “DCL current 1” means the current flowing through the DC reactor 15 of the upper DC / DC converter 10 (10 kW → 5 kW) in FIG. 27, and “DCL current 2” means the lower DC / DC in FIG. This is a current flowing through the DC reactor 15 of the converter 10 (0 kW → 5 kW). In the current waveform from the time 0.085 seconds to 0.090 seconds, the upper waveform is the sum of the DCL current 1 and the DCL current 2, but the DCL current 2 is 0. It is a waveform of current 1. The lower waveform is the DCL current 2.

  If attention is paid to the portion surrounded by an ellipse or circle in FIG. 31, the number of operating circuits is switched (1 → 2) at time 0.095 seconds when the DCL current 1 reaches its peak value, and the DCL current 2 increases rapidly. The DCL current 1 decreases slightly slowly. Since the DCL currents have different temporal displacements as described above, the sum of the DCL currents temporarily becomes a large value, and then settles to a value that should originally be. The intermediate capacitor voltage rises greatly after switching the number of operating circuits, and then gradually settles.

  As described above, when the number of operating circuits is switched at the timing of the peak of the current flowing through the DC reactor 15, the sum of the DC reactor currents temporarily increases and the intermediate capacitor voltage also increases.

  FIG. 32 is a waveform diagram showing a current change and an intermediate capacitor voltage (voltage of the DC bus 20) when the number of operating circuits is switched at a timing when the current flowing through the DC reactor 15 becomes zero. The upper part of the figure represents the current change, and the lower part represents the change of the intermediate capacitor voltage. Further, the upper part of the figure represents the DCL currents 1 and 2 and the sum as in the comparative example (FIG. 31).

  In the current waveform from the time 0.085 seconds to 0.090 seconds, the upper waveform is the sum of the DCL current 1 and the DCL current 2, but the DCL current 2 is 0. It is a waveform of current 1. The lower waveform is the DCL current 2.

  When attention is paid to a portion surrounded by an ellipse or the like in FIG. 32, the number of operating circuits is switched, for example, at time 0.090 seconds when the DCL current 1 becomes 0. After 0.090 seconds, the DCL currents 1 and 2 will bear the current equally. When attention is paid to the intermediate capacitor voltage, there is no increase in voltage due to switching of the number of operating circuits at time 0.090 seconds.

As described above, when the number of operating circuits is switched at the timing when the current flowing through the DC reactor 15 becomes zero, it is possible to prevent an increase in the intermediate capacitor voltage.
In addition, by controlling the two sets of DC / DC converters 10 to operate alternately or both perform a converter operation while equally sharing current, the two sets of DC / DC converters 10 Compared with the case where there is only one DC converter, the operating rate is reduced or the current burden is reduced. As a result, two sets of DC / DC converters 10 can be used over a long period of time.

<< Operation circuit when the number of parallel circuits of DC / DC converter is 3 or more >>
FIG. 33 is a block diagram showing a schematic configuration of the power conversion apparatus 1 in which n sets of DC / DC converters 10 (n is a natural number of 3 or more) are provided in parallel with each other. The parts corresponding to those in FIG. The power converter 1 is provided between a DC power source 2 and a commercial power system (or load) 3.
In the figure, the controller 12 can select and operate k sets (k is a natural number smaller than n) from n sets of DC / DC converters 10.

Here, as a method for determining k sets of “k”, for example, the generated power of the DC power supply 2 (solar power generation panel 2) is compared with a predetermined power threshold set in stages, and “k” is determined. In other words, the number of operating units can be determined.
Specifically, for example, if n = 3, the power threshold is prepared in two stages, Pth_1 and Pth_2 (> Pth_1),
When the generated power is smaller than Pth_1, one unit is operating.
When the generated power is greater than or equal to Pth_1 and smaller than Pth_2, two units are in operation.
If the generated power is Pth_2 or more, 3 units are operating.
It can be.

When the value of n is not specified universally, for example, a total of n power thresholds, Pth_1,..., Pth_k,. And
When the generated power is smaller than Pth_1, one unit is operating.
Thereafter, when the generated power is greater than or equal to the latest lower threshold value and smaller than Pth_k, k units are operated.
When the generated power is greater than or equal to the nearest lower threshold and less than Pth_n, n units are operating,
It can be.

  Such selection of the number of operating units is particularly suitable when the DC power source is a photovoltaic power generation panel. That is, based on a comparison between the total amount of power generated by the photovoltaic power generation panel and a power threshold value that is set in stages, the number of operating units, n, is determined to change the generated power depending on the weather and time. In the case of a photovoltaic power generation panel, an appropriate number of n can be determined according to the total amount of generated power.

Furthermore, not only the number of “k” but also the combination of k is important. For example, in order to operate two of the three units in total, if the three DC / DC converters 10 are DC / DC converters 10-1, 10-2, 10-3,
Combination 1: 10-1, 10-2
Combination 2: 10-2, 10-3
Combination 3: 10-3, 10-1
It becomes.

Universally, if k of the required number of operating units is determined, there are _n C _k combinations of the k units. By using these combinations evenly, all the DC / DC converters 10 can be used evenly and the lifetime as a whole can be extended.

<About control flow>
Here, a control flow for changing the current target value assuming a combination of operating circuits will be described. The execution subject of the control flow is the control unit 12.
FIG. 34 is an example of such a flowchart. By starting the process, the control unit 12 compares the generated power of the photovoltaic power generation panel with the power threshold value (step S11). And the control part 12 determines the number of operation (step S12). Furthermore, the control part 12 determines the combination of an operation circuit (step S13).

  Subsequently, the control unit 12 checks the DC reactor current (step S14) and waits for a timing of 0 [A]. When the timing of 0 [A] is reached, the control unit 12 changes the current target value of each circuit (step S15). Then, it returns to step S11 and the control part 12 repeats the same process.

<< Equal load for each circuit >>
When a plurality of DC / DC converters 10 are connected in parallel, equalizing the usage time of each circuit is preferable for extending the life of the whole. As an index of usage time, the number of times that the DC reactor current becomes 0 can be counted. Since the count is simple, the calculation burden on the control unit 12 is light.
FIG. 35 is a diagram illustrating an example of changing the combination based on the count of the number of times the DC reactor current becomes zero. For example, if the predetermined number is x and 0 [A] is counted x times, the combination can be changed in a rotational manner.

<Other circuit configuration>
FIG. 36 is a block diagram illustrating a schematic configuration of the power conversion apparatus 1 in which n sets of DC / DC converters 10 (n is a natural number of 3 or more) are provided in parallel with each other. The difference from FIG. 33 is that the DC power supply 2 is provided corresponding to each DC / DC converter 10.

For example, assuming that the four DC power supplies 2 are solar power generation panels each having a 2 kW output, all DC power supplies 2 are equally 1 kW when receiving an output suppression command from the state of 8 kW power generation to 4 kW power generation. It is possible to cope with changing the parallel number such that the two photovoltaic power generation panels are stopped and the remaining two are operated.
Similarly, assuming that the four DC power sources 2 are 2 kW output storage batteries, if the power pulled by the load side suddenly decreases from 8 kW to 4 kW, all DC power sources 2 are not evenly suppressed to 1 kW output. Rather, two parallel storage batteries 2 are stopped, and the remaining two 2 kW output storage batteries are operated.

<Summary>
As described above, in the case of switching the number of operating circuits when a plurality of sets of DC / DC converters 10 are provided in parallel, a plurality of sets are set at a timing when the current flowing through the DC reactor 15 of the DC / DC converter 10 becomes close to zero. By changing the current load of the DC / DC converter 10, it is possible to suppress a sudden change in the sum of the currents flowing through the DC reactor 15 and the voltage of the DC bus 20 before and after the change.
Thereby, the withstand voltage conditions of the intermediate capacitor 19 and the switching elements (Q1 to Q4, Qb, Qb2) connected to the DC bus 20 are relaxed, and the withstand voltage can be further reduced. The low withstand voltage contributes to a reduction in component cost and size, and also contributes to a reduction in loss.

<Others>
The present invention can be realized not only as a power conversion device 1 including such a characteristic control unit 12 or as a control method by the control unit 12, but also by causing a computer to execute such characteristic processing steps. Can be realized as a program. Moreover, it can implement | achieve as a semiconductor integrated circuit which implement | achieves a part or all of the control part 12, and can implement | achieve as a power conversion system including the power converter device 1 by adding a peripheral element further.

In addition, it should be considered that the embodiment disclosed this time is illustrative and not restrictive in all respects. The scope of the present invention is defined by the terms of the claims, and is intended to include any modifications within the scope and meaning equivalent to the terms of the claims.
On the contrary, an apparatus and a method having all the above disclosure contents may be an embodiment of the present invention.

DESCRIPTION OF SYMBOLS 1 Power converter 2 Solar power generation panel, DC power supply 3 Commercial power system 4 Storage battery 10 Booster circuit, step-down circuit, DC / DC converter 10-1, 10-2, 10-3 DC / DC converter 11 Inverter circuit, DC / AC converter 12 Control unit 15 DC reactor 17 First voltage sensor 18 First current sensor 19 Intermediate capacitor 20 DC bus 21 Filter circuit 22 AC reactor 23 Capacitor 24 Second current sensor 25 Second voltage sensor 26 Capacitor 27 Third voltage sensor 30 Control processing unit 32 Booster circuit control unit 33 Inverter circuit control unit 34 Averaging processing unit 41 First calculation unit 42 First adder 43 Compensator 44 Second adder 51 Second calculation unit 52 Third adder 53 Compensator 54 4th adder 61 Distribution board 62 Outlet 63 Electric power meter Db1, Db2 diode P circuit node Q1 to Q4, Qb, Qb 2 switching element

Claims (10)

A power conversion device that performs DC / AC power conversion between a DC power source and an AC system,
A filter circuit connected to the AC system and including an AC reactor;
A DC / AC converter provided between the filter circuit and a DC bus;
An intermediate capacitor connected to the DC bus;
A DC / DC converter provided between the DC power source and the DC bus and including a DC reactor;
The DC / AC converter and the DC / DC converter are switched so that there is a stop period within the voltage half cycle of the AC power, and the current flowing through the DC reactor is periodically zeroed. A control unit for controlling the DC converter,
The said control part is a power converter device which changes the electric current target value which flows into the said AC reactor at the timing when the electric current which flows into the said DC reactor becomes near zero. Equipped with a power monitoring unit that monitors reverse power,
2. When the reverse power is suppressed, the control unit reduces the generated power corresponding to the suppression at least at a timing when the current flowing through the DC reactor becomes close to 0 with respect to the DC power supply. The power converter device described in 1.   The power converter according to claim 2, wherein when the load power increases or decreases, the control unit increases or decreases the output power or input power of the DC power supply while keeping the reverse power flow constant. A power conversion device that performs DC / AC power conversion between a DC power source and an AC system,
A filter circuit connected to the AC system and including an AC reactor;
A DC / AC converter provided between the filter circuit and a DC bus;
An intermediate capacitor connected to the DC bus;
A DC / DC converter between the DC power supply and the DC bus and provided in parallel with each other, each set including a DC reactor;
The DC / AC converter and the DC / DC converter are switched so that there is a stop period within the voltage half cycle of the AC power, and the current flowing through the DC reactor is periodically zeroed. A control unit for controlling the DC converter,
The said control part is a power converter device which changes the electric current burden of several sets of said DC / DC converters at the timing when the electric current which flows into the said DC reactor becomes near zero. Two sets of the DC / DC converters are provided,
The said control part is a power converter device of Claim 4 which controls so that two sets of said DC / DC converters operate | move alternately, or both bear current equally and perform converter operation | movement. n is a natural number of 3 or more, k is a natural number smaller than n,
N sets of the DC / DC converters are provided,
5. The power conversion device according to claim 4, wherein each time the change is made, the control unit performs control so that k sets of the DC / DC converters, which are always different combinations from the n sets, perform a converter operation. The DC power source is a photovoltaic power generation panel,
The said control part is a power converter device of Claim 6 which determines the number of said k based on the comparison with the electric power threshold set in steps with the total amount of the generated electric power of the said photovoltaic power generation panel.   The power converter according to claim 6 or 7, wherein the control unit selects the n sets of combinations so that the cumulative number of times that the current flowing through the DC reactor becomes zero is equalized. A filter circuit connected to an AC system and including an AC reactor, a DC / AC converter provided between the filter circuit and the DC bus, an intermediate capacitor connected to the DC bus, a DC power source, and the DC bus A DC / DC converter including a DC reactor, and a method for controlling a power converter that performs DC / AC power conversion between a DC power source and an AC system,
The DC / AC converter and the DC / DC converter are switched so that there is a stop period within a half cycle of the voltage of the AC power, and the current flowing through the DC reactor is controlled to be periodically zero,
A method for controlling a power converter, wherein a target current value flowing through the AC reactor is changed at a timing when the current flowing through the DC reactor becomes close to zero. A filter circuit connected to an AC system and including an AC reactor, a DC / AC converter provided between the filter circuit and the DC bus, an intermediate capacitor connected to the DC bus, a DC power source, and the DC bus A DC / DC converter provided in parallel with each other and including a DC reactor in each set, and converting DC power / AC power between the DC power supply and the AC system. A method for controlling a power conversion device, comprising:
The DC / AC converter and the DC / DC converter are switched so that there is a stop period within a half cycle of the voltage of the AC power, and the current flowing through the DC reactor is controlled to be periodically zero,
A method for controlling a power converter, wherein a current burden of a plurality of sets of the DC / DC converters is changed at a timing when a current flowing through the DC reactor becomes close to zero.