JP2017075981A - Liquid crystal display - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a liquid crystal display that suppresses flicker generated when low-frequency drive or intermittent drive is applied to achieve good display quality.SOLUTION: There is provided a liquid crystal display comprising: a first electrode; a second electrode that forms an electric field with the first electrode; an insulating film that is arranged between the first electrode and second electrode; and liquid crystal that has its alignment direction controlled by the electric field. The material of the insulating film is an oxide or a nitride including an element selected from zircon, magnesium, strontium, titanium, aluminum, yttrium, and hafnium; when the capacity of the insulating film at a frequency of 1 Hz is Ca and the capacity of the insulating film at a frequency of 1000 Hz is Cb, the following formula (1) is satisfied. (1) 3.0×10≤|(Ca-Cb)/Ca|≤1.5×10.SELECTED DRAWING: Figure 9

Description

  The present invention relates to a liquid crystal display device.

  Liquid crystal display devices are mounted on various devices such as in-vehicle displays such as television receivers and car navigation devices, mobile terminals such as notebook computers, tablet PCs, mobile phones, and smartphones. In this liquid crystal display device, liquid crystals of various modes are employed depending on the application.

  For example, in a vertical electric field type liquid crystal display device such as a TN (Twisted Nematic) mode and an OCB (Optically Compensated Bend) mode, it is generated between a counter electrode provided on the upper substrate and a pixel electrode provided on the lower substrate. The orientation direction of the liquid crystal molecules contained in the liquid crystal layer sandwiched between the two substrates is controlled by the electric field.

  Further, in a horizontal electric field liquid crystal display device such as an IPS (In-Plane Switching) mode or an FFS (Fringe-Field Switching) mode, both the counter electrode (in this case called a COM electrode) and the pixel electrode are formed on one substrate. The orientation direction of the liquid crystal molecules contained in the liquid crystal layer is controlled by an electric field (fringe field) generated between both electrodes. Since the FFS mode liquid crystal display device can secure a large aperture ratio, the luminance is high and the viewing angle characteristic is excellent.

  Incidentally, in a liquid crystal display device for mobile terminals such as a smartphone, it is essential to reduce circuit power consumption. As one of the power consumption reducing means, low frequency driving, intermittent driving, and the like have been proposed. Low-frequency driving is a method of reducing circuit power by reducing the driving frequency of the liquid crystal display device to, for example, 1/2, 1/4, etc. with respect to standard conditions. The intermittent drive is a method of reducing circuit power by providing a circuit stop period of several display periods after writing for one display period to the liquid crystal display device. In either case, the cycle of rewriting the video signal on the liquid crystal display unit becomes longer, causing side effects such as blurring during video display, but it is effective in cases such as still image display where video visibility is not important. This is a circuit power reduction measure.

JP 2002-278523 A

However, when performing low frequency driving and intermittent driving in a liquid crystal display device, it is necessary to reduce flicker.
For example, flicker was not particularly visible when the frame frequency was 60 Hz, which is used in a normal liquid crystal display device, but flicker was visually recognized when the frame frequency was set to 1/3 of 20 Hz. When the frame frequency was further lowered, the flicker was visually recognized more prominently.

  An object of the present invention is to provide a liquid crystal display device that suppresses flicker that occurs when low-frequency driving and intermittent driving are applied, and that has good display quality.

The liquid crystal display device according to an embodiment is a liquid crystal display device, and includes a first electrode, a second electrode that forms an electric field between the first electrode, the first electrode, and the first electrode. An insulating film disposed between the two electrodes and a liquid crystal whose orientation direction is controlled by the electric field, and the insulating film is made of zircon, magnesium, strontium, titanium, aluminum, yttrium, and hafnium. A liquid crystal that is an oxide or a nitride containing a selected element and satisfies the following formula (1) when the capacitance of the insulating film at a frequency of 1 Hz is Ca and the capacitance of the insulating film at a frequency of 1000 Hz is Cb. Display device.
3.0 × 10 ⁻³ ≦ | (Ca—Cb) /Ca|≦1.5×10 ⁻² (1)

1 is a schematic plan view showing a configuration of a display device according to a first embodiment. The figure which shows the cross section of the display part of the liquid crystal display panel of the liquid crystal display device which concerns on 1st Embodiment. FIG. 3 is a diagram for explaining a driving method in intermittent driving of the liquid crystal display device according to the first embodiment. FIG. 5 is a diagram for explaining frequency dependence of normalized capacitance of a High-k material used for a storage capacitor insulating film of the liquid crystal display device according to the first embodiment. The figure which shows the luminance response waveform when the liquid crystal display device which concerns on 1st Embodiment, and the liquid crystal display device of a prior art example are actually driven. FIG. 3 is a diagram showing an equivalent circuit model of a capacitive insulating film using a High-k material for the liquid crystal display device according to the first embodiment. The figure for demonstrating the mechanism in which the luminance response waveform of the liquid crystal display device which concerns on 1st Embodiment generate | occur | produces. The figure for demonstrating the mechanism in which the luminance response waveform of the liquid crystal display device which concerns on 1st Embodiment generate | occur | produces. The figure which shows the relationship between the inclination of the frequency dependence curve of the capacitance of the liquid crystal display device which concerns on 1st Embodiment, and flicker. The figure which shows the result of the basic experiment performed in the case of examination of the liquid crystal display device which concerns on 2nd Embodiment. The figure for demonstrating a flexoelectric effect. The figure which shows the relationship between a flexo coefficient and a brightness | luminance amplitude. The figure which shows a luminance response waveform at the time of employ | adopting a liquid crystal material with a large flexo coefficient for the liquid crystal display device which concerns on 2nd Embodiment. The figure which shows the result of having applied the several liquid crystal material from which a flexo coefficient differs to the liquid crystal display device which concerns on 2nd Embodiment, and measuring the peak-to-peak value of a luminance amplitude. The figure which shows the equivalent circuit model of the capacity | capacitance insulating film, alignment film, and liquid crystal layer which used the High-k material of the liquid crystal display device examined prior to examination of the liquid crystal display device which concerns on 3rd Embodiment. The figure for demonstrating the aspect of the leak by the equivalent circuit model of the liquid crystal display device examined prior to examination of the liquid crystal display device which concerns on 3rd Embodiment. The figure for demonstrating the aspect of the leak by the equivalent circuit model of the liquid crystal display device which concerns on 3rd Embodiment. The figure for demonstrating the relationship between the capacitance insulation film specific resistance and alignment film specific resistance which made the parameter the liquid crystal applied voltage change rate in the holding | maintenance period of the liquid crystal display device which concerns on 3rd Embodiment. The figure which shows the flicker suppression conditions regarding the alignment film specific resistance and capacitive insulating film specific resistance of the liquid crystal display device which concern on 3rd Embodiment. FIG. 10 is a diagram showing another flicker suppression condition related to the alignment film resistivity and capacitance insulating film resistivity of the liquid crystal display device according to the third embodiment.

  The disclosure of each embodiment of the present invention described below is merely an example, and those skilled in the art can easily conceive of appropriate modifications while maintaining the gist of the invention. It is contained in the range. In addition, the drawings may be schematically represented with respect to the width, thickness, shape, and the like of each part in comparison with actual aspects for the sake of clarity of explanation, but are merely examples, and the interpretation of the present invention is not limited. It is not limited. In addition, in the present specification and each drawing, elements similar to those described above with reference to the previous drawings are denoted by the same reference numerals, and detailed description may be omitted as appropriate.

  Prior to the study of the liquid crystal display device according to each embodiment of the present invention, the contents studied on a method for reducing flicker will be described. In the following, regarding low-frequency driving and intermittent driving, a time interval for rewriting a video signal of a pixel is referred to as “frame period” or “1 frame”, and the reciprocal thereof is referred to as “frame frequency”.

  When a DC voltage is applied to a liquid crystal material for a long time, the display characteristics change with time due to charge-up, so it is generally driven by inverting the positive / negative polarity for each frame so that the DC average becomes almost zero. Is. However, if there is a difference in the response characteristics (brightness-voltage characteristics) between positive and negative, the luminance of-differs between positive and negative frames, and a difference in brightness occurs for each frame, causing flicker (flicker). Flicker can be minimized by adding a minute offset voltage to the positive / negative average (DC average value) of the signal or adjusting the counter electrode potential. It is difficult to eliminate the flicker completely by completely absorbing the deviation of the optimum condition between gradations.

  As means for reducing such flicker, for example, inversion methods such as line inversion, column inversion, and dot inversion are known. For example, in the case of line inversion, the phase of positive / negative polarity inversion in time is reversed and distributed for each row to macroscopically cancel the difference in luminance response between positive and negative so that flicker is not visually recognized. it can. The same is true for column inversion and dot inversion, and the former can be prevented from being visually recognized by reversing the phase of positive / negative polarity inversion in a checker pattern for each column.

  Of these, line inversion and dot inversion perform writing to the pixel while reversing the polarity for each line during screen scanning, so it is necessary to charge and discharge the signal lines in the panel every 1H period (one horizontal period). Circuit power consumption increases. On the other hand, column inversion is advantageous from the viewpoint of reducing circuit power consumption because there is no polarity inversion in the row direction. In a liquid crystal display device for mobile use, various inversion methods are adopted according to product specifications, but the column inversion method is most desirable from the viewpoint of power reduction.

  However, even if such a method such as column inversion is adopted, if the frame frequency is reduced and the retention period after TFT writing becomes long, the pixel potential fluctuates due to TFT leakage current, and flicker occurs. Occurs. Flicker due to this cause is particularly noticeable in the case of LTPS (low temperature polysilicon). Therefore, as a result of various examinations of this countermeasure, in the case of the FFS structure, a material having a large relative dielectric constant, which will be described later, is equivalent to the insulating film between the pixel ITO and the counter electrode COM (hereinafter referred to as a capacitive insulating film). It has been found that increasing the storage capacity using the TFT is effective in reducing the leakage current of the TFT. Note that the material having a high relative dielectric constant is an oxide or nitride containing an element selected from zircon, magnesium, strontium, titanium, aluminum, yttrium, and hafnium (hereinafter referred to as a High-k material). Conventionally, the most commonly used material for the capacitive insulating film is silicon nitride (SiN), and its relative dielectric constant is about 5 to 7. If, for example, a high-k material having a relative dielectric constant of about 20 is used for the capacitor insulating film, it is possible to secure about three times the storage capacity with the same film thickness, which is considered to be effective in suppressing flicker.

  Therefore, in the FFS mode liquid crystal display device, low-frequency driving and intermittent driving with a frame frequency of 1 Hz to 40 Hz were performed using a High-k material having a relative dielectric constant of about 20. As a result, pixel potential fluctuation due to TFT leakage was suppressed. However, as another problem, peak luminance fluctuation was observed immediately after signal writing (polarity inversion) in the luminance response waveform, and flicker suppression as expected could not be performed.

  In the following embodiments, a method for reducing flicker when a liquid crystal display device using a High-k material is driven at a low frequency and intermittently at 1 Hz to 40 Hz will be described.

[First embodiment]
FIG. 1 is a schematic plan view showing the configuration of the display device according to the first embodiment. The liquid crystal display device according to the present embodiment includes a liquid crystal display panel PNL and a backlight BLT. The liquid crystal display panel PNL includes a display unit including display pixels PX arranged in a matrix of m rows × n columns (m and n are positive integers). The backlight BLT is illumination means for illuminating the liquid crystal display panel PNL from the back side.

  FIG. 2 is a diagram illustrating a cross section of the display unit of the liquid crystal display panel PNL of the liquid crystal display device according to the first embodiment. The liquid crystal display panel PNL includes an array substrate 100, a counter substrate 200, and a liquid crystal layer LQ sandwiched between the pair of substrates 100 and 200.

  The counter substrate 200 is provided with a transparent insulating substrate SB2, a color filter layer CF, an overcoat layer L2, and an alignment film AL2. The color filter layer CF includes red (R), green (G), and blue (B) colored layers disposed on the transparent insulating substrate SB2. The overcoat layer L2 is provided so as to cover the color filter layer CF, and prevents substances contained in the color filter layer CF from flowing out to the liquid crystal layer LQ. The alignment film AL2 is provided in contact with the liquid crystal layer LQ and controls the alignment of liquid crystal molecules.

  The array substrate 100 includes a transparent insulating substrate SB1, a counter electrode (first electrode) COM, a plurality of pixel electrodes (second electrodes) PE, and an alignment film AL1. The pixel electrode PE is disposed above the counter electrode COM via an insulating film L1 such as silicon nitride (SiN). The pixel electrode PE is disposed for each display pixel PX, and a slit-shaped opening SLT is formed. The counter electrode COM and the pixel electrode PE are transparent electrodes formed of, for example, ITO (Indium Tin Oxide). The alignment film AL1 is provided in contact with the liquid crystal layer LQ and controls the alignment of liquid crystal molecules.

Here, the material of the insulating film L1 is preferably an oxide or nitride containing an element selected from zircon, magnesium, strontium, titanium, aluminum, yttrium, and hafnium. More preferably, both oxides and nitrides containing these elements are included. Examples of the oxide containing these elements include those selected from the group consisting of ZrSiO ₄ , TiO ₂ , SrTiO ₃ , MgO, ZrO ₂ , Al ₂ O ₃ , Y ₂ O ₃ , and HfO ₂ . Examples of the nitride containing these elements include those selected from the group consisting of ZrN, TiN, Sr ₃ N ₂ , Mg ₃ N ₂ , AlN, YN, and HfN.

  As shown in FIG. 1, the array substrate 100 includes scanning lines GL (GL1, GL2,..., GLm), signal lines SL (SL1, SL2,..., SLn) and pixel switches SW in the display unit. The scanning line GL extends along a row in which the plurality of display pixels PX are arranged. The signal line SL extends along a column in which the plurality of display pixels PX are arranged. The pixel switch SW is disposed in the vicinity of the position where the scanning line GL and the signal line SL intersect.

  The pixel switch SW includes a thin film transistor (TFT: Thin Film Transistor). The gate electrode of the pixel switch SW is electrically connected to the corresponding scanning line GL. The source electrode of the pixel switch SW is electrically connected to the corresponding signal line SL. The drain electrode of the pixel switch SW is electrically connected to the corresponding pixel electrode PE. The pixel electrode PE is opposed to the counter electrode COM via the insulating film L1, and a storage capacitor Cs is formed between the pixel electrode PE and the counter electrode COM.

  The array substrate 100 includes a gate driver GD (left GD-L and right GD-R) and a source driver SD as driving means for driving the plurality of display pixels PX. The plurality of scanning lines GL are electrically connected to the output terminal of the gate driver GD. The plurality of signal lines SL are electrically connected to the output terminal of the source driver SD.

  The gate driver GD and the source driver SD are arranged in a region around the display unit. The gate driver GD sequentially applies an ON voltage to the plurality of scanning lines GL, and supplies the ON voltage to the gate electrode of the pixel switch SW electrically connected to the selected scanning line GL. The source electrode and the drain electrode of the pixel switch SW in which the ON voltage is supplied to the gate electrode are conducted. The source driver SD supplies a video signal VS corresponding to each of the plurality of signal lines SL. The video signal VS supplied to the signal line SL is applied to the corresponding pixel electrode PE through the pixel switch SW in which the source electrode and the drain electrode are conducted.

  The operations of the gate driver GD and the source driver SD are controlled by a control circuit CTR disposed outside the liquid crystal display panel PNL. The control circuit CTR supplies the counter voltage Vcom to the counter electrode COM. Further, the control circuit CTR controls the operation of the backlight BLT.

  The control circuit CTR has an intermittent drive function to reduce drive power. As an example, it is assumed that the standard frame frequency of the liquid crystal display device is 60 Hz (that is, the video signal VS is rewritten to the pixel every (1/60) sec). In the case of moving image display, the operation is performed at a standard 60 Hz. However, when displaying a still image or the like where moving image visibility is not so important, the control circuit CTR performs intermittent driving.

  The control circuit CTR performs writing (scanning from the top to the bottom of the screen) over (1/60) sec, and then, for example, (1/60) sec, (3/60) sec, (7/60) A rest period of sec or (59/60) sec is provided. If the operation of the circuit CTR is stopped during the idle period control, the circuit power consumption during that period becomes substantially zero, and the circuit power consumption as the time average including the time of writing is 1/2, 1/4, 1/8, Or it is reduced to 1/60.

  In the drive as described above, since it is necessary to hold for a long time after writing to each pixel, it is desirable to use a TFT having a small off-leakage current. For example, a TFT using IGZO (an oxide composed of In (indium), Ga (gallium), and Zn (zinc)) generally has a small off-leakage current and is suitable for the above-described low-frequency driving and intermittent driving. It is said.

  On the other hand, polysilicon TFTs are not as low as IGZO and are generally not suitable for intermittent driving. However, since the polysilicon TFT has a feature of high mobility, there is a merit that a large charging capability can be obtained with a relatively small TFT size, and the aperture ratio of the pixel can be increased (that is, the backlight light utilization efficiency can be increased). There is a strong demand for intermittent driving with polysilicon TFTs. Therefore, by reducing the thickness of the insulating film L1 or increasing the dielectric constant, the capacitance Cs is increased, and even if a TFT leak occurs, the pixel potential hardly changes (that is, the holding capability is high and flicker does not easily occur). ) With this structure, intermittent driving is realized with polysilicon. In the present application, a High-k material having a relative dielectric constant of about 20 is employed as the insulating film L1.

  The liquid crystal display device according to this embodiment generates an electric field in the liquid crystal layer LQ due to a potential difference between voltages applied to the counter electrode COM and the pixel electrode PE, and controls the alignment direction of liquid crystal molecules included in the liquid crystal layer. This is a liquid crystal display device in (Fringe-Field Switching) mode. The amount of transmitted light emitted from the backlight BLT is controlled by the alignment direction of the liquid crystal molecules.

  FIG. 3 is a diagram for explaining a driving method in intermittent driving of the liquid crystal display device according to the first embodiment. FIG. 3 is a simplified diagram, and pixel potential fluctuations due to dielectric response delay are not drawn.

  As described above, in intermittent driving, one frame period is composed of a scanning period followed by a rest period. In the scanning period, the scanning lines GL1, GL2,..., GLm are sequentially selected, and the pixel switches SW in the corresponding rows are sequentially turned on. Here, m is the number of lines of the liquid crystal display device. Then, the video signal VS output from the source driver to the signal line SL in accordance with the timing when the pixel switch SW of each row becomes conductive is written and held in the pixel electrode PE of each row. Although there are n signal lines SL in the display area, for simplicity, only one signal line will be noted, and a video signal corresponding to this will be described as VS.

  In the pause period, no scanning line GL is selected, and the video signal VS held in each pixel electrode PE is held as it is. The same operation is performed in the next frame period. However, since the polarity of the video signal VS is inverted every frame, the video signal VS held in the pixel electrode PE is also inverted every frame. As a result, the potential applied to the pixel electrode PE has a rectangular wave shape that is inverted every frame as indicated by V (D1), V (D2),..., V (Dm).

  FIG. 4 is a diagram for explaining the frequency dependence of the normalized capacitance of the High-k material used for the storage capacitor insulating film of the liquid crystal display device according to the first embodiment. FIG. 4 shows the frequency dependence of capacitance normalized for the High-k material used in the present invention and the conventional High-k material. The capacitance shown in FIG. 4 is an admittance Y (generally a complex number, which corresponds to the reciprocal of impedance Z) measured by applying a sine wave voltage having a frequency f (angular frequency ω = 2πf) with an impedance analyzer. This corresponds to C when G + jωC (j is an imaginary unit). That is, a value obtained by dividing the imaginary part of admittance (this is called susceptance) by ω.

  FIG. 4A is a diagram in which the capacitance of the first embodiment and the capacitance of the conventional example are normalized so that the value at f = 1 Hz is 1. FIG. 4 (2) is an enlarged view of the vertical axis of this portion, focusing on the region related to low frequency driving. Note that the flicker phenomenon occurs in the low frequency drive, as will be described later, in a phenomenon of several ms to 100 ms from the start of the frame. That is, it is a phenomenon that exists in the range of approximately 0.1 to 1 kHz in the frequency domain.

  When the characteristic of the first embodiment is compared with the characteristic of the conventional example with reference to FIG. 4 (2), the slope of the characteristic curve in the low frequency region (approximately 0.1 to 1 kHz) is greatly different. . When the slope (the relative change in capacitance when the frequency is increased by 3 on the logarithmic scale, that is, 1000 times) is read from the graph, the first embodiment is −0.39%, whereas the conventional example is −2 0.01%.

In the graph, the capacitance sharply decreases in a high frequency region of about 10 kHz or more, which is because the insulating film cannot be charged due to the resistance of ITO or the like. It should be noted that the description of the principle of the first embodiment has no significant meaning.
It is a figure which shows a brightness | luminance response waveform when a display apparatus is actually driven. Each waveform is standardized so that the maximum peak value is 1. In the conventional example, peak-like luminance fluctuations appear noticeably immediately after signal writing (peak-to-peak value is about 3.5%), but in the first embodiment, this peak luminance fluctuation is peak-to-peak. It can be seen that the value is reduced to about 1.6%. Actually, when the liquid crystal display device was visually observed, flicker was visually recognized in the conventional example, but was not visually recognized in the first embodiment. From this result, by using a high-k material having a small frequency dependence of capacitance in a low frequency region (0.1 Hz to 1 kHz), peak-like luminance fluctuation immediately after polarity inversion is suppressed, and flicker is reduced. Recognize.

  Hereinafter, the reason why flicker is improved by reducing the absolute value of the slope of the frequency dependence curve of capacitance, which is a feature of the present invention, will be described.

  In general, a dielectric material has a component (such as electronic polarization and ion polarization) that instantaneously responds to voltage application, and a component (such as space charge polarization) that responds dielectrically after voltage application. A component that instantaneously responds to a voltage application can be expressed by a simple capacitance, but a component that responds to a voltage delayed by a voltage application cannot be expressed by a simple capacitance. Expressed as a series connection of factors.

  FIG. 6 is a diagram showing an equivalent circuit model of the capacitive insulating film using the High-k material of the liquid crystal display device according to the first embodiment.

  Capacitance C0 is a component corresponding to electronic polarization, ion polarization, etc., of a component that instantaneously responds to voltage application, and is called a main capacitance. The series connection of the capacitance Ci and the resistance factor Ri (i = 1, 2,..., 16) corresponds to a component that delays the voltage application and has a dielectric response, and is called a delay capacitance and a delay resistance factor. Here, the resistance factor Ri is expressed as Ri = τi / Ci by using a time constant of delay (an amount corresponding to a time delay from application of voltage to dielectric response) τi. In general, the delay capacity is smaller than the main capacity. In general, the delay capacity of a dielectric material has a plurality of components having different time constants, and here, as an example, it is expressed as a superposition of 16 components (i = 1, 2,..., 16).

  Next, the frequency dependence of the capacitance of the equivalent circuit of FIG. 6 will be described. For simplicity, it is assumed that Ci (i = 1, 2,..., 16) is a constant value (= C1) regardless of i. Further, τi (i = 1, 2,..., 16) is assumed to form a geometric progression in ascending order with respect to i, and the common ratio (= τi + 1 / τi) is r (r> 1).

  For example, assuming that a sinusoidal voltage having a frequency f (angular frequency ω = 2πf) is applied to the equivalent circuit of FIG. 6, the main capacitor C0 responds dielectrically, but only the delay capacitor with a small time constant responds. Specifically, it is considered that only a component with τi smaller than 1 / ω has a dielectric response. If there are n components of i = 1, 2,..., N, where τi is smaller than 1 / ω among the 16 delay capacitors Ci, the capacitance at this time is C0 + n as the sum of the capacitances of the components that respond dielectrically. • Can be represented by C1.

  Next, consider the case of applying a sinusoidal voltage (angular frequency is r · ω) multiplied by r. In this case, of the delay capacitance, the dielectric response has only a component in which τi is smaller than 1 / (r · ω) = (1 / r) · (1 / ω). Since it is a ratio sequence, it is considered that the number of components having dielectric response decreases by 1 and becomes (n−1) of i = 1, 2,..., (N−1). Therefore, the capacitance is C0 + (n-1) · C1.

  When the above is generalized, it can be understood that the capacitance decreases by C1 every time the frequency of the sine wave is r times. That is, when the capacitance is plotted on the vertical axis and the frequency is plotted on the horizontal axis, the vertical axis is a linear scale, and the horizontal axis is a logarithmic scale, a frequency-dependent graph of capacitance is drawn as a downward-sloping line.

  From the above consideration, it is considered that the equivalent circuit model of FIG. 6 well expresses the frequency dependence of the capacitance of FIG. Then, the ratio of C1 to the total capacity (assuming that C0 is sufficiently larger than C1 is approximately represented by C1 / C0) is the absolute value of the frequency-dependent slope of the capacitance (standardized) in FIG. It is understood that it corresponds to. That is, the High-k material of the first embodiment is expressed with a small value of C1 / C0, and the conventional example is expressed with a large value of C1 / C0.

  FIG. 7 is a diagram for explaining a mechanism for generating a luminance response waveform in the liquid crystal display device according to the first embodiment. 7A shows the operation of the equivalent circuit when the TFT is on, and FIG. 7B shows the operation of the equivalent circuit when the TFT is off.

  As shown in FIG. 7A, in the period when the TFT is ON (writing period; generally several μsec to several tens μsec), the video signal voltage V (S) supplied from the signal line side is applied to the pixel ITO electrode. Communicated. At this time, the main capacitor C0 instantaneously responds to voltage application and completes charging (charging), but the delay capacitance component Ci (i = 1, 2,..., 16) has the time constant τi ON. Because it is larger than the period width, it is hardly charged. Thereafter, as shown in FIG. 7 (2), after the TFT is turned off (holding period), the delay capacitance component performs a dielectric response and charging is performed. However, since the TFT is already turned off, charge is supplied from the signal line side. Is not performed, and the charge held at C0 is used for charging. Due to this charge redistribution, the pixel potential Vpix decreases.

  FIG. 8 is a diagram for explaining a mechanism by which a luminance response waveform is generated in the liquid crystal display device according to the first embodiment. FIG. 8A illustrates the behavior of the pixel potential Vpix of the liquid crystal display device according to the first embodiment. FIG. 8B is a diagram illustrating the behavior of the pixel potential Vpix of the conventional liquid crystal display device.

  In both the first embodiment and the conventional example, the video signal potential + Vs1 (in the case of a positive frame) or −Vs1 (in the case of a negative frame) is transmitted to the pixel ITO and Vpix reaches these potentials in the writing period. To do. In the subsequent holding period, the absolute value of Vpix decreases due to the above-described charge redistribution. The pixel potential drop due to charge redistribution at this time is smaller as C1 / C0 is smaller. Therefore, the first embodiment is lighter than the conventional example. The luminance response roughly corresponds to the absolute value of the voltage applied between the pixel ITO and the counter electrode COM. However, in FIG. 8, since the potential of the counter electrode COM is set to 0 V, the luminance response corresponds to | Vpix |. Then you can understand.

  Referring to | Vpix | shown in FIG. 8, it can be seen that a peak-like waveform is generated immediately after signal writing. Further, it can be understood that the range of the peak luminance fluctuation is smaller in the first embodiment than in the conventional example, that is, the flicker is smaller in relation to the magnitude of C1 / C0. In FIG. 8, the range of the luminance variation is A in the figure for the first embodiment, B in the conventional example, and A <B. This result shows that the situation in which the peak-like luminance variation shown in FIG.

  6, 7, and 8, it can be understood that flicker is improved by reducing the absolute value of the frequency-dependent slope of the capacitance.

  FIG. 9 is a diagram illustrating a relationship between the slope of the frequency dependence curve of the capacitance of the liquid crystal display device according to the first embodiment and flicker. FIG. 9 shows a result of measuring a flicker (peak-to-peak value of luminance variation) by manufacturing a liquid crystal display device by applying various high-k materials having different frequency-dependent slopes of capacitance to a storage capacitor insulating film. Shown in tabular form. In addition to this result, FIG. 9 shows the result of visual determination of the occurrence of flicker under each condition.

According to the results shown in FIG. 9, it can be seen that the peak-to-peak value of flicker is smaller as the absolute value of the frequency-dependent slope of the capacitance is smaller corresponding to the above explanation of the principle. When the capacitance frequency becomes 1000 times, the absolute value of the frequency-dependent slope of the capacitance (% / 1000 times) is visually 1.5% (1.5 × 10 ⁻² ) or less. It was also found that flicker was not visible. From the results shown in FIG. 9, the absolute value of the frequency-dependent slope of the capacitance is preferably 0.3% (3.0 × 10 ⁻³ ) or more.
That is, when the above result is expressed as an equation, the following equation is obtained. The capacity of the insulating film at a frequency of 1 Hz is Ca, and the capacity of the insulating film at a frequency of 1000 Hz is Cb.
3.0 × 10 ⁻³ ≦ | (Ca—Cb) /Ca|≦1.5×10 ⁻² (formula)

[Second Embodiment]
The liquid crystal display device according to the second embodiment of the present invention will be described below. The basic configuration of the liquid crystal display device is the same as that of the first embodiment, but a liquid crystal material having a large flexoelectric effect is used as the liquid crystal layer LQ. Parts having the same or similar functions as those in the first embodiment are denoted by the same reference numerals, and detailed description thereof is omitted.

  Before describing the details of the liquid crystal display device according to the second embodiment, a basic experiment performed on the flexoelectric effect of the liquid crystal will be described. In this basic experiment, a rectangular wave voltage is directly applied between the pixel electrode PE and the counter electrode COM using an element having the basic structure shown in FIG. 2 and having no TFT (hereinafter referred to as a test cell). The behavior when applied was observed.

  That is, the behavior in a situation where a rectangular wave voltage (a voltage of + Vp or −Vp when the amplitude is Vp) is always applied between both electrodes, instead of holding driving using a TFT, was examined. In the observation under such conditions, since the fluctuation of the pixel potential due to the delayed dielectric response of the High-k material described above can be eliminated, an analysis focusing only on the behavior due to the liquid crystal material itself is performed. It becomes possible.

  FIG. 10 is a diagram illustrating a result of a basic experiment performed in examining the liquid crystal display device according to the second embodiment.

  FIG. 10A shows a luminance response waveform when a rectangular wave having an amplitude Vp is applied to the test cell. In this luminance response waveform, it was confirmed that the luminance fell for a few milliseconds immediately after switching from the positive frame (+ Vp application) to the negative frame (−Vp application). This is a phenomenon peculiar to the FFS mode. The liquid crystal molecules have spontaneous polarization due to the flexoelectric effect of the liquid crystal, and the orientation direction of the liquid crystal molecules changes immediately in response to the inversion of the electric field. It is considered that a luminance response waveform was obtained.

  FIG. 11 is a diagram for explaining the flexoelectric effect.

  The liquid crystal molecules generally have a wedge shape as shown in FIG. 11 (1) and have spontaneous polarization indicated by an arrow (→). In a state where no stress is applied to the liquid crystal layer, the liquid crystal molecules are in random directions, and the macroscopic polarization is zero. However, when a voltage is applied to the liquid crystal, in the strong electric field region near the pixel electrode edge in the FFS mode, stress is applied to the liquid crystal as shown in FIG. Then, the direction of the wedge shape changes so as to minimize the elastic energy generated corresponding to this strain. As a result, since the ratio of liquid crystal molecules facing a specific direction increases, the polarization when viewed macroscopically becomes a finite value. In this state, when the polarity of the voltage applied to the liquid crystal is reversed, the polarization responds instantaneously (several + μsec to several msec). As a result, it is considered that a peak luminance change occurs.

  FIG. 10 (2) shows a waveform obtained by averaging the waveforms of the positive and negative frames in FIG. 10 (1) (a waveform obtained by adding two waveforms and dividing by two). When the liquid crystal display device is driven by line inversion, column inversion, dot inversion, etc., the waveform shown in FIG. 10 (2) is macroscopically (in a sufficiently wide area including almost the same number of positive and negative pixels). Corresponds to the observed luminance response waveform.

  By averaging the waveforms of the positive and negative frames, the influence of the luminance difference between the positive and negative frames is offset, but a phenomenon is observed in which the luminance decreases momentarily immediately after polarity reversal (the beginning of the frame). Therefore, as a result, the brightness fluctuations in the light and dark with a period of 100 msec are visually recognized. This decrease in luminance at the beginning of the frame is considered to be because the luminance fluctuation due to the flexoelectric effect described above remains without being canceled out by averaging the waveforms of the positive and negative frames.

  By the way, a flexo coefficient (represented by e11 or e33) is known as a parameter indicating the degree of the flexoelectric effect of the liquid crystal material. The flexo coefficient is an index representing the degree of polarization that occurs when the liquid crystal is subjected to distortion as shown in FIG. 11 (2), and its unit is pC / m.

FIG. 12 is a diagram showing the relationship between the flexo coefficient and the luminance amplitude.
Test cells were prepared using several liquid crystal materials having different flex coefficients, and the luminance response waveform shown in FIG. 10 (2) was measured. FIG. 12 shows the result of plotting the relationship between the flexo coefficient and the measured luminance fluctuation amplitude (peak to peak value). It can be seen that the peak-to-peak value of the luminance amplitude increases as the flexo coefficient increases.

  The measurement was performed by changing the flexo coefficient in the range of 0.4 pC / m to 3.7 pC / m. The change in luminance amplitude value in the range was 0.7% to 4.9%. In the measurement results, the luminance amplitude value when the flexo coefficient was 0.8 pC / m was 1.1%, and the luminance amplitude value when the flexo coefficient was 3.7 pC / m was 4.9%.

  FIG. 13 is a diagram illustrating a luminance response waveform when a liquid crystal material having a large flexural coefficient is employed in the liquid crystal display device according to the second embodiment.

  Here, the conventional example uses a material with a low flexo coefficient (estimated to be 0.4 pC / m), and the second embodiment uses a material with a high flexo coefficient (1.6 pC / m). . According to the measurement results shown in FIG. 13, in the liquid crystal display device of the second embodiment, it can be seen that the peak-to-peak value of the luminance amplitude is reduced as compared with the conventional example, and flicker is reduced. Actually, as a result of viewing the liquid crystal display device, flicker was visually recognized in the conventional example, but flicker was not visually recognized in the second embodiment.

  This result can be interpreted as follows. In the conventional example, when the liquid crystal display device is driven via the TFT, as described above, the peak luminance fluctuation that is convex upward occurs due to the delayed dielectric response. However, when a liquid crystal material having a large flexo coefficient is used as in the second embodiment, a downward peak luminance variation as shown in FIG. 10B is superimposed due to the flexo effect. For this reason, the upward convex luminance fluctuation peak caused by the delayed dielectric response of the high-k material and the downward convex luminance fluctuation peak caused by the flexo coefficient cancel each other, and the total luminance amplitude is increased. It is thought to reduce.

  FIG. 14 is a diagram illustrating the results of measuring the peak-to-peak value of the luminance amplitude by applying several liquid crystal materials having different flexural coefficients to the liquid crystal display device according to the second embodiment.

  As described above, the larger the flexo coefficient of the liquid crystal material used, the higher the effect of canceling the upwardly convex peak caused by the delayed dielectric response, and the luminance amplitude is reduced as a whole. As a result of actually confirming the presence or absence of flicker in the liquid crystal display device, flicker was visually recognized when the flexo coefficient was 0.8 pC / m or less, but flicker was not visually recognized when the flexo coefficient was 1.1 pC / m or more. Therefore, it is desirable that the flexural coefficient of the liquid crystal is 1.1 pC / m or more. In combination with the result of FIG. 12, it is conceivable that the flexural coefficient of the liquid crystal is 1.1 pC / m or more and 3.7 pC / m or less.

  Note that the liquid crystal display devices in the first and second embodiments of the present invention described above are not only horizontal electric field type liquid crystal display devices such as FFS and IPS in FIG. 2, but also vertical electric fields such as TN or VA. Even a liquid crystal display device having a type cell structure is applicable. That is, the absolute value of the frequency-dependent slope of the capacitance of the storage capacitor insulating film is reduced as described in the first embodiment of the present invention, or the liquid crystal is further reduced as described in the second embodiment of the present invention. The flicker can be suppressed by increasing the flexo coefficient.

[Third embodiment]
The liquid crystal display device according to the third embodiment of the present invention will be described below. The basic configuration of the liquid crystal display device is the same as that of the first embodiment, but is characterized in that an alignment film made of a low resistance material is used as the alignment film. Parts having the same or similar functions as those in the first embodiment are denoted by the same reference numerals, and detailed description thereof is omitted.

  FIG. 15 is a diagram showing an equivalent circuit model of a capacitive insulating film, an alignment film, and a liquid crystal layer using a High-k material of a liquid crystal display device examined prior to the examination of the liquid crystal display device according to the third embodiment. is there.

  In the equivalent circuit model of the liquid crystal display panel PNL shown in FIG. 15, the storage capacitor Cs that exists in the portion where the pixel electrode PE and the counter electrode COM face each other, and the capacitance insulation that exists along the path of the electric field that wraps around the liquid crystal layer LQ. The capacitor C0 of the film L1, the capacitor C1 of the alignment film AL1, the capacitor C2 of the liquid crystal layer LQ, and the capacitor C3 of the alignment film AL1. Resistors Rs, R0, R1, R2, and R3 exist in parallel with the holding capacitor Cs, the capacitor C0, the capacitor C1, the capacitor C2, and the capacitor C3, respectively. Further, the voltages at both ends of the holding capacitor Cs, the capacitor C0, the capacitor C1, the capacitor C2, and the capacitor C3 are Vd, V0, V1, V2, and V3, respectively. As can be seen from FIG. 15, there is a relationship of V1 + V2 + V3 = Vd−V0 between the voltages.

FIG. 16 is a diagram for explaining a leak state by an equivalent circuit model of the liquid crystal display device examined prior to the examination of the liquid crystal display device according to the third embodiment. Here, in the equivalent circuit model of the liquid crystal display panel PNL examined in advance, Rs and R0 have relatively low resistance (≈10 ¹² Ω · cm), and R1, R2, and R3 have relatively high resistance ( ≈10 ¹⁴ Ω · cm).

  Since the resistances Rs and R0 of the capacitor insulating film L1 are low resistances, the voltages Vd and V0 across the storage capacitor Cs and the capacitor C0 are mainly reduced due to leakage from Rs and R0. However, since the voltage of Vd is larger than that of V0, the decrease in voltage is more remarkable in Vd. Under the influence of this voltage drop, the voltage (V1 + V2 + V3) distributed to the alignment film AL1 and the liquid crystal layer LQ is also attenuated. When R1, R2, and R3 have sufficiently high resistances, V1, V2, and V3 are each divided into ratios of reciprocals of capacitance (1 / C1, 1 / C2, 1 / C3) and attenuated. As a result, the voltage V2 applied to the liquid crystal layer LQ is also attenuated. As a result, flicker occurs.

  The equivalent circuit model of the liquid crystal display panel PNL of the liquid crystal display device according to the third embodiment has the same configuration as that of FIG. 15, but in the model of the equivalent circuit, Rs, R0, R1, and R3 have relatively low resistance. And R2 is different in that it has a relatively high resistance.

  FIG. 17 is a diagram for explaining a leak mode according to an equivalent circuit model of the liquid crystal display device according to the third embodiment.

  Since the resistances Rs and R0 of the capacitor insulating film L1 are low resistances, the voltages Vd and V0 across the storage capacitor Cs and the capacitor C0 are mainly reduced due to leakage from Rs and R0. However, since the voltage of Vd is larger than that of V0, the decrease in voltage is more remarkable in Vd. Under the influence of this voltage drop, the voltage (V1 + V2 + V3) distributed to the alignment film AL1 and the liquid crystal layer LQ is also attenuated. At this time, when R1 and R3 are low resistances, the voltages V1 and V3 are particularly significantly attenuated among the voltages (V1 + V2 + V3), so that the attenuation of the voltage V2 is offset. That is, a part of the attenuation of the voltages V1 and V3 is applied to the voltage V2. Accordingly, since the attenuation of the voltage V2 applied to the liquid crystal layer LQ is suppressed, flicker can be reduced thereby.

Subsequently, the voltage applied to the liquid crystal was simulated by setting the specific resistances of the capacitive insulating film L1 and the alignment film AL1 to various levels. The main specifications of the liquid crystal display panel PNL used for this simulation are as follows.
Capacitance insulating film thickness: 150 nm to 450 nm, alignment film thickness: 100 nm, liquid crystal layer cell thickness: 3.3 μm, capacitance insulating film relative dielectric constant: 60, liquid crystal layer specific resistance: 10 ¹⁴ Ω · cm, holding period (≈1 Frame period): 1/30 second to 1 second.

  FIG. 18 is a diagram for explaining the relationship between the capacitance insulating film specific resistance and the alignment film specific resistance using the liquid crystal applied voltage change rate during the holding period of the liquid crystal display device according to the third embodiment as a parameter. Here, as shown in FIG. 18, when the voltage of the pixel electrode PE at the start of pixel voltage writing is Vi, and the voltage of the pixel electrode PE immediately before the start of the next pixel voltage writing is Vf, the change rate of the liquid crystal applied voltage is It is a value expressed as (Vf−Vi) / Vi.

  In FIG. 18, the horizontal axis of the coordinate represents the common logarithm of the alignment film resistivity, and the vertical axis represents the common logarithm of the capacitance insulating film resistivity. The logarithms referred to below are all common logarithms with a base of 10. FIG. 18 shows a curve in which the liquid crystal applied voltage change rate is +0.01 and a curve in which the liquid crystal applied voltage change rate is −0.01. Here, the curve with the liquid crystal applied voltage change rate of ± 0.01 represents a boundary line where flicker is suppressed by visual observation. That is, flicker can be suppressed by setting the alignment film specific resistance value and the capacitance insulating film specific resistance value so as to be located in a region sandwiched between these two curves. However, the flicker suppression boundary line cannot be strictly defined. In fact, flicker can be suppressed even in the vicinity of this boundary line.

  FIG. 19 is a diagram illustrating flicker suppression conditions regarding the alignment film specific resistance and the capacitance insulating film specific resistance of the liquid crystal display device according to the third embodiment. Here, the specific resistance of the alignment film is expressed as R1 (Ω · cm), and the specific resistance of the capacitive insulating film is expressed as R2 (Ω · cm).

A region 1 represented by a rectangle in FIG. 19 represents a region in which flicker can be suppressed when the capacitor insulating film L1 has a high resistance. The region 1 is represented by Expression (1) and Expression (2).
13.47 ≦ Log (R1) (1)
13.46 ≦ Log (R2) Formula (2)

A region 2 represented by a triangle in FIG. 19 represents a region where flicker can be suppressed when the capacitance insulating film L1 has a low resistance. Region 2 is expressed by equations (3) to (5).
Log (R2) ≦ 13.46 Formula (3)
0.5238 * Log (R2) + 6.275 ≦ Log (R1) Expression (4)
Log (R1) ≦ 1.641 * Log (R2) −7.855... Formula (5)

  FIG. 20 is a diagram showing another flicker suppression condition regarding the alignment film specific resistance and the capacitance insulating film specific resistance of the liquid crystal display device according to the third embodiment. FIG. 20 shows a region where the conditions for suppressing flicker are relaxed compared to those in FIG. 19. As described above, even in the vicinity of the flicker suppression boundary line, flicker can be treated as being suppressed. The above formula is simplified for easy handling.

A region 3 represented by a rectangle in FIG. 20 represents a region where flicker can be suppressed when the capacitor insulating film L1 has a high resistance. Region 3 is expressed by equations (6) and (7).
13.5 ≦ Log (R1) (6)
13.5 ≦ Log (R2) (7)

A region 4 represented by a polygon in FIG. 20 represents a region in which flicker can be suppressed when the capacitance insulating film L1 has a low resistance. The region 4 is expressed by Expression (8) to Expression (9).
Log (R2) ≦ 13.5 Formula (8)
Log (R2) −0.2 ≦ Log (R1) ≦ Log (R2) +0.7 (9)

Expressions described in Expression (8) and Expression (9) are equivalent to the following Expression (10) and Expression (11).
Capacitance insulating film specific resistance R2 ≦ 3.2 × 10 ¹³ Formula (10)
0.63 ≦ alignment film specific resistance R1 / capacitance insulating film specific resistance R2 ≦ 5.0 (11)

  The following are the specifications of the desirable capacitive insulating film L1 ascertained based on the investigation and examination conducted based on the above-described results.

The specific resistance ρ of the capacitive insulating film L1 is preferably 1.0 × 10 ⁹ ≦ ρ ≦ 1.0 × 10 ¹⁴ (Ω · cm). As a result, the insulating property of the capacitive insulating film L1 is increased, and display abnormality due to leakage between the electrodes is less likely to occur. Specifically, a material having a band gap of 3 or more, preferably 4 or more is preferably used for the capacitor insulating film L1.

  The film thickness of the capacitive insulating film L1 is, for example, not less than 150 nm and not more than 450 nm, and preferably not less than 150 nm and not more than 350 nm.

  The capacitive insulating film L1 is formed of a material having a relative dielectric constant ε larger than that of silicon nitride or silicon oxide that is generally used conventionally. The material having a high dielectric constant is an oxide or nitride containing an element selected from zircon, magnesium, strontium, titanium, aluminum, yttrium, and hafnium. The relative dielectric constant ε of the capacitive insulating film L1 formed of these materials is preferably larger than 8 and smaller than 65. More preferably, it is 15-40, More preferably, it is 15-30. The relative dielectric constant ε is measured at a measurement frequency of 1 MHz using a measuring device (product name: 4284A PRECISION LCR METER) manufactured by HEWLETT PACKARD. The measurement environment is 25 ° C. and 50% RH.

According to each embodiment described above, various effects can be obtained.
In the first embodiment described above, the High-k material having a low frequency dependency of the capacitance in the low frequency region is used for the capacitive insulating film L1. The frequency dependence of the capacitance in the low frequency region is considered to be a parameter representing the degree of delay of the dielectric response. By using a material with a small dielectric response delay as the capacitor insulating film, pixel potential fluctuations during the holding period can be suppressed, and flicker due to peak luminance fluctuations can be reduced.

  In the second embodiment described above, a material having a large peak luminance fluctuation due to the flexoelectric effect is used as the liquid crystal material. While the peak luminance fluctuation due to the dielectric response delay of the capacitive insulating film is convex upward, the peak luminance fluctuation due to the flexoelectric effect is generally convex downward. For this reason, by combining with the capacitive insulating film L1 of the first embodiment, the peak luminance fluctuations of both cancel each other, and flicker can be reduced.

  In the third embodiment described above, a decrease in pixel potential caused by the leak current of the High-K film is compensated by reducing the specific resistance of the alignment film, and flicker is suppressed. As a result, flicker can be suppressed in the low-temperature polysilicon (LTPS), and therefore, low-frequency driving and intermittent driving at 1 Hz to 40 Hz are possible using LTPS.

Note that the present invention is not limited to the panel structure described in the embodiment.
In the embodiment, a panel using a liquid crystal of a horizontal electric field method such as an IPS (In-Plane Switching) mode or an FFS (Fringe-Field Switching) mode is taken as an example. However, the present invention is not limited to this mode. The present invention can also be applied to a panel using a liquid crystal of a vertical electric field mode such as a mode and an OCB (Optically Compensated Bend) mode.

  Any display device that can be implemented by a person skilled in the art based on the above-described display device as an embodiment of the present invention is also included in the scope of the present invention as long as it includes the gist of the present invention.

  In the scope of the idea of the present invention, those skilled in the art can conceive various changes and modifications, and it is understood that these changes and modifications also belong to the scope of the present invention. For example, those in which the person skilled in the art appropriately added, deleted, or changed the design of the above-described embodiments, or those in which the process was added, omitted, or changed the conditions are also included in the gist of the present invention. As long as it is provided, it is included in the scope of the present invention.

  In addition, other functions and effects brought about by the aspects described in the present embodiment, which are apparent from the description of the present specification, or can be appropriately conceived by those skilled in the art, are naturally understood to be brought about by the present invention. .

  Various inventions can be formed by appropriately combining a plurality of constituent elements disclosed in the embodiment. For example, some components may be deleted from all the components shown in the embodiment. Furthermore, you may combine suitably the component covering different embodiment.

  PNL ... liquid crystal display panel, COM ... counter electrode, PX ... display pixel, LQ ... liquid crystal layer, CF ... color filter layer, L1 ... capacitive insulating film, L2 ... overcoat layer, PE ... pixel electrode, SW ... pixel switch, Cs ... holding capacitor, CTR ... control circuit, GD ... gate driver, SD ... source driver, Vcom ... counter voltage, Vpix ... pixel potential, R1 ... orientation film resistivity, R2 ... capacitance insulating film resistivity, AL1 ... orientation film, AL2 ... Alignment film, SB1 ... Transparent insulating substrate, SB2 ... Transparent insulating substrate, 100 ... Array substrate, 200 ... Counter substrate.

Claims (6)

A liquid crystal display device,
A first electrode;
A second electrode that forms an electric field with the first electrode;
An insulating film disposed between the first electrode and the second electrode;
A liquid crystal whose orientation direction is controlled by the electric field,
The material of the insulating film is an oxide or nitride containing an element selected from zircon, magnesium, strontium, titanium, aluminum, yttrium, and hafnium,
A liquid crystal display device that satisfies the following formula (1), where Ca is the capacitance of the insulating film at a frequency of 1 Hz and Cb is the capacitance of the insulating film at a frequency of 1000 Hz.
3.0 × 10 ⁻³ ≦ | (Ca—Cb) /Ca|≦1.5×10 ⁻² (1) The flexographic coefficient of the liquid crystal is 1.1 (pC / m) or more.
The liquid crystal display device according to claim 1. The material of the insulating film is a nitride containing an element selected from zircon, magnesium, strontium, titanium, aluminum, yttrium, and hafnium.
The liquid crystal display device according to claim 1. The dielectric constant ε of the material of the insulating film is 8 or more and 65 or less,
The liquid crystal display device according to claim 1. An alignment film provided between the insulating film and the liquid crystal to align the liquid crystal;
When the specific resistance of the alignment film is R1 and the specific resistance of the insulating film is R2, the following expressions (2) and (3) are satisfied.
The liquid crystal display device according to claim 1.
log ₁₀ R2 ≦ 13.5 (2)
log ₁₀ R2-0.2 ≦ log ₁₀ R1 ≦ log ₁₀ R2 + 0.7 (3) The writing frequency of the video signal to the liquid crystal is 40 Hz or less,
The liquid crystal display device according to claim 1.

Images