JP2017069854A - A/d conversion circuit and radiation image diagnostic device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an A/D conversion circuit capable of achieving the performance of an A/D converter having a wide dynamic range and the performance of a high-speed A/D converter capable of noise reduction, and a radiation image diagnostic device.SOLUTION: The A/D conversion circuit includes: a plurality of analog-to-digital converters which include a first analog-to-digital converter and a second analog-to-digital converter for converting an input single analog signal into a digital signal; and a processing circuit which selects and outputs the converted digital signal. The first analog-to-digital converter has a wider dynamic range than the second analog-to-digital converter, whereas the second analog-to-digital converter has a higher sampling frequency than the first analog-to-digital converter.SELECTED DRAWING: Figure 1

Description

  The present embodiment as one aspect of the present invention relates to an A / D conversion circuit and a radiation image diagnostic apparatus.

  Conventionally, an analog-digital converter (hereinafter, also referred to as an A / D converter) that converts an analog signal (Digital Signal) into a digital signal (Digital Signal) has been used in medical equipment and industrial equipment.

  In particular, medical devices and industrial devices are desired to process analog signals at a high speed with a wide dynamic range. Therefore, in general, an A / D converter corresponding to the resolution and sampling frequency matched to the analog signal to be handled is selected and used.

  However, when the A / D converter handles a small signal, electronic circuit noise (so-called noise) is mixed, so that there is a problem that a low-noise digital signal cannot be extracted.

  Therefore, when handling small signals, noise can be reduced by using a higher resolution A / D converter or by using an A / D converter that operates at a high speed to increase the sampling frequency and perform oversampling. It was.

  In addition, regarding a related A / D converter circuit in related art, for example, a plurality of A / D converters having different resolutions are provided, and an A / D converter having different resolutions is supported by a converter selection circuit to which an analog signal is input. An A / D conversion circuit that selects an A / D converter and selects an output digital signal is disclosed.

JP-A-4-326625

  In the conventional technology, an A / D converter with a wide dynamic range cannot be compatible with a high-speed A / D converter that can reduce noise by oversampling. Either the performance or the performance of a high-speed A / D converter that can reduce noise has been sacrificed.

  Therefore, an A / D conversion circuit and a radiological image diagnostic apparatus that can achieve both the performance of an A / D converter having a wide dynamic range and the performance of a high-speed A / D converter capable of reducing noise have been desired. .

  The A / D conversion circuit according to the present embodiment includes a first analog-digital converter and a second analog-digital converter that convert one input analog signal into a digital signal in order to solve the above-described problem. A plurality of analog-to-digital converters including a converter, and a processing circuit for selecting and outputting the converted digital signal, wherein the first analog-to-digital converter includes the second analog-to-digital converter. The dynamic range is wider than that of the digital converter, and the second analog-to-digital converter has a higher sampling frequency than the first analog-to-digital converter.

1 is a block diagram showing an electrical configuration of an A / D conversion circuit according to a first embodiment. 6 is a flowchart showing an operation of A / D converter selection processing in which the A / D conversion circuit according to the first embodiment selects and outputs a digital signal of the first A / D converter or the second A / D converter. The block diagram which shows the electric constitution of the A / D conversion circuit which concerns on 2nd Embodiment. The block diagram which shows the electrical constitution of the A / D conversion circuit which concerns on 3rd Embodiment. The block diagram which shows the electrical constitution of the A / D conversion circuit which concerns on 4th Embodiment. The figure which shows the structural example at the time of applying the A / D conversion circuit which concerns on 1st Embodiment to X-ray CT apparatus.

(First embodiment)
An A / D (Analog to Digital) conversion circuit according to the present embodiment will be described with reference to the accompanying drawings.

(Constitution)
FIG. 1 is a block diagram showing an electrical configuration of an A / D conversion circuit 70 according to the first embodiment.

  As shown in FIG. 1, the A / D conversion circuit 70 includes an input buffer circuit 50, a first A / D converter (analog-digital converter) 51, and a second A / D converter (analog-digital converter). 52 and a processing circuit 53.

  The input buffer circuit 50 inputs an analog signal Sin, and a first A / D converter 51 and a second A / D converter 52 are connected in common to its output terminal.

  The first A / D converter 51 and the second A / D converter 52 both convert an input analog signal into a digital signal, but have different dynamic ranges and sampling frequencies. In the present embodiment, the range of the maximum input voltage of each A / D converter 51, 52 is referred to as a dynamic range.

  The processing circuit 53 is a circuit that selects and outputs the digital signal converted by the first A / D converter 51 and the second A / D converter 52. In the case of the first embodiment, the processing circuit 53 uses the first A / D based on the values of the digital signals converted by the first A / D converter 51 and the second A / D converter 52. The output signals of the converter 51 and the second A / D converter 52 are switched.

  The processing circuit 53 can be switched based on, for example, the magnitude of the value of the converted digital signal. Further, the processing circuit 53 may be switched based on, for example, positive / negative or change of the value of the converted digital signal.

  In the first embodiment, the first A / D converter 51 and the second A / D converter 52 constitute a plurality of A / D converters, but the number of A / D converters is two. It is not limited. For example, three A / D converters may be used in accordance with the dynamic range.

  Further, the first A / D converter 51 and the second A / D converter 52 according to the first embodiment have the same unit quantization width. Here, the unit quantization widths of the first A / D converter 51 and the second A / D converter 52 will be described.

  The first A / D converter 51 has a wider dynamic range than the second A / D converter 52, for example, 0.0 [V] to 4.0 [V] or −2.0 [V]. It is set to 4.0 [V] of ~ + 2.0 [V]. The sampling frequency is, for example, 1 Msample / second, which is lower than that of the second A / D converter 52.

  Here, the unit quantization width of the A / D converter is expressed by the following equation.

  Unit quantization width = input voltage range / ((resolution (power of 2)) − 1) (1)

When the resolution of the first A / D converter 51 is 18 bits (2 to the 18th power (18 bits)), the unit quantization width of the first A / D converter 51 is expressed by the following equation (1).
Unit quantization width of first A / D converter 51 = 4.0 / ((2 to the 18th power) −1)
≒ 15.25884727 [μV]
It becomes.

  The second A / D converter 52 has a dynamic range narrower than that of the first A / D converter 51, for example, 0.0 [mV] to 50.0 [mV] or −25.0 [mV]. It is set to 50.0 [mV] of .about. + 25.0 [mV]. The sampling frequency is higher than that of the first A / D converter 51, for example, 1 G sample / second.

When the resolution of the second A / D converter 52 is 12 bits (2 to the 12th power (12 bits)), the unit quantization width of the second A / D converter 52 is expressed by the following equation (1).
Unit quantization width of second A / D converter 52 = 0.05 / ((2 to the power of 12) −1)
≒ 12.21001221 [μV]
It becomes.

  In the present embodiment, the unit quantization width of the first A / D converter 51 is about 15.26 [μV], while the unit quantization width of the second A / D converter 52 is about 12.21. Since [μV], the resolution per unit (unit quantization width) is the same.

  Further, the ratio of the SNR (Signal-Noise Ratio) 1 of the first A / D converter 51 and the SNR 2 of the second A / D converter 52 is statistically expressed by the following equation depending on the ratio of the respective sampling frequencies. Indicated.

(SNR1 / SNR2) = 10 × log ₁₀ ((ratio of sampling frequency) ^1/2 )
... (2)
If the sampling frequency of the first A / D converter 51 is 1 Msample / second and the sampling frequency of the second A / D converter 52 is 1 Gsample / second, the ratio of the sampling frequency is 1/1000. .

Therefore, according to equation (2):
(SNR1 / SNR2) = 10 × log ₁₀ ((ratio of sampling frequency) ^1/2 )
= 10 × log ₁₀ (1/1000) ^1/2
= (1/2) × 10 × log ₁₀ (1/1000)
=-(1/2) × 10 × log ₁₀ (1000)
= -15 [db]
It becomes.

  As described above, the second A / D converter 52 performs an oversampling (high-speed sampling) with a sampling frequency of 1 G [sample / second], thereby generating an electronic circuit that is generated in comparison with the first A / D converter 51. Noise (noise) can be reduced to −15 [db]. Thereby, the second A / D converter 52 can output a low-noise signal.

(A / D converter selection processing)
FIG. 2 shows an A / D converter selection in which the A / D conversion circuit 70 according to the first embodiment selects and outputs the digital signal of the first A / D converter 51 or the second A / D converter 52. It is a flowchart which shows the operation | movement of a process.

  First, in the A / D conversion circuit 70, the analog signal Sin is input to the input buffer circuit 50 (step S001). The input buffer circuit 50 inputs the input analog signal Sin to the input terminals of the first A / D converter 51 and the second A / D converter 52.

  Next, each A / D converter converts the input analog signal Sin into a digital signal (step S003). The first A / D converter 51 and the second A / D converter 52 each convert the input analog signal into a digital signal. The first A / D converter 51 and the second A / D converter 52 each input the converted digital signal to the processing circuit 53.

  For example, even if the voltage Sin input to the input buffer circuit 50 is 3.0 [V] or 0.1 [V], the first A / D converter 51 is used. The second A / D converter 52 converts the signal into a digital signal and inputs it to the processing circuit 53. As an example, the input voltage is 0.0 [V] to 4.0 [V].

  The processing circuit 53 determines whether or not a low-noise small signal is necessary (step S005). That is, the processing circuit 53 determines whether or not to handle a low-noise small signal depending on the application, the type of device, or the like according to the purpose of use.

  For example, in the case of an application or device that does not handle a low-noise small signal, it is determined that a low-noise small signal is unnecessary (NO in step S005), and the processing circuit 53 starts from the first A / D converter 51. The input digital signal is selected as an output signal (step S007).

  On the other hand, when it is determined that a low-noise small signal is necessary (YES in step S005), the input digital signal is, for example, in the range of 0.0 [mV] to 50.0 [mV]. In this case, the processing circuit 53 determines that it is within the dynamic range of the second A / D converter 52 (YES in step S009), and outputs the digital signal input from the second A / D converter 52 as an output signal. (Step S011).

  Further, even when the processing circuit 53 determines that a low-noise small signal is necessary (YES in step S005), if the input digital signal exceeds 50.0 [mV], for example, It is determined that the dynamic range of the second A / D converter 52 is out of range (NO in step S009), and the digital signal input from the first A / D converter 51 is selected as an output signal (step S007).

  In the case of the present embodiment, in step S005, for example, it is determined that a low-noise signal is necessary depending on the type of application or device, and the second A / D converter 52 uses the value of the digital signal. Even when it is determined that the dynamic range is out of range (NO in step S009), when the next analog signal is input to the input buffer circuit 50 (step S001), the second A / D converter 52 again It is determined whether it is within the dynamic range (step S009).

  Thus, in the case of an application or device that requires a low-noise signal, every time an analog signal is input to the input buffer circuit 50, the output signal of the first A / D converter 51 or the second A / D converter 52 can be selected and switched.

  As described above, the A / D conversion circuit 70 according to the first embodiment is a case of an application or device that requires a low-noise signal, and the analog signal input to the input buffer circuit 50 is If it is determined that the dynamic range of the second A / D converter 52 is within the range, the digital signal converted by the second A / D converter 52 can be selected as an output signal.

  As a result, when the A / D conversion circuit 70 according to the first embodiment determines that it is within the dynamic range of the second A / D converter 52, the low-noise digital by oversampling (high-speed sampling) is performed. The signal can be selected as an output signal.

  In the first embodiment, the output signal of the second A / D converter 52 is selected when the dynamic range is determined in the range of 0.0 [mV] to 50.0 [mV]. However, it is not limited to this.

  The A / D conversion circuit 70 sets, for example, a predetermined range for the value of the input analog signal Sin and, based on the value of the input analog signal Sin, the first A / D converter 51 or the first Alternatively, the second A / D converter 52 may be selected. That is, a predetermined range may be set in the second A / D converter 52 as the value of the input analog signal Sin.

  For example, for an input analog signal Sin, when it is desired to obtain a low-noise digital signal in the range of 0.75 [mV] to 1.25 [mV] with 1.0 [V] as the center, a processing circuit 53 can select the output signal of the second A / D converter 52 for the digital signal in the range of 0.75 [mV] to 1.25 [mV].

  In the first embodiment, the first A / D converter 51 or the second A / D converter 52 is determined based on the magnitude of the value of the digital signal input to the processing circuit 53. However, it is not limited to this. For example, the processing circuit 53 may determine whether the input digital signal is positive or negative, or may select an output signal based on a change in the digital signal.

  In the first embodiment, the A / D conversion circuit 70 may be configured by a plurality of A / D converters in addition to the first A / D converter 51 and the second A / D converter 52. In this case, for example, three A / D converters may be used in accordance with the dynamic range of the input analog signal. Note that it is desirable that the resolution per unit (unit quantization width) is equal, and this can be realized by setting the resolution (power of 2) according to the dynamic range.

(Second Embodiment)
In the first embodiment, the second A / D converter 52 has a narrower dynamic range than the first A / D converter 51, and thus is likely to overflow. When an overflow occurs in the second A / D converter 52, it is generally assumed that noise due to crosstalk propagates. Since noise due to crosstalk propagates to the connected signal, it is assumed that it propagates to the input side of the first A / D converter 51 as an output signal of the input buffer circuit 50.

  Therefore, in the second embodiment, when the second A / D converter 52 overflows, the overflow detection circuit 54 is provided in order to avoid the propagation of noise due to crosstalk.

  FIG. 3 is a block diagram showing an electrical configuration of the A / D conversion circuit 71 according to the second embodiment.

  As shown in FIG. 3, the A / D conversion circuit 71 is further provided with an overflow detection circuit 54 compared to the A / D conversion circuit 70 according to the first embodiment. Since the difference from the first embodiment is the overflow detection circuit 54, the overflow detection circuit 54 will be described.

  The overflow detection circuit 54 has a function of cutting off the input to the second A / D converter 52 when the second A / D converter 52 overflows due to the input analog signal. For example, the overflow detection circuit 54 detects an analog signal input to the second A / D converter 52 and determines whether an overflow occurs. If an overflow occurs, the path input to the second A / D converter 52 is blocked.

  Further, the overflow detection circuit 54 determines whether or not the signal input to the second A / D converter 52 causes an overflow, and if an overflow occurs, the overflow detection circuit 54 supplies the second A / D converter 52 to the second A / D converter 52. The input path may be blocked.

  Thus, by providing a cutoff circuit on the input side to the second A / D converter 52 in accordance with the input analog signal, noise due to crosstalk propagating to the first A / D converter 51 is prevented. can do.

(Third embodiment)
In the first embodiment and the second embodiment, the processing circuit 53 switches the output signal of the first A / D converter 51 or the second A / D converter 52. In the third embodiment, the converted digital signal is subjected to digital signal processing or the like, and the processing circuit 53 selects an output signal based on the processed signal.

  FIG. 4 is a block diagram showing an electrical configuration of the A / D conversion circuit 72 according to the third embodiment.

  As illustrated in FIG. 4, the A / D conversion circuit 72 according to the third embodiment further includes a preprocessing unit 55, a correction circuit 56, and a preprocessing with respect to the A / D conversion circuit 70 of the first embodiment. A unit 57 and a correction circuit 58 are provided. Hereinafter, differences from the first embodiment will be described.

  The preprocessing unit 55 has a function of performing processing (preprocessing) such as logarithmic conversion processing and sensitivity correction on an input digital signal (for example, projection data). In this case, the preprocessing unit 55 performs preprocessing on the output signal of the first A / D converter 51.

  The correction circuit 56 has a function of performing a scattered radiation removal process (correction process) on the preprocessed digital signal (for example, projection data). For example, the correction circuit 56 removes scattered radiation based on the value of projection data within the X-ray exposure range. The correction circuit 56 performs scattered ray correction (correction processing) by subtracting the scattered radiation estimated from the projection data to be subjected to scattered ray correction or the value of the adjacent projection data from the target projection data. In this case, the correction circuit 56 performs correction processing on the projection data preprocessed by the preprocessing unit 55.

  Similar to the preprocessing unit 55, the preprocessing unit 57 has a function of performing processing (preprocessing) such as logarithmic conversion processing and sensitivity correction on the input digital signal (for example, projection data). In this case, the preprocessing unit 57 performs preprocessing on the output signal of the second A / D converter 52.

  Similar to the correction circuit 56, the correction circuit 58 has a function of performing scattered radiation removal processing on the preprocessed digital signal (for example, projection data). In this case, the correction circuit 58 performs a correction process on the projection data preprocessed by the preprocessing unit 57.

  The A / D conversion circuit 72 according to the third embodiment includes a preprocessing unit 55, a correction circuit 56, a preprocessing unit 57, and a correction circuit 58. The processing circuit 53 outputs an output signal from the correction circuit 56 or the correction circuit 58. The output signal is selected and switched.

  As described above, in the third embodiment, the processing circuit 53 is in a state where the digital signals converted by the first A / D converter 51 and the second A / D converter 52 are respectively preprocessed and corrected. The output signal can be selected.

(Fourth embodiment)
In the first to third embodiments, the processing circuit 53 switches the output signal. In the fourth embodiment, a comparison circuit for setting (determining) an A / D converter that performs digital conversion in advance for an input analog signal is provided.

  In the fourth embodiment, by providing a comparison circuit, it is preset (determined) whether the first A / D converter 51 or the second A / D converter 52 performs digital conversion. )

  Thereby, in the fourth embodiment, the processing circuit 53 selects and outputs either the first A / D converter 51 or the second A / D converter 52 selected by the comparison circuit. Be able to.

  FIG. 5 is a block diagram showing an electrical configuration of the A / D conversion circuit 73 according to the fourth embodiment.

  As shown in FIG. 5, the A / D conversion circuit 73 according to the fourth embodiment is further provided with a comparison circuit 60 and a selector 61 with respect to the A / D conversion circuit 70 of the first embodiment. Hereinafter, differences from the first embodiment will be described.

  The comparison circuit 60 has a function of acquiring an analog signal from the input buffer circuit 50 and comparing input voltages. The comparison circuit 60 performs digital conversion by the first A / D converter 51 having a wide dynamic range or digital conversion by the second A / D converter 52 that has been oversampled (high-speed sampling) according to the acquired analog signal. Judge whether to do. Then, the comparison circuit 60 switches the selector 61 based on the determination result, and selects the first A / D converter 51 or the second A / D converter 52 that performs digital conversion. The comparison circuit 60 selects the output signal of the processing circuit 53 based on the determination result.

  As described above, in the fourth embodiment, the processing circuit 53 performs the digital conversion on either the first A / D converter 51 or the second A / D converter 52 selected by the comparison circuit 60. The selected digital signal can be selected and output.

(Application example to X-ray CT system)
Next, the case where the A / D conversion circuits of the first to fourth embodiments described above are applied to, for example, an X-ray CT apparatus which is a radiological image diagnostic apparatus will be described. Although the case where the A / D conversion circuit 70 according to the first embodiment is applied to an X-ray CT apparatus will be described, any of the first to fourth embodiments can be applied to an X-ray CT apparatus. can do.

  In addition, the X-ray CT apparatus according to the present embodiment includes a rotation / rotation (rotate / rotate) type in which the X-ray tube and the detector are rotated as a single body and the surroundings of the patient O, and a number of detection elements in a ring shape. There are various types such as a stationary / rotating type in which only the X-ray tube rotates around the patient O, and the present embodiment can be applied to any type. Here, the rotation / rotation type that currently occupies the mainstream will be described.

  The X-ray CT apparatus according to the present embodiment is an example, and the present invention is not limited to this. The present invention can also be applied to an apparatus using an A / D conversion circuit, for example, an X-ray diagnostic apparatus.

  FIG. 6 is a diagram illustrating a configuration example when the A / D conversion circuit 70 according to the first embodiment is applied to the X-ray CT apparatus 1.

  FIG. 6 shows an X-ray CT apparatus 1 including a medical image processing apparatus 12. The X-ray CT apparatus 1 includes a scanner device 11 and an image processing device 12. The scanner device 11 of the X-ray CT apparatus 1 is usually installed in an examination room and configured to generate X-ray projection data related to a patient O (subject). On the other hand, the image processing apparatus 12 is usually installed in a control room adjacent to the examination room, and is configured to reconstruct projection data and generate / display a reconstructed image.

  The scanner device 11 of the X-ray CT apparatus 1 includes an X-ray tube 21, a diaphragm (collimator) 22, a wedge 33, an X-ray detector 23, a DAS (Data Acquisition System) 24, a rotating unit 25, an X-ray high voltage device 26, An aperture driving device 27, a rotation driving device 28, a top plate 30, a top plate driving device 31, and a controller 32 are provided.

  The X-ray tube 21 generates X-rays by causing an electron beam to collide with a metal target in accordance with the tube voltage supplied from the X-ray high voltage device 26, and irradiates the X-ray detector 23 toward the X-ray detector 23. Fan beam X-rays and cone beam X-rays are formed by X-rays emitted from the X-ray tube 21. The X-ray tube 21 is supplied with electric power necessary for X-ray irradiation under the control of the controller 32 via the X-ray high voltage device 26.

  The diaphragm 22 adjusts the irradiation range (irradiation field) of the X-rays emitted from the X-ray tube 21 by the diaphragm driving device 27. In other words, the X-ray irradiation range at the fan angle and the cone angle can be changed by adjusting the aperture of the diaphragm 22 by the diaphragm driving device 27.

  The wedge 33 reduces the low-energy X-ray component before the X-ray irradiated from the X-ray tube 21 passes through the patient O. In the wedge 33, the width of the concave portion in the X direction is adjusted by a wedge driving device (not shown) according to the opening degree of the diaphragm 22. The wedge 33 is selected, for example, from a plurality of wedges equipped with several types of recesses according to the opening degree of the diaphragm 22.

  The X-ray detector 23 is a one-dimensional array type detector having a plurality of detection elements in the channel direction and a single detection element in the column (slice) direction. Alternatively, the X-ray detector 23 is a two-dimensional array type detector (also referred to as a multi-slice detector) having a matrix, that is, a plurality of detection elements in the channel direction and a plurality of detection elements in the slice direction. When the X-ray detector 23 is a multi-slice detector, data of a three-dimensional region having a width in the column direction can be collected by one rotation scan (CT imaging and CT fluoroscopy) (volume scan). The X-ray detector 23 detects X-rays emitted from the X-ray tube 21.

  The DAS 24 amplifies the transmission data signal detected by each detection element of the X-ray detector 23, converts it into a digital signal, and generates projection data. The projection data of the DAS 24 is supplied to the image processing device 12 via the controller 32 of the scanner device 11. Note that when performing CT fluoroscopy, the DAS 24 shortens the collection rate of projection data.

  In the present embodiment, the A / D conversion circuit 70 according to the first embodiment can be applied to the DAS 24. That is, the DAS 24 includes the input buffer circuit 50, the first A / D converter 51, the second A / D converter 52, and the processing circuit 53, so that the first A / D is generated when the projection data is generated. The output signal of the converter 51 and the output signal of the second A / D converter 52 are selected.

  The rotating unit 25 integrally holds the X-ray tube 21, the diaphragm 22, the wedge 33, the X-ray detector 23, the DAS 24, the X-ray high voltage device 26, and the diaphragm driving device 27. The rotating unit 25 is configured so that the X-ray tube 21 and the X-ray detector 23 face each other, the X-ray tube 21, the diaphragm 22, the wedge 33, the X-ray detector 23, the DAS 24, the X-ray high voltage device 26, and The diaphragm drive device 27 is configured to be rotatable around the patient O as a unit. The X-ray high voltage device 26 may be held by the rotating unit 25. A direction parallel to the rotation center axis of the rotating unit 25 is defined as a Z direction, and a plane perpendicular to the Z direction is defined as an X direction and a Y direction.

  The X-ray high voltage device 26 supplies power necessary for X-ray irradiation to the X-ray tube 21 under the control of the controller 32.

  The aperture driving device 27 has a mechanism that adjusts the irradiation range of the X-ray fan angle and cone angle of the aperture 22 under the control of the controller 32.

  The rotation driving device 28 has a mechanism for rotating the rotating unit 25 so that the rotating unit 25 rotates around the hollow portion with the positional relationship maintained by the control of the controller 32.

  The top plate 30 can place the patient O thereon.

  The top board drive device 31 has a mechanism for moving the top board 30 up and down along the Y direction and entering / withdrawing along the Z direction under the control of the controller 32. The central portion of the rotating unit 25 has an opening, and the patient O placed on the top board 30 is inserted into the opening.

  The controller 32 includes a CPU (Central Processing Unit) as a control circuit (not shown), a memory, and the like. In response to an instruction from the image processing device 12, the controller 32 performs an X-ray detector 23, a DAS 24, an X-ray high voltage device 26, an aperture drive device 27, a rotation drive device 28, a top drive device 31, and a wedge drive device (not shown). ) And the like are executed to execute scanning.

  The image processing apparatus 12 of the X-ray CT apparatus 1 is configured based on a computer and can communicate with a network (Local Area Network) N. The image processing apparatus 12 includes basic hardware such as a processing circuit 41 as a processor, a storage circuit 42, an input circuit 44, a display display 45, and an IF (Interface) 46. The processing circuit 41 is interconnected to each hardware component constituting the image processing device 12 via a bus as a common signal transmission path. Note that the image processing apparatus 12 may include a recording medium drive 47.

  When a command is input to the processing circuit 41 by operating the input circuit 44 by an operator such as an operator, the processing circuit 41 executes a program stored in the memory of the storage circuit 42. Alternatively, the processing circuit 41 reads from a program stored in an HDD (Hard Disk Drive) of the storage circuit 42, a program transferred from the network N and installed in the HDD, or a recording medium installed in the recording medium drive 47. The program that is output and installed in the HDD is loaded into the memory and executed.

  The memory of the storage circuit 42 is a storage device including a ROM (Read Only Memory) and a RAM (Random Access Memory). The memory stores IPL (Initial Program Loading), BIOS (Basic Input / Output System), and data, and is used for temporary storage of the work memory of the processing circuit 41 and data.

  The HDD of the storage circuit 42 is a storage device that stores programs installed in the image processing apparatus 12 (including application programs, OS (Operating System), and the like) and data. In addition, it is also possible to provide the OS with a GUI (Graphical User Interface) that uses a lot of graphics to display information on the display 45 for an operator such as a surgeon and can perform basic operations by the input circuit 44. .

  The input circuit 44 is a circuit that inputs a signal from an input device such as a pointing device (such as a mouse) or a keyboard that can be operated by an operator. Here, the input device itself is also included in the input circuit 44. . In the present embodiment, an input signal according to an operation by an operator or the like is sent from the input circuit 44 to the processing circuit 41.

  The display 45 includes an image composition circuit (not shown), a VRAM (Video Random Access Memory), a display panel, and the like. The image synthesizing circuit generates synthesized data obtained by synthesizing character data of various parameters with image data. The VRAM expands the composite data on the display. The display panel is configured by a liquid crystal display, a CRT (Cathode Ray Tube) or the like and displays an image.

  The IF 46 is configured by a connector that conforms to a parallel connection specification or a serial connection specification. The IF 46 has a function of performing communication control according to each standard and connecting to the network N through a telephone line, thereby connecting the X-ray CT apparatus 1 to the network N network.

  The image processing device 12 performs correction processing (pre-processing) such as logarithmic conversion processing and sensitivity correction on the projection data input from the DAS 24 of the scanner device 11 and stores it in a storage device such as an HDD of the storage circuit 42. . In addition, the image processing device 12 performs scattered radiation removal processing (correction processing) on the preprocessed projection data.

  The image processing device 12 removes scattered radiation based on the value of the projection data within the X-ray exposure range, and based on the projection data to be subjected to scattered radiation correction or the value of the adjacent projection data. The estimated scattered radiation is subtracted from the target projection data to perform scattered radiation correction (correction processing). The image processing device 12 generates (reconstructs) CT image data based on the scan based on the corrected projection data, and stores the CT image data in a storage device such as an HDD of the storage circuit 42, or as a CT image on the display 45. Display.

  Since the DAS 24 of the scanner device 11 can generate projection data that is a digital signal from transmission data that is an analog signal, the image processing device 12 acquires the projection data that is a digital signal and performs pre-processing or Correction processing can be performed. In this case, the function corresponding to the processing circuit 53 is provided in the image processing apparatus 12.

  Further, when the A / D conversion circuit 70 or the like according to the first to fourth embodiments is applied to the DAS 24 of the X-ray CT apparatus 1, for example, when the imaging region (range) of the patient O is wide, the first When the digital signal to which the A / D converter 51 is applied is selected while the imaging region (range) of the patient O is narrow or when it is desired to accurately capture a specific small part, the second A / D converter 52 is selected. Select and output the applied digital signal.

  The selection of the first A / D converter 51 or the second A / D converter 52 is not limited by the part to be photographed. Therefore, for example, a low-noise signal can be extracted regardless of whether it is a bone or a blood vessel.

  As described above, even when the A / D conversion circuit 70 or the like according to the first to fourth embodiments is applied to the X-ray CT apparatus 1, the performance of the A / D converter with a wide dynamic range and noise can be reduced. It is possible to achieve both the performance of the high-speed A / D converter.

  According to at least one of the embodiments described above, the A / D conversion circuit and the X-ray CT apparatus have the performance of an A / D converter with a wide dynamic range and the performance of a high-speed A / D converter that can reduce noise. Can be achieved.

  Note that the term “processor” used in the above description is, for example, a dedicated or general-purpose CPU (Central Processing Unit), an artificial circuit (Circuitry), or an application specific integrated circuit (Application Specific Integrated Circuit). Devices (e.g., Simple Programmable Logic Device (SPLD), Complex Programmable Logic Device (CPLD), and Field Programmable Gate Array (Field Programmable Gate Array) It means the circuit of FPGA)) and the like. Although FIG. 6 illustrates the case where there is one processor (processing circuit 41), the number of processors may be two or more.

  The processor implements each function by reading and executing a program stored in the storage circuit 42 or directly incorporated in the circuit of the processor. When a plurality of processors are provided, the storage circuit 42 for storing the program may be provided for each processor individually, or the storage circuit 42 in FIG. 6 corresponds to the function of each processor. You may memorize | store a program.

  Although several embodiments of the present invention have been described above, these embodiments are presented as examples and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, replacements, and changes can be made without departing from the scope of the invention. These embodiments and modifications thereof are included in the scope and gist of the invention, and are included in the invention described in the claims and the equivalents thereof.

DESCRIPTION OF SYMBOLS 1 ... X-ray CT apparatus 11 ... Scanner apparatus 12 ... Image processing apparatus 41 ... Processing circuit 42 ... Memory circuit 44 ... Input circuit 45 ... Display 46 ... IF
47 ... Storage medium drive 50 ... Input buffer circuit 51 ... First A / D converter 52 ... Second A / D converter 53 ... Processing circuit 54 ... Overflow detection circuit 55, 57 ... Preprocessing section 56, 58 ... Correction circuit 60: Comparison circuit 61: Selectors 70, 71, 72, 73 ... A / D conversion circuit

Claims (7)

A plurality of analog-to-digital converters including a first analog-to-digital converter and a second analog-to-digital converter that convert one input analog signal into a digital signal;
A processing circuit for selecting and outputting the converted digital signal;
With
The first analog-to-digital converter is
The dynamic range is wider than the second analog-digital converter,
The second analog-to-digital converter is
An A / D conversion circuit having a sampling frequency higher than that of the first analog-digital converter. The processing circuit includes:
The A / D conversion circuit according to claim 1, wherein output signals of the plurality of analog-digital converters are switched based on a value of the converted digital signal. The plurality of analog-digital converters are:
The first analog-to-digital converter and the second analog-to-digital converter, which have the same unit quantization width obtained by dividing the input voltage range of the analog signal by each resolution, are included. 3. The A / D conversion circuit according to 2. The processing circuit includes:
Based on the value of the converted digital signal, if the value of the input digital signal is within the dynamic range of the second analog-digital converter, the second analog-digital converter The output signal of the first analog-to-digital converter is selected and switched when the output signal is selected and the output signal of the first analog-to-digital converter is outside the dynamic range of the second analog-to-digital converter. / D conversion circuit. A predetermined range is set as the value of the input analog signal in the second analog-digital converter,
The processing circuit includes:
5. The A / according to claim 1, wherein the first analog-to-digital converter or the second analog-to-digital converter is selected based on a value of the input analog signal. D conversion circuit. When the second analog-to-digital converter overflows due to the input analog signal, a cutoff circuit that cuts off the input to the second analog-to-digital converter is provided.
The A / D conversion circuit according to claim 1, further comprising: An X-ray tube that emits X-rays;
A detector for detecting the irradiated X-ray;
A data collection unit that amplifies the transmission data signal detected by each detection element of the detector, converts it into a digital signal, and generates projection data;
With
The data collection unit
A plurality of analog-to-digital converters including a first analog-to-digital converter and a second analog-to-digital converter that convert one input analog signal into a digital signal;
A processing circuit for selecting and outputting the converted digital signal;
With
The first analog-to-digital converter is
The dynamic range is wider than the second analog-digital converter,
The second analog-to-digital converter is
A radiological image diagnostic apparatus having a sampling frequency higher than that of the first analog-digital converter.

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