JP2017069319A - Multilayer wiring board - Google Patents

Multilayer wiring board Download PDF

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Publication number
JP2017069319A
JP2017069319A JP2015191301A JP2015191301A JP2017069319A JP 2017069319 A JP2017069319 A JP 2017069319A JP 2015191301 A JP2015191301 A JP 2015191301A JP 2015191301 A JP2015191301 A JP 2015191301A JP 2017069319 A JP2017069319 A JP 2017069319A
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Japan
Prior art keywords
layer circuit
inner layer
board
circuit board
wiring
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洋志 山口
Hiroshi Yamaguchi
洋志 山口
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Showa Denko Materials Co Ltd
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Hitachi Chemical Co Ltd
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Priority to JP2015191301A priority Critical patent/JP2017069319A/en
Priority to KR1020187010614A priority patent/KR102104185B1/en
Priority to PCT/JP2015/083603 priority patent/WO2017056340A1/en
Publication of JP2017069319A publication Critical patent/JP2017069319A/en
Pending legal-status Critical Current

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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4623Manufacturing multilayer circuits by laminating two or more circuit boards the circuit boards having internal via connections between two or more circuit layers before lamination, e.g. double-sided circuit boards
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038Through-connections; Vertical interconnect access [VIA] connections
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4644Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a multilayer wiring board capable of handling high frequency with high degree of freedom in wiring and high wiring capacity.SOLUTION: The multilayer wiring board includes: a surface circuit board formed with a surface circuit and an inner layer circuit; an inner layer circuit board formed with an inner layer circuit; a non-penetrating via that penetrates the surface circuit board or the inner layer circuit board connecting the surface circuit to the inner layer circuit or the inner layer circuits to each other; and a penetrating through hole that penetrates the entire board in a thickness direction of the board. The inner layer circuit is disposed in the inner layer circuit board at a position corresponding the non-penetrating via in the thickness direction of the board. There is also provided a manufacturing method of the wiring board.SELECTED DRAWING: Figure 1

Description

本発明は、多層配線板に関するものであり、特には、配線の自由度が高まり、配線収容性の高い、高周波に対応が可能な多層配線板である。   The present invention relates to a multilayer wiring board, and more particularly to a multilayer wiring board that has a high degree of freedom in wiring, has a high wiring capacity, and can handle high frequencies.

近年、電子機器の高機能化に伴い、高周波対応や配線の収容量向上が要求されている。このような要求に対して多層配線板では、高周波対応基材の採用や、高多層化で対応するのが一般的である。   In recent years, with the enhancement of functionality of electronic devices, there has been a demand for high frequency response and improved wiring capacity. In general, a multilayer wiring board responds to such a demand by adopting a high-frequency compatible substrate or increasing the number of layers.

多層配線板の製造方法としては、内層回路を有する複数の回路基板を積層し、最外層である表層銅箔の不要部分をエッチング除去して形成する方法と、必要な部分に銅めっきして形成する方法等がある。   As a method of manufacturing a multilayer wiring board, a method of laminating a plurality of circuit boards having an inner layer circuit and etching and removing unnecessary portions of the outermost surface copper foil, and forming by plating the necessary portions with copper There are ways to do this.

また、複数の回路基板を積層接着する方法としては、複数の回路基板と絶縁層となるプリプレグ等を位置合せピンを用いて交互に重ね、加熱、加圧して積層するピンラミネーション法と、内層回路を形成した回路基板の上に接着剤付き銅箔を重ねて積層一体化した後、銅箔の不要部分をエッチング除去して回路形成を行い、これを繰り返すビルドアップ法とがある。   In addition, as a method of laminating and bonding a plurality of circuit boards, a pin lamination method in which a plurality of circuit boards and prepregs or the like serving as insulating layers are alternately stacked using alignment pins, and heated and pressed to laminate, and an inner layer circuit There is a build-up method in which a copper foil with an adhesive is laminated and integrated on a circuit board on which the substrate is formed, and then unnecessary portions of the copper foil are removed by etching to form a circuit, and this is repeated.

さらに、内層の配線を接続する方法としては、貫通穴を明けてスルーホールとして接続する方法、非貫通穴を明けて非貫通ビアとして接続する方法(特許文献1)がある。   Furthermore, as a method of connecting the wiring of the inner layer, there are a method of making a through hole and connecting as a through hole, and a method of making a non-through hole and connecting as a non-through via (Patent Document 1).

特公平09−162550号公報Japanese Patent Publication No. 09-162550

ところで、近年、電子機器の高速化が進み、配線板内を流れる電気信号は短時間により多くの情報を伝達するため、周波数が益々高くなっている。高周波対応の配線板設計では、導体損失と誘電損失を考慮する必要があり、導体損失は信号線の導体を太くすることが有効であり、誘電損失においては使用する基材やプリプレグなど信号線の周囲に配置される材料の比誘電率や誘電正接を下げることが有効であるが、高密度化した配線板においては、対応できる信号線の導体幅に制限がある。   By the way, in recent years, speeding up of electronic equipment has progressed, and the frequency of the electric signal flowing in the wiring board has been increased because more information is transmitted in a short time. In high-frequency wiring board design, it is necessary to consider conductor loss and dielectric loss, and it is effective to make the conductor of the signal line thicker, and in terms of dielectric loss, the signal line such as the substrate and prepreg to be used is effective. Although it is effective to lower the relative permittivity and dielectric loss tangent of the surrounding material, there is a limit to the conductor width of the signal line that can be handled in a high-density wiring board.

また、高速化への要求に加えて配線板の信号配線増加への対応も必要となっている。信号配線の増加対応には配線層を分けて多層化する方法が考えられるが、板厚の制限があり高多層化は困難なケースが多い。   In addition to the demand for higher speed, it is also necessary to cope with the increase in signal wiring on the wiring board. To deal with the increase in signal wiring, a method of dividing the wiring layer into multiple layers can be considered, but there are many cases where it is difficult to increase the number of layers due to the limitation of the plate thickness.

また、貫通穴によるスルーホールを用いて板厚方向の接続を形成する方法では、貫通穴を明けるため、貫通穴と接続させる配線層以外の別の層では貫通穴を避けて配線する必要がある。このため、配線の収容量の確保するために多層化することになり、板厚みの制限を越えてしまう問題がある。また、多層化したことで高板厚となり、貫通穴の穴位置精度やめっき付性が低下するなど、ドリル径の小径化が必要な狭ピッチには対応できない問題がある。さらに、貫通穴が多い基板では、配線幅や配線距離も制限されることから、特に、高速信号が必要な高周波対応配線では、配線の設計自由度も少なくなり、十分な電気特性を得られない場合がある。   Moreover, in the method of forming a connection in the plate thickness direction using a through hole by a through hole, it is necessary to avoid the through hole in another layer other than the wiring layer to be connected to the through hole in order to open the through hole. . For this reason, in order to ensure the accommodation capacity of wiring, it will be multilayered and there exists a problem which exceeds the restriction | limiting of board thickness. In addition, there is a problem that it is not possible to cope with a narrow pitch that requires a reduction in the diameter of the drill, such as a high plate thickness due to the multi-layering, and a decrease in the hole position accuracy and plating ability of the through hole. Furthermore, since the wiring width and wiring distance are limited on a board with many through holes, the wiring design flexibility is reduced especially for high-frequency wiring that requires high-speed signals, and sufficient electrical characteristics cannot be obtained. There is a case.

本発明は、配線の自由度が高まり、配線収容性の高い、高周波に対応できる多層配線板を提供することを目的とする。   SUMMARY OF THE INVENTION An object of the present invention is to provide a multilayer wiring board with a high degree of freedom of wiring, high wiring capacity, and high frequency capability.

本発明は、以下に関する。
(1) 表層回路及び内層回路が形成された表層回路基板と、内層回路が形成された内層回路基板と、前記表層回路基板又は前記内層回路基板を貫通し、前記表層回路と内層回路又は内層回路同士を接続する非貫通ビアと、全板厚方向を貫通する貫通スルーホールと、を有し、前記非貫通ビアに対応する板厚方向の位置の内層回路基板に、内層回路が配置される多層配線板。
(2) 前記非貫通ビアに接続する内層回路と、前記非貫通ビアに対応する板厚方向の位置の内層回路基板に配置された内層回路とが、異なる配線幅を有する項1に記載の多層配線板。
(3) 前記内層回路の少なくとも一部が、絶縁被覆ワイヤによって形成される項1又は2に記載の多層配線板。
(4) 項1から3の何れか1項の多層配線板の製造方法であって、表層回路及び内層回路が形成された表層回路基板と、内層回路が形成された内層回路基板と、前記表層回路基板又は前記内層回路基板を貫通し、前記表層回路と内層回路又は内層回路同士を接続する非貫通ビアを有し、前記非貫通ビアに対応する板厚方向の位置の内層回路基板に、内層回路が配置されるユニット基板A及びCを形成するとともに、内層回路が形成された内層回路基板を有し、前記非貫通ビアに対応する板厚方向の位置の内層回路基板に、内層回路が配置されるユニット基板Bを形成する工程(a)と、前記ユニット基板A、B、Cを、この順番で厚方向に積層する工程(b)と、を有する多層配線板の製造方法。
The present invention relates to the following.
(1) A surface layer circuit board on which a surface layer circuit and an inner layer circuit are formed, an inner layer circuit board on which an inner layer circuit is formed, the surface layer circuit board or the inner layer circuit board, and the surface layer circuit and the inner layer circuit or inner layer circuit. A multilayer in which an inner layer circuit is arranged on an inner layer circuit board at a position in the plate thickness direction corresponding to the non-through via, and a non-through via that connects each other and a through through hole that penetrates the entire plate thickness direction Wiring board.
(2) The multilayer according to item 1, wherein the inner layer circuit connected to the non-through via and the inner layer circuit disposed on the inner layer circuit board at a position in the thickness direction corresponding to the non-through via have different wiring widths. Wiring board.
(3) The multilayer wiring board according to item 1 or 2, wherein at least a part of the inner layer circuit is formed of an insulation-coated wire.
(4) A method for manufacturing a multilayer wiring board according to any one of items 1 to 3, wherein a surface layer circuit board on which a surface layer circuit and an inner layer circuit are formed, an inner layer circuit board on which an inner layer circuit is formed, and the surface layer A non-through via that penetrates the circuit board or the inner layer circuit board and connects the surface layer circuit and the inner layer circuit or the inner layer circuit, and the inner layer circuit board at a position in the plate thickness direction corresponding to the non-through via The unit boards A and C on which the circuit is arranged are formed, and the inner layer circuit board on which the inner layer circuit is formed has an inner layer circuit board, and the inner layer circuit is arranged on the inner layer circuit board at a position in the plate thickness direction corresponding to the non-through via The manufacturing method of the multilayer wiring board which has the process (a) which forms the unit board | substrate B, and the process (b) which laminates | stacks the said unit board | substrates A, B, and C in this order in the thickness direction.

本発明によれば、寸止め穴と貫通穴を有することにより、配線の自由度が高まり、配線収容性の高い、高周波に対応できる多層配線板を提供することができる。   ADVANTAGE OF THE INVENTION According to this invention, by having a dimension stop hole and a through-hole, the freedom degree of wiring increases and the multilayer wiring board which can respond to a high frequency with high wiring accommodation property can be provided.

本発明の一実施形態の多層配線板の概略断面図を表す。The schematic sectional drawing of the multilayer wiring board of one Embodiment of this invention is represented. 本発明の一実施形態の多層配線板の製造工程の概要を示す。The outline | summary of the manufacturing process of the multilayer wiring board of one Embodiment of this invention is shown.

(多層配線板)
本発明の多層配線板の一実施形態を、図1を用いて説明する。本実施の形態の多層配線板は、まず、表層回路12及び内層回路2が形成された表層回路基板1aを有している。表層回路12とは、多層配線板としての最表層に配置される回路であり、表面回路基板1aとは、多層配線板としての最表層に配置される回路基板である。表面回路基板1aは、両面銅張積層板の両面の銅箔に対して回路加工して得られる、絶縁層の両面に回路を形成した回路基板である。このため、一方の面に表層回路12を有するとともに、他方の面には内層回路2を有している。
(Multilayer wiring board)
An embodiment of the multilayer wiring board of the present invention will be described with reference to FIG. The multilayer wiring board of the present embodiment first has a surface layer circuit board 1a on which the surface layer circuit 12 and the inner layer circuit 2 are formed. The surface layer circuit 12 is a circuit arranged on the outermost layer as a multilayer wiring board, and the surface circuit board 1a is a circuit board arranged on the outermost layer as a multilayer wiring board. The surface circuit board 1a is a circuit board in which circuits are formed on both sides of an insulating layer, which is obtained by processing a copper foil on both sides of a double-sided copper-clad laminate. For this reason, the surface layer circuit 12 is provided on one side and the inner layer circuit 2 is provided on the other side.

本実施の形態の多層配線板は、内層回路が形成された内層回路基板を有している。内層回路板とは、多層配線板としての内層に配置される回路基板である。内層回路基板は、両面銅張積層板の両面の銅箔に対して回路加工して得られる、絶縁層の両面に回路を形成した回路基板である。このため、両面に内層回路を有している。   The multilayer wiring board of the present embodiment has an inner layer circuit board on which an inner layer circuit is formed. The inner layer circuit board is a circuit board disposed in an inner layer as a multilayer wiring board. The inner layer circuit board is a circuit board in which circuits are formed on both surfaces of an insulating layer, which is obtained by processing a copper foil on both surfaces of a double-sided copper-clad laminate. For this reason, inner layer circuits are provided on both sides.

本実施の形態の多層配線板は、表層回路基板又は前記内層回路基板を貫通し、表層回路と内層回路又は内層回路同士を接続する非貫通ビアを有している。つまり、図1に示したように、本実施の形態の多層配線板は、非貫通ビアとして、表層回路基板1aのみを貫通し、表層回路12とその裏面の内層回路2のみを接続するSVH(surface via hole)7、表層回路基板1aと内層回路基板1bの両方を貫通し、表層回路12とその裏面の内層回路2よりも内層に位置する内層回路3、4、5を接続するIVH(interstitial via hole)8を有している。図1では図示しないが、内層回路基板1bのみを貫通し、内層回路2、3、4、5同士のみを接続するBVH(blind via hole)を有してもよい。内層回路2、3、4、5同士を接続するBVHには、さらに、同じ内層回路基板1bの表裏の内層回路を接続するもの、当該内層回路基板1bの内層回路と、他の内層回路基板1bの内層回路とを接続するものがある。   The multilayer wiring board of the present embodiment has a non-through via that penetrates the surface layer circuit board or the inner layer circuit board and connects the surface layer circuit and the inner layer circuit or the inner layer circuits. That is, as shown in FIG. 1, the multilayer wiring board of the present embodiment serves as a non-penetrating via only through the surface layer circuit board 1a and connects only the surface layer circuit 12 and the inner layer circuit 2 on the back surface thereof. surface via hole) 7, IVH (interstitial) that penetrates both the surface layer circuit board 1 a and the inner layer circuit board 1 b and connects the surface layer circuit 12 and the inner layer circuits 3, 4, 5 located in the inner layer than the inner layer circuit 2 on the back surface thereof. via hole) 8. Although not shown in FIG. 1, a BVH (blind via hole) that penetrates only the inner layer circuit board 1 b and connects only the inner layer circuits 2, 3, 4, and 5 may be provided. The BVH for connecting the inner layer circuits 2, 3, 4, 5 to each other further connects the inner layer circuits on the front and back of the same inner layer circuit board 1b, the inner layer circuit of the inner layer circuit board 1b, and the other inner layer circuit board 1b. Some of them connect to the inner layer circuit.

非貫通ビアとは、非貫通の層間接続穴のことをいい、異なる配線層の回路を電気的に接続するものである。非貫通穴をレーザ加工、ドリル加工等によって形成した後、めっき等によって導電性を付与することにより形成することができる。   A non-penetrating via means a non-penetrating interlayer connection hole and electrically connects circuits of different wiring layers. After the non-through hole is formed by laser processing, drilling or the like, it can be formed by imparting conductivity by plating or the like.

本実施の形態の多層配線板は、全板厚方向を貫通する貫通スルーホールを有している。貫通スルーホールとは、全板厚方向を貫通した層間接続穴のことをいい、異なる配線層の回路を電気的に接続するものである。貫通穴をレーザ加工、ドリル加工等によって形成した後、めっき等によって導電性を付与することにより形成することができる。   The multilayer wiring board of the present embodiment has through through holes that penetrate through the entire thickness direction. The through-hole refers to an interlayer connection hole that penetrates the entire plate thickness direction and electrically connects circuits of different wiring layers. After the through hole is formed by laser processing, drilling or the like, it can be formed by imparting conductivity by plating or the like.

本実施の形態の多層配線板は、前記非貫通ビアに対応する板厚方向の位置の内層回路基板に、内層回路が配置される。非貫通ビアに対応する板厚方向の位置とは、非貫通ビアの代わりに貫通スルーホールを形成したとしたら、貫通スルーホールが形成される位置をいう。本実施の形態の多層配線板は、この位置を含むように、非貫通ビアが形成された内層回路基板以外の内層回路基板に内層回路が配置される。   In the multilayer wiring board of the present embodiment, an inner layer circuit is disposed on an inner layer circuit board at a position in the thickness direction corresponding to the non-through via. The position in the plate thickness direction corresponding to the non-through via means a position where the through through hole is formed if a through through hole is formed instead of the non-through via. In the multilayer wiring board of the present embodiment, the inner layer circuit is arranged on an inner layer circuit board other than the inner layer circuit board on which the non-through via is formed so as to include this position.

(作用効果)
本実施の形態の多層配線板によれば、内層回路は、非貫通ビアの対応する板厚方向の内層回路基板上にも配置されるため、貫通スルーホールを用いて層間接続を形成する場合には回路を配置できなかった、内層回路基板の領域にも内層回路を配置できるので、配線収容量を向上させることができる。これにより、配線の自由度が高まり、配線幅や配線距離の制限も小さくなることから、特に、高速信号が必要な高周波対応配線では、配線の設計自由度が大きくなり、十分な電気特性を得られるようになる。したがって、配線の自由度が高まり、配線収容性の高い、高周波に対応できる多層配線板を提供することが可能になる。
(Function and effect)
According to the multilayer wiring board of the present embodiment, the inner layer circuit is also arranged on the inner layer circuit board in the thickness direction corresponding to the non-penetrating via, and therefore when the interlayer connection is formed using the through hole. Since the inner layer circuit can be arranged also in the region of the inner layer circuit board where the circuit could not be arranged, the wiring capacity can be improved. This increases the degree of freedom in wiring and reduces the restrictions on the wiring width and distance. In particular, high-frequency wiring that requires high-speed signals increases the degree of freedom in wiring design and provides sufficient electrical characteristics. Be able to. Therefore, it is possible to provide a multilayer wiring board with a high degree of freedom of wiring, high wiring capacity, and high frequency capability.

(変形例1)
非貫通ビアに接続する内層回路と、非貫通ビアに対応する板厚方向の位置の内層回路基板に配置された内層回路とが、異なる配線幅を有してもよい。例えば、図1に示すように、SVH7と接続された内層回路2の配線幅よりも、SVH7に対応する位置のより内層側に配置された内層回路3は、配線幅が広い信号線であるが、このように配線幅を太くすれば、高周波に対応できる。一方、例えば、図1に示すように、SVH7と接続された内層回路2の配線幅よりも、SVH7に対応する位置のより内層側に配置された内層回路4は、配線幅が狭い信号線であるが、このように配線幅を細くすれば、高密度化に対応でき、配線の高収容化が図れる。これにより、配線収容性の高い、高周波に対応できる多層配線板を提供することができる。
(Modification 1)
The inner layer circuit connected to the non-through via and the inner layer circuit disposed on the inner layer circuit board at the position in the thickness direction corresponding to the non-through via may have different wiring widths. For example, as shown in FIG. 1, the inner layer circuit 3 arranged on the inner layer side at a position corresponding to the SVH 7 is a signal line having a wider wiring width than the wiring width of the inner layer circuit 2 connected to the SVH 7. If the wiring width is increased in this way, it is possible to cope with high frequencies. On the other hand, for example, as shown in FIG. 1, the inner layer circuit 4 disposed on the inner layer side at a position corresponding to the SVH 7 is a signal line having a narrower wiring width than the wiring width of the inner layer circuit 2 connected to the SVH 7. However, by reducing the wiring width in this way, it is possible to cope with higher density and to increase the capacity of the wiring. Thereby, the multilayer wiring board which can respond to a high frequency with high wiring accommodation property can be provided.

(変形例2)
内層回路の少なくとも一部が、絶縁被覆ワイヤ(図示しない。)によって形成されてもよい。内層回路を絶縁被覆ワイヤによって形成することで、同一の配線層で絶縁被覆ワイヤを交差させることで多層配線することができるので、配線収容量がさらに向上する。
(Modification 2)
At least a part of the inner layer circuit may be formed by an insulated wire (not shown). By forming the inner layer circuit with an insulating coated wire, multilayer wiring can be achieved by crossing the insulating coated wires in the same wiring layer, so that the wiring capacity is further improved.

(多層配線板の製造方法)
本発明の多層配線板の製造方法の一実施形態を、図2を用いて説明する。本実施の形態の多層配線板の製造方法は、まず、図2(a)に示すように、表層回路12及び内層回路2が形成された表層回路基板1aと、内層回路3、4、5、が形成された内層回路基板1bと、表層回路基板1a又は内層回路基板1bを貫通し、表層回路12と内層回路2又は内層回路3、4、5同士を接続する非貫通ビア7、8を有し、前記非貫通ビア7、8に対応する板厚方向の位置の内層回路基板1bに、内層回路3が配置されるユニット基板A15及びC17を形成するとともに、内層回路4、5が形成された内層回路基板1bを有し、前記非貫通ビア7、8に対応する板厚方向の位置の内層回路基板1bに、内層回路4、5が配置されるユニット基板B16を形成する工程(a)を有している。
(Manufacturing method of multilayer wiring board)
One embodiment of the method for producing a multilayer wiring board of the present invention will be described with reference to FIG. As shown in FIG. 2 (a), the multilayer wiring board manufacturing method of the present embodiment first includes a surface layer circuit board 1a on which a surface layer circuit 12 and an inner layer circuit 2 are formed, and inner layer circuits 3, 4, 5, And the non-through vias 7 and 8 that pass through the surface layer circuit board 1a or the inner layer circuit board 1b and connect the surface layer circuit 12 and the inner layer circuit 2 or the inner layer circuits 3, 4, 5 to each other. Then, the unit substrates A15 and C17 on which the inner layer circuit 3 is arranged are formed on the inner layer circuit substrate 1b at the position in the plate thickness direction corresponding to the non-through vias 7 and 8, and the inner layer circuits 4 and 5 are formed. A step (a) of forming a unit substrate B16 having the inner layer circuit board 1b and having the inner layer circuits 4 and 5 disposed on the inner layer circuit board 1b at the position in the thickness direction corresponding to the non-through vias 7 and 8; Have.

次に、工程(a)で作製したユニット基板A、B、Cを、この順番で厚方向に積層する工程(b)を有している。   Next, it has the process (b) which laminates | stacks the unit board | substrates A, B, and C produced at the process (a) in the thickness direction in this order.

次に、図示しないが、積層後の多層配線板の全板厚方向を貫通する貫通孔を形成し、スルーホールめっきを行って貫通スルーホールを形成した後、貫通スルーホール内に穴埋め樹脂を充填し、貫通スルーホールの入り口に蓋めっきを行い、この蓋めっきを含む多層配線板の表層の銅めっきに対して回路加工を行って、表層回路を形成する工程を有している。   Next, although not shown in the drawing, a through-hole that penetrates the entire thickness direction of the multilayered wiring board after lamination is formed, through-hole plating is performed to form a through-through hole, and then the through-hole is filled with a filling resin In addition, there is a step of forming a surface layer circuit by performing lid plating at the entrance of the through-hole and performing circuit processing on the copper plating of the surface layer of the multilayer wiring board including the lid plating.

(作用効果)
本実施の形態の多層配線板の製造方法によれば、非貫通ビアや貫通スルーホールを有するユニット基板A、B、Cに分けてユニット化し、これらを積層して一体化するので、積層一体化後の多層配線板には、SVH、IVH、BVHといった多様な非貫通ビアを所望の位置に設けることができる。このため、貫通スルーホールを用いて層間接続を形成する場合には回路を配置できなかった、内層回路基板の領域にも内層回路を配置できるので、配線収容量を向上させることができる。これにより、配線の自由度が高まり、配線幅や配線距離の制限も小さくなることから、特に、高速信号が必要な高周波対応配線では、配線の設計自由度が大きくなり、十分な電気特性を得られるようになる。したがって、配線の自由度が高まり、配線収容性の高い、高周波に対応できる多層配線板を提供することが可能になる。
(Function and effect)
According to the manufacturing method of the multilayer wiring board of the present embodiment, the unit substrates A, B, and C having non-through vias and through through holes are divided into units, and these are stacked and integrated. Various non-through vias such as SVH, IVH, and BVH can be provided at desired positions on the subsequent multilayer wiring board. For this reason, since the inner layer circuit can be arranged also in the region of the inner layer circuit board where the circuit cannot be arranged when the interlayer connection is formed using the through-hole, the wiring capacity can be improved. This increases the degree of freedom in wiring and reduces the restrictions on the wiring width and distance. In particular, high-frequency wiring that requires high-speed signals increases the degree of freedom in wiring design and provides sufficient electrical characteristics. Be able to. Therefore, it is possible to provide a multilayer wiring board with a high degree of freedom of wiring, high wiring capacity, and high frequency capability.

図1、図2は、本発明の多層配線板をユニット化して製作した一例である。図1に示すように、SVH7に対応する板厚方向の位置にも内層回路3、4、5を配置して配線収容量を向上させ、かつ、異なった配線幅としたことで、太い配線幅で高速信号に対応させ、細い配線幅で配線収容量を向上させた。図2(a)に示すように、ユニット基板A15、C17は、多層化した後にSVH7とIVH8とを直径0.25mmのドリルで穴明けして、銅めっき11(無電解銅めっき、厚さ30μm)を形成した後に不要な部分をエッチング除去した基板である。図2(b)に示すように、別に多層化まで作製したユニット基板B16と積層一体化した後、直径0.25mmのドリルで貫通穴9を穴明けし、銅めっき11(無電解銅めっき、厚さ30μm)を形成した後に不要な部分をエッチング除去し、貫通スルーホール9の穴内を穴埋め樹脂10で穴埋めした後に、銅めっき11(無電解銅めっき、厚さ30μm)で蓋めっき11を形成した後に不要な部分をエッチング除去し、図1の多層配線板を形成した。   1 and 2 show an example in which the multilayer wiring board of the present invention is manufactured as a unit. As shown in FIG. 1, the inner layer circuits 3, 4, and 5 are also arranged at positions in the plate thickness direction corresponding to the SVH7 to improve the wiring capacity and to have different wiring widths. In response to high-speed signals, the wiring capacity was improved with a narrow wiring width. As shown in FIG. 2 (a), the unit substrates A15 and C17 are multi-layered, and then SVH7 and IVH8 are drilled with a drill having a diameter of 0.25 mm to obtain copper plating 11 (electroless copper plating, thickness 30 μm). ), And unnecessary portions are removed by etching. As shown in FIG. 2 (b), after uniting with the unit substrate B16, which was separately manufactured to have multiple layers, a through hole 9 was drilled with a drill having a diameter of 0.25 mm, and copper plating 11 (electroless copper plating, After forming a thickness of 30 μm, unnecessary portions are removed by etching, the inside of the through-hole 9 is filled with a filling resin 10, and then a lid plating 11 is formed with copper plating 11 (electroless copper plating, thickness 30 μm). Then, unnecessary portions were removed by etching to form the multilayer wiring board of FIG.

以上のようにして、SVHを有して、SVHに対応する板厚方向の位置に内層回路を配置することにより、配線の自由度が高く配線収容性の高い、高周波に対応できる多層配線板が得られた。   As described above, by providing the SVH and arranging the inner layer circuit at a position in the plate thickness direction corresponding to the SVH, a multilayer wiring board having a high degree of freedom of wiring and a high capacity for wiring and capable of handling high frequencies can be obtained. Obtained.

1…回路形成した銅張積層板又は回路基板
1a…表層回路基板
1b…内層回路基板
2…(SVHと接続された)内層回路
3…(SVHに対応する位置に配置された)内層回路:配線幅が広い信号線
4…(SVHに対応する位置に配置された)内層回路:配線幅が狭い信号線
5…(SVHに対応する位置に配置された)内層回路:グランド
6…多層化接着プリプレグ又はプリプレグ層
7…非貫通ビア又はSVH:表層のみを貫通し、表面回路と直下の内層回路のみを接続
8…非貫通ビア又はIVH:表層回路と直下以外の内層回路との接続あり
9…貫通穴又は貫通スルーホール
10…穴埋め樹脂
11…蓋めっき又は銅めっき
12…表層回路
15…ユニット基板A
16…ユニット基板B
17…ユニット基板C
DESCRIPTION OF SYMBOLS 1 ... Circuit-formed copper clad laminated board or circuit board 1a ... Surface-layer circuit board 1b ... Inner-layer circuit board 2 ... Inner-layer circuit 3 (connected with SVH) ... Inner-layer circuit (arranged at a position corresponding to SVH): Wiring Wide signal line 4 (inner layer circuit arranged at a position corresponding to SVH): narrow signal line 5 (in a position corresponding to SVH) inner layer circuit: ground 6 ... multilayered adhesive prepreg Or prepreg layer 7 ... non-penetrating via or SVH: penetrates only the surface layer and connects only the surface circuit and the inner layer circuit immediately below 8 ... non-penetrating via or IVH: connection between the surface layer circuit and the inner layer circuit other than immediately below 9 ... penetrating Hole or through-through hole 10 ... Filling resin 11 ... Lid plating or copper plating 12 ... Surface layer circuit 15 ... Unit substrate A
16: Unit board B
17 ... Unit substrate C

Claims (4)

表層回路及び内層回路が形成された表層回路基板と、内層回路が形成された内層回路基板と、前記表層回路基板又は前記内層回路基板を貫通し、前記表層回路と内層回路又は内層回路同士を接続する非貫通ビアと、全板厚方向を貫通する貫通スルーホールと、を有し、
前記非貫通ビアに対応する板厚方向の位置の内層回路基板に、内層回路が配置される多層配線板。
A surface layer circuit board on which a surface layer circuit and an inner layer circuit are formed, an inner layer circuit board on which an inner layer circuit is formed, the surface layer circuit board or the inner layer circuit board, and the surface layer circuit and the inner layer circuit or inner layer circuits are connected to each other A non-through via and a through through hole penetrating through the entire thickness direction,
A multilayer wiring board in which an inner layer circuit is arranged on an inner layer circuit board at a position in the thickness direction corresponding to the non-through via.
前記非貫通ビアに接続する内層回路と、前記非貫通ビアに対応する板厚方向の位置の内層回路基板に配置された内層回路とが、異なる配線幅を有する請求項1に記載の多層配線板。   2. The multilayer wiring board according to claim 1, wherein the inner layer circuit connected to the non-through via and the inner layer circuit arranged on the inner layer circuit board at a position in the thickness direction corresponding to the non-through via have different wiring widths. . 前記内層回路の少なくとも一部が、絶縁被覆ワイヤによって形成される請求項1又は2に記載の多層配線板。   The multilayer wiring board according to claim 1, wherein at least a part of the inner layer circuit is formed of an insulating coated wire. 請求項1から3の何れか1項の多層配線板の製造方法であって、
表層回路及び内層回路が形成された表層回路基板と、内層回路が形成された内層回路基板と、前記表層回路基板又は前記内層回路基板を貫通し、前記表層回路と内層回路又は内層回路同士を接続する非貫通ビアを有し、前記非貫通ビアに対応する板厚方向の位置の内層回路基板に、内層回路が配置されるユニット基板A及びCを形成するとともに、内層回路が形成された内層回路基板を有し、前記非貫通ビアに対応する板厚方向の位置の内層回路基板に、内層回路が配置されるユニット基板Bを形成する工程(a)と、
前記ユニット基板A、B、Cを、この順番で厚方向に積層する工程(b)と、
を有する多層配線板の製造方法。
A method for producing a multilayer wiring board according to any one of claims 1 to 3,
A surface layer circuit board on which a surface layer circuit and an inner layer circuit are formed, an inner layer circuit board on which an inner layer circuit is formed, the surface layer circuit board or the inner layer circuit board, and the surface layer circuit and the inner layer circuit or inner layer circuits are connected to each other An inner layer circuit in which unit substrates A and C on which inner layer circuits are arranged are formed on an inner layer circuit board at a position in the thickness direction corresponding to the non-through vias, and the inner layer circuit is formed. A step (a) of forming a unit substrate B on which an inner layer circuit is disposed on an inner layer circuit substrate at a position in the plate thickness direction corresponding to the non-penetrating via,
A step (b) of laminating the unit substrates A, B, C in this order in the thickness direction;
The manufacturing method of the multilayer wiring board which has this.
JP2015191301A 2015-09-29 2015-09-29 Multilayer wiring board Pending JP2017069319A (en)

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03180096A (en) * 1989-12-08 1991-08-06 Hitachi Chem Co Ltd Manufacture of wiring board
JP2003174265A (en) * 2001-09-28 2003-06-20 Fujitsu Ltd Multilayer wiring circuit substrate
JP2005116811A (en) * 2003-10-08 2005-04-28 Fujitsu Ltd Multilayer wiring board and method for manufacturing the same
JP2012074577A (en) * 2010-09-29 2012-04-12 Hitachi Chem Co Ltd Multi-layer wiring substrate with svh

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09162550A (en) 1995-12-08 1997-06-20 Hitachi Aic Inc Manufacture of mutilayered wiring board

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03180096A (en) * 1989-12-08 1991-08-06 Hitachi Chem Co Ltd Manufacture of wiring board
JP2003174265A (en) * 2001-09-28 2003-06-20 Fujitsu Ltd Multilayer wiring circuit substrate
JP2005116811A (en) * 2003-10-08 2005-04-28 Fujitsu Ltd Multilayer wiring board and method for manufacturing the same
JP2012074577A (en) * 2010-09-29 2012-04-12 Hitachi Chem Co Ltd Multi-layer wiring substrate with svh

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