JP2017069274A - Manufacturing method and production system for wafer - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a manufacturing method for wafer capable of checking the history by checking the authentication mark while going back to the beginning of a processing wafer, even if the authentication mark disappears in the processing process on one outer surface of the processing wafer.SOLUTION: A processing wafer 10 marked with authentication marks M1, M2 for identification, respectively, on the front and back outer surfaces 11, 12 is prepared, and both authentication marks M1, M2 in the processing wafer 10 are stored in storage means 200. When the first authentication mark M1 of one outer surface 11, out of the front and back outer surfaces 11, 12 in the processing wafer 10 after processing process, disappears, the storage means 200 derives the disappeared first authentication mark M1, based on the second authentication mark M2 remaining on the other outer surface 12.SELECTED DRAWING: Figure 3

Description

The present invention provides a wafer manufacturing method in which a processing wafer made of a semiconductor is prepared, and processing is performed on the outer surface of the processing wafer, and a production system for controlling such a wafer manufacturing method. In particular, the present invention relates to a manufacturing method and a production system that can perform history management of a processing wafer even when an authentication mark marked on the outer surface of the processing wafer has disappeared due to a processing process.
About.

  Conventionally, a method described in Patent Document 1 has been proposed as a method for manufacturing this type of wafer. In this case, when there is a possibility that the authentication mark may disappear on one outer surface of the processing wafer, the authentication mark is read and a new authentication mark is printed at another position on the one outer surface. Is.

JP 7-307255 A

  However, if the certification mark that was originally marked on the outer surface of the processing wafer disappears due to polishing or other wafer pasting applied to the outer surface of the processing wafer, the processing The history of the processing wafer after the process becomes unknown.

  The present invention has been made in view of the above problems, and even if the authentication mark disappears due to a processing step on one outer surface of the processing wafer, the authentication mark is traced back to the initial stage of the processing wafer, It is an object of the present invention to provide a method for manufacturing a wafer in which a history can be confirmed and a production system for controlling the same.

In order to achieve the above object, in the invention described in claim 1, a processing wafer (10) made of a semiconductor in which identification marks (M 1, M 2) for identification are marked on the outer surfaces (11, 12) of the front and back surfaces, respectively. And preparing the storage means (200) to store both authentication marks on the front and back outer surfaces of the prepared processing wafer;
Thereafter, a processing step of performing processing on the outer surface of the processing wafer, and a wafer manufacturing method comprising:
When the authentication mark (M1) on one of the outer surfaces (11) of the front and back outer surfaces of the processing wafer after the processing step disappears, it remains on the other outer surface (12) by the storage means. A mark deriving step of deriving the disappeared authentication mark based on the authentication mark (M2).

  According to this, the authentication marks are marked on both outer surfaces of the prepared processing wafers, and the authentication marks on both outer surfaces are stored as a set in the storage means. Even if the certification mark on the outer surface disappears, the history mark can be traced back to the initial state of the processing wafer by deriving the disappeared certification mark from the certification mark remaining on the other outer surface. The wafer can be managed from the initial stage to the end of processing.

  Therefore, according to the present invention, even if the certification mark disappears due to the machining process on one outer surface of the processing wafer, the wafer can be confirmed by going back to the initial stage of the processing wafer and confirming the history. The manufacturing method of can be provided.

  Further, in the invention according to claim 2, in the manufacturing method according to claim 1, the erased mark derived by the mark deriving step is erased on one outer surface of the processing wafer after the processing step where the authentication mark has disappeared. A re-marking step of re-marking the authentication mark is provided.

  According to this, by re-marking, the disappeared authentication mark can be displayed on the outer surface of the processing wafer, and the state where the authentication mark is marked on both the front and back outer surfaces of the processing wafer is restored. To do.

  After that, again, as in the manufacturing method of claim 1 above, by repeating the processing step and the mark derivation step, the authentication mark disappears on the outer surface of either one of the processing wafers by the processing step. In addition, the history can be confirmed by going back to the initial stage of the processing wafer.

In the invention according to claim 5, a processing wafer (10) made of a semiconductor having identification authentication marks (M1, M2) marked on the outer surfaces (11, 12) on the front and back sides is prepared, and thereafter A production system for controlling a manufacturing method of a wafer that performs a processing step of performing processing on an outer surface of a processing wafer,
A storage means (200) for storing information on the outer surface of the processing wafer; and a marking means (102) for marking the outer surface of the processing wafer;
Both authentication marks on the front and back outer surfaces of the prepared processing wafer are stored by the storage means, and one of the outer surfaces (11) of the front and back outer surfaces of the processing wafer after the processing step is stored. When the authentication mark (M1) disappears, the disappeared authentication mark is derived based on the authentication mark (M2) remaining on the other outer surface (12) by the storage means. .

  According to this, the authentication marks are marked on both outer surfaces of the prepared processing wafers, and the authentication marks on both outer surfaces are stored as a set in the storage means. Even if the certification mark on the outer surface disappears, the history mark can be traced back to the initial state of the processing wafer by deriving the disappeared certification mark from the certification mark remaining on the other outer surface. The wafer can be managed from the initial stage to the end of processing.

  Therefore, according to the present invention, even if the certification mark disappears due to the machining process on one outer surface of the processing wafer, the wafer can be confirmed by going back to the initial stage of the processing wafer and confirming the history. A production system for controlling the manufacturing method can be provided.

  Here, also in the production system according to claim 5, as in the invention according to claim 6, the authentication mark on the processing wafer after the processing step is derived by the storage means on one outer surface where the authentication mark disappeared. The deleted authentication mark may be re-marked by the marking means. According to this, it is possible to provide a production system that exhibits the same effects as the manufacturing method according to the second aspect.

  In addition, the code | symbol in the bracket | parenthesis of each means described in the claim and this column is an example which shows a corresponding relationship with the specific means as described in embodiment mentioned later.

It is a figure which shows typically the production system which controls the manufacturing method of the wafer concerning 1st Embodiment of this invention. It is a schematic plan view which shows the prepared processing wafer concerning the said 1st Embodiment. It is process drawing which shows the manufacturing method of the wafer concerning the said 1st Embodiment. It is process drawing which shows the manufacturing method of the wafer concerning 2nd Embodiment of this invention. It is process drawing which shows the manufacturing method of the wafer concerning 3rd Embodiment of this invention. It is process drawing which shows the manufacturing method of the wafer concerning 4th Embodiment of this invention.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. In the following embodiments, parts that are the same or equivalent to each other are given the same reference numerals in the drawings in order to simplify the description. Moreover, in FIGS. 3-6, each authentication mark M1-M3 is typically shown by the white circle.

(First embodiment)
The production system according to the first embodiment of the present invention will be described with reference to FIG. In FIG. 1, a processing wafer 10 is made of a semiconductor such as silicon having one of the front and back outer surfaces 11 and 12 as one outer surface 11 and the other as the other outer surface 12.

  Here, as shown in FIG. 3 described later, the processing wafer 10 is composed of the single-layer wafer 1, and one outer surface of the single-layer wafer 1 corresponds to one outer surface 11 of the processing wafer. The other outer surface of the single-layer wafer 1 corresponds to the other outer surface 12 of the processing wafer.

  The control unit 100 includes a reading unit 101 that reads information on the outer surfaces 11 and 12 of the processing wafer 10, a marking unit 102 that marks the outer surfaces 11 and 12 of the processing wafer 10, and these units 101 and 102. And a control unit composed of a computer (not shown) or the like for controlling. Here, the reading unit 101 includes a CCD or the like, and the marking unit 102 performs marking with a laser or the like.

  The storage means 200 stores information on the outer surfaces 11 and 12 (specifically, an authentication mark and its marking surface described later) of the processing wafer 10 from the initial stage of processing to after processing, such as a computer server. It becomes more. These pieces of information are mainly sent from the reading unit 101 to the storage unit 200.

  In addition, the storage unit 200 stores information at the time of lot insertion, which will be described later, and instructs the reading unit 101 and the marking unit 102 based on the stored information and the like. Furthermore, the storage unit 200 is configured to store various operations performed by the control unit 100 and a history of various information associated therewith.

  Next, with reference to FIG. 2 and FIG. 3, the wafer manufacturing method of this embodiment by the production system will be described.

[Process of FIG. 3 (a): Lot input process]
The rough lot is processed by the production system according to the product to be produced. As a result of the lot input, a lot ID is generated on the system, and the lot ID is stored in the storage means 200. One lot is made up of an assembly of a plurality of single-layer wafers 1. The lot ID is a unique symbol or number for identifying the assembly.

[Steps in FIGS. 3B and 2: Marking Step of First Authentication Mark]
Then, the first authentication mark M <b> 1 is marked on one outer surface 11 of the processing wafer 10. Specifically, the first authentication mark M1 and its marking surface are instructed from the storage means 200 to the control means 100. Then, the first authentication mark M <b> 1 is marked on one outer surface 11 of the processing wafer 10 by the marking means 102.

  At this time, the fact that the first authentication mark M1 is marked on one outer surface 11 of the processing wafer 10 is stored in the storage unit 200 via the reading unit 101. Here, as shown in FIG. 2, the first authentication mark M <b> 1 is marked at a portion on the opposite side of the orientation flat OL at the peripheral edge of one outer surface 11 of the processing wafer 10.

  Although not limited, in FIG. 2, the first authentication mark M <b> 1 is “1111”. In this case, for example, the first two digits “11” means the lot ID, and the last two digits “11” means the identification number for each wafer in the lot.

[Step of FIG. 3C: Marking Step of Second Authentication Mark]
Next, on the other outer surface 12 of the processing wafer 10, the same mark as the first authentication mark M1, for example, “1111” similar to the example of the first authentication mark M1, is marked as the second authentication mark M2.

  Specifically, the second authentication mark M2 and its marking surface are instructed from the storage means 200 to the control means 100. Then, the second authentication mark M <b> 2 is marked on the other outer surface 12 of the processing wafer 10 by the marking means 102. At this time, the second authentication mark M <b> 2 on the processing wafer 10 and the other outer surface 12 that is the marking surface are stored in the storage unit 200.

  Each of these steps shown in FIGS. 3A to 3C corresponds to a preparation step in the present manufacturing method. That is, according to this preparation process, the processing wafer 10 in which the authentication marks M1 and M2 for identification are marked on the front and back outer surfaces 11 and 12, respectively, is prepared. At the same time, both authentication marks M 1 and M 2 on the front and back outer surfaces 11 and 12 of the prepared processing wafer 10 are stored in the storage unit 200.

[Process of FIG. 3D: Machining Process and Mark Deriving Process]
Next, as a processing step, processing is performed on the outer surfaces 11 and 12 of the processing wafer 10. Specifically, in the processing step, by performing processing on one of the front and back outer surfaces 11, 12 of the processing wafer 10, the authentication mark on the processed outer surface disappears.

  For example, the processing step includes a polishing step for polishing the outer surfaces 11 and 12 of the processing wafer. In FIG. 3D, the first authentication mark M <b> 1 is erased by performing processing on one outer surface 11 of the processing wafer 10 made of the single layer wafer 1, and on the other outer surface 12. The second authentication mark M2 remains.

  Thus, when the first authentication mark M1 on one outer surface 11 of the front and back outer surfaces 11 and 12 of the processing wafer 10 after the processing step disappears, the manufacturing method performs the mark derivation step. .

  In the mark derivation step, the first authentication mark M1 that has disappeared is derived by the storage means 200 based on the second authentication mark M2 remaining on the other outer surface 12 of the processing wafer 10. Specifically, the second authentication mark M2 remaining on the other outer surface 12 is collated with the storage means 200, and the first authentication mark M1 disappeared on the one outer surface 11 is derived.

[Step of FIG. 3E: Re-marking step]
Next, in the present manufacturing method, the first authentication mark M1 derived by the mark deriving step is re-marked on one outer surface 11 where the first authentication mark M1 has disappeared in the processing wafer 10 after the processing step. .

  Specifically, the derived first authentication mark M1 and its marking surface are instructed from the storage means 200 to the control means 100. Then, re-marking is performed on the processing wafer 10 by the marking means 102.

  In this re-marking, the second authentication mark M2 remaining on the processing wafer 10 to be re-marked and information on the surface on which the second authentication mark M2 remains are collated by the storage means 200, and this It is desirable to send information to the marking means 102. Based on the information, the marking unit 102 determines whether the processing wafer 10 to be remarked from now on is correct, and remarks if it is correct.

  By the way, according to the manufacturing method and the production system of this embodiment, the authentication marks M1 and M2 are marked on both the outer surfaces 11 and 12 of the prepared processing wafer 10, respectively, and the authentication marks on the both outer surfaces 11 and 12 are marked. The storage unit 200 stores M1 and M2 as a set.

  Therefore, even if the authentication mark on one of the outer surfaces 11 and 12 has disappeared due to the processing step, the disappeared authentication mark is derived from the authentication mark remaining on the other outer surface. It becomes possible. By doing so, the history can be traced back to the initial state of the processing wafer 10, and the processing wafer 10 can be managed from the initial stage to the end of processing.

  Therefore, according to the present embodiment, even if the authentication mark disappears on the outer surface of either one of the processing wafers 10 due to the processing process, the authentication mark is confirmed by going back to the initial stage of the processing wafer 10 and the history is recorded. It is possible to provide a wafer manufacturing method and a production system that can be confirmed.

  Further, according to the present embodiment, by re-marking the authentication mark derived by the mark derivation step, the disappeared authentication mark can be displayed on the outer surface of the processing wafer 10, and the front and back surfaces of the processing wafer 10 are again displayed. The state in which the authentication marks M1 and M2 are marked on both the outer surfaces 11 and 12 is restored.

  In this case, after that, by repeating the processing step and the mark derivation step again like the above manufacturing method, even if the authentication mark disappears by the processing step on either outer surface of the processing wafer 10, The history can be confirmed by going back to the initial stage of the processing wafer 10.

  In the present embodiment, in the processing step, the second authentication mark M2 disappears on the other outer surface 12 of the processing wafer 10 and the first outer surface 11 indicates the first, contrary to FIG. One authentication mark M1 may remain. In this case, a mark derivation step may be performed based on the remaining first authentication mark M1, and the second authentication mark M2 may be re-marked on the other outer surface 12.

(Second Embodiment)
A wafer manufacturing method according to the second embodiment of the present invention will be described with reference to FIG. 4 focusing on differences from the first embodiment. About the manufacturing method of this embodiment, it is controlled by the production system similar to the said FIG.

  Here, in the present embodiment, the processing wafer 10 is different from the first embodiment in that the processing wafer 10 is a multilayer wafer 2 in which a first wafer 2a and a second wafer 2b are bonded together.

[Steps of FIGS. 4A and 4B]
In this step, the lot injection step and the marking step of the first authentication mark M1 are performed on the first wafer 2a as in the first embodiment. Thereby, the first wafer 2a on which the first authentication mark M1 is marked is prepared.

[Step of FIG. 4C: Joining Step]
On the other hand, the second wafer 2b is also subjected to the lot injection process and the marking process of the second authentication mark M2 as described above. The marking of the second authentication mark M2 on the second wafer 2b is performed in the same manner as the marking of the first authentication mark M1. Thereby, the second wafer 2b marked with the second authentication mark M2 is prepared.

  Here, the second authentication mark M2 is a mark different from the first authentication mark M1, and when the first authentication mark M1 is the above example “1111”, the second authentication mark M2 is, for example, “2222”. To do.

  Note that the first wafer 2a and the second wafer 2b may be produced at the same factory or may be produced at different factories. In any case, information on each authentication mark M1, M2 of each wafer 2a, 2b and its marking surface is stored in the storage means 200.

  Then, as shown in FIG. 4C, the first wafer 2a marked with the first authentication mark M1 and the second wafer 2b marked with the second authentication mark M2 are opposite to the marking surface. The multi-layer wafer 2 is formed by bonding the surfaces by direct bonding or the like.

  At the stage when the multilayer wafer 2 is formed, the processing wafer 10 of this embodiment is prepared, and information on the outer surfaces 11 and 12 of the processing wafer 10 is stored in the storage unit 200. Thus, the steps up to the steps of FIGS. 4A to 4C are the preparation steps of this embodiment.

  Here, the outer surface on the first wafer 2 a side in the multilayer wafer 2 corresponds to one outer surface 11 of the processing wafer 10, and the outer surface on the second wafer 2 b side is the other outer surface of the processing wafer 10. This corresponds to 12.

  As described above, in the present embodiment, the processing wafer 10 is the multilayer wafer 2, but in the preparation step, the authentication marks M1 and M2 are provided on the outer surfaces 11 and 12 on the front and back sides, respectively, as in the first embodiment. A marked processing wafer 10 is prepared. At the same time, in the preparation step, both authentication marks M1 and M2 on the front and back outer surfaces 11 and 12 of the prepared processing wafer 10 are stored in the storage means 200.

[Step of FIG. 4D: Processing Step and Mark Deriving Step]
Next, as a processing step, processing such as polishing is performed on the outer surfaces 11 and 12 of the processing wafer 10. Here, in the processing step of FIG. 4D, the first authentication mark M1 disappears on the outer surface of the processing wafer 10 after the processing step on the first wafer 2a side, that is, one outer surface 11, and the second wafer. On the outer surface on the 2b side, that is, on the other outer surface 12, the second authentication mark M2 remains.

  In the mark derivation step, the first authentication mark M1 that has disappeared is derived based on the second authentication mark M2 remaining on the other outer surface 12 of the processing wafer 10 after the processing step. Specifically, the second authentication mark M2 remaining on the other outer surface 12 is collated with the storage means 200, and the first authentication mark M1 disappeared on the one outer surface 11 is derived.

[Process of FIG. 4E: Re-Marking Process]
Next, also in the present manufacturing method, as in the first embodiment, the first authentication mark M1 in the processed wafer 10 after the processing step is removed on the outer surface 11 where the first authentication mark M1 has disappeared by the mark derivation step. The one authentication mark M1 is re-marked by the marking means 102.

  As described above, also by the manufacturing method and the production system of the present embodiment, the authentication marks M1 and M2 of the both outer surfaces 11 and 12 of the processing wafer 10 before processing are stored in the storage unit 200, so that after the processing step. Even if the authentication mark on one of the outer surfaces disappears, the authentication mark that remains on the other outer surface can be derived.

  Therefore, even in this embodiment, even if the authentication mark disappears in the outer surface of one of the processing wafers 10 due to the processing process, the authentication mark is confirmed by going back to the initial stage of the processing wafer 10 and the history is confirmed. A wafer manufacturing method and a production system can be provided. Also in this embodiment, the effect of re-marking is the same as in the first embodiment.

  In the present embodiment as well, in the processing step, the second authentication mark M2 disappears on the other outer surface 12 of the processing wafer 10 made of the multilayer wafer 2, contrary to FIG. The first authentication mark M1 may remain on the outer surface 11. Also in this case, the mark derivation process may be performed based on the remaining first authentication mark M1, and the second authentication mark M2 may be remarked on the other outer surface 12.

(Third embodiment)
The wafer manufacturing method according to the third embodiment of the present invention is a modification of the second embodiment, and the manufacturing method will be described with reference to FIG. 5, focusing on differences from the second embodiment. State. Note that the manufacturing method of this embodiment is also controlled by the same production system as in FIG.

  Also in this embodiment, the processing wafer 10 is made of the multilayer wafer 2 in which the first wafer 2a and the second wafer 2b are bonded together. Here, in the said 2nd Embodiment, as FIG. 4 (a), (b) shows, the 2nd wafer 2b is affixed on the lower surface of the 1st wafer 2a, The 1st authentication mark M1 is It was marked on the upper surface of the first wafer 2a.

  On the other hand, in this embodiment, as shown in FIGS. 5A and 5B, the second wafer 2b is attached to the upper surface of the first wafer 2a, and the first authentication mark M1 is the first authentication mark M1. Marked on the lower surface of one wafer 2a.

[Steps of FIGS. 5A and 5B]
In this process, the lot injection process and the marking process of the first authentication mark M1 are performed on the first wafer 2a as described above. Thereby, the first wafer 2a on which the first authentication mark M1 is marked is prepared.

[Step of FIG. 5C: Joining Step]
On the other hand, in the same manner as in the second embodiment, the second wafer 2b is also subjected to the lot injection process and the second authentication mark M2 marking process as described above.

  As a result, a second wafer 2b marked with a second authentication mark M2 as a mark different from the first authentication mark M1 is prepared. And like the said 2nd Embodiment, the information of each certification | authentication mark M1, M2 of each wafer 2a, 2b and its marking surface is memorize | stored in the memory | storage means 200. FIG.

  Also in this embodiment, as shown in FIG. 5C, the first wafer 2a marked with the first authentication mark M1 and the second wafer 2b marked with the second authentication mark M2 are mutually connected. The multilayer wafer 2 is formed by bonding together by direct bonding or the like on the surface opposite to the marking surface.

  At the stage when the multilayer wafer 2 is formed, the processing wafer 10 of this embodiment is prepared, and information on the outer surfaces 11 and 12 of the processing wafer 10 is stored in the storage unit 200. As described above, the steps up to the steps of FIGS. 5A to 5C are the preparation steps of this embodiment.

  Thus, in this embodiment as well, as in the second embodiment, the processing wafer 10 is the multilayer wafer 2, but in the preparation process, the authentication marks M1 and M2 are marked on the front and back outer surfaces 11 and 12, respectively. A processing wafer 10 is prepared. At the same time, both authentication marks M 1 and M 2 on the front and back outer surfaces 11 and 12 of the prepared processing wafer 10 are stored in the storage unit 200.

[Step of FIG. 5D: Processing Step and Mark Deriving Step]
Next, as in the second embodiment, when the processing step is performed, as shown in FIG. 5D, on one outer surface 11 on the first wafer 2a side in the processing wafer 10 after the processing step, The first authentication mark M1 disappears, and the second authentication mark M2 remains on the other outer surface 12 on the second wafer 2b side.

  As in the second embodiment, in the mark derivation process, the first authentication mark M1 that has disappeared is based on the second authentication mark M2 remaining on the other outer surface 12 of the processing wafer 10 after the processing process. derive.

[Step of FIG. 5E: Re-Marking Step]
Next, as in the second embodiment, the first authentication mark M1 derived by the mark deriving step is applied to one outer surface 11 where the first authentication mark M1 has disappeared in the processing wafer 10 after the processing step. Remarking is performed by the marking means 102.

  The manufacturing method of this embodiment is the above. As described above, the manufacturing method of the present embodiment and the production system that controls the same can also exhibit the same effects as described in the second embodiment.

(Fourth embodiment)
The wafer manufacturing method according to the fourth embodiment of the present invention is a modification of the second embodiment, and the manufacturing method will be described with reference to FIG. 6, focusing on the differences from the second embodiment. State. Note that the manufacturing method of this embodiment is also controlled by the same production system as in FIG.

  Also in the present embodiment, as in the second embodiment, the processing wafer 10 is made of the multilayer wafer 2 in which the first wafer 2a and the second wafer 2b are bonded together.

[Steps of FIGS. 6A and 6B]
In this step, the lot injection step and the marking step of the first authentication mark M1 are performed on the first wafer 2a as in the second embodiment. Thereby, the first wafer 2a on which the first authentication mark M1 is marked is prepared.

[Step of FIG. 6C: Joining Step]
On the other hand, in the same manner as in the second embodiment, the second wafer 2b is also subjected to the lot injection process and the second authentication mark M2 marking process as described above.

  Also in this embodiment, as shown in FIG. 6C, the first wafer 2a marked with the first authentication mark M1 and the second wafer 2b marked with the second authentication mark M2 are mutually connected. The multilayer wafer 2 is formed by bonding together by direct bonding or the like on the surface opposite to the marking surface.

  At the stage when the multilayer wafer 2 is formed, the processing wafer 10 of this embodiment is prepared, and information on the outer surfaces 11 and 12 of the processing wafer 10 is stored in the storage unit 200. Thus, the steps up to the steps of FIGS. 6A to 6C are the preparation steps of this embodiment.

  Thus, also in the preparation process of the present embodiment, the processing wafer 10 made of the multilayer wafer 2 in which the authentication marks M1 and M2 are marked on the front and back outer surfaces 11 and 12, respectively, is prepared as in the second embodiment. At the same time, both authentication marks M 1 and M 2 on the front and back outer surfaces 11 and 12 of the prepared processing wafer 10 are stored in the storage means 200.

[Steps in FIGS. 6D, 6E, and 6F: Processing Step and Mark Deriving Step]
Next, as in the second embodiment, when the processing step is performed, as shown in FIG. 6D, on one outer surface 11 on the first wafer 2a side in the processing wafer 10 after the processing step, The first authentication mark M1 disappears, and the second authentication mark M2 remains on the other outer surface 12 on the second wafer 2b side.

  Thereafter, in the processing step of the present embodiment, as shown in FIG. 6E, the third wafer 2 c is further bonded and pasted to one outer surface 11 of the processing wafer 10. The third wafer 2c has a third authentication mark M3 marked on the surface opposite to the bonding surface.

  For the third wafer 2c, a lot injection process is performed in the same manner as described above, and a marking process for the third authentication mark M3 is performed. The marking of the third authentication mark M3 on the third wafer 2c is performed in the same manner as the marking of the first authentication mark M1. Thereby, the third wafer 2c marked with the third authentication mark M3 is prepared.

  Here, the third authentication mark M3 is a mark different from the first authentication mark M1 and the second authentication mark M2, the first authentication mark M1 is the above example “1111”, and the second authentication mark M2 is the above-described mark. In the case of the example “2222”, for example, the third authentication mark M3 is “3333”.

  In the present embodiment, the first wafer 2a, the second wafer 2b, and the third wafer 2c may be produced at the same factory or at different factories. In any case, the information of each authentication mark M1, M2, M3 of each wafer 2a, 2b, 2c and its marking surface is stored in the storage means 200.

  Thus, in the processing step of the present embodiment, as shown in FIG. 6E, the second wafer 2b and the third wafer 2c are attached to both sides of the first wafer 2a, and these three layers are laminated. A processing wafer 10 is formed. In this processing wafer 10, the outer surface on the third wafer 2 c side corresponds to one outer surface 11, and the outer surface on the second wafer 2 b side corresponds to the other outer surface 12.

  Further, in the processing step of this embodiment, as shown in FIG. 6F, one outer surface 11 of the processing wafer 10 made of this three-layer wafer, that is, the outer surface of the third wafer 2c is polished. Process by.

  As a result, as shown in FIG. 6F, the third authentication mark M3 disappears on the one outer surface 11 on the third wafer 2c side in the processing wafer 10 after the processing step, and the second wafer 2b side On the other outer surface 12, the second authentication mark M2 remains.

  Even in such a state, in the present embodiment, the second authentication mark M2 remaining on the other outer surface 12 of the processing wafer 10 after the processing step by the mark derivation step, as in the second embodiment. Based on the above, it is possible to derive the first authentication mark M1 that has disappeared.

[Step of FIG. 6G: Remarking Step]
Next, as in the second embodiment, the first authentication mark M1 derived by the mark deriving step is applied to one outer surface 11 where the first authentication mark M1 has disappeared in the processing wafer 10 after the processing step. Remarking is performed by the marking means 102. Here, the first authentication mark M1 is re-marked on the outer surface of the third wafer 2c in the processing wafer 10.

  The manufacturing method of the present embodiment is as described above. Thus, the same effect as described in the second embodiment is also exhibited by the manufacturing method of the present embodiment and the production system that controls the manufacturing method. Is.

  As described above, the manufacturing method and the production system of the present invention have been described with reference to the first to fourth embodiments. However, the various authentication marks M1 to M3 described above, the marking surfaces thereof, and the bonding between wafers and the same. Information such as the joint surface is stored in the storage unit 200 as a history.

  The main examples of information stored in the storage means 200 as the history are not limited, but are listed below. Information on the lot ID of each of the wafers 1, 2a to 2c. Information on the authentication marks M1 to M3 and the marking surfaces of the wafers 1 and 2a to 2c. Information on certification mark and marking surface in re-marking. Information on wafers, bonding surfaces, authentication marks M1 to M3, etc. in the wafer bonding process (bonding).

(Other embodiments)
In the manufacturing methods shown in the above embodiments, the mark derivation process is performed, but the re-marking process may not be performed. For example, even if the certification mark disappears in the processing step, the history of the processing wafer 10 only needs to be found by the mark derivation step, and re-marking is unnecessary in the step after the certification mark disappears. If so, re-marking may not be performed.

  Further, in the manufacturing method shown in each of the above embodiments, after the re-marking step or after the mark derivation step when the re-marking is not performed, the processing wafer 10 is appropriately subjected to wiring formation or dicing. It goes without saying that the process is performed, and finally a product in units of chips is completed.

  Further, in each of the above embodiments, the lot injection process and the marking process of each certification mark are performed for each wafer. In the lot process, a wafer of a rough ore lot that has already been marked with each of the above certification marks is accepted. May be.

  Further, in the example shown in FIG. 2, marking is performed on a portion on the opposite side of the orientation flat OL at the peripheral edge portion on one outer surface 11 of the processing wafer 10. However, the processing wafer 10 used in each of the above embodiments and the other wafers may or may not have an orientation flat. For example, it may have a notch. The position of each authentication mark is not limited to the example shown in FIG.

  In FIG. 2, the first authentication mark M1 is a character mark such as “1111”. However, the authentication mark used in each of the above embodiments may be a two-dimensional code. That is, as long as it means a specific authentication mark, it may be a character mark or a two-dimensional code. For example, a character mark is marked first, and in re-marking, a two-dimensional code meaning the character mark is changed. You may make it mark.

  Specifically, after the authentication mark on the wafer disappears, re-marking is performed. At this time, there are a method of character mark to character mark and a method of two-dimensional code to two-dimensional code. However, other than these, a method of re-marking the two-dimensional code after the character mark disappears or re-marking the character mark after the two-dimensional code disappears may be used.

  Further, when both the character mark and the two-dimensional code are marked as the first authentication mark, a method of marking both or one of them may be used at the time of re-marking.

  Further, the present invention is not limited to the above-described embodiment, and can be appropriately changed within the scope described in the claims. The above embodiments are not irrelevant to each other, and can be combined as appropriate unless the combination is clearly impossible, and the above embodiments are not limited to the illustrated examples. Absent. In each of the above-described embodiments, it is needless to say that elements constituting the embodiment are not necessarily essential unless explicitly stated as essential and clearly considered essential in principle. Yes. Further, in each of the above embodiments, when numerical values such as the number, numerical value, quantity, range, etc. of the constituent elements of the embodiment are mentioned, it is clearly limited to a specific number when clearly indicated as essential and in principle. The number is not limited to the specific number except for the case. Further, in each of the above embodiments, when referring to the shape, positional relationship, etc. of the component, etc., the shape, unless otherwise specified and in principle limited to a specific shape, positional relationship, etc. It is not limited to the positional relationship or the like.

DESCRIPTION OF SYMBOLS 10 Processing wafer 11 One outer surface in processing wafer 12 The other outer surface in processing wafer 102 Marking means 200 Memory | storage means M1 1st certification | authentication mark M2 2nd certification | authentication mark

Claims (8)

A processing wafer (10) made of a semiconductor with identification authentication marks (M1, M2) marked on the outer surfaces (11, 12) on the front and back sides is prepared, and the front and back surfaces of the prepared processing wafer are prepared. A preparation step for storing both authentication marks on the outer surface in the storage means (200);
Thereafter, a processing step of performing processing on the outer surface of the processing wafer, and a wafer manufacturing method comprising:
When the authentication mark (M1) on one of the outer surfaces (11) of the front and back outer surfaces of the processing wafer after the processing step has disappeared, the other outer surface (12 And a mark deriving step for deriving the lost authentication mark based on the authentication mark (M2) remaining in the wafer.   A re-marking step of re-marking the erased authentication mark derived by the mark deriving step on one outer surface of the processing wafer after the processing step where the authentication mark has disappeared is provided. The method for manufacturing a wafer according to claim 1.   The preparation step comprises a single-layer wafer (1) as the processing wafer, wherein the two authentication marks are marked as the same marks on the front and back outer surfaces of the single-layer wafer. The method for manufacturing a wafer according to claim 1 or 2, characterized in that the authentication mark is prepared and stored in the storage means (200) on the front and back outer surfaces of the prepared single-layer wafer. .   In the preparation step, the processing wafer comprises a multilayer wafer (2) formed by bonding a first wafer (2a) and a second wafer (2b), and the first wafer in the multilayer wafer The outer surface (11) on the side and the outer surface (12) on the second wafer side are marked with the authentication mark, and the two authentication marks are different from each other. 3. The method for manufacturing a wafer according to claim 1, wherein the two authentication marks on the outer surfaces of the front and back surfaces are stored in the storage means. Prepare processing wafers (10) made of a semiconductor with authentication marks (M1, M2) for identification on front and back outer surfaces (11, 12),
Thereafter, a production system for controlling a wafer manufacturing method for performing a processing step of performing processing on the outer surface of the processing wafer,
Storage means (200) for storing information on the outer surface of the processing wafer;
Marking means (102) for marking the outer surface of the processing wafer,
The storage means stores both authentication marks on the front and back outer surfaces of the prepared processing wafer,
When the authentication mark (M1) on one of the outer surfaces (11) of the front and back outer surfaces of the processing wafer after the processing step has disappeared, the other outer surface (12 The production system is characterized in that the disappeared certification mark is derived based on the certification mark (M2) remaining in the bracket.   The erased authentication mark derived by the storage means is re-marked by the marking means on one outer surface of the processing wafer after the processing step where the authentication mark has disappeared. The production system according to claim 5. The preparation step comprises a single-layer wafer (1) as the processing wafer, wherein the two authentication marks are marked as the same marks on the front and back outer surfaces of the single-layer wafer. It is to prepare
The production system according to claim 5 or 6, wherein the storage means stores both the authentication marks on the front and back outer surfaces of the prepared single-layer wafer. In the preparation step, the processing wafer comprises a multilayer wafer (2) formed by bonding a first wafer (2a) and a second wafer (2b), and the first wafer in the multilayer wafer The outer surface (11) on the side and the outer surface (12) on the second wafer side are each marked with the authentication mark, and the two authentication marks are prepared differently from each other,
The production system according to claim 5 or 6, wherein the storage means stores the authentication marks on the outer surfaces of the front and back surfaces of the prepared multilayer wafer.

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