JP2017067446A - Method of manufacturing nano-gap electrode, side wall spacer and method of manufacturing side wall spacer - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method of manufacturing a nano-gap electrode by which a nano-gap having a width in the same dimension as that of the prior arts can be formed and a nano-gap having a smaller width than that of the prior arts can be also formed.SOLUTION: A side wall spacer 11 is formed to stand on a substrate 2; a first electrode part 5 and a second electrode part 6 disposed opposing to each other to interpose the side wall spacer 11 are formed by using a patterned resist layer 12; and then, the resist layer 12 and the side wall spacer 11 are removed to form a nano-gap NG having a width W1 controlled by the film thickness of the side wall spacer 11 between the first electrode part 5 and the second electrode part 6. Thereby, by controlling the film thickness of the side wall spacer 11, a nano-gap NG having the width W1 in the same dimension as that of the prior arts can be formed, as well as a nano-gap NG having the width W1 that is smaller than that of the prior arts can be formed.SELECTED DRAWING: Figure 4

Description

  The present invention relates to a method for manufacturing a nanogap electrode, a side wall spacer, and a method for manufacturing a side wall spacer.

  In recent years, an electrode structure in which a nanoscale gap is formed between opposing electrode portions (hereinafter referred to as a nanogap electrode) has attracted attention, and research on electronic devices and biodevices using the nanogap electrode has been actively conducted. Has been done. For example, in the field of biodevices, an analyzer that analyzes the base sequence of DNA using a nanogap electrode has been considered (see, for example, Patent Document 1).

  In practice, in this analyzer, single-stranded DNA is passed through a nanoscale hollow gap (hereinafter referred to as nanogap) between the electrode parts of the nanogap electrode, and the base of the single-stranded DNA is the electrode. The current flowing through the electrode part when passing through the nanogap between the parts is measured, and the base constituting the single-stranded DNA can be identified based on the current value.

  By the way, in such an analyzer, since the current value that can be detected decreases as the distance between the electrode parts of the nanogap electrode increases, it becomes difficult to analyze the sample with high sensitivity. It is desired that the gap can be formed small.

  Conventionally, as a method of manufacturing such a nanogap electrode, a metal mask made of titanium or the like formed on an electrode layer made of gold or the like is patterned by irradiation with a focused ion beam, and a lower layer exposed from the patterned metal mask. A method of manufacturing a nanogap electrode by dry-etching the electrode layer and forming a nanogap in the electrode layer is known (see, for example, Patent Document 2).

International Publication No. 2011/108540 Japanese Patent Laid-Open No. 2004-247203

  However, in such a nanogap electrode manufacturing method, the electrode layer surface exposed from the opening of the patterned metal mask is dry-etched to form a groove-like nanogap on the electrode layer surface. There is a problem that the minimum width of the gap (mask width gap) formed in the above becomes a width capable of patterning the metal mask, and it is difficult to form a nanogap smaller than that. In recent years, there has been a demand for the development of a new manufacturing method that can form a nanogap having the same width as that of the prior art, and can also form a nanogap that is much smaller than that of the prior art.

  Further, unlike such a conventional nanogap forming method using a metal mask, development of a completely new nanogap forming part capable of forming a nanogap without using a metal mask is also desired.

  Therefore, the present invention has been made in consideration of the above points, and in addition to forming a nanogap having the same width as the conventional one, a nanogap electrode capable of forming a nanogap having a smaller width than the conventional one. The object is to propose a manufacturing method.

  Further, the present invention is different from the conventional formation method in which the electrode layer exposed from the opening of the metal mask is etched to form a groove-like nanogap on the surface of the electrode layer. It is an object of the present invention to provide a sidewall spacer capable of forming a nanogap and to propose a method for manufacturing the sidewall spacer.

  In the method of manufacturing a nanogap electrode according to the present invention, a side wall spacer is erected on a substrate, a first electrode part and a second electrode part are arranged opposite to each other with the side wall spacer interposed therebetween, and the side wall spacer is removed. And forming a nanogap having a width adjusted by the film thickness of the sidewall spacer between the first electrode portion and the second electrode portion.

  Thus, according to this method of manufacturing a nanogap electrode, a nanogap having a width adjusted by the film thickness of the sidewall spacer can be formed, and thus a nanogap having the same size as the conventional one can be formed. However, a nanogap with a smaller width can be formed.

  Also, in the method of manufacturing a nanogap electrode, a lower spacer that is substantially parallel to the surface of the substrate and a sidewall spacer that is substantially perpendicular to the surface of the substrate are integrally formed on the substrate. Forming a first electrode portion on the substrate, forming a second electrode portion on the lower spacer so as to face the first electrode portion with a side wall spacer interposed therebetween, and partially forming the lower spacer The lower spacer is left only between the substrate and the second electrode part, and the side wall spacer is removed, and the side wall spacer is provided between the first electrode part and the second electrode part and between the first electrode part and the lower spacer. Forming a nanogap having a width adjusted according to the film thickness.

  Thus, according to this method of manufacturing a nanogap electrode, a nanogap having a width adjusted by the film thickness of the sidewall spacer can be formed, and thus a nanogap having the same size as the conventional one can be formed. However, a nanogap with a smaller width can be formed.

  The side wall spacer of the present invention has a thickness of 1000 nm or less and is erected in a wall shape with respect to the substrate.

  Thus, according to the sidewall spacer of the present invention, the first electrode portion and the second electrode portion are formed with the sidewall spacer interposed therebetween, and then the sidewall spacer is removed, so that the first electrode portion and the second electrode portion are separated. A nanogap having a width of the sidewall spacer can be formed.

  Further, according to the sidewall spacer of the present invention, the first processed portion and the second processed portion are formed with the sidewall spacer interposed therebetween, and then the sidewall spacer is removed, so that the first processed portion and the second processed portion are interposed. A hollow gap having the width of the side wall spacer can also be formed, and thus a microstructure having a hollow gap between the first processed portion and the second processed portion can be manufactured.

  The side wall spacer manufacturing method according to the present invention includes forming the side wall spacer on the side wall of the stepped portion formed on the substrate, then removing the stepped portion and standing the side wall spacer on the substrate.

  Thereby, according to the manufacturing method of the sidewall spacer of the present invention, unlike the conventional forming method of etching the electrode layer exposed from the opening of the metal mask to form a groove-like nanogap on the surface of the electrode layer, A sidewall spacer capable of forming a nanogap can be manufactured without using a conventional metal mask.

  In the method of manufacturing the sidewall spacer according to the present invention, the sidewall spacer is formed on the sidewall of the stepped portion formed on the substrate, and then the mask layer covering the stepped portion, the sidewall spacer, and the exposed substrate is formed. And exposing the respective surfaces of the stepped portion, the side wall spacer, and the mask layer by a planarization process, and standing the side wall spacer on the substrate between the stepped portion and the mask layer.

  Thereby, according to the manufacturing method of the sidewall spacer of the present invention, unlike the conventional forming method of etching the electrode layer exposed from the opening of the metal mask to form a groove-like nanogap on the surface of the electrode layer, A sidewall spacer capable of forming a nanogap can be manufactured without using a conventional metal mask.

  In the method for manufacturing the sidewall spacer according to the present invention, a layered sidewall spacer forming layer is formed on the stepped portion formed on the substrate and the exposed substrate, and then a mask layer covering the sidewall spacer forming layer is formed. Then, at least a part of the mask layer and the side wall spacer forming layer formed on the stepped portion of the side wall spacer forming layer are removed by planarization, and the side wall spacer forming layer remains between the stepped portion and the mask layer. Forming sidewall spacers erected on the substrate between the stepped portion and the mask layer, and forming a lower spacer between the substrate and the mask layer by leaving the sidewall spacer formation layer between the substrate and the mask layer. Including.

  Thereby, according to the manufacturing method of the sidewall spacer of the present invention, unlike the conventional forming method of etching the electrode layer exposed from the opening of the metal mask to form a groove-like nanogap on the surface of the electrode layer, A sidewall spacer capable of forming a nanogap can be manufactured without using a conventional metal mask.

  According to the method of manufacturing a nanogap electrode of the present invention, a nanogap having a width adjusted by the film thickness of the sidewall spacer can be formed, and thus a nanogap having the same size as the conventional one can be formed. Nano gaps with even smaller widths can be formed.

  Moreover, according to the side wall spacer manufactured by the manufacturing method of the present invention, the first electrode portion and the second electrode portion are formed with the side wall spacer erected on the substrate, and then the side wall spacer is removed. A nanogap having a width of the sidewall spacer can be formed between the first electrode portion and the second electrode portion. Thus, according to the sidewall spacer manufacturing method of the present invention, unlike the conventional forming method in which the electrode layer exposed from the opening of the metal mask is etched to form a groove-like nanogap on the surface of the electrode layer, A side wall spacer capable of forming a nanogap can be realized without using a metal mask as described above, and such a side wall spacer can be manufactured.

It is the schematic which shows the structure of the nano gap electrode manufactured with the manufacturing method by 1st and 2nd embodiment. It is the schematic where it uses for description (1) of the manufacturing method of the nano gap electrode by 1st Embodiment. It is the schematic with which it uses for description (2) of the manufacturing method of the nano gap electrode by 1st Embodiment. It is the schematic with which it uses for description (3) of the manufacturing method of the nano gap electrode by 1st Embodiment. It is the schematic with which it uses for description (1) of the manufacturing method of the nano gap electrode by 2nd Embodiment. It is the schematic where it uses for description (2) of the manufacturing method of the nano gap electrode by 2nd Embodiment. It is the schematic where it uses for description of the manufacturing method of the nano gap electrode of the modification by 2nd Embodiment. It is the schematic which shows the structure of the nano gap electrode manufactured with the manufacturing method by 3rd and 4th embodiment. It is the schematic with which it uses for description (1) of the manufacturing method of the nano gap electrode by 3rd Embodiment. It is the schematic with which it uses for description (2) of the manufacturing method of the nano gap electrode by 3rd Embodiment. It is the schematic with which it uses for description (3) of the manufacturing method of the nano gap electrode by 3rd Embodiment. It is the schematic where it uses for description (1) of the manufacturing method of the nano gap electrode of the modification by 3rd Embodiment. It is the schematic with which it uses for description (2) of the manufacturing method of the nano gap electrode of the modification by 3rd Embodiment. It is the schematic where it uses for description of the manufacturing method of the nano gap electrode by 4th Embodiment. It is the schematic which shows the structure of the side wall spacer which has a curved part. It is the schematic where it uses for description of the manufacturing method of a nano gap electrode when the board | substrate which has an electrode formation layer is used.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

(1) Configuration of Nanogap Electrode Manufactured by Manufacturing Method According to First and Second Embodiments FIG. 1 shows a nanogap electrode 1 manufactured by the manufacturing method according to the first and second embodiments of the present invention. Show. The nanogap electrode 1 is provided with a first electrode part 5 and a second electrode part 6 facing each other on the substrate 2, and a width W1 between the first electrode part 5 and the second electrode part 6 is nanoscale ( For example, a hollow nanogap NG of 1000 [nm] or less is formed. The nanogap electrode 1 manufactured by the manufacturing method according to the present invention has a width W1 of the nanogap NG of, for example, 5 to 30 [nm], further 2 [nm] or less, or 1 [nm] or less depending on the use mode. It can be formed.

  Here, the substrate 2 is composed of, for example, a silicon substrate 3 and a silicon oxide layer 4 formed on the silicon substrate 3, and the first electrode portion 5 and the second electrode pair which are paired on the silicon oxide layer 4 are formed. It has a configuration in which two electrode portions 6 are formed. Each of the first electrode portion 5 and the second electrode portion 6 is made of a metal member such as titanium nitride (TiN), for example, and is formed substantially symmetrically on the substrate 2 around the nanogap NG. Actually, in the case of this embodiment, the first electrode portion 5 and the second electrode portion 6 have the same configuration, and electrode tip portions 5b and 6b that form the nanogap NG, and the electrode tip portions. It is comprised from base | substrate parts 5a and 6a integrally formed in the base part of 5b and 6b. The electrode tip portions 5b and 6b have, for example, a rectangular parallelepiped shape whose longitudinal direction extends in the y direction, and are arranged so that the tip surfaces face each other.

  The base portions 5a, 6a have a bulge at the central tip portion where the electrode tip portions 5b, 6b are provided, and are gently curved toward both sides around the center tip portion. It is formed in a curved shape with the portions 5b and 6b as vertices. The first electrode part 5 and the second electrode part 6 are composed of the first electrode part 5 and the second electrode part orthogonal to the y direction which is the longitudinal direction of the first electrode part 5 and the second electrode part 6. When a solution containing, for example, single-stranded DNA is supplied from the x direction perpendicular to the z direction, which is the height direction of 6, the electrode tips 5b, 6b are moved along the curved surfaces of the base portions 5a, 6a. It is constructed so that the solution can pass through the nanogap NG (or the vicinity thereof) reliably.

  Incidentally, the nanogap electrode 1 having such a configuration is configured such that a current can be supplied to the first electrode unit 5 and the second electrode unit 6 from a power source (not shown), for example. The current value between the two electrode portions 6 can be measured by an ammeter (not shown). The nanogap electrode 1 allows the single-stranded DNA to pass through the nanogap NG between the first electrode part 5 and the second electrode part 6 from the x direction, and the base of the single-stranded DNA becomes the first electrode part 5 and the second electrode part. The current value flowing between the first electrode part 5 and the second electrode part 6 when passing through the nanogap NG between the electrode parts 6 is measured with an ammeter, and single-stranded DNA is obtained based on the current value. The constituent bases can be identified.

(2) First Embodiment Hereinafter, a method for manufacturing a nanogap electrode according to a first embodiment of the present invention will be described. First, as shown in FIG. 2A and FIG. 2B showing a side sectional configuration of the AA ′ portion of FIG. 2A, a substrate 2 having a silicon oxide layer 4 formed as a surface layer on a silicon substrate 3 is prepared. For example, a quadrangular stepped portion 9 made of silicon nitride (SiN) and having side walls 9a is formed on the silicon oxide layer 4 by using a photolithography technique.

  Next, as shown in FIG. 2C in which the same reference numerals are assigned to the corresponding parts to FIG. 2A and FIG. 2D in which the same reference numerals are assigned to the corresponding parts in FIG. 2B, for example, the CVD (Chemical Vapor Deposition) method, A sidewall spacer forming layer 10 is formed on the stepped portion 9 and the exposed substrate 2 by ALD (Atomic Layer Deposition) method, sputtering method or the like. The side wall spacer forming layer 10 is formed by using a member different from the surface of the substrate 2 (in this case, the silicon oxide layer 4) and the step portion 9 as well as the first electrode portion 5 and the second electrode portion 6 described later. Can be done.

For example, when the surface of the substrate 2 is made of silicon oxide layer 4, the stepped portion 9 is made of SiN, and the first electrode portion 5 and the second electrode portion 6 described later are made of titanium nitride (TiN), side wall spacers are formed. The layer 10 can be formed of titanium (Ti) or the like. For example, the surface layer formed on the surface of the substrate 2 may be formed of SiN. In this case, the step portion 9 is formed of silicon oxide (SiO ₂ ), and the first electrode portion 5 and the second electrode portion described later are formed. The electrode portion 6 may be formed of titanium nitride (TiN), and the sidewall spacer forming layer 10 may be formed of Ti.

  Here, the side wall spacer forming layer 10 is formed along the side wall 9a of the stepped portion 9. At this time, the thickness of the side wall spacer forming layer 10 formed on the side wall 9a is set to a desired width of the nanogap NG. Select according to W1. That is, when forming a nanogap NG having a small width W1, the sidewall spacer forming layer 10 is formed thin, while when forming a nanogap NG having a large width W1, the sidewall spacer forming layer 10 is formed. The film is formed thick.

  Next, the sidewall spacer forming layer 10 formed on the stepped portion 9 and the exposed substrate 2 is etched back by dry etching, for example, to leave the sidewall spacer forming layer 10 along the sidewall 9a of the stepped portion 9, As shown in FIG. 2E in which the same reference numerals are assigned to the corresponding parts in FIG. 2C, and in FIG. 2F in which the same reference numerals are assigned to the corresponding parts in FIG. 2D, the side wall-like shape is formed along the side wall 9a. A self-supporting sidewall spacer 11 is formed. The wall-shaped side wall spacer 11 formed in this way is gradually formed wider from the apex of the side wall 9a of the step portion 9 toward the substrate 2, and the maximum width of the side wall spacer 11 is The width W1 of the finally formed nanogap NG can be obtained. That is, in the manufacturing method of the side wall spacer described above, the thickness is 1000 [nm] or less (nanoscale), 30 [nm] or less, and further, the thickness is 2 [nm] or less and 1 [nm] depending on the use mode. The side wall spacer 11 standing in a wall shape with respect to the substrate 2 can be manufactured.

  Next, as shown in FIG. 3A in which the same reference numerals are assigned to the corresponding parts to FIG. 2E and FIG. 3B in which the same reference numerals are assigned to the corresponding parts in FIG. Side wall spacers 11 are provided upright with respect to the surface of the substrate 2 at predetermined positions on the substrate 2.

  The process shown in FIGS. 2A to 3B described above is a method for manufacturing the sidewall spacer 11 according to the first embodiment of the present invention. Thus, the sidewall spacer 11 that can be used for forming the nanogap NG described later. Can be manufactured. Next, each process until the nanogap electrode 1 is manufactured by forming the nanogap NG using the side wall spacer 11 provided on the substrate 2 will be described.

  A resist coating material is applied on the silicon oxide layer 4 as shown in FIG. 3C in which the same reference numerals are assigned to the corresponding parts to FIG. 3A and FIG. 3D in which the same reference numerals are assigned to the corresponding parts in FIG. 3B. This is cured to form a resist layer 12.

  Next, as shown in FIG. 3E in which parts corresponding to those in FIG. 3C are assigned the same reference numerals and in FIG. 3F in which parts corresponding to those in FIG. The region where the second electrode portion 6 is formed is removed using a photolithography technique to form a patterned resist layer 12 (electrode formation mask), and the first electrode portion 5 and the second electrode portion The silicon oxide layer 4 is exposed in the region where 6 is to be formed.

  Next, a metal layer for forming the first electrode portion 5 and the second electrode portion 6 is formed on the patterned resist layer 12 (electrode formation mask) and on the exposed substrate 2 (silicon oxide layer 4). After the film is formed, the first electrode portion of the metal layer is formed as shown in FIG. 4A in which the same reference numerals are assigned to the corresponding parts to FIG. 3E and FIG. 4B in which the same reference numerals are assigned to the corresponding parts in FIG. 3F. 5 and the metal layer other than the portion that becomes the second electrode portion 6 are removed by lift-off, and the first electrode portion 5 and the second electrode portion 6 in which the electrode tip portions 5b and 6b are arranged to face each other with the side wall spacer 11 interposed therebetween. Formed on the substrate 2.

  Incidentally, at this time, the metal layer 11a remains on the sidewall spacer 11. Thus, the metal layer 11a remaining on the side wall spacer 11 may be removed by polishing by chemical mechanical polishing (CMP) or at this time without being removed by CMP or the like. When removing the side wall spacers 11 later, the side wall spacers 11 may be removed at the same time.

  Finally, as shown in FIG. 4C in which the same reference numerals are assigned to the corresponding parts to FIG. 4A and FIG. 4D in which the same reference numerals are assigned to the corresponding parts in FIG. 4B, the sidewall spacers 11 are removed by wet etching, for example. By doing so, a nanogap NG having the same width W1 as the width W1 of the sidewall spacer 11 can be formed between the electrode tip portions 5b and 6b, and the nanogap electrode 1 as shown in FIG. 1 can be manufactured. At this time, since the side wall spacer 11 is formed by a member different from the silicon oxide layer 4 on the surface of the substrate 2 and the first electrode portion 5 and the second electrode portion 6, the side wall spacer 11 is left leaving the silicon oxide layer 4. Only the spacer 11 can be removed, and the first electrode portion 5 and the second electrode portion 6 can be reliably left on the substrate 2.

  As described above, in the manufacturing method according to the first embodiment, the side wall spacer 11 is formed on the side wall of the step portion 9 formed on the substrate 2, and then the step portion 9 is removed to form the step on the substrate 2. Sidewall spacers 11 are erected. Then, after forming a patterned resist layer 12 on the substrate 2 as a mask, a metal layer is formed on the resist layer 12 and on the substrate 2 exposed from the opening of the resist layer 12, and the patterned resist layer 12 is formed. Is removed, and the metal layer on the resist layer 12 is removed, and the first electrode portion 5 and the second electrode portion 6 which are arranged to face each other with the side wall spacer 11 interposed therebetween are formed on the substrate 2. Finally, in this manufacturing method, the nano-gap NG having the same width W1 as the width of the sidewall spacer 11 is formed between the first electrode portion 5 and the second electrode portion 6 by removing the sidewall spacer 11.

  As described above, in the method of manufacturing the nanogap electrode 1 according to the first embodiment of the present invention, the nanogap NG having the desired width W1 can be formed by adjusting the film thickness of the side wall spacer 11. Since the sidewall spacer 11 can be formed very thin, a nanogap NG having a very small width W1 corresponding to the width W1 of the sidewall spacer 11 can also be formed.

  According to the above configuration, in this manufacturing method, after the side wall spacer 11 is erected on the substrate 2, the patterned resist layer 12 is used, and the first electrode portion 5 and the opposite electrode sandwiched between the side wall spacers 11 and The second electrode portion 6 is formed, and then the resist layer 12 and the sidewall spacer 11 are removed, and the nanogap NG having a width adjusted by the thickness of the sidewall spacer 11 is formed into the first electrode portion 5 and the second electrode portion 6. By adjusting the film thickness of the side wall spacer 11, a nano gap NG having the same width W1 as the conventional one can be formed, and the nanometer having a width W1 that is much smaller than the conventional one can be formed. A gap NG can also be formed.

  Further, in the method for manufacturing the sidewall spacer according to the first embodiment of the present invention, after the sidewall spacer 11 is formed on the sidewall 9a of the step portion 9 formed in the predetermined region on the substrate 2, the step portion 9 is removed. Thus, the side wall spacers 11 are erected on the substrate 2. Accordingly, in the present invention, after the first electrode portion 5 and the second electrode portion 6 are formed with the side wall spacer 11 erected on the substrate 2, the first electrode portion is removed by removing the side wall spacer 11. A nanogap NG having a width of the sidewall spacer 11 can be formed between the second electrode portion 5 and the second electrode portion 6. Thus, in the method of manufacturing the sidewall spacer 11 according to the present invention, unlike the conventional forming method in which the electrode layer exposed from the opening of the metal mask is etched to form the groove-like nanogap on the electrode layer surface, The side wall spacer 11 capable of forming the nanogap NG can be manufactured without using a simple metal mask.

  Incidentally, in addition to the embodiment described above, after forming the nanogap electrode 1 as shown in FIGS. 4C and 4D, the first electrode portion 5 and the second electrode portion 6 are further used as a mask to be on the substrate 2. A part of the surface of the silicon oxide layer 4 may be removed, and a groove-like gap may be formed by the silicon oxide layer 4 below the nano gap NG. In such a nanogap electrode, an electric field is generated in the gap between the silicon oxide layers 4 below the nanogap NG. When the single-stranded DNA passes through the gaps in the silicon oxide layer 4, the electric fields change. Accordingly, the value of the current flowing between the first electrode unit 5 and the second electrode unit 6 can also be changed, and the base constituting the single-stranded DNA can be identified based on the change in the current value.

(3) Second Embodiment Next, a manufacturing method according to a second embodiment different from the manufacturing method of the nanogap electrode according to the first embodiment described above will be described below. In the second embodiment, as in the first embodiment described above, as shown in FIGS. 2E and 2F, the step portion 9 is first formed on the substrate 2, and then the side wall of the step portion 9 is formed. Sidewall spacers 11 having a sidewall shape are formed along 9a. Since this step is the same as the step shown in FIGS. 2A to 2F of the first embodiment, detailed description thereof is omitted here.

  Next, as shown in FIG. 5A in which parts corresponding to those in FIG. 2E are denoted by the same reference numerals and in FIG. 5B showing a side cross-sectional configuration of the BB ′ part in FIG. 5A, on the step portion 9 and on the side wall spacer 11 Then, an insulating layer 13 (mask layer) that covers the exposed substrate 2 is formed. In the case of this embodiment, as the mask layer, as in the first embodiment, an insulating layer formed of the same member as the stepped portion 9, for example, an insulating member such as silicon nitride (SiN). However, the present invention is not limited to this, and a mask layer formed of various members other than the insulating member including the stepped portion 9 may be applied.

  Next, overpolishing is performed by, for example, a planarization process such as CMP, and FIG. 5D shows the corresponding parts corresponding to FIG. 5A with the same reference numerals and corresponding parts corresponding to FIG. 5B. As described above, all the surfaces of the stepped portion 9, the sidewall spacer 11, and the insulating layer 13 are exposed to the outside. As a result, a sidewall spacer 11 standing on the substrate 2 can be formed between the stepped portion 9 and the insulating layer 13.

  The planarization treatment is performed by polishing a region having a large upper slope on the side surface of the side wall spacer 11 until the cross section of the side wall spacer 11 between the step portion 9 and the insulating layer 13 is substantially quadrilateral. The side wall spacer 11 and the insulating layer 13 are overpolished. When performing the planarization process, if the side wall spacer 11 whose surface is exposed to the outside can be formed between the step portion 9 and the insulating layer 13, the step portion 9 and the side wall spacer 11 of the insulating layer 13 are covered. Only the region may be polished.

  The steps shown in FIGS. 2A to 2F and FIGS. 5A to 5D described above are the method for manufacturing the sidewall spacer 11 according to the second embodiment of the present invention. An available sidewall spacer 11 can be manufactured. Next, each process until the nanogap electrode 1 is manufactured by forming the nanogap NG using the side wall spacer 11 standing on the substrate 2 will be described.

  Next, after forming a layered resist mask (not shown) on each surface of the stepped portion 9, the sidewall spacer 11, and the insulating layer 13 exposed to the outside, a portion corresponding to FIG. 5E shown by attaching the same reference numerals to FIG. 5D and FIG. 5F showing the corresponding parts of FIG. 5D by attaching the same reference numerals, part of the step 9 and part of the insulating layer 13 are removed and patterned. The stepped portion 9 and the insulating layer 13 (electrode forming mask) are formed. The pattern of the portion from which the step portion 9 and the insulating layer 13 are removed corresponds to the pattern of the first electrode portion 5 and the second electrode portion 6, respectively, as shown in FIGS. 5E and 5F. That is, in the region where the first electrode portion 5 and the second electrode portion 6 are formed, the surface portion (silicon oxide layer 4) of the substrate 2 can be exposed by removing the step portion 9 and the insulating layer 13.

  Next, it remains on the silicon oxide layer 4 exposed in the region where the first electrode portion 5 and the second electrode portion 6 are formed, and in a region other than the region where the first electrode portion 5 and the second electrode portion 6 are formed. After a metal layer is formed on the stepped portion 9 and the insulating layer 13 as the electrode forming mask and the sidewall spacer 11, a planarization process such as CMP is performed to leave the remaining stepped portion 9 and the remaining portion. All surfaces of the insulating layer 13 and the sidewall spacer 11 to be exposed are exposed. Accordingly, as shown in FIG. 6A in which the same reference numerals are assigned to the corresponding parts to FIG. 5E and FIG. 6B in which the same reference numerals are assigned to the corresponding parts in FIG. The metal layer in the region of 13 (electrode forming mask) and the metal layer in the region of the sidewall spacer 11 are removed, and the first electrode portion in which the electrode tip portions 5b and 6b are arranged to face each other with the sidewall spacer 11 in between 5 and the second electrode portion 6 are formed on the substrate 2.

  Finally, as shown in FIG. 6C in which the same reference numerals are assigned to the corresponding parts to FIG. 6A and FIG. 6D in which the same reference numerals are assigned to the corresponding parts in FIG. By removing the patterned step portion 9 and the insulating layer 13, a nanogap NG having the same width W1 as the width W1 of the side wall spacer 11 can be formed between the electrode tip portions 5b and 6b. A nanogap electrode 1 as shown can be manufactured.

  As described above, in the manufacturing method according to the second embodiment, after the side wall spacer 11 is formed on the side wall of the step portion 9 formed in the predetermined region on the substrate 2, the step portion 9, the side wall spacer 11, Then, an insulating layer 13 that covers the exposed substrate 2 is formed. In this manufacturing method, the surface of the stepped portion 9, the sidewall spacer 11 and the insulating layer 13 is exposed by planarization, and the sidewall spacer is erected on the substrate 2 between the stepped portion 9 and the insulating layer 13. 11 is formed. Next, the stepped portion 9 and the insulating layer 13 are patterned, and the patterned stepped portion 9 and the insulating layer 13 are used as an electrode forming mask, and the first electrode portion 5 and the second electrode disposed opposite to each other with the sidewall spacer 11 interposed therebetween. Part 6 is formed. Finally, by removing the side wall spacer 11, the patterned step portion 9 and the insulating layer 13, the width W1 of the same width as the width of the side wall spacer 11 is provided between the first electrode portion 5 and the second electrode portion 6. Nano gap NG is formed.

  As described above, in the method of manufacturing the nanogap electrode according to the second embodiment of the present invention, the desired width W1 can be obtained by adjusting the film thickness of the sidewall spacer 11 as in the first embodiment. In addition, since the film thickness of the side wall spacer 11 can be extremely thin, a nano gap NG having a very small width W1 corresponding to the width W1 of the side wall spacer 11 is also formed. obtain.

  According to the above configuration, in this manufacturing method, after the side wall spacer 11 is erected on the substrate 2, the patterned stepped portion 9 and the insulating layer 13 are used to face each other with the side wall spacer 11 interposed therebetween. After forming the electrode portion 5 and the second electrode portion 6, the sidewall spacer 11, the patterned step portion 9 and the insulating layer 13 are removed, and the nanostructure with the width W 1 adjusted by the thickness of the sidewall spacer 11 is formed. Since the gap NG is formed between the first electrode portion 5 and the second electrode portion 6, the thickness of the sidewall spacer 11 is adjusted, so that the nanogap NG having the same width W1 as the conventional one can be formed. In addition to being able to be formed, it is also possible to form a nanogap NG having a width W1 that is much smaller than conventional ones.

  In the method for manufacturing the sidewall spacer according to the second embodiment of the present invention, the sidewall spacer 11 is formed on the sidewall of the step portion 9 formed in the predetermined region on the substrate 2, and then the step portion 9 and the sidewall spacer are formed. 11 and the exposed substrate 2 are formed, an insulating layer 13 (mask layer) is formed, and the surface of the stepped portion 9, the side wall spacer 11 and the insulating layer 13 is exposed to the outside by a planarization process. The sidewall spacers 11 are erected on the substrate 2 between the insulating layers 13.

  Thereby, also in the present invention, after the first electrode portion 5 and the second electrode portion 6 are formed with the side wall spacer 11 standing on the substrate 2 interposed therebetween, the first side wall spacer 11 is removed to remove the first electrode portion 5. A nanogap NG having a width of the sidewall spacer 11 can be formed between the electrode portion 5 and the second electrode portion 6. Thus, even in the method of manufacturing the sidewall spacer 11 according to the present invention, unlike the conventional forming method in which the electrode layer exposed from the opening of the metal mask is etched to form the groove-like nanogap on the surface of the electrode layer, The side wall spacer 11 capable of forming the nanogap NG can be manufactured without using a simple metal mask.

  Incidentally, in addition to the embodiment described above, after forming the nanogap electrode 1 as shown in FIGS. 6C and 6D, the first electrode portion 5 and the second electrode portion 6 are further used as a mask to be on the substrate 2. A part of the surface of the silicon oxide layer 4 may be removed, and a groove-like gap may be formed by the silicon oxide layer 4 below the nano gap NG. In such a nanogap electrode, an electric field is generated in the gap between the silicon oxide layers 4 below the nanogap NG. When the single-stranded DNA passes through the gaps in the silicon oxide layer 4, the electric fields change. Accordingly, the value of the current flowing between the first electrode unit 5 and the second electrode unit 6 can also be changed, and the base constituting the single-stranded DNA can be identified based on the change in the current value.

  As another embodiment, before removing the side wall spacer 11 shown in FIG. 4B, a metal member of a type different from the first electrode portion 5 and the second electrode portion 6 is used. It is good also as the 1st electrode part 5 and the 2nd electrode part 6 which grew on the 2nd electrode part 6 and have the electrode area | region which consists of a different metal from a lower layer in an upper layer.

  Furthermore, as another embodiment, before removing the side wall spacer 11 shown in FIG. 4B, the first electrode portion 5 and the second electrode portion 6 that are initially formed of a predetermined metal member such as Ni are formed by a gold plating method. Accordingly, the first electrode portion 5 and the second electrode portion 6 may be replaced with gold or the like which is a different metal member different from Ni or the like.

(4) Modification of Second Embodiment In the second embodiment described above, when the step 9 and the insulating layer 13 shown in FIGS. 5C and 5D are patterned, the pattern shown in FIGS. 5E and 5F is shown. As described above, when the step portion 9 and the insulating layer 13 in the region where the first electrode portion 5 and the second electrode portion 6 are formed are all removed, the surface of the substrate 2 (silicon oxide layer 4) is exposed. However, the present invention is not limited to this, and the first electrode portion 5 and the second electrode portion 6 (FIG. 1) are formed when the step portion 9 and the insulating layer 13 shown in FIGS. 5C and 5D are patterned. 7A, in which a part of the surface of the stepped portion 9 and the insulating layer 13 in the region to be formed is removed to leave a predetermined film thickness on the surface of the substrate 2, and the same reference numerals are given to the corresponding portions to FIG. 5C; As shown in FIG. 7B in which the same reference numerals are assigned to the corresponding parts to FIG. Thin insulating layer an edge layer 13 is thinned may be formed and (thin mask layer) 13a.

  The nanogap electrode manufactured in this way is different from the nanogap electrode 1 shown in FIG. 1 in that a thin film step 9c is formed between the substrate 2 and the first electrode part 5, and the substrate 2 and the second electrode A thin film insulating layer 13a is formed between the electrode part 6 and the electrode part 6.

  A manufacturing method according to a modification of the second embodiment will be described below. 5C and 5D, a layered resist mask (not shown) is formed on each surface of the stepped portion 9, the sidewall spacer 11, and the insulating layer 13 exposed to the outside, and then described later using a photolithography technique. A part of the surface of the step portion 9 and the insulating layer 13 in the region where the first electrode portion 5 and the second electrode portion 6 are formed is removed, and as shown in FIGS. 7A and 7B, the first electrode portion 5 and The thickness of the step portion 9 and the insulating layer 13 in the region where the second electrode portion 6 is formed is reduced to form the thin film step portion 9c and the thin film insulating layer 13c.

  Next, after forming a metal layer on the thin film step 9c and thin film insulating layer 13c having the outer shape of the electrode, on the remaining step 9 and insulating layer 13, and on the sidewall spacer 11, for example, As shown in FIG. 7C in which the same reference numerals are assigned to the corresponding parts to FIG. 7A and FIG. 7D in which the same reference numerals are assigned to the corresponding parts in FIG. All the surfaces of the stepped portion 9 other than the region where the first electrode portion 5 is formed, the insulating layer 13 other than the region where the second electrode portion 6 is formed, and the sidewall spacer 11 are exposed to the outside. As a result, the metal layer other than the region where the first electrode portion 5 and the second electrode portion 6 are formed and the metal layer in the region of the sidewall spacer 11 are removed, and the thin film step portion 9c and the thin film insulating layer 13c are removed. The first electrode portion 5 and the second electrode portion 6 can be formed on the substrate 2 in which the metal layer remains and the electrode tip portions 5b and 6b are opposed to each other with the side wall spacer 11 interposed therebetween.

  Finally, the sidewall spacer 11, the stepped portion 9 other than the region where the first electrode portion 5 is formed, and the insulating layer 13 other than the region where the second electrode portion 6 is formed are removed by dry etching, for example. Thus, the same width as the width W1 of the side wall spacer 11 is shown in FIG. 7E in which the same reference numerals are assigned to the corresponding parts to FIG. 7C and FIG. 7F in which the same reference numerals are assigned to the corresponding parts in FIG. 7D. A nanogap NG of W1 can be formed between the first electrode part 5 and the second electrode part 6, and a gap G1 sandwiched between the thin film step part 9c and the thin film insulating layer 13c is also formed below the nanogap NG. obtain.

  In the nanogap electrode 1a thus manufactured, single-stranded DNA can pass through the nanogap NG between the first electrode part 5 and the second electrode part 6, and the thin film step part below the nanogap NG. Single-stranded DNA can also pass through the gap G1 sandwiched between 9c and the thin film insulating layer 13c. In such a nanogap electrode 1a, an electric field is generated in the gap G1 between the thin film step 9c and the thin film insulating layer 13c made of an insulating member, and one electric field is formed in the gap G1 between the thin film step 9c and the thin film insulating layer 13c. When the strand DNA passes, the electric field changes, and the current value flowing between the first electrode portion 5 and the second electrode portion 6 can change accordingly, and the single-stranded DNA is constructed based on the change in the current value. The base can be identified.

  Incidentally, after forming the nanogap electrode 1a as shown in FIGS. 7E and 7F in addition to the above-described embodiment, the first electrode portion 5 and the second electrode portion 6 are further used as a mask to be on the substrate 2. A part of the surface of the silicon oxide layer 4 may be removed, and a groove-like gap may be further formed by the silicon oxide layer 4 below the nano gap NG and the gap G1.

(5) Configuration of the nanogap electrode manufactured by the manufacturing method according to the third and fourth embodiments Next, the configuration of the nanogap electrode manufactured by the manufacturing method according to the third and fourth embodiments of the present invention. This will be described below. FIG. 8, which shows parts corresponding to those in FIG. 1 with the same reference numerals, shows a nanogap electrode 31 manufactured by the manufacturing method according to the third and fourth embodiments of the present invention. The configuration is different from the electrode 1 in that a lower spacer 24 is formed below the second electrode portion 6. Here, the following description will focus on the configuration of the second electrode portion 6 and the lower spacer 24.

  In this case, the lower spacer 24 is formed on the substrate 2 and is formed so that the second electrode portion 6 is stacked on the upper surface, and can be disposed opposite to the first electrode portion 5 together with the second electrode portion 6. In practice, the lower spacer 24 has the same outer shape as the outer shape of the second electrode portion 6, and, like the second electrode portion 6, an electrode tip portion 24 b that forms a nanogap NG, and the electrode tip portion 24 b The base portion 24a is formed integrally with the base portion of the base portion 24a. The electrode tip portion 24b has a rectangular parallelepiped shape whose longitudinal direction extends in the y direction, for example, and is arranged so that the tip surface faces the tip surface of the electrode tip portion of the first electrode portion 5.

  The first electrode part 5, the second electrode part 6, and the lower spacer 24 include, for example, single-stranded DNA from the y direction and the x direction perpendicular to the z direction which is the height direction perpendicular to the y direction. When the solution is supplied, the solution is guided to the electrode tip portions 5b, 6b, and 24b along the curved surface of the base portion 5a and the curved surfaces of the base portions 6a and 24a, and the electrode tip portion 5b and the electrode tip The solution is configured to pass through the nano gap NG between the parts 6b and 24b.

  Here, the lower spacer 24 is formed of a conductive member, and a current can be supplied from a power source (not shown) similarly to the second electrode portion 6. As a result, the nanogap electrode 31 is connected between the first electrode unit 5 and the second electrode unit 6 while a current is supplied from the power source to the first electrode unit 5 and the paired second electrode unit 6 and the lower spacer 24. When the single-stranded DNA is passed through the nanogap NG between the first electrode unit 5 and the lower spacer 24 from the x direction, and the base of the single-stranded DNA passes through the nanogap NG, the first electrode unit 5 In addition, by measuring the current value flowing between the second electrode part 6 and between the first electrode part 5 and the lower spacer 24 with an ammeter, the base constituting the single-stranded DNA based on the current value Can be identified.

(6) Third Embodiment Next, a method for manufacturing the nanogap electrode 31 shown in FIG. 8 will be described. First, a silicon oxide layer is formed on a silicon substrate 3 as shown in FIG. 9A in which the same reference numerals are assigned to the corresponding parts in FIG. 2A and in FIG. 9B in which the sectional side view of the CC ′ part in FIG. 9A is shown. A substrate 2 on which 4 is formed is prepared, and a quadrilateral stepped portion 9 made of, for example, silicon nitride (SiN) and having a side wall 9a is formed on the silicon oxide layer 4 by using a photolithography technique.

  Next, as shown in FIG. 9C in which the same reference numerals are assigned to the corresponding parts to FIG. 9A and FIG. 9D in which the same reference numerals are assigned to the corresponding parts in FIG. 9B, for example, by CVD, sputtering, etc. A sidewall spacer forming layer 20 made of a member such as titanium nitride (TiN) different from the member of the surface of the substrate 2 (in this case, the silicon oxide layer 4) is formed on the stepped portion 9 and the exposed substrate 2. At this time, the thickness of the sidewall spacer forming layer 20 formed along the sidewall 9a of the step portion 9 is selected according to the desired width W1 of the nanogap NG. That is, when forming a nanogap NG with a small width W1, the sidewall spacer forming layer 20 is formed thin, while when forming a nanogap NG with a large width W1, the sidewall spacer forming layer 20 is formed. The film is formed thick.

  Next, as shown in FIG. 9E in which the same reference numerals are assigned to the corresponding parts to FIG. 9C and FIG. 9F in which the same reference numerals are assigned to the corresponding parts in FIG. 9D, the insulating layer 23 covering the sidewall spacer forming layer 20 is provided. (Mask layer) is formed. As a member of the insulating layer 23 as the mask layer, the same member as the stepped portion 9, for example, silicon nitride (SiN) can be used. In the case of the third embodiment, the case where the insulating layer 13 formed of the same insulating member as the stepped portion 9 such as silicon nitride (SiN) is applied as the mask layer will be described. However, the present invention is not limited to this, and a mask layer formed of various members other than the insulating member including the stepped portion 9 may be applied.

  Next, overpolishing is performed by a flattening process such as CMP, for example, and FIG. 10A shows the corresponding parts corresponding to FIG. 9E with the same reference numerals, and FIG. 10B shows the corresponding parts corresponding to FIG. As described above, the surfaces of the stepped portion 9 and the insulating layer 23 are exposed to the outside, and the surface of the side wall spacer 21 erected on the substrate 2 along the side wall 9a of the stepped portion 9 in the side wall spacer forming layer 20 is Then, it is exposed to the outside from between the step portion 9 and the insulating layer 23. Note that the lower spacer 24 which is a part of the side wall spacer forming layer 20 remains between the substrate 2 and the insulating layer 23. The layered lower spacer 24 can be formed such that the side wall spacer 21 rises from the end.

  The process shown in FIGS. 9A to 10B described above is a method for manufacturing the sidewall spacer 21 according to the third embodiment of the present invention. In this way, the sidewall spacer 21 that can be used for forming the nanogap NG described later. Can be manufactured. Even in such a method of manufacturing the sidewall spacer, the thickness is 1000 [nm] or less (nanoscale), 30 [nm] or less, and further, the thickness is 2 [nm] or less, 1 [ nm], and the side wall spacer 11 standing in a wall shape with respect to the substrate 2 at the end of the lower spacer 21 can be manufactured. Next, each process from forming the nanogap NG using the side wall spacer 21 standing on the substrate 2 to manufacturing the nanogap electrode 31 will be described.

  Next, the stepped portion 9 and the insulating layer 23 are removed by etching to expose the silicon oxide layer 4 and the sidewall spacer forming layer 20 to the outside (not shown), and the same reference numerals are given to corresponding portions to FIG. 10A. 10C and FIG. 10D in which the same reference numerals are assigned to the corresponding parts in FIG. 10B, a resist coating material is applied on the silicon oxide layer 4 and the side wall spacer formation layer 20 and cured. Thus, a resist layer 22 is formed.

  Here, in the manufacturing method according to the third embodiment, the lower spacer 24 is formed in an L-shaped cross section in which a side wall spacer 21 is erected at the end, and the erected side wall spacer 21 is supported by the lower spacer 24. Therefore, when applying a resist coating material, even if a load is applied from the resist coating material to the side wall spacer 21, the load on the side wall spacer 21 can be received by the lower spacer 24, and the side wall spacer 21 thus falls. Can be prevented from being deformed.

  Next, a region where the first electrode portion 5 and the second electrode portion 6 are formed in the resist layer 22 is removed by using a photolithography technique, and the resist layer 22 is patterned to be the same as the corresponding portion in FIG. 10C. 10E shown with reference numerals and FIG. 10F with the same reference numerals assigned to corresponding parts in FIG. 10D, the surface of the substrate 2 (silicon oxide layer 4) is formed in the region where the first electrode portion 5 is formed. And the lower spacer 24 is exposed in the region where the second electrode portion 6 is to be formed.

  Next, on the silicon oxide layer 4 exposed in the region where the first electrode portion 5 is formed, on the lower spacer 24 exposed in the region where the second electrode portion 6 is formed, and on the first electrode portion 5 and the first After forming a metal layer on the resist layer 22 as an electrode forming mask remaining in a region other than the region where the two-electrode portion 6 is formed and on the side wall spacer 21, a patterned resist layer 22 (for electrode formation) The metal layer on the resist layer 22 is removed (lift-off method) by peeling off the mask), and the same reference numerals are assigned to the corresponding parts in FIG. 10E and the corresponding parts in FIG. 10F. As shown in FIG. 11B with reference numerals, the first electrode portion 5 and the second electrode portion 6 are formed on the substrate 2 in which the electrode tip portions 5b and 6b are arranged to face each other with the side wall spacer 21 in between. At this stage, the side wall spacer 21 remains, and the lower spacer 24 also remains in the region covered with the patterned resist layer 22. In addition, as the metal layer used here, a member having an etch rate different from that of the lower spacer 24 can be used.

  Finally, as shown in FIG. 11C in which the same reference numerals are assigned to the corresponding parts to FIG. 11A and FIG. 11D in which the same reference numerals are assigned to the corresponding parts in FIG. The lower spacer 24 and the side wall spacer 21 that have been exposed to the outside are removed by dry etching, for example, so that the lower spacer 24 remains between the substrate 2 and the second electrode portion 6, and the side wall spacer 21 A nanogap NG having the same width W1 as the width W1 can be formed between the pair of the second electrode portion 6 and the lower spacer 24 and the first electrode portion 5, and a nanogap electrode 31 as shown in FIG. Can be manufactured.

  As described above, in the method of manufacturing the nanogap electrode according to the third embodiment, the side wall spacer forming layer 20 is formed on the stepped portion 9 formed in a predetermined region on the substrate 2 and on the exposed substrate 2. After the formation, an insulating layer 23 covering the side wall spacer forming layer 20 is formed. In this manufacturing method, a part of the insulating layer 23 and at least the side wall spacer forming layer 20 formed on the stepped portion 9 in the side wall spacer forming layer 20 are removed by planarization, and the stepped portion 9 and By leaving the sidewall spacer forming layer 20 between the insulating layers 23, the sidewall spacer 21 is formed between the stepped portion 9 and the insulating layer 23, and the sidewall spacer forming layer 20 is also left between the substrate 2 and the insulating layer 23. As a result, the lower spacer 24 is formed between the substrate 2 and the insulating layer 23.

  Next, the stepped portion 9 and the insulating layer 23 are removed, and a side wall spacer 21 integrally formed at the end of the lower spacer 24 is erected on the substrate 2, and then the patterned resist layer 22 is used as an electrode forming mask. Then, the first electrode portion 5 and the second electrode portion 6 that are arranged to face each other with the side wall spacer 21 interposed therebetween are formed on the substrate 2. Finally, after removing the resist layer 22 after patterning, the lower spacer 24 and the side wall spacer 21 in the region covered with the resist layer 22 are removed, so that the space between the substrate 2 and the second electrode portion 6 is removed. Only the lower spacer 24 is left, and a nanogap NG having the same width W1 as the width of the side wall spacer 21 is formed between the pair of the second electrode portion 6 and the lower spacer 24 and the first electrode portion 5.

  As described above, in the method of manufacturing the nanogap electrode according to the third embodiment of the present invention, as in the first and second embodiments described above, the film thickness of the sidewall spacer 21 is adjusted to obtain a desired value. Since the nano-gap NG having the width W1 can be formed and the film thickness of the side wall spacer 21 can be extremely thin, the nano-gap NG having a very small width W1 corresponding to the width W1 of the side wall spacer 21 can be formed. Can also form.

  According to the above configuration, in this manufacturing method, the lower spacer 24 extending in the surface direction of the substrate 2 and the side wall spacer 21 standing at the end of the lower spacer 24 are formed on the substrate 2 and then patterned. Using the resist layer 22, the first electrode portion 5 is formed on the substrate 2, and the second electrode portion 6 is formed on the lower spacer 24 so as to face the first electrode portion 5 with the side wall spacer 21 interposed therebetween. did. Next, after removing the patterned resist layer 22, the exposed lower spacer 24 is removed, leaving the lower spacer 24 only between the substrate 2 and the second electrode portion 6, and removing the side wall spacer 21, By forming a nanogap NG having a width W1 adjusted by the film thickness of the side wall spacer 21 between the first electrode part 5 and the second electrode part 6 and between the first electrode part 5 and the lower spacer 24. By adjusting the film thickness of the side wall spacer 21, a nanogap NG having the same width W1 as the conventional size can be formed, and a nanogap NG having a width W1 smaller than that of the conventional one can be formed.

  Further, in the method for manufacturing the sidewall spacer 21 according to the third embodiment of the present invention, the layered sidewall spacer forming layer 20 is formed on the stepped portion 9 formed in a predetermined region on the substrate 2 and the exposed substrate 2. After that, an insulating layer 23 (mask layer) that covers the sidewall spacer forming layer 20 is formed. Further, in this method of manufacturing the sidewall spacer 21, at least a part of the insulating layer 23 and the sidewall spacer forming layer 20 formed on the stepped portion 9 in the sidewall spacer forming layer 20 are removed by planarization. The sidewall spacer forming layer 20 is left between the stepped portion 9 and the insulating layer 23, thereby forming the sidewall spacer 21 standing between the stepped portion 9 and the insulating layer 23, and the sidewall between the substrate 2 and the insulating layer 23. By leaving the spacer forming layer 20, the lower spacer 24 is formed between the substrate 2 and the insulating layer 23.

  Thus, in the present invention, after the stepped portion 9 and the insulating layer 23 are removed and the first electrode portion 5 and the second electrode portion 6 are formed on the substrate 2 with the sidewall spacer 21 interposed therebetween using the resist layer 22. By removing the resist layer 22, the sidewall spacer 21, and the exposed lower spacer 24, a nanogap NG having a width of the sidewall spacer 21 can be formed between the first electrode portion 5 and the second electrode portion 6. Thus, in the manufacturing method of the sidewall spacer 21 according to the present invention, unlike the conventional forming method in which the electrode layer exposed from the opening of the metal mask is etched to form the groove-like nanogap on the surface of the electrode layer, The side wall spacer 21 capable of forming the nanogap NG can be manufactured without using a simple metal mask.

  Incidentally, in addition to the above-described embodiment, after the nanogap electrode 31 as shown in FIGS. 11C and 11D is formed, the first electrode portion 5 and the second electrode portion 6 are further used as a mask to be on the substrate 2. A part of the surface of the silicon oxide layer 4 may be removed, and a groove-like gap may be formed by the silicon oxide layer 4 below the nano gap NG. In such a nanogap electrode, an electric field is generated in the gap between the silicon oxide layers 4 below the nanogap NG. When the single-stranded DNA passes through the gaps in the silicon oxide layer 4, the electric fields change. Accordingly, the value of the current flowing between the first electrode unit 5 and the second electrode unit 6 can also be changed, and the base constituting the single-stranded DNA can be identified based on the change in the current value.

(7) Modification of the Third Embodiment In the third embodiment described above, the step 9 and the insulating layer 23 shown in FIGS. 10A and 10B are all removed, and the surface of the substrate 2 (oxidized) The case where the silicon layer 4) and the lower spacer 24 are exposed has been described. However, the present invention is not limited to this, and FIG. 12A and FIG. As shown in FIG. 12B in which the corresponding parts are denoted by the same reference numerals, a part of the surface of the stepped portion 9 and the insulating layer 23 is removed and left, and the stepped portion 9 is thinned, A thin film insulating layer 23c obtained by thinning the insulating layer 23 may be formed.

  Note that the final nanogap electrode manufactured in this way (described later in FIGS. 13C and 13D) is different from the nanogap electrode 31 shown in FIG. 8 between the substrate 2 and the first electrode unit 5. The thin film step portion 9c is formed in the thin film, and the thin film insulating layer 23c is formed between the lower spacer 24 and the second electrode portion 6.

  A manufacturing method according to a modification of the third embodiment will be described below. In this case, only a part of the surface of the step 9 and the insulating layer 23 (mask layer) shown in FIGS. 10A and 10B is removed, and a thin film step covering the surface of the substrate 2 as shown in FIGS. 12A and 12B. A portion 9c and a thin film insulating layer 23c covering the surface of the lower spacer 24 are formed. At this time, the surface of the stepped portion 9 and the insulating layer 23 is removed simultaneously and uniformly, so that the thin film stepped portion 9c and the thin film insulating layer 23c having the same height can be formed. Then, as shown in FIG. 12C in which the same reference numerals are assigned to the corresponding parts to FIG. 12A and FIG. 12D in which the same reference numerals are assigned to the corresponding parts in FIG. 12B, the thin film step portion 9c and the thin film insulating layer 23c A resist coating material is applied thereon and cured to form a resist layer 22.

  Thereafter, the region of the resist layer 22 where the first electrode portion 5 and the second electrode portion 6 are to be formed is removed by using a photolithography technique, and the resist layer 22 is patterned to form a portion corresponding to FIG. 12C. The thin film step 9c is exposed in the region where the first electrode portion 5 is formed, as in FIG. 12E with the same reference numeral and FIG. 12F with the same reference numeral corresponding to FIG. 12D. At the same time, the thin film insulating layer 23c is exposed in the region where the second electrode portion 6 is formed.

  Next, on the thin film step 9c exposed in the region where the first electrode portion 5 is formed, on the thin film insulating layer 23c exposed in the region where the second electrode portion 6 is formed, After a metal layer is formed on the resist layer 22 as an electrode forming mask remaining in a region other than the region where the second electrode portion 6 is formed and on the side wall spacer 21, a patterned resist layer 22 (electrode The metal layer on the resist layer 22 is removed (lift-off method) by removing the forming mask), and the corresponding parts in FIG. 13A and the corresponding parts in FIG. As shown in FIG. 13B, the first electrode portion 5 and the second electrode portion 6 are formed in which the electrode tip portions 5b and 6b are opposed to each other with the side wall spacer 21 interposed therebetween. At this time, the thin film step portion 9c and the thin film insulating layer 23c are exposed in the region from which the resist layer 22 has been removed.

  Finally, the exposed thin film step 9c and the thin film insulating layer 23c between the first electrode part 5 and the second electrode part 6, the lower spacer 24 covered with the exposed thin film insulating layer 23c, and the side wall By removing the spacer 21 by, for example, dry etching, FIG. 13C in which the same reference numerals are given to the corresponding parts to FIG. 13A and FIG. 13D in which the same reference numerals are given to the corresponding parts to FIG. 13B As described above, the nanogap electrode 31a having the nanogap NG between the electrode tip portion 5b of the first electrode portion 5 and the electrode tip portion 6b of the second electrode portion 6 can be manufactured.

  The nanogap electrode 31a formed in this way is formed on the thin film step portion 9c and the thin film insulating layer 23c because the surface heights of the thin film step portion 9c and the thin film insulating layer 23c are the same. The first electrode portion 5 and the second electrode portion 6 can be formed to have the same thickness. Incidentally, in this case, as shown in FIG. 13D, the gap G2 in which the thin film step 9c made of an insulating member is opposed to the lower spacer 24 and the thin film insulating layer 23c made of the insulating member are provided at the tip of the electrode. A gap G3 facing the portion 5b can be formed. These gaps G2 and G3 can be formed to have the same width as the nanogap NG.

  In the nanogap electrode 31a thus manufactured, the single-stranded DNA can pass through the nanogap NG between the first electrode part 5 and the second electrode part 6, and the thin film step part 9c made of an insulating member or the thin film Single-stranded DNA can also pass through the gaps G2 and G3 where the insulating layer 23c is located. In such a nanogap electrode 31a, an electric field is generated in the gap G2, G3 where the thin film step 9c and the thin film insulating layer 23c made of an insulating member are present, and the gap G2, where the thin film step 9c and the thin film insulating layer 23c are present. When the single-stranded DNA passes through G3, the electric field changes, and the current value flowing between the first electrode part 5 and the second electrode part 6 can change accordingly, and the single-stranded DNA is changed based on the change in the current value. Bases constituting DNA can be identified.

  Thus, according to the manufacturing method according to this modification, unlike the above-described third embodiment, as shown in FIGS. 12C and 12D, the thin film insulating layer left when forming the resist layer 22 is formed. Since the surface of the lower spacer 24 is covered by 23c, even if the sidewall spacer 21 is pushed by the resist coating material, the force applied to the sidewall spacer 21 can be received by the lower spacer 24 and the thin film insulating layer 23c. Accordingly, the side wall spacer 21 can be prevented from falling.

  Also, this modification can obtain the same effect as that of the above-described third embodiment, and by adjusting the film thickness of the side wall spacer 21 in the manufacturing process, the width W1 having the same dimension as the conventional one can be obtained. In addition to forming a nanogap NG, it is also possible to form a nanogap NG having a width W1 that is much smaller than the conventional one.

  Incidentally, in addition to the above-described embodiment, after the nanogap electrode 31a as shown in FIGS. 13C and 13D is formed, the first electrode portion 5 and the second electrode portion 6 are further used as a mask to be on the substrate 2. A part of the surface of the silicon oxide layer 4 may be removed, and a groove-like gap may be formed by the silicon oxide layer 4 below the nano gap NG and the gaps G2 and G3. In such a nanogap electrode, an electric field is generated in the gap between the silicon oxide layer 4 below the nanogap NG and the gaps G2 and G3, and single-stranded DNA passes through the gap in the silicon oxide layer 4. The electric field changes, and the current value flowing between the first electrode part 5 and the second electrode part 6 can change accordingly, and the bases constituting the single-stranded DNA can be identified based on the change in the current value. .

(8) Fourth Embodiment Next, a manufacturing method according to a fourth embodiment, which is different from the method of manufacturing a nanogap electrode according to the third embodiment described above, will be described below. In the fourth embodiment, as shown in FIGS. 10A and 10B, the third embodiment described above is performed until the step 9 is formed on the substrate 2 and the insulating layer 23 is formed on the lower spacer 24. The step portion 9 and the insulating layer 23 are patterned without using a resist layer, and the first electrode portion 5 and the second electrode are formed using the patterned step portion 9 and the insulating layer 23. This is different from the third embodiment in that the portion 6 is formed.

  In this case, first, a step 9 is formed on the substrate 2 (FIGS. 9A and 9B), and further, a sidewall spacer forming layer 20 and an insulating layer 23 are formed (FIGS. 9E and 9F), and then flattening such as CMP is performed. The side wall spacer 21 is erected on the substrate 2 between the stepped portion 9 and the insulating layer 23 by the conversion process (FIGS. 10A and 10B).

  Next, after forming a layered resist mask on each surface of the stepped portion 9, the side wall spacer 21 and the insulating layer 23 exposed to the outside, the same reference numerals are assigned to the corresponding portions to FIG. 10A using photolithography technology. 14A and 14B showing the cross-sectional configuration of the DD ′ portion in FIG. 14A shown in FIG. 14A, a part of the stepped portion 9 and a part of the insulating layer 23 are removed, and the patterned stepped portion 9 and An insulating layer 23 (electrode formation mask) is formed. The patterns of the portions where the step 9 and the insulating layer 23 are removed correspond to the outer shapes of the first electrode portion 5 and the second electrode portion 6 shown in FIG. 8, respectively, as shown in FIGS. 14A and 14B. That is, the surface of the substrate 2 (silicon oxide layer 4) is exposed by removing the step portion 9 in the region where the first electrode portion 5 is formed, and the region where the second electrode portion 6 is formed is insulated. By removing the layer 23, the lower spacer 24 is exposed.

  Next, on the silicon oxide layer 4 exposed in the region where the first electrode portion 5 is formed, on the lower spacer 24 exposed in the region where the second electrode portion 6 is formed, and on the first electrode portion 5 and the first After a metal layer is formed on the stepped portion 9 and the insulating layer 23 remaining on the region other than the region where the two-electrode portion 6 is formed, and on the sidewall spacer 21, a planarization process such as CMP is performed. Then, all the surfaces of the remaining stepped portion 9, the remaining insulating layer 23, and the sidewall spacer 21 are exposed. Accordingly, as shown in FIG. 14C in which the same reference numerals are assigned to the corresponding parts to FIG. 14A and FIG. 14D in which the same reference numerals are assigned to the corresponding parts in FIG. 14B, the patterned step 9 and the insulating layer The metal layer in the region of 23 (electrode forming mask) is removed, so that the stepped portion 9 and the insulating layer 23 are exposed, and the metal layer in the region of the sidewall spacer 21 is removed and the sidewall spacer is removed. 21 is exposed, and the first electrode portion 5 and the second electrode portion 6 are formed on the substrate 2 in which the electrode tip portions 5b and 6b are arranged to face each other with the side wall spacer 21 in between.

  Next, the stepped portion 9 and the insulating layer 23 exposed to the outside were removed by etching, and there was a stepped portion 9 between the first electrode portion 5 and the side wall spacer 21 as shown in FIGS. 11A and 11B. The silicon oxide layer 4 is exposed in the region, and the lower spacer 24 is exposed in the region where the insulating layer 23 between the second electrode portion 6 and the sidewall spacer 21 is present. Finally, the sidewall spacer 21 and the exposed portion are exposed by dry etching, for example. By removing the lower spacer 24, as shown in FIG. 14E in which the same reference numerals are given to the corresponding parts to FIG. 11C, and in FIG. 14F in which the same reference numerals are given to the corresponding parts in FIG. A nanogap NG having the same width W1 as the width W1 of 21 can be formed between the electrode tip portions 5b and 6b, and a nanogap electrode 31 as shown in FIG. 8 can be manufactured.

  As described above, in the method of manufacturing the nanogap electrode 31 according to the fourth embodiment, the sidewall spacer forming layer is formed on the stepped portion 9 formed in a predetermined region on the substrate 2 and on the exposed substrate 2. After forming 20, an insulating layer 23 covering the sidewall spacer forming layer 20 is formed. In this manufacturing method, a part of the insulating layer 23 and the side wall spacer forming layer 20 formed on the stepped portion 9 in the side wall spacer forming layer 20 are at least removed by the planarization process, and the stepped portion 9 is removed. The sidewall spacer forming layer 20 is left between the insulating layer 23 and the sidewall spacer forming layer 20 between the stepped portion 9 and the insulating layer 23, and the sidewall spacer forming layer 20 is left between the substrate 2 and the insulating layer 23. Thus, the lower spacer 24 extending in the surface direction of the substrate 2 is formed between the substrate 2 and the insulating layer 23.

  Next, the step portion 9 and the insulating layer 23 are patterned, and the first step portion 5 and the second electrode portion that are arranged to face each other with the side wall spacer 21 interposed therebetween using the patterned step portion 9 and the insulating layer 23 as an electrode forming mask. 6 is formed on the substrate 2. Finally, after removing the remaining stepped portion 9 and the insulating layer 23, the lower spacer 24 and the side wall spacer 21 in the region covered with the insulating layer 23 are removed, and the substrate 2 and the second electrode portion 6 are separated. Only the lower spacer 24 is left, and a nanogap NG having the same width W1 as the width of the side wall spacer 21 is formed between the pair of the second electrode portion 6 and the lower spacer 24 and the first electrode portion 5.

  As described above, in the method of manufacturing the nanogap electrode 31 according to the fourth embodiment of the present invention, the film thickness of the sidewall spacer 21 is adjusted as in the first, second, and third embodiments described above. Thus, a nanogap NG having a desired width W1 can be formed, and the film thickness of the side wall spacer 21 can be formed extremely thin, so that the width W1 of the side wall spacer 21 is extremely small. Nanogap NG can also be formed.

  According to the above configuration, in this manufacturing method, the lower spacer 24 extending in the surface direction of the substrate 2 and the side wall spacer 21 standing at the end of the lower spacer 24 are formed on the substrate 2 and then patterned. A first electrode portion 5 is formed on the substrate 2 using the step portion 9 and the insulating layer 23, and a second electrode is formed on the lower spacer 24 so as to be opposed to the first electrode portion 5 with the side wall spacer 21 interposed therebetween. Part 6 is formed. Next, after removing the patterned step portion 9 and the insulating layer 23, the exposed lower spacer 24 is removed, leaving the lower spacer 24 only between the substrate 2 and the second electrode portion 6, and the side wall spacer 21. The nanogap NG having a width W1 adjusted by the thickness of the sidewall spacer 21 is formed between the first electrode part 5 and the second electrode part 6 and between the first electrode part 5 and the lower spacer 24. By adjusting the film thickness of the sidewall spacer 21, it is possible to form a nanogap NG with the same width W1 as the conventional size, and also to form a nanogap NG with a width W1 smaller than before Can do.

  Incidentally, in addition to the above-described embodiment, after the nanogap electrode 31 as shown in FIGS. 14E and 14F is formed, the first electrode portion 5 and the second electrode portion 6 are further used as a mask to be on the substrate 2. A part of the surface of the silicon oxide layer 4 may be removed, and a groove-like gap may be formed by the silicon oxide layer 4 below the nano gap NG. In such a nanogap electrode, an electric field is generated in the gap between the silicon oxide layers 4 below the nanogap NG. When the single-stranded DNA passes through the gaps in the silicon oxide layer 4, the electric fields change. Accordingly, the value of the current flowing between the first electrode unit 5 and the second electrode unit 6 can also be changed, and the base constituting the single-stranded DNA can be identified based on the change in the current value.

(9) Modification of Side Wall Spacer In the side wall spacer manufacturing method described above, as shown in FIGS. 3A, 5C, 7A, and 10A, for example, the electrode tip portion 5b of the first electrode portion 5 and the second Although the case where the side wall spacers 11 and 21 sandwiched between the electrode tip portions 6b of the electrode portion 6 are linearly extended on the substrate 2 has been described, the present invention is not limited to this, for example, the first electrode portion 5 A side wall spacer sandwiched between the electrode tip 5b and the electrode tip 6b of the second electrode 6 extends on the substrate 2 in a different direction from one direction extending between the electrode tips 5b and 6b. One or a plurality of bent portions may be provided.

  In this way, in the side wall spacer, a curved portion is formed in part, and even if an external force is applied, the external force can be received by the curved portion and the side wall spacer can be supported, so that the side wall spacer can be stabilized on the substrate. It can continue to stand and can prevent the sidewall spacer from falling.

  For example, as the side wall spacer having such a curved portion, when viewed in plan (the substrate 2 is viewed vertically from the z direction (FIG. 1)), a crank type side wall spacer, a U-shaped side wall spacer, It can be an L-shaped sidewall spacer. Here, FIG. 15A shows an example of a side wall spacer 40a having a crank shape when seen in a plan view. FIG. 15B shows an example of a sidewall spacer 40b having a U-shape when viewed in plan. FIG. 15C shows an example of a side wall spacer 40c having an L shape when viewed in plan. Each of the side wall spacers 40a, 40b, and 40c shown in FIGS. 15A, 15B, and 15C can have a structure having a plurality of curved portions 11a when viewed in plan.

  In this case, as shown in FIGS. 15A, 15B and 15C, the stepped portion 9 formed on the substrate 2 is patterned into a desired shape so that the side wall 9a of the stepped portion 9 is cranked when viewed in plan. A side wall spacer having a curved portion 11a corresponding to the shape of the side wall 9a by forming a side wall spacer 40a, 40b, 40c along the side wall 9a. 40a, 40b, 40c can be formed. In the case of this embodiment, sidewall spacers 40a, 40b, 40c sandwiched between the electrode tip portion 5b of the first electrode portion 5 and the electrode tip portion 6b of the second electrode portion 6 among the plurality of curved portions 11a. Side wall spacers 40a, 40b, and 40c on the substrate 2 even when applying a resist coating material by providing a curved portion 11a that bends at right angles to one direction extending between the electrode tip portions 5b and 6b on the substrate 2. It can be kept stable and standing.

  In addition, after forming the side wall spacers 40a, 40b, and 40c having the curved portion 11a, for example, the steps shown in FIGS. 3A to 4D of the first embodiment described above and FIGS. 5A to 5A of the second embodiment. The nanogap electrode 1 can be manufactured by a process similar to the process shown in FIG. 6F. Incidentally, if the side wall spacers 40a, 40b, 40c having the curved portion 11a and the base portion 5a of the first electrode portion 5 and the base portion 6a of the second electrode portion 6 are patterned so as not to overlap, the side wall spacers 40a, Even if 40b and 40c have the curved part 11a, the formation process of the 1st electrode part 5 and the 2nd electrode part 6 is not affected.

  The shape of the side wall spacers 40a, 40b, and 40c having the curved portion 11a is not limited to that shown in FIGS. 15A, 15B, and 15C, and the electrode tip portion 5b of the first electrode portion 5 and the second electrode The side wall spacer sandwiched between the electrode tip portion 6b of the portion 6 may be provided with a curved portion that is bent so as to extend in the other direction different from the one direction extending between the electrode tip portions 5b and 6b on the substrate 2, When viewed from above, for example, the spacer may have an E-shaped, F-shaped, U-shaped, T-shaped, Y-shaped, or curved portion such as a shape or a curved portion having various shapes. Also according to this modification, the thickness of the sidewall spacer can be selected according to the desired width of the nanogap NG, as in the first and second embodiments described above.

  Also, this modification can obtain the same effect as the above-described embodiment, and by adjusting the film thickness of the side wall spacers 40a, 40b, and 40c in the manufacturing process, the width W1 having the same dimensions as the conventional one can be obtained. In addition to forming a nanogap NG, it is possible to form a nanogap NG having a width W1 that is much smaller than the conventional one.

(10) Other Embodiments The present invention is not limited to the present embodiment, and various modifications can be made within the scope of the gist of the present invention. For example, the first electrode unit 5 Various members may be applied to the second electrode portion 6, the substrate 2, the side wall spacers 11, 21 and the like. Further, the first electrode portion 5 and the second electrode portion 6 may have various shapes.

  Furthermore, in the first and second embodiments described above, single-stranded DNA is passed through the nanogap NG between the first electrode unit 5 and the second electrode unit 6, and the base of the single-stranded DNA is the first. The nanogap electrode 1 that measures the current value flowing between the first electrode part 5 and the second electrode part 6 with an ammeter when passing through the nanogap NG between the first electrode part 5 and the second electrode part 6 has been described. However, the present invention is not limited to this, and the nanogap electrode may be applied to various other uses.

  Furthermore, in the third and fourth embodiments described above, the single-stranded DNA is passed through the nanogap NG between the first electrode portion 5 and the pair of the second electrode portion 6 and the lower spacer 24, When the base of the single-stranded DNA passes through the nanogap NG, the current value flowing between the first electrode portion 5 and the pair of the second electrode portion 6 and the lower spacer 24 is measured with an ammeter. Although the gap electrode 31 has been described, the present invention is not limited to this, and the nanogap electrode may be applied to various other uses.

  In the first and second embodiments described above, the case where the side wall spacer 11 formed gradually wider from the apex toward the substrate 2 has been described. However, the present invention is not limited to this. For example, By changing the film formation conditions (temperature, pressure, gas used, flow rate ratio, etc.), the side wall spacer formation layer is formed by changing the film thickness depending on the location without forming the film conformally. Alternatively, a sidewall spacer that is gradually narrowed, or a sidewall spacer in which the width of various other portions such as the intermediate portion between the apex and the substrate becomes the maximum width may be applied.

  In the first to fourth embodiments described above, the case where the substrate 2 made of the silicon oxide layer 4 and the silicon substrate 4 without the electrode forming layer is described, but the present invention is not limited to this. As shown in FIG. 16, a pair of electrode forming layers 50 and 51 are embedded and formed on the surface of the substrate 2 with a predetermined interval, and the side wall spacer 11 is formed on the substrate 2 between the electrode forming layers 50 and 51. After that, the electrode forming layers 50 and 51 are grown until they protrude from the surface of the substrate 2 and come into contact with the side wall spacer 11, and the first electrode portion 5 and the second electrode portion 6 arranged opposite to each other with the side wall spacer 11 interposed therebetween. You may make it form. In this case, as the formation of the first electrode portion and the second electrode portion by the electrode formation layers 50 and 51, the electrode formation layers 50 and 51 made of TiN are grown by the CVD method, or the electrode formation layers 50 and 51 made of nickel are made. By growing 51 by plating or the like, it is possible to form the first electrode portion 5 and the second electrode portion 6 that are arranged to face each other with the side wall spacer 11 interposed therebetween.

  At this time, the manufacturing methods described in the above embodiments may be appropriately combined. For example, on the substrate 2 in which the electrode forming layers 50 and 51 are embedded in the surface, as shown in FIGS. 2 to 3, sidewall spacers 11 are erected along the side surface of the stepped portion 9 by etch back. Alternatively, as shown in FIG. 5, the step portion 9 and the side wall spacer 11 are polished by CMP in addition to the insulating layer 23, and the side wall spacer 11 is erected between the step portion 9 and the insulating layer 23. In this case, the side wall spacer 11 may have a curved portion as described above.

  Further, here, a pair of spaced electrode formation layers 50, 51 are embedded in the surface of the substrate 2, and the sidewall spacer 11 is formed on the surface of the substrate 2 between the pair of electrode formation layers 50, 51. By growing the pair of electrode forming layers 50 and 51 exposed from the surface of the substrate 2 until they abut against the side wall spacer 11, the first electrode portion 5 and the second electrode portion 6 arranged to face each other with the side wall spacer 11 interposed therebetween are formed. However, the present invention is not limited to this, and for example, a pair of spaced electrode forming layers is formed in advance on the surface of the substrate, and is formed on the surface of the substrate between the pair of electrode forming layers. After the sidewall spacers are formed, a pair of electrode forming layers exposed from the substrate surface are grown until they are in contact with the sidewall spacers, thereby forming a first electrode portion and a second electrode portion that are arranged to face each other with the sidewall spacer interposed therebetween. You may make it do.

  Incidentally, in the present invention, the first electrode portion and the second electrode portion may be formed by growing a metal member different from the electrode forming layers 50 and 51 on the electrode forming layers 50 and 51. As another embodiment, a different kind of metal member different from the first electrode part and the second electrode part is further grown on the first electrode part and the second electrode part by, for example, gold plating, You may make it form the 1st electrode part and the 2nd electrode part which have the electrode area | region which consists of members.

  In any of the embodiments, as in the first embodiment described above, before removing the side wall spacer, a metal member of a type different from the first electrode portion and the second electrode portion is used. It is good also as a 1st electrode part and a 2nd electrode part which grew on the 1st electrode part and the 2nd electrode part, and have the electrode area | region which consists of a different metal from a lower layer in an upper layer.

  For example, when a side wall spacer is formed at the end of the lower spacer and the side wall spacer is erected on the substrate, one electrode forming layer is formed on the substrate and another electrode forming layer is formed on the lower spacer. After that, the electrode forming layer provided with the side wall spacer interposed is grown until it abuts on the side wall spacer to form the first electrode portion and the second electrode portion arranged to face each other with the side wall spacer interposed therebetween. .

  Furthermore, in any of the embodiments, the first electrode portion and the second electrode that are initially formed of a predetermined metal member such as Ni, for example, before removing the sidewall spacer, as in the first embodiment described above. The part may be a first electrode part and a second electrode part that are replaced with gold or the like, which is a different metal member different from Ni or the like, by a gold plating method.

(11) Microstructure Incidentally, in the above-described embodiment, the first electrode portion and the second electrode portion are formed by using the conductive member functioning as an electrode to form the first electrode portion and the second electrode portion. The nanogap electrode having the nanogap having the width of the side wall spacer is described. However, the present invention is not limited to this, and other various members such as an insulating member other than the conductive member can be used. It is good also as a microstructure which forms the 2nd processing part and has the hollow gap which becomes the width of the side wall spacer between the 1st processing part and the 2nd processing part.

  In this case, the sidewall spacer of the present invention described above is formed between the first processed portion and the second processed portion by removing the sidewall spacer after forming the first processed portion and the second processed portion with the sidewall spacer interposed therebetween. In addition, a hollow gap having a width of the side wall spacer can be formed, and thus a microstructure having a hollow gap between the first processed portion and the second processed portion can be manufactured.

  In addition, in such a microstructure, in each of the embodiments described above, the “first electrode portion” is replaced with the “first processing portion”, and the “second electrode portion” is replaced with the “second processing portion”. Thus, the above-mentioned “nano-gap electrode” can be a “microstructure”. Accordingly, detailed description of the microstructure is omitted here, but the outline of the microstructure corresponding to each of the above-described embodiments is as follows.

(11-1) Microstructure corresponding to the above-described first embodiment As an example of a manufacturing method of such a micro-structure, first, as in the above-described first embodiment, first, the substrate After the side wall spacer is erected on the top, the patterned first resist layer and the second side spacer are formed using the patterned resist layer so as to face each other with the side wall spacer interposed therebetween, and then the resist layer and the side wall spacer are removed. Thus, a gap having a width adjusted by the thickness of the sidewall spacer is formed between the first processed portion and the second processed portion. Thus, the microstructure can form a gap having the same width as the width of the side wall spacer between the first processed portion and the second processed portion by removing the side wall spacer, so that the thickness of the side wall spacer is adjusted. By doing so, a hollow gap having a desired width can be formed.

  In addition, since such a side wall spacer can be formed to be extremely thin, a hollow gap made of a very small nanoscale (for example, 1000 [nm] or less) corresponding to the width of the side wall spacer is provided in the first processed portion. And between the second processed parts. As a result, the microstructure can adjust the film thickness of the side wall spacer so that the width of the gap between the first processed portion and the second processed portion is, for example, 5 to 30 [nm], and further according to the usage mode. It can be formed to 2 [nm] or less, or 1 [nm] or less.

(11-2) Microstructure corresponding to the above-described second embodiment Further, the manufacturing method described in the above-described second embodiment also allows the first processed portion and the second processed portion to be A microstructure having a gap having the same width as that of the side wall spacer can be produced. In this case, after the side wall spacer is erected on the substrate, the first processed portion and the second processed portion that are arranged to face each other with the side wall spacer interposed therebetween are formed using the patterned stepped portion and the mask layer. The sidewall spacer, the patterned stepped portion and the mask layer are removed, and a hollow gap having a width adjusted by the thickness of the sidewall spacer is formed between the first processed portion and the second processed portion. Can do.

(11-3) Microstructure corresponding to the above-described third and fourth embodiments In addition, the microstructure is manufactured as described in the above-described third and fourth embodiments of the present invention. It can also be manufactured by a method. In this case, unlike the microstructure described above, the microstructure is different in configuration in that a lower spacer is formed as a lower layer of the second processed portion, and between the first processed portion and the lower spacer, A hollow gap having the same width as that of the side wall spacer can be formed between the processed portion and the second processed portion.

1,1a, 31,31a Nano gap electrode
2 Board
3 Silicon substrate
4 Silicon oxide layer
5 First electrode
6 Second electrode section
5a, 6a Base part
5b, 6b Electrode tip
9 Step
9a Side wall
10,20 Side wall spacer formation layer
11,21,40a, 40b, 40c Side wall spacer
11a Music part
12,22 resist layer
13,23 Insulating layer
24 Lower spacer
24a Base part
24b Electrode tip
50,51 Electrode forming layer
NG nano gap

Claims (19)

Erecting sidewall spacers on the substrate;
Forming a first electrode portion and a second electrode portion arranged opposite to each other with the side wall spacer interposed therebetween;
Removing the sidewall spacer, and forming a nanogap having a width adjusted by the thickness of the sidewall spacer between the first electrode portion and the second electrode portion. Method. Standing up the side wall spacer on the substrate,
2. The nanostructure according to claim 1, further comprising: forming the sidewall spacer on the sidewall of the stepped portion formed on the substrate; then removing the stepped portion and standing the sidewall spacer on the substrate. A method for manufacturing a gap electrode. Standing up the side wall spacer on the substrate,
Forming the sidewall spacer on the sidewall of the stepped portion formed on the substrate, and then forming a mask layer that covers the stepped portion, the sidewall spacer, and the exposed substrate;
And exposing each surface of the stepped portion, the sidewall spacer and the mask layer by a planarization process, and standing the sidewall spacer on the substrate between the stepped portion and the mask layer. ,
Forming the first electrode portion and the second electrode portion opposed to each other with the sidewall spacer interposed therebetween,
2. The method includes: patterning the stepped portion and the mask layer, and forming the first electrode portion and the second electrode portion using the patterned stepped portion and the mask layer as an electrode forming mask. The manufacturing method of the nano gap electrode of description. The method for producing a nanogap electrode according to claim 2 or 3, wherein the sidewall spacer formed on the sidewall of the stepped portion is formed by etching back a layered sidewall spacer forming layer. The sidewall spacer is
A curved portion that extends in one direction between the electrode tip of the first electrode portion and the electrode tip of the second electrode portion and bends the sidewall spacer in a different direction different from the one direction. It has, The manufacturing method of the nano gap electrode of any one of Claims 1-4. Standing up the side wall spacer on the substrate,
Forming a pair of spaced apart electrode forming layers on the surface of the substrate,
Forming the first electrode portion and the second electrode portion opposed to each other with the sidewall spacer interposed therebetween,
The electrode forming layer is grown until it protrudes from the surface of the substrate and comes into contact with the side wall spacer, thereby forming the first electrode portion and the second electrode portion arranged to face each other with the side wall spacer interposed therebetween. The manufacturing method of the nano gap electrode of any one of Claims 1-5 included. The nanogap according to claim 6, wherein a different kind of metal member different from the metal member on which the electrode forming layer is formed is grown on the electrode forming layer to form the first electrode portion and the second electrode portion. Electrode manufacturing method. Forming integrally on the substrate a lower spacer substantially parallel to the surface of the substrate and a sidewall spacer substantially perpendicular to the surface of the substrate at the end of the lower spacer;
Forming a first electrode portion on the substrate, and forming a second electrode portion on the lower spacer so as to face the first electrode portion with the sidewall spacer interposed therebetween;
A part of the lower spacer is removed to leave the lower spacer only between the substrate and the second electrode part, and the side wall spacer is removed, between the first electrode part and the second electrode part, and Forming a nanogap having a width adjusted by the film thickness of the side wall spacer between the first electrode portion and the lower spacer. Standing the side wall spacer on the substrate,
Forming a layered sidewall spacer forming layer covering the stepped portion formed on the substrate and the exposed substrate, and then forming a mask layer covering the sidewall spacer forming layer;
By planarization, at least a part of the mask layer and the sidewall spacer forming layer formed on the stepped portion of the sidewall spacer forming layer are removed, and the sidewall is formed between the stepped portion and the mask layer. By leaving the spacer formation layer, the sidewall spacer is formed between the stepped portion and the mask layer, and by leaving the sidewall spacer formation layer between the substrate and the mask layer, between the substrate and the mask layer. Forming the lower spacer;
And removing the stepped portion and the mask layer while leaving all or a part of the film thickness, and standing the sidewall spacer integrally formed on the end of the lower spacer on the substrate. 9. The method for producing a nanogap electrode according to 8. Standing the side wall spacer on the substrate,
Forming a layered sidewall spacer forming layer on the stepped portion formed on the substrate and the exposed substrate, and then forming a mask layer covering the sidewall spacer forming layer;
By planarization, at least a part of the mask layer and the sidewall spacer forming layer formed on the stepped portion of the sidewall spacer forming layer are removed, and the sidewall is formed between the stepped portion and the mask layer. By leaving the spacer formation layer, the sidewall spacer is formed between the stepped portion and the mask layer, and by leaving the sidewall spacer formation layer between the substrate and the mask layer, between the substrate and the mask layer. Forming the lower spacer,
Forming the first electrode portion on the substrate and forming the second electrode portion on the lower spacer so as to be opposed to the first electrode portion with the side wall spacer interposed therebetween,
9. The method includes patterning the stepped portion and the mask layer, and forming the first electrode portion and the second electrode portion using the patterned stepped portion and the mask layer as an electrode forming mask. The manufacturing method of the nano gap electrode of description. The method for manufacturing a nanogap electrode according to claim 8 or 9, wherein the sidewall spacer and the lower spacer are formed of a conductive member. Standing the side wall spacer on the substrate,
Forming one electrode forming layer on the substrate and forming another electrode forming layer on the lower spacer,
Forming the first electrode portion on the substrate and forming the second electrode portion on the lower spacer so as to be opposed to the first electrode portion with the side wall spacer interposed therebetween,
Each of the electrode forming layers is grown until it abuts against the side wall spacer, and the first electrode portion and the second electrode portion that are arranged to face each other with the side wall spacer interposed therebetween are formed. The manufacturing method of the nano gap of any one of these. The width | variety of the said nano gap is 2 [nm] or less, The manufacturing method of the nano gap electrode of any one of Claims 1-12. The said 1st electrode part and the said 2nd electrode part are formed by converting into the dissimilar metal member of a kind different from the said metal member, after being formed with a metal member. A method for producing a nanogap electrode according to claim 1. A side wall spacer having a thickness of 1000 nm or less and standing in a wall shape with respect to the substrate. The sidewall spacer according to claim 15, wherein the sidewall spacer is erected at an end of a lower spacer formed along the surface of the substrate. A method of manufacturing a side wall spacer, comprising: forming a side wall spacer on a side wall of a stepped portion formed on a substrate; then removing the stepped portion and standing the side wall spacer on the substrate. Forming a side wall spacer on the side wall of the stepped portion formed on the substrate, and then forming a mask layer covering the stepped portion, the side wall spacer, and the exposed substrate;
And exposing each surface of the stepped portion, the side wall spacer, and the mask layer by a planarization process, and standing the side wall spacer on the substrate between the stepped portion and the mask layer. Manufacturing method of sidewall spacer. Forming a layered sidewall spacer formation layer on the stepped portion formed on the substrate and the exposed substrate, and then forming a mask layer covering the sidewall spacer formation layer;
By planarization, at least a part of the mask layer and the sidewall spacer forming layer formed on the stepped portion of the sidewall spacer forming layer are removed, and the sidewall is formed between the stepped portion and the mask layer. By leaving the spacer forming layer, a side wall spacer standing on the substrate is formed between the stepped portion and the mask layer, and the side wall spacer forming layer is also left between the substrate and the mask layer. Forming a lower spacer between the substrate and the mask layer.

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