JP2017049743A - Power supply board and system - Google Patents

Abstract

PROBLEM TO BE SOLVED: To suppress increases in power supply design cost and mounting cost of a power supply circuit by providing a common power supply board which can be connected to a plurality of kinds of system boards having different power supply specifications and can supply a plurality of power supplies with a proper specification to the connected system boards.SOLUTION: A power supply board 2 has power supply circuits 20X, 20Y, and 20Z which can supply a plurality of power supplies. The power supply board includes power supply terminals 21X, 21Y, and 21Z to which a plurality of kinds of system boards can be connected, and power supply specification setting terminals 22X, 22Y, and 22Z. The specification of power supply supplied from the power supply terminals to the connected system board 1A is stipulated by a power supply specification setting circuit 6 connected to the power supply specification setting terminals.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a power supply board and system, and in particular, can be suitably used for a power supply board common to a plurality of types of FPGA-mounted boards having different power supply specifications and a system constituted by these boards.

  An FPGA (Field Programmable Gate Array) is an extremely important component in constructing a prototype system. It is necessary to supply various power supplies to the FPGA, and a power supply circuit for supplying these various power supplies is mounted on the board on which the FPGA is mounted.

  On the other hand, Patent Document 1 discloses a DC / DC converter that generates a plurality of output voltages from a single input voltage source separately from a load circuit mounted board in order to supply a plurality of types of power supply voltages to a load circuit on the board. An electronic device that is formed on the board and supplies power to the load circuit mounted board via a motherboard or the like is disclosed. For example, in an electronic device such as an on-board processing unit, a large number of signal processing digital signal processors (DSPs) are mounted on a board serving as a circuit board, but each DSP requires it. The power supply voltage specifications are different.

JP 2007-60882 A

  As a result of examination of the patent document 1 by the present inventors, it has been found that there are the following new problems.

  Many variations are often prepared for an FPGA-mounted board for configuring a prototype system. It is necessary to supply a plurality of power sources such as a core power source, an I / O power source, and an auxiliary power source to the FPGA, and the voltage, current capacity, turn-on order, shut-off order, etc. of these power sources are defined as specifications. As a result, the board on which the FPGA is mounted is required to have various power specifications depending on the installed FPGA. Therefore, different power supply specifications are required for each FPGA-mounted board having many variations.

  When a power supply circuit is mounted on such an FPGA mounting board, it is necessary to individually design the power supply circuit on each FPGA mounting board. For this reason, there exists a subject that the design cost of a power supply circuit is large. As described in Patent Document 1, even when the power supply circuit is separated into different boards, each of the separated power supply boards is individually adapted to the corresponding FPGA mounted board. It is necessary to design the power supply circuit and mount each separately. Therefore, the power supply design cost and the power supply circuit mounting cost are separately required.

  Such a problem is not limited to an FPGA-mounted board, but is a problem that exists in common with a plurality of types of system boards having different power supply specifications.

  Means for solving such problems will be described below, but other problems and novel features will become apparent from the description of the present specification and the accompanying drawings.

  According to one embodiment, it is as follows.

  In other words, a power supply board having a power supply circuit capable of supplying a plurality of power supplies, including a power supply terminal capable of connecting a plurality of types of system boards and a power specification setting terminal, and supplying power to the connected system boards The specification of the power supplied from the terminal is defined by the power specification setting circuit connected to the power specification setting terminal.

  The effect obtained by the one embodiment will be briefly described as follows.

  In other words, it is possible to provide a common power supply board that can supply multiple power supplies with appropriate specifications to multiple types of system boards with different power supply specifications, and increase in power supply design cost and power supply circuit mounting cost. Can be suppressed.

FIG. 1 is a block diagram schematically illustrating a configuration example of an integrated system including a system board, a power supply board, and a power supply specification setting circuit. FIG. 2 is a circuit diagram schematically showing a configuration example of a power supply specification setting circuit (supply voltage adjustment board) when a power supply IC (Integrated Circuit) is mounted on the power supply board. FIG. 3 is a circuit diagram schematically showing a configuration example of a power specification setting circuit (power activation adjustment board) when the power supply order adjustment IC is mounted on the power supply board. FIG. 4 is a block diagram schematically illustrating a configuration example of an integrated system including a system board, a power supply board, and a supply voltage adjustment board. FIG. 5 is a block diagram schematically illustrating a configuration example of an integrated system including a system board on which a supply voltage adjustment circuit is mounted and a power supply board. FIG. 6 is a block diagram schematically illustrating a configuration example of an integrated system including a system board, a power supply board, and a power supply start adjustment board. FIG. 7 is a block diagram schematically illustrating a configuration example of an integrated system including a system board on which a power activation adjustment circuit is mounted and a power board. FIG. 8 is a block diagram schematically illustrating a configuration example of an integrated system including a system board, a power supply board, and a power supply specification setting board on which a supply voltage adjustment circuit and a power supply start adjustment circuit are mounted. FIG. 9 is a block diagram schematically illustrating a configuration example of a system board on which a supply voltage adjustment circuit and a power supply startup adjustment circuit are mounted and an integrated system using the power supply board. FIG. 10 is an explanatory diagram schematically illustrating an example of a power connector and the power wiring in an integrated system including a system board, a power board, and a supply voltage adjustment board. FIG. 11 is an explanatory diagram schematically showing another example of a power connector and power wiring in an integrated system using a system board, a power board, and a supply voltage adjustment board.

  Embodiments will be described in detail. Note that components having the same function are denoted by the same reference symbols throughout the drawings for describing the embodiments for carrying out the invention, and the repetitive description thereof will be omitted.

Embodiment 1
FIG. 1 is a block diagram schematically illustrating a configuration example of the entire integrated system 1000 according to the first embodiment. The integrated system 1000 includes a system board 1A, a power supply board 2, and a power supply specification setting circuit 6.

  The system board 1A is one of a plurality of types of system boards, and a system 100A including a plurality of power areas (Power Area B, C, D) 10B, 10C, 10D is mounted. The system board 1A includes power terminals 11B, 11C, and 11D for supplying power to the power areas 10B, 10C, and 10D, respectively. The system 100A is not particularly limited, but is, for example, an FPGA, and the plurality of power supply areas 10B, 10C, and 10D are, for example, internal circuit areas that operate when supplied with core power, and interfaces that operate when supplied with I / O power A circuit area is an analog circuit area to which analog power is supplied. The system 100A does not need to be an FPGA, but may be another system LSI (Large Scale Integrated circuit), or a system using semiconductor modules or discrete components, and includes various power supply regions 10B, 10C, and 10D. You may do it. At this time, an LSI such as an FPGA, a semiconductor module, and a circuit using discrete components may be mixed.

  The power supply board 2 includes a power supply circuit 20 and includes power supply terminals 21X, 21Y, and 21Z corresponding to the power supply terminals 11B, 11C, and 11D. The power supply circuit 20 includes, for example, power ICs 20X, 20Y, and 20Z for supplying power to the power supply regions 10B, 10C, and 10D of the system 100A. The power supply ICs (20X, 20Y, and 20Z) are not particularly limited, but are, for example, DC-DC converter ICs that generate and output a power supply of a predetermined voltage from the commonly supplied power supply VCC, or the power supply VCC Series regulator IC that steps down the voltage and stabilizes.

  The power supply board 2 further includes power supply specification setting terminals 22X, 22Y, and 22Z to which the power supply specification setting circuit 6 is connected. The power supply specification setting circuit 6 is equipped with a circuit that is connected to the power supply specification setting terminals 22X, 22Y, and 22Z and that defines the specifications of a plurality of power supplies generated by the power supply circuit 20. Here, the specification of the power supply may include a startup sequence, a cutoff sequence, stability, a noise level, and the like in addition to voltage and current. Although details will be described later, for example, when the power supply specification defined by the power supply specification setting circuit 6 is a voltage, the power supply specification setting circuit 6 includes a voltage adjustment circuit 31A or 31K (not shown). 6 is a start-up sequence, the power-supply specification setting circuit 6 includes a start adjustment circuit 42A or 42K and an enable signal connection circuit 41A or 41K (not shown). In order to define both the power supply voltage and the startup sequence, the power supply specification setting circuit 6 includes a voltage adjustment circuit 31A or 31K (not shown), a startup adjustment circuit 42A or 42K (not shown), and an enable signal connection circuit 41A or 41K (not shown) may be included. On the other hand, the power supply specification setting circuit 6 may be another circuit for defining / adjusting another power supply specification.

  As a result, it is possible to provide a common power supply board 2 that can supply a plurality of types of system boards having different power supply specifications and a plurality of power supplies with appropriate specifications to the connected system boards (1A, etc.). Thus, an increase in power supply design cost and power supply circuit mounting cost can be suppressed. The specification of the power supply used in the system board 1A is defined by the power supply specification setting circuit 6 connected to the power supply board 2.

  Further specific embodiments will be described.

  FIG. 2 is a circuit diagram schematically showing a configuration example of a power supply specification setting circuit when a power supply IC is mounted on the power supply board 2. A plurality of power supply ICs may be mounted according to the number of power supplies to be supplied, but FIG. 2 shows only one of them as a representative. As described above, the power supply IC (20X) is, for example, a DC-DC converter IC, and generates a power supply of a predetermined voltage from the supplied power supply VCC and outputs it to the power supply terminal 21X. The power supply IC (20 </ b> X) has a terminal for adjusting the output voltage. The power supply voltage setting terminal 22 </ b> X which is a kind of power supply specification setting terminal of the power supply board 2 and the corresponding power supply voltage of the power supply specification setting circuit 6. The output voltage setting resistor 30B is connected via the setting terminal 32X. The output voltage setting resistor 30B is a part of the power supply specification setting circuit 6 described above.

  The power supply specification setting circuit 6 is mounted on a supply voltage adjustment board 3A described later, or may be mounted on a supply voltage adjustment board 3K corresponding to another system board 1K, or may be mounted on the system board itself. Also good. When an appropriate power supply specification setting circuit 6 is associated with each system board (1A, etc.) mounted on the supply voltage adjustment board 3A and the connected system board (1A, etc.) is replaced, the power supply specification setting circuit 6 is also added. By exchanging with the corresponding one, readjustment of the power supply specification circuit accompanying the exchange can be eliminated. On the other hand, by mounting the power supply specification setting circuit 6 not on the supply voltage adjustment board but on the corresponding system board, the risk of confusion associated with replacement can be eliminated. These embodiments will be described in detail later.

  The output voltage setting resistor 30B is preferably configured by connecting in series a variable resistor Radj whose resistance value is adjustable and a fixed resistor Rfix whose resistance value is fixed.

  As a result, the adjustable range of the power supply voltage used in the system board (1A, etc.) is appropriately set, and an inappropriate power supply voltage exceeding the rating, for example, is erroneously supplied to the system board (1A, etc.). Risk is reduced. For example, the minimum voltage of the power supply supplied by the resistance value of the fixed resistor Rfix is defined, and the maximum voltage is defined by the combined resistance of the fixed resistor Rfix and the maximum resistance value of the variable resistor Radj. By setting the maximum voltage and the minimum voltage within the rated range, the risk that an unrated power supply voltage is applied to the system board can be reduced. Also, the sensitivity of adjustment by the variable resistor Radj is kept low, and the power supply voltage can be adjusted precisely. If the variable resistor Radj is a component that requires a plurality of turns to change from the minimum value to the maximum value of the variable range, the power supply voltage adjustment width per turn is reduced by connecting the fixed resistor Rfix in series. .

  FIG. 3 is a circuit diagram schematically showing a configuration example of the power supply specification setting circuit 6 when a power sequence controller IC (Power Sequence Controller) 200 is mounted on the power supply board 2. The power supply board 2 is equipped with three power supply ICs (20X, 20Y, 20Z) and a sequence control circuit (power supply order adjustment IC) 200 that defines their start-up sequence and shut-off sequence. The power supply specification setting circuit 6 includes a start adjustment circuit 42A and an enable signal connection circuit 41A.

  The three power supply ICs (20X, 20Y, and 20Z) include an enable terminal that controls whether power supply is output or stopped. When the enable signal input to the enable terminal is asserted, power supply is output, and when it is negated, it is stopped. The activation sequence can be defined in the order of assertion, and the blocking sequence can be defined in the order of negation. The power supply order adjustment IC 200 is a circuit element that sequentially asserts / negates an output signal at a set timing. The activation adjustment circuit 42A defines the assert / negate timing among a plurality of output signals (three in FIG. 3) of the power supply sequence adjustment IC 200. Assertion timing between the three outputs is defined by a delay time from one reference output. The delay time regulation / adjustment circuit and the regulation / adjustment method depend on the specifications of the power supply sequence adjustment IC 200, but can be defined by, for example, externally attached resistors Rv and Rw. As illustrated in the figure, the start adjustment circuit 42A defines assert / negate timings of the three output signals of the power supply sequence adjustment IC 200 by two resistors Rv and Rw. The enable signal connection circuit 41A is a wiring that defines the connection relationship between the three output signals of the power supply sequence adjustment IC 200 and the enable terminals of the three power supply ICs (20X, 20Y, 20Z). A buffer may be inserted as necessary, but it is not necessary to consider the delay caused by the buffer, so it is preferable that the buffer is composed only of wiring.

  The power supply specification setting terminals 23X, 23Y, 23Z, 24S, 24T, 24U, 25V, and 25W of the power supply board 2 are all preferably mounted as connectors. It may be an individual connector or may be assigned to each pin of a multi-pin connector. This is because the start adjustment circuit 42A and the enable signal connection circuit 41A can be externally attached and detached, and replacement is facilitated. The power supply specification setting terminals of the power supply board 2 include timing settings 25V, 25W, enable signal output connectors 24S, 24T, 24U, and enable signal input connectors 23X, 23Y, 23Z. Of the power supply specification setting terminals, the timing settings 25V and 25W are connected to the start adjustment circuit 42A via the timing setting connectors 45H and 45I on the power supply specification setting circuit 6 side. The three output signals of the power supply sequence adjustment IC 200 are input to the enable signal connection circuit 41A via the enable signal output connectors 24S, 24T, and 24U and the enable signal input connectors 44E, 44F, and 44G on the power supply specification setting circuit 6 side. . Further, three power supply ICs (20X, 20Y, 20Z) are provided via enable signal output connectors 43B, 43C, 43D on the power supply specification setting circuit 6 side and enable signal input connectors 23X, 23Y, 23Z on the power supply board 2 side. Is input to the enable terminal.

  Thereby, the startup sequence and / or the shutdown sequence of the power supply used in the system board are defined by the startup adjustment circuits 42A and 42K and the enable signal connection circuits 41A and 41K which are a kind of power supply specification setting circuit connected to the power supply board. Is done.

  The power supply specification setting circuit 6 may be mounted on a power supply startup adjustment board 4A described later, or may be mounted on a power supply startup adjustment board 4K corresponding to another system board, or may be mounted on a system board. . An appropriate power supply specification setting circuit 6 mounted on the power supply start adjustment board 4A is associated with each system board (1A, etc.), and when the system board (1A, etc.) to be connected is replaced, the power supply specification setting circuit 6 is also added. By exchanging with the corresponding one, readjustment of the activation sequence accompanying the exchange can be eliminated. On the other hand, by mounting the power supply specification setting circuit 6 on the corresponding system board instead of the power supply start adjustment board, it is possible to eliminate the risk of mistakes associated with replacement. These embodiments will be described in detail later.

[Embodiment 2]
FIG. 4 is a block diagram schematically illustrating a configuration example of the integrated system 1000 including the system boards 1A and 1K, the power supply board 2, and the supply voltage adjustment boards 3A and 3K. The power supply board 2 is a power supply board that can supply power to a plurality of types of system boards 1A, 1K,..., And supply voltage corresponding to the connected system board among the supply voltage adjustment boards 3A, 3K,. The adjustment board is selected and connected. FIG. 4 illustrates the system boards 1A and 1K and the two supply voltage adjustment boards 3A and 3K corresponding to the system boards 1A and 1K, respectively, but the system board to which the power supply board 2 can be connected is limited to two types. I can't. A plurality of types of supply voltage adjustment boards corresponding to one type of system board may be prepared. Prototype tests can be performed under multiple power supply voltage conditions.

  A system 100A is mounted on the system board 1A, and a system 100K is mounted on the system board 1K. The systems 100A and 100K are, for example, FPGAs, or may be other system LSIs (Large Scale Integrated circuits), or may be systems using semiconductor modules or discrete components. System 100A and system 100K are systems having different supply voltage specifications.

  On the system board 1A, an FPGA 100A as a system 100A and connectors 11B, 11C, and 11D are mounted. The FPGA 100A requires voltage B, voltage C, and voltage D for operation, and these voltages are supplied from connectors 11B, 11C, and 11D, respectively. The voltage B, the voltage C, and the voltage D are, for example, 0.9V, 1.0V, and 2.5V, respectively.

  On the system board 1K, an FPGA 100K as a system 100K and connectors 11K, 11M and 11N are mounted. The FPGA 100K requires voltage L, voltage M, and voltage N for operation, and these voltages are supplied from connectors 11L, 11M, and 11N, respectively. The voltage L, the voltage M, and the voltage N are, for example, 1.0V, 1.8V, and 1.2V, respectively.

  On the power supply board 2, power supply ICs 20X, 20Y and 20Z, connectors 21X, 21Y and 21Z, and connectors 22X, 22Y and 22Z capable of adjusting the supply voltage by external resistance values are mounted. The voltages output by the power supply ICs 20X, 20Y, and 20Z are supplied to the system board 1A or the system board 1K by connectors 21X, 21Y, and 21Z, respectively. The output voltages of power supply ICs 20X, 20Y and 20Z are determined by the resistance values connected to connectors 22X, 22Y and 22Z, respectively.

  Output voltage adjustment resistors 30B, 30C, and 30D and connectors 32B, 32C, and 32D are mounted on the supply voltage adjustment board 3A corresponding to the system board 1A. The voltage adjustment resistors 30B, 30C, and 30D are resistance values that adjust the output voltages of the power supply ICs 20X, 20Y, and 20Z of the power supply board 2 to the voltage B, voltage C, and voltage D for the operation of the FPGA 100A. The voltage adjustment resistors 30B, 30C and 30D are connected to the power supply board 2 via the connectors 32B, 32C and 32D of the supply voltage adjustment board 3A and the connectors 22X, 22Y and 22Z of the power supply board 2. Voltage adjusting resistors 30B, 30C, and 30D set voltage B, voltage C, and voltage D to the above-described 0.9V, 1.0V, and 2.5V based on the specifications of power supply ICs 20X, 20Y, and 20Z, respectively. Is set to the resistance value.

  Output voltage adjustment resistors 30L, 30M and 30N and connectors 32L, 32M and 32N are mounted on a supply voltage adjustment board 3K corresponding to the system board 1K. The voltage adjusting resistors 30L, 30M and 30N are resistance values for adjusting the output voltages of the power supply ICs 20X, 20Y and 20Z of the power supply board 2 to the voltage L, voltage M and voltage N for the operation of the FPGA 100K. Voltage adjustment resistors 30L, 30M and 30N are connected to power supply board 2 via connectors 32L, 32M and 32N of supply voltage adjustment board 3K and connectors 22X, 22Y and 22Z of power supply board 2. Voltage adjustment resistors 30L, 30M, and 30N set voltage L, voltage M, and voltage N to the above-described 1.0V, 1.8V, and 1.2V, respectively, based on the specifications of power supply ICs 20X, 20Y, and 20Z. Is set to the resistance value.

  The connectors 11B, 11C, and 11D of the system board 1A are attached at positions that can be connected simultaneously with the connectors 21X, 21Y, and 21Z of the power supply board 2, and the connectors 11L, 11M, and 11N of the system board 1K are also connected to the power supply board 2. The connectors 21X, 21Y and 21Z are attached at positions where they can be connected simultaneously. Further, the connectors 32B, 32C and 32D of the supply voltage adjustment board 3A are attached at positions where they can be connected simultaneously with the connectors 22X, 22Y and 22Z of the power supply board 2, and the connectors 32K, 32M and 32N of the supply voltage adjustment board 3K. Is also attached at a position where the connectors 22X, 22Y and 22Z of the power supply board 2 can be connected simultaneously. Accordingly, the system board 1A and the system board 1K can be attached to and detached from the common power supply board 2, and the corresponding supply voltage adjustment board 3A and supply voltage adjustment board 3K can be attached to and detached from the same power supply board 2 as well. It has become. In addition, the “position that can be connected at the same time” refers to, for example, a position that faces each other and can be fitted together.

  In this way, appropriate supply voltage adjustment boards 3A and 3K are associated with the system boards 1A and 1K, respectively, and when the connected system boards 1A and 1K are replaced, the supply voltage adjustment boards 3A and 3K are also associated. By exchanging, it becomes unnecessary to readjust the power supply voltage accompanying the exchange.

  The effect of the second embodiment will be described in detail.

  In the prior art, the power supply and voltage adjustment unit is mounted on the system board, or a specific power supply board is connected, but by separating the power supply board from the system board and making it common to multiple types of system boards When a variety of system boards are created, the power board can be reused, and the power board component cost, the power circuit design cost, the board design cost, and the like can be reduced.

  Further, since the supply voltage adjustment board is further separated from the power supply board, it becomes possible to easily cope with voltage specifications that differ depending on the system board. Without separating the power supply board and the supply voltage adjustment board, it is possible to cope with different voltage specifications depending on the system board by taking a wide voltage adjustment range with a variable resistor or the like. However, the work of adjusting the voltage by adjusting the variable resistor is complicated, and when adjusting to a specific voltage with a variable resistor corresponding to a wide voltage adjustment range, it is difficult to distinguish the adjusted voltage from the outside, so a different system There is also a risk of breaking the system board by connecting the power board configured for the board to the system board.

  By preparing a supply voltage adjustment board in association with the system board, it is not necessary to set a different voltage for each system board, and the risk of supplying a voltage different from the specification to the system board can also be reduced. .

  A modification of the second embodiment will be described.

  The power supply ICs do not have to have the same specifications. Depending on the amount of current that can be supplied and the ease of noise generation, the power supply supplied to the power supply IC itself is changed, and multiple power supply ICs are used in parallel to increase the amount of current. Alternatively, the type of power supply IC may be changed. As the type of power supply IC, a linear regulator may be adopted in addition to the switching regulator. Switching regulators are generally considered to be highly efficient but generally generate a lot of noise. On the other hand, the linear regulator is said to have a small amount of noise generation although the conversion efficiency and the amount of generated current fall. Based on these characteristics, an appropriate power supply IC is selected. Further, a power supply specification setting circuit 6 having a mechanism for selecting these power ICs with a plurality of specifications mounted in advance on the power supply board 2 and selecting them instead of the supply voltage adjustment board can be connected to the power supply board 2. You may comprise.

  The relationship between the power supply IC that can adjust the supply voltage by the external resistance value mounted on the power supply board 2, the supply voltage adjustment board 3 </ b> A, and the supply voltage adjustment board 3 </ b> K only needs to be able to separate the supply voltage adjustment unit. . For example, a power supply IC and a PWM output IC that can be adjusted by PWM (Pulse Width Modulation) input, a power supply IC that can be adjusted by PWM input, a microcomputer capable of PWM output, and a ROM equipped with a microcomputer PWM output setting program. Good.

  The output voltage adjusting resistor in the supply voltage adjusting board is not a single resistor but may be a combination of a fixed resistor and a variable resistor as illustrated in FIG. In this case, the voltage adjustment range can be made variable within a limited range. Compared to the case where the output voltage adjustment resistor of the power supply IC is simply made variable in the range of all output voltages, the variable resistor can be changed. Since the voltage change width per one rotation becomes small, voltage adjustment is easy, and the risk of adjusting to a voltage that greatly exceeds the specification range is reduced.

  In the drawing, each connector is described as a separate connector for ease of understanding, but it may be a separate terminal on a single or a plurality of connectors instead of individual connectors. The power supply voltage may be supplied from a plurality of connectors instead of a single one.

  These modifications can be similarly applied to the following embodiments.

[Embodiment 3]
FIG. 5 is a block diagram schematically illustrating a configuration example of the integrated system 1000 including the system boards 1A and 1K and the power supply board 2 on which the supply voltage adjusting circuit 30 is mounted. In FIG. 5, the hierarchy of the supply voltage adjustment circuit 30 is not shown. Voltage adjustment resistors 30B, 30C and 30D constituting the supply voltage adjustment circuit 30 are mounted on the system board 1A, and voltage adjustment resistors 30L, 30M and 30N constituting the supply voltage adjustment circuit 30 are mounted on the system board 1K. Is installed. Thus, in the second embodiment (FIG. 4), the functions mounted on the supply voltage adjustment boards 3A and 3K are built in the system boards 1A and 1K. Since other configurations and operations are the same as those of the second embodiment (FIG. 4), detailed description thereof is omitted.

  As described above, by integrating the system board and the corresponding supply voltage adjustment circuit, it is possible to prevent the system board and the supply voltage adjustment board from being used in an inappropriate combination.

[Embodiment 4]
FIG. 6 is a block diagram schematically illustrating a configuration example of the integrated system 1000 including the system boards 1A and 1K, the power supply board 2, and the power activation adjustment boards 4A and 4K. The power supply board 2 is a power supply board that can supply power to a plurality of types of system boards 1A, 1K,..., And power activation corresponding to the connected system board among the power activation adjustment boards 4A, 4K,. The adjustment board is selected and connected. FIG. 6 illustrates the system boards 1A and 1K and the two power start adjustment boards 4A and 4K corresponding to the system boards 1A and 1K, respectively. The board is not limited to two types.

  Since the configuration of the system boards 1A and 1K is the same as that of the second embodiment (FIG. 4), detailed description is omitted.

  The power supply board 2 includes power supply ICs 20X, 20Y, and 20Z that can turn on / off voltage supply by an output enable terminal, a power supply order adjustment IC 200 that can change the assert timing of three types of enable signals according to the values of external resistors, Connectors 21X, 21Y and 21Z for supplying power to the system board are mounted. The power supply board 2 further includes connectors 23X, 23Y and 23Z to which output enable signals of the respective power supply ICs are connected, connectors 24S, 24T and 24U to which output enable signals output from the power supply order adjustment IC 200 are connected, Connectors 25V and 25W connected to terminals for adjusting the assert timing of the three kinds of enable signals of the power supply order adjustment IC 200 are mounted.

  As for the output enable signal, the terminal connected to the connector 24S becomes effective first, and the time until the terminal connected to the connector 24T becomes effective is determined by the resistance value between the connector 25V and GND. The resistance value between the connector 25W and GND further defines the time until the terminal connected to the connector 24U becomes valid thereafter. However, this is defined based on the specification of the power supply order adjustment IC 200, and when it is changed to a power supply order adjustment circuit that asserts or negates a signal by another method, it is specified according to the specification. . The specification method of the timing specification is not limited to the specification by the resistance value exemplified here, but by changing the power supply sequence adjustment circuit, it is changed to the specification by the capacitance value, the specification by the voltage level, or the specification by the digital value, etc. Can do.

  The power activation adjustment board 4A exemplified in the fourth embodiment (FIG. 6) includes output enable signal output connectors 43B, 43C and 43D, output enable signal input connectors 44E, 44F and 44G, and output enable timing adjustment. Connectors 45H and 45I and resistors 46H and 46I for setting the output enable timing are mounted.

  The activation order of the power supply B, the power supply C, and the power supply D is adjusted so as to conform to the specifications of the FPGA 100A by connecting each output enable signal on the power supply activation adjustment board 4A. First, an enable signal asserted by the power supply sequence adjustment IC 200 is input to the connector 44E of the power activation adjustment board 4A, and the signal is connected to the connector 43D connected to the output enable signal of the power supply IC 20Z that generates the voltage D. Therefore, the voltage D is output first. The enable signal to be asserted next is input to the connector 44F of the power activation adjustment board 4A, and the signal is connected to the connector 43C connected to the output enable signal of the power supply IC 20Y that generates the voltage C. Is output next to the voltage D. The enable signal that is finally asserted is input to the connector 44G of the power activation adjustment board 4A, and the signal is connected to the connector 43B connected to the output enable signal of the power supply IC 20X that generates the voltage B. Is output last.

  The time from when the voltage D is output until the voltage C is output is determined by the resistor 46H, and the time from when the voltage C is output until the voltage B is output is determined by the resistor 46I. For example, when an IC to which a delay time of 5 ms is added per resistance value of 3 kΩ is used and the resistance 46H and the resistance 46I are 3 kΩ and 51 kΩ, respectively, the time from the time when the voltage D is output to the time when the voltage C is output Is 5 ms, and the time from when the voltage C is output until the voltage B is output is 85 ms. These times are set so as to be suitable for the power-on sequence defined by the specifications of the FPGA 100A.

  On the other hand, the power activation adjustment board 4K, like the power activation adjustment board 4A, has connectors 43L, 43M and 43N for output enable signal output, connectors 44O and 44P for input of output enable signals, and output enable timing adjustment. Connectors 45Q and 45R and resistors 46Q and 46R for adjusting the output enable timing are mounted.

  The starting order of the power supply L, the power supply M, and the power supply N is adjusted so as to conform to the specifications of the FPGA 100K by connecting each output enable signal on the power supply start adjustment board 4K. First, an enable signal asserted by the power supply sequence adjustment IC 200 is input to the connector 44O of the power activation adjustment board 4K, and the signal 43 is connected to the output enable signal of the power supply IC 20X that generates the voltage L. Since it is connected to the connector 43N connected to the output enable signal of the power supply IC 20Z to be generated, the voltage L and the voltage N are output first. The enable signal to be asserted next is input to the connector 44P of the power supply start adjustment board 4K, and the signal is connected to the connector 43M connected to the output enable signal of the power supply IC 20Y that generates the voltage M. M is then output. The enable signal that is finally enabled is input to the connector 44Q of the power supply start adjustment board 4K, but the signal is not connected anywhere. The mounting of the connector 44Q may be omitted.

  The time from when the voltage L and the voltage N are output until the voltage M is output is determined by the resistor 46R. Although the last enable signal is not used, the resistor 46S is mounted to complete the operation of the power supply sequence adjustment IC 200. For example, when the same IC as in the previous example is used and the resistance 46R and the resistance 46S are 120 kΩ and 51 kΩ, respectively, the time from when the voltage L and the voltage N are output until the voltage M is output is 200 ms. Further, the time until the last enable signal is asserted is 85 ms. The time from when the voltage L and the voltage N are output to when the voltage M is output is set so as to be suitable for the power-on sequence defined by the FPGA 100K specification.

  The resistors 46H and 46I of the power supply startup adjustment board 4A and the resistors 46R and 46S of the power supply startup adjustment board 4K are examples of mounting the startup adjustment circuit 42A shown in FIG. 3, and the connection between the connectors of the power supply startup adjustment boards 4A and 4K. These are implementation examples of the enable signal connection circuit 41A shown in FIG. In the present embodiment, the power supply startup sequence has been described. However, the same applies to the adjustment of the timing for negating the enable signal, and can also be applied to the cutoff sequence. As described above, the start-up sequence and / or the shut-off sequence of the power supply used in the system boards 1A and 1K are defined by the start-up adjustment circuit and the enable signal connection circuit which are a kind of power supply specification setting circuit connected to the power supply board. . However, the hierarchy of the start adjustment circuit and the enable signal connection circuit is not shown in FIG.

[Embodiment 5]
FIG. 7 is a block diagram schematically showing a configuration example of the integrated system 1000 including the system boards 1A and 1K and the power supply board 2 on which the start adjustment circuit as the power supply start adjustment circuit and the enable signal connection circuit are mounted. In FIG. 7, the hierarchy of the start adjustment circuit and the enable signal connection circuit is not shown. The system board 1A is provided with the resistors 46H and 46I for setting the output enable timing constituting the start adjustment circuit and wiring between the connectors constituting the enable signal connection circuit, and the start adjustment circuit is constituted on the system board 1K. The resistors 46R and 46S for setting the output enable timing and wiring between the connectors constituting the enable signal connection circuit are mounted. As described above, in the fourth embodiment (FIG. 6), the functions mounted on the power supply start adjustment boards 4A and 4K are built in the system boards 1A and 1K. Since other configurations and operations are the same as those in the fourth embodiment (FIG. 6), detailed description thereof is omitted.

  In this way, by integrating the start adjustment circuit, which is a power supply start adjustment circuit corresponding to the system board, and the enable signal connection circuit, it is possible to prevent the system board and the power start adjustment board from being used in an inappropriate combination. Can do.

[Embodiment 6]
FIG. 8 shows an integrated system 1000 including system boards 1A and 1K, a power supply board 2, and power supply specification setting boards 5A and 5K on which a supply voltage adjustment circuit, a start adjustment circuit as a power start adjustment circuit, and an enable signal connection circuit are mounted. It is a block diagram which shows typically the example of a structure. The power supply board 2 is a power supply board that can supply power to a plurality of types of system boards 1A, 1K,..., And among the power supply specification setting boards 5A, 5K,. A setting board is selected and connected. FIG. 8 illustrates the system boards 1A and 1K and the two power supply specification setting boards 5A and 5K corresponding to the system boards 1A and 1K, respectively. The board is not limited to two types.

  Since the configurations of the system boards 1A and 1K are the same as those in the second embodiment (FIG. 4) and the fourth embodiment (FIG. 6), detailed description thereof is omitted.

  The power supply board 2 includes power supply ICs 20X, 20Y, and 20Z that can turn on / off voltage supply by an output enable terminal, a power supply order adjustment IC 200 that can change the assert timing of three types of enable signals according to the values of external resistors, Connectors 21X, 21Y and 21Z for supplying power to the system board are mounted. Further, as in the second embodiment (FIG. 4) and the third embodiment (FIG. 5), connectors 22X and 22Y for connecting external resistors for adjusting the supply voltages from the power supply ICs 20X, 20Y and 20Z are connected to the power supply board 2. And 22Z are mounted. Similarly to the fourth embodiment (FIG. 6) and the fifth embodiment (FIG. 7), the power supply board 2 includes connectors 23X, 23Y and 23Z to which output enable signals of the respective power supply ICs are connected, and a power supply order adjustment IC 200. Connectors 24S, 24T and 24U to which output enable signals to be output are connected are mounted. The power supply board 2 further includes connectors 25V and 25W connected to terminals for adjusting the assert timings of the three kinds of enable signals of the power supply order adjustment IC 200.

  Similarly to the supply voltage adjustment board 3A of the second embodiment (FIG. 4), output voltage adjustment resistors 30B, 30C and 30D and connectors 32B, 32C and 32D are mounted on the power supply specification setting board 5A corresponding to the system board 1A. Has been. The voltage adjustment resistors 30B, 30C, and 30D are resistance values that adjust the output voltages of the power supply ICs 20X, 20Y, and 20Z of the power supply board 2 to the voltage B, voltage C, and voltage D for the operation of the FPGA 100A. The voltage adjustment resistors 30B, 30C and 30D are connected to the power supply board 2 via the connectors 32B, 32C and 32D of the power supply specification setting board 5A and the connectors 22X, 22Y and 22Z of the power supply board 2.

  The power supply specification setting board 5A further includes output enable signal output connectors 43B, 43C and 43D and output enable signal input connectors 44E and 44F, as in the power supply start adjustment board 4A of the fourth embodiment (FIG. 6). 44G, connectors 45H and 45I for adjusting the output enable timing, and resistors 46H and 46I for setting the output enable timing. The starting order of the power supply B, the power supply C, and the power supply D is adjusted so as to conform to the specifications of the FPGA 100A by connecting each output enable signal on the power supply start adjustment board 4A.

  Similarly to the supply voltage adjustment board 3K of the second embodiment (FIG. 4), output voltage adjustment resistors 30L, 30M and 30N and connectors 32L, 32M and 32N are mounted on the power supply specification setting board 5K corresponding to the system board 1K. Has been. The voltage adjusting resistors 30L, 30M and 30N are resistance values for adjusting the output voltages of the power supply ICs 20X, 20Y and 20Z of the power supply board 2 to the voltage L, voltage M and voltage N for the operation of the FPGA 100K. Voltage adjustment resistors 30L, 30M and 30N are connected to power supply board 2 via connectors 32L, 32M and 32N of power supply specification setting board 5K and connectors 22X, 22Y and 22Z of power supply board 2.

  The power specification setting board 5K further includes output enable signal output connectors 43L, 43M and 43N, and an output enable signal input connector 44O and the power start adjustment board 4K of the fourth embodiment (FIG. 6). 44P, connectors 45Q and 45R for adjusting the output enable timing, and resistors 46Q and 46R for adjusting the output enable timing are mounted. The startup order of the power supply L, the power supply M, and the power supply N is adjusted so as to conform to the specifications of the FPGA 100K by connecting each output enable signal on the power supply startup adjustment board 4K.

  Thereby, only by connecting a simple power supply specification setting circuit, it is possible to appropriately set the voltages and startup sequences of the plurality of power supplies output from the power supply board in accordance with the corresponding system board.

  As described above, the integrated system 1000 of the sixth embodiment (FIG. 8) includes the function of the supply voltage adjustment board of the second embodiment (FIG. 4) and the function of the power supply startup adjustment board of the fourth embodiment (FIG. 6). Is characterized in that both are incorporated into the power supply specification setting board. Since the operation of each function is independent of each other, the power supply voltage and the startup sequence suitable for the specification of the connected system board can be set by the corresponding power supply specification setting board. In the present embodiment, only the combination of the power supply voltage and the start-up sequence exemplified above is shown, but functions for setting / adjusting other power supply specifications can be further combined.

[Embodiment 7]
FIG. 9 is a block diagram schematically illustrating a configuration example of the integrated system 1000 including the system boards 1A and 1K and the power supply board 2 on which the supply voltage adjustment circuit, the start adjustment circuit that is the power supply start adjustment circuit, and the enable signal connection circuit are mounted. FIG. In FIG. 9, the layers of the supply voltage adjustment circuit, the start adjustment circuit, and the enable signal connection circuit are not shown.

  The system board 1A is equipped with voltage adjusting resistors 30B, 30C and 30D constituting the supply voltage adjusting circuit 30, and further, an enable signal connection with output enable timing setting resistors 46H and 46I constituting the start adjusting circuit. Wiring between connectors constituting the circuit is mounted.

  The system board 1K is equipped with voltage adjustment resistors 30L, 30M and 30N constituting the supply voltage adjustment circuit 30, and further, an enable signal connection with output enable timing setting resistors 46R and 46S constituting the start adjustment circuit. Wiring between connectors constituting the circuit is mounted.

  Thus, in the sixth embodiment (FIG. 8), the functions mounted on the power supply specification setting boards 5A and 5K are built in the system boards 1A and 1K. Since other configurations and operations are the same as those in the sixth embodiment (FIG. 8), detailed description thereof is omitted.

  In this way, by integrating the supply voltage adjustment circuit, the power supply start adjustment circuit and the start adjustment circuit and the enable signal connection circuit with the corresponding system board, the system board and the power specification setting board can be combined in an inappropriate manner. Can be prevented.

[Embodiment 8]
FIG. 10 is an explanatory diagram schematically showing an example of a power connector and power supply wiring in the integrated system 1000 using the system boards 1A and 1K, the power supply board 2, and the supply voltage adjustment boards 3A and 3K. The circuit configuration is the same as that of the second embodiment shown in FIG. 4, but the power supply connectors 21X, 21Y, 21Z and GND in the power supply board 2 are combined into one connector 26, and the power supply voltage setting connectors 22X, 22Y, 22Z are combined. And GND are combined into one connector 27. Correspondingly, in the system board 1A, the power connectors 11B, 11C, 11D and GND are combined into one connector 12A, and in the system board 1K, the power connectors 11L, 11M, 11N and GND are combined into one connector 12K. It is summarized in. In the power supply voltage setting board 3A, the connectors 32B, 32C, and 32D are combined into one connector 33A, and in the power supply voltage setting board 3K, the connectors 32L, 32M, and 32N are combined into one connector 33K.

  In the system board 1A, power supply wiring areas 16B, 16C, and 16D are provided from terminals (pins) that supply power B, C, and D of the connector 12A toward the power supply areas B, C, and D, respectively. Although not shown in FIG. 4, the system board 1A has an input / output terminal 13A for connecting to the outside from the FPGA 100A, a function of connecting to the outside through the connector 14A, and a circuit for that purpose and a connector 14A are added. Yes. At this time, the wiring from the input / output terminal 13A to the connector 14A intersects the power supply wiring region 16D. In the system board 1K, power supply wiring areas 16L, 16M, and 16N are provided from terminals (pins) that supply power L, M, and N of the connector 12K to the power supply areas L, M, and N, respectively.

  As described above, by physically combining the connectors into one, the component cost of the connector can be reduced, and the board area necessary for mounting the connector can be reduced. On the other hand, it was found that there are the following problems.

  In the system board 1A shown in FIG. 10, the power supply wiring area 16D supplied from the power supply connector 12A to the power supply area 10D intersects with the wiring connected from the I / O terminal 13A to the connector 14A. There is a possibility that it is necessary to increase the number of substrate layers for wiring both lines and to increase the distance between the I / O terminal 13A and the connector 14A in order to secure the width of the power supply layer.

  In addition, depending on the specifications of the power supply area as in the system board 1K, it may be necessary to increase the number of layers of the substrate in order to ensure the wiring width of the layer through which the power supply line passes.

  In some cases, the system board needs to be designed to have a specific thickness for use in PCI Express Endpoint. In some cases, it is necessary to design the impedance of the transmission line to a specific value. When the number of layers of the substrate increases, the thickness per layer becomes thin, and it may be difficult to secure supply current and control impedance.

  FIG. 11 is an explanatory diagram schematically showing another example of the power supply connector and the power supply wiring in the integrated system 1000 by the system boards 1A and 1K, the power supply board 2 and the supply voltage adjustment boards 3A and 3K. In the embodiment shown in FIG. 10, the power supply board 2 includes only one power supply connector 26 and one power supply voltage setting connector 27. Here, a plurality of power supply connectors that are electrically the same are distributed on the substrate. The power supply board 2 of FIG. 11 includes four power supply connectors 28NE, 28SE, 28SW, and 28NW. Each of them is a 4-pin connector, and the power supply lines from the power supply ICs 20X, 20Y, and 20Z are configured by 3 pins wired using the wiring regions 29X, 29Y, and 29Z, and further 1 pin of GND.

  The system board 1K is provided with four power connectors 15K-NE, 15K-SE, 15K-SW, and 15K-NW at positions corresponding to the four power supply connectors 28NE, 28SE, 28SW, and 28NW. Connected at the same time. What is necessary is just to wire a power supply line from the nearest power supply connector to each power supply area | region 10L, 10M, 10N. A power supply line is wired from the nearest connector 15K-SW to the power supply area 10L using the power supply wiring area 16L, and a power supply line is wired from the nearest connector 15K-NE to the power supply area 10M using the power supply wiring area 16M. A power supply line is wired from the nearest connector 15KS-SE to the power supply area 10N using the power supply wiring area 16N.

  In the system board 1A, the power connector corresponding to the power supply connector 28NE is omitted, and three power connectors 15A-SE, 15A-SW, and 15A-NW are provided, and are connected simultaneously. What is necessary is just to wire a power supply line from the nearest power supply connector to each power supply area | region 10B, 10C, 10D. A power supply line is wired from the nearest connector 15A-SW to the power supply area 10B using the power supply wiring area 16B, and a power supply line is wired to the power supply area 10C from the nearest connector 15A-SE using the power supply wiring area 16C. A power supply line is wired from the nearest connector 15A-NW to the power supply area 10D using the power supply wiring area 16D. This eliminates the intersection between the wiring connected to the connector 14A from the I / O terminal 13A and the power supply wiring area, and increases the number of layers on the board as described above, or the distance between the I / O terminal 13A and the connector 14A. There is no need to release.

  FIG. 11 shows an example in which a plurality of connectors that can supply all three power supplies are provided and distributed on the power supply board 2, but all the power supplies can be supplied from all the connectors. It doesn't have to be configured. By providing power supply connectors at multiple locations in the power supply board 2 for the same power supply, the corresponding multiple types of system boards can receive power supply from the most appropriate positions (connectors) on their own boards. The degree of freedom in designing the board is improved.

  Although the eighth embodiment has been described in accordance with the circuit shown in the second embodiment (FIG. 4), the same power supply is applied to a plurality of places on the power supply board 2 for the other power sources in the second to seventh embodiments. A power supply connector can be provided in a distributed manner. Further, as in the third, fifth, and seventh embodiments (FIGS. 5, 7, and 9), the functions of the supply voltage adjustment boards 3A and 3K, the power supply start adjustment boards 4A and 4K, and the power supply specification setting boards 5A and 5K respectively correspond. The connectors 33A, 33K and the like may be mounted on the system board together with the system board, and may be arranged at the facing positions so as to be connected simultaneously with the power connector.

  Although the invention made by the present inventor has been specifically described based on the embodiments, it is needless to say that the present invention is not limited thereto and can be variously modified without departing from the gist thereof.

1A, 1K system board 2 power supply board 3A, 3K power supply specification setting (supply voltage adjustment) board 4A, 4K power supply specification setting (power supply start adjustment) board 5A, 5K power supply specification setting board 6 power supply specification setting circuit 10B, 10C, 10D, 10L, 10M, 10N Power Area
11B, 11C, 11D, 11L, 11M, 11N Power supply terminal 12A, 12K Power supply connector 13A Input / output terminals (I / O signals)
14A I / O connector 15A-NE, 15A-SE, 15A-NW, 15A-SW Power connector 15K-NE, 15K-SE, 15K-NW, 15K-SW Power connector 16B, 16C, 16D, 16L, 16M, 16N Wiring area 20X, 20Y, 20Z Power supply circuit (Power IC)
21X, 21Y, 21Z Power supply terminal 22X, 22Y, 22Z Power supply specification (power supply voltage) setting terminal 23X, 23Y, 23Z Power supply specification (startup sequence) setting terminal (enable signal input)
24S, 24T, 24U Power supply specification (startup sequence) setting terminal (enable signal output)
25V, 25W power supply specification (startup sequence) setting terminal (timing setting)
27 Power supply specification (power supply voltage) setting connector 28NE, 28SE, 28NW, 28SW Power supply connector 29X, 29Y, 29Z Power supply wiring area 30B, 30C, 30D, 30L, 30M, 30N Output voltage adjustment resistor 31A, 31K Voltage adjustment circuit 32B , 32C, 32D, 32L, 32M, 32N Output voltage adjustment connector 33A, 33K Output voltage adjustment connector 41A, 41K Enable signal connection circuit 42A, 42K Start adjustment circuit 43B, 43C, 43D, 43L, 43M, 43N Enable signal output Connector 44E, 44F, 44G, 44O, 44P, 44Q Enable signal input connector 45H, 45I, 45R, 45S Timing setting connector 46H, 46I, 46R, 46S Timing setting resistor 100A, 100K None (for example FPGA)
200 Power Sequence Controller (Power Sequence Controller)
1000 Integrated system

Claims (20)

A power supply board having a power supply circuit capable of supplying a plurality of power supplies,
It has a power supply terminal and a power specification setting terminal that can connect multiple types of system boards.
The specification of the power supplied from the power supply terminal to the system board connected to the power supply board among the plurality of types of system boards is defined by the power supply specification setting circuit connected to the power supply specification setting terminal. The
Power board. The voltage of the plurality of power supplies to be supplied from the power supply terminal to the connected system board is defined by the power supply specification setting circuit connected to the power supply specification setting terminal.
Power board. 3. The variable resistor according to claim 2, wherein voltages of the plurality of power supplies supplied from the power supply terminal are defined by a resistance value of a resistor connected to the power supply specification setting terminal, and the resistance is adjustable. And a fixed resistor with a fixed resistance value connected in series,
Power board. In Claim 1, the power supply specification setting circuit connected to the power supply specification setting terminal defines a startup sequence of the plurality of power supplies supplied from the power supply terminal to the connected system board.
Power board. 2. The voltage and startup sequence of the plurality of power supplies supplied from the power supply terminal to the connected system board are defined by the power supply specification setting circuit connected to the power supply specification setting terminal. ,
Power board. 5. The power supply circuit according to claim 5, comprising a plurality of power supply ICs corresponding to the plurality of power supplies and a sequence control circuit.
The plurality of power supply ICs are connected to a first terminal that is a part of the power supply specification setting terminal capable of adjusting the voltage of the power supplied by each of the plurality of power supply ICs,
Each of the plurality of power supply ICs has an enable terminal that permits supply of power, and the enable terminal is connected to a second terminal that is another part of the power supply specification setting terminal,
The sequence control circuit outputs a plurality of enable signals for controlling a startup sequence of the plurality of power supply ICs, and the plurality of enable signals are a third terminal which is still another part of the power supply specification setting terminal. Connected to
The sequence control circuit is connected to a fourth terminal which is still another part of the power supply specification setting terminal,
The power supply specification setting circuit is:
A plurality of power supply ICs, each of which is connected to the first terminal, adjusts the voltage of the power supplied by each of the plurality of power supply ICs;
A startup adjustment circuit that defines an order of asserting or negating the plurality of enable signals output from the sequence control circuit by being connected to the fourth terminal;
An enable signal connection circuit for connecting between the third terminal and the second terminal;
Power board. The power supply terminal according to claim 1, wherein the power supply terminal is a connector, and is disposed at a position where it can be connected to each other while facing a corresponding connector provided on the plurality of types of system boards.
Power board. The power supply specification setting circuit according to claim 7 is provided on each of the plurality of types of system boards,
The power supply specification setting terminal is a connector, and is disposed at a position where it can be connected to each other while facing a corresponding connector of a power supply specification setting circuit provided on the system board.
Power board. In Claim 7, the power supply specification setting circuit is provided on each of a plurality of power supply specification setting boards respectively corresponding to the plurality of types of system boards,
The power supply specification setting terminal is a connector, and is disposed at a position where it can be connected to each other while facing a corresponding connector of a power supply specification setting circuit provided on the power supply specification setting board.
Power board. In Claim 1, the power supply terminals corresponding to at least one of the plurality of power supplies are a plurality of connectors, and are distributed on the power board.
Power board. A system including a plurality of types of system boards and a power supply board having a power supply circuit capable of supplying a plurality of power supplies to the system boards,
The power board includes a power supply terminal that can be connected to the plurality of types of system boards and a power specification setting terminal, and the power supply for the system board connected to the power board among the plurality of types of system boards. The specification of the power supplied from the supply terminal is defined by a power specification setting circuit connected to the power specification setting terminal.
system. The voltage of the plurality of power supplies supplied from the power supply terminal to the connected system board is defined by the power supply specification setting circuit connected to the power supply specification setting terminal.
system. 13. The variable resistor according to claim 12, wherein voltages of the plurality of power supplies supplied from the power supply terminal are defined by a resistance value of a resistor connected to the power supply specification setting terminal, and the resistor has an adjustable resistance value. And a fixed resistor with a fixed resistance value connected in series,
system. The startup sequence of the plurality of power supplies supplied from the power supply terminal to the connected system board is defined by the power supply specification setting circuit connected to the power supply specification setting terminal.
system. 12. The voltage and startup sequence of the plurality of power supplies supplied from the power supply terminal to the connected system board are defined by the power supply specification setting circuit connected to the power supply specification setting terminal. ,
system. The power supply circuit according to claim 15, comprising a plurality of power supply ICs corresponding to the plurality of power supplies and a sequence control circuit,
The plurality of power supply ICs are connected to a first terminal that is a part of the power supply specification setting terminal capable of adjusting the voltage of the power supplied by each of the plurality of power supply ICs,
Each of the plurality of power supply ICs has an enable terminal that permits supply of power, and the enable terminal is connected to a second terminal that is another part of the power supply specification setting terminal,
The sequence control circuit outputs a plurality of enable signals for controlling a startup sequence of the plurality of power supply ICs, and the plurality of enable signals are a third terminal which is still another part of the power supply specification setting terminal. Connected to
The sequence control circuit is connected to a fourth terminal which is still another part of the power supply specification setting terminal,
The power supply specification setting circuit is:
A plurality of power supply ICs, each of which is connected to the first terminal, adjusts the voltage of the power supplied by each of the plurality of power supply ICs;
A startup adjustment circuit that defines an order of asserting or negating the plurality of enable signals output from the sequence control circuit by being connected to the fourth terminal;
An enable signal connection circuit for connecting between the third terminal and the second terminal;
system. In Claim 11, the power supply terminal of the power board is a connector,
In each of the plurality of types of system boards, the connector corresponding to the power supply terminal is provided at a position facing the corresponding connector on the power supply board.
system. In Claim 17, the power supply specification setting circuit is provided on each of the plurality of types of system boards,
The power supply specification setting terminal is a connector,
In each of the plurality of types of system boards, the connector corresponding to the power supply specification setting terminal is provided at a position facing the corresponding connector on the power supply board.
system. The system according to claim 17, comprising a plurality of power supply specification setting boards corresponding to the plurality of types of system boards.
The power supply specification setting circuit is provided on a power supply specification setting board corresponding to each of the plurality of types of system boards,
The power supply specification setting terminal is a connector,
The connector corresponding to the power specification setting terminal on the power supply board is provided at a position facing the corresponding connector on the power specification setting board.
system. In Claim 11, each of the plurality of types of system boards has a field programmable gate array, and the plurality of power supplies include a core voltage and an I / O voltage of the field programmable gate array.
system.

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