JP2017019710A - Nitride semiconductor substrate - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a nitride semiconductor substrate excellent in pressure proof.SOLUTION: A nitride semiconductor substrate has an initial nitride 2 and a nitride semiconductor laminated in order on a principal plane of a ground substrate 1. Recess parts 10 of a diameter of 6 nm or more and 60 nm or less of which the number is 3×10/cmor more and 1×10/cmor less are arranged on the ground substrate 1 side of the interface of the ground substrate 1 and the initial nitride 2 in an optional cross section of the nitride semiconductor substrate. Preferably, the recess parts 10 have a depth of 3 nm or more and 45 nm or less toward the ground substrate 1 side from the interface of the ground substrate 1 and the initial nitride 2.SELECTED DRAWING: Figure 2

Description

  The present invention relates to a nitride semiconductor substrate suitable for a power semiconductor / electronic device and the like.

  Patent Document 1 discloses a technique for providing a nitride semiconductor crystal growth method that reduces dislocation density and improves the performance and life of a semiconductor device to be formed. A plurality of nitride semiconductors are formed on a substrate by vapor phase growth. A nitride semiconductor crystal comprising: a first crystal growth step for forming the island-like crystal region; and a second crystal growth step for further growing the island-like crystal region while bonding boundaries between the island-like crystal regions. In the growth method, the crystal growth rate of the second crystal growth step is set higher than the crystal growth rate of the first crystal growth step, or the crystal growth temperature of the second crystal growth step is set to the crystal of the first crystal growth step. There is a technology disclosure that dislocations can be bent at the boundary joints by setting the temperature lower than the growth temperature, and the dislocation density can be lowered, and a nitride semiconductor layer is formed on the base substrate by vapor phase growth. That formation mechanism of the nitride layer in are known.

  Further, in Patent Document 2, as a nitride semiconductor growth substrate capable of growing a low dislocation density nitride semiconductor, the main surface which is the C-plane of the sapphire substrate is inclined at less than 90 ° with respect to the main surface. Convex or frustum-shaped protrusions having side surfaces that are arranged are formed in a lattice pattern, and the height of the protrusions from the main surface is 0.5 μm or more and 3 μm or less, and the adjacent protrusions There is a disclosure of a nitride semiconductor growth substrate in which the distance between them is 1 μm or more and 6 μm or less, and the surface roughness RMS of the side surface of the convex portion is 10 nm or less. That is, it is also known that having a concavo-convex shape on one main surface of the base substrate affects the characteristics of the nitride semiconductor formed thereon.

JP 2002-323733 A JP 2013-087012 A

  The invention described in Patent Document 1 attempts to reduce dislocations in a nitride semiconductor layer by optimizing the growth conditions of the nitride semiconductor layer. Therefore, there is a concern that a high-quality nitride semiconductor layer cannot be obtained unless a uniform nitride semiconductor layer is grown on the entire surface of the substrate.

  In the invention described in Patent Document 2, irregularities are formed on a base substrate in advance, and the growth rate of the nitride semiconductor layer is optimized to promote dislocation disappearance. However, accurately forming such irregularities in the surface of the substrate leads to higher cost of the base substrate. In addition, it is necessary to form the initial nitride semiconductor layer to the extent that the unevenness is completely buried, which increases the manufacturing cost of the nitride semiconductor layer. Further, if the unevenness is not formed uniformly, there is a concern that the nitride semiconductor layer formed thereon will not be uniform.

  That is, the uneven shape on one main surface of the base substrate needs to be formed in a uniform and appropriate size. Furthermore, it is desired that the formation of the unevenness is industrially inexpensive and can be realized with high accuracy.

  In view of such problems, an object of the present invention is to easily provide a nitride semiconductor particularly excellent in breakdown voltage characteristics.

A nitride semiconductor substrate according to the present invention is a nitride semiconductor substrate in which an initial nitride and a nitride semiconductor are sequentially stacked on one main surface of a base substrate, and in any one section of the nitride semiconductor substrate, There are 3 × 10 ⁸ pieces / cm ² or more and 1 × 10 ¹¹ pieces / cm ² or less of recesses having a diameter of 6 nm to 60 nm on the base substrate side from the interface between the base substrate and the initial nitride. To do. By having such a configuration, it is possible to provide a nitride semiconductor substrate having excellent breakdown voltage characteristics with a simple structure.

  Further, it is preferable that the indented portion has a depth of 3 nm or more and 45 nm or less from the interface between the base substrate and the initial nitride toward the base substrate.

  The recessed portion is different from the base substrate in at least one of composition, crystal structure, crystal orientation, and crystal phase.

  Furthermore, it is preferable that the indented portion is at least one of a void or a form filled with a polycrystalline or amorphous inorganic material.

According to the present invention, 3 × 10 ⁸ / cm ² or more and 1 × 10 ¹¹ / indentations having a diameter of 6 nm to 60 nm are included in the form of the initial layer composed of the base substrate and the initial nitride thereon. By providing a simple configuration of providing a density of cm ² or less, it is possible to provide a nitride semiconductor substrate that is more excellent in breakdown voltage characteristics than in the past.

It is a schematic sectional drawing of the laminated structure mentioned as an example of the nitride semiconductor substrate which concerns on this invention. It is sectional drawing which showed typically the hollow part currently formed in the one main surface surface layer part of the base substrate of the nitride semiconductor substrate which concerns on this invention. It is sectional drawing which illustrates typically the diameter of a hollow part and the average depth of the nitride semiconductor substrate which concerns on this invention. It is sectional drawing which showed typically the filling state of the hollow part of the nitride semiconductor substrate which concerns on this invention.

  Hereinafter, the present invention will be described in detail with reference to the drawings. As an example of the nitride semiconductor substrate according to the present invention, as shown in FIG. 1, a layer 2 made of initial nitride (hereinafter also simply referred to as “layer 2”) on one main surface of the base substrate 1, and Examples of the nitride semiconductor layers 3, 4, and 5 include a buffer layer 3, an electron transit layer 4, and an electron supply layer 5 that are stacked in this order.

  A known material used for the growth of the nitride semiconductor layer, such as silicon carbide or sapphire, can be applied to the base substrate 1. However, it can be said that it is more preferable to use a silicon single crystal for the reason described later in that the configuration of the present invention can be realized easily and reliably.

  A layer 2 made of initial nitride is formed on one main surface of the base substrate 1. The layer 2 has a role of appropriately forming the buffer layer 3 (nitride semiconductor layer 3) having different lattice constants and thermal expansion coefficients on the base substrate 1, and the film thickness, composition, etc. are determined according to the purpose. What is necessary is just to set suitably. If the constituent material of the buffer layer is a layer made of a nitride semiconductor containing Ga and Al, it can be said that aluminum nitride (AlN) is preferable from the viewpoint of flatness, dislocation controllability, and the like.

  As a method for forming the initial nitride layer 2 and the buffer layer 3 (nitride semiconductor layer 3), for example, a vapor phase growth method, in particular, a metal organic chemical vapor deposition (MOCVD) method is preferable. You may apply.

On one main surface of the base substrate 1, a recess having a diameter of 6 nm or more and 60 nm or less from the interface between the base substrate and the initial nitride toward the base substrate 1 in an arbitrary cross section of the nitride semiconductor substrate. The portion is 3 × 10 ⁸ pieces / cm ² or more and 1 × 10 ¹¹ pieces / cm ² or less.

  FIG. 2 is a cross-sectional view schematically showing the indented portion 10 formed on the surface layer portion of one main surface of the base substrate 1. Here, K is one main surface of the base substrate 1, W is the diameter of the recess 10, and D is the average depth of the recess 10. In the present invention, the depth is represented by the average depth D. The recess 10 may be filled with a material X (not shown).

  Since the nitride semiconductor substrate is difficult to manufacture completely uniformly up to the very outer peripheral edge of the substrate due to the manufacturing method, the arbitrary one cross section is the very outer peripheral edge of the nitride semiconductor substrate. It should be observed avoiding the part. Therefore, as will be described later, for example, a position about 5 to 25 mm inside from the outer peripheral end is preferable as the observation position.

  In the present invention, the “cross section” is a plane perpendicular to the one principal surface of the base substrate 1, but does not have to be strictly perpendicular, and is about ± 20 ° from the direction perpendicular to the one principal surface. Deviation is allowed. For example, the cleavage plane obtained by cleaving the silicon single crystal substrate 1 having the plane orientation (111) with a diamond pen or the like is 19.47 °, which is not a problem in practice.

  As shown in FIG. 2, the diameter W in the present invention is an angle formed by the base substrate 1 and the recess 10 or the material X (not shown) filled in the recess 10 on one main surface K. Let the part p1, p2 be both ends, and let the distance be the actual value. Actually, when the indentation 10 is viewed from one principal surface direction, it is a substantially circular shape, a substantially elliptical shape, or a polygon with a rounded corner. However, in the present invention, the interval between the corner portions p1 and p2 obtained in the cross-sectional observation view is shown. Is considered as the diameter W of the indentation 10.

  As shown in FIG. 3, the average depth D in the present invention is a boundary between the base substrate 1 and the recess 10 or the material X (not shown) filled in the recess 10 below one main surface K. It is assumed that the average value of the intervals between K, which is measured at a total of three points, that is, the corners p3, p4 formed in the part and the central part p5 of the line segment formed by the two corners.

  The diameter W, the average depth D, and the one principal surface K are preferably formed by using a technique such as cleaving or cutting the nitride semiconductor substrate along an arbitrary diameter by other methods and polishing. It is obtained by observing the cross section. Then, the sampling points are a total of three locations, that is, the center portion of the nitride semiconductor substrate on the surface cleaved with respect to the diametrical direction and 20 mm inside from the outer peripheral end portions on both sides. Furthermore, in each sampling location, within the range where a width of 500 nm was observed as an image, arbitrary five indentations 10 were selected, their diameter W and average depth D were observed, and the measured values were averaged. Use the value.

The density (pieces / cm ² ) of the indentations 10 in the present invention is the unit area cm ² by averaging the total number of the indentations 10 within the range where the width of 500 nm is observed as an image at the above three locations. Calculated in terms of the number of hits.

  Although the above shows a suitable example, the location where the cross section is obtained is not necessarily limited to the center and the outer periphery, and any three locations may be used as necessary. Also, the width can be set as necessary in the range of 300 nm to 1000 nm.

As a preferred example, the density of the recessed portions 10 is expressed by the number per unit area, but may be expressed by the density per unit length. In the observation with a transmission electron microscope (TEM), the thickness direction is also seen through, so the number per unit area is counted, but in the observation with the scanning electron microscope (SEM), the number per unit length is counted. Therefore, in this case, unit length conversion is preferable. As an example, when converted per unit length, the preferred range of the present invention is 1 × 10 ³ pieces / cm or more and 3 × 10 ⁵ pieces / cm or less.

  The dimensions, number, etc. of the indentations 10 are preferably obtained by direct measurement from an image obtained by photographing a cross section with a TEM, but may be analyzed by appropriate image processing. In addition, a technique other than TEM, for example, SEM, or scanning transmission electron microscope (STEM) may be used.

  As known in the art, since an island-shaped formation due to initial nitride is difficult to be formed on a flat main surface, the crystallinity of the layer 2 formed thereon (on the main surface) is low. Getting worse. For this reason, a certain degree of unevenness or level difference has been formed on one main surface of the base substrate 1.

  In the present invention, the indentation 10 corresponding to the unevenness is made a very small size compared to the conventional one, so that the occurrence frequency of island-shaped formed bodies by the initial nitride per unit area on one main surface is further increased. Can be high. In addition, the size of the island-shaped formed body itself becomes very small, and a large number of small-sized island-shaped formed bodies are generated, so that the layer 2 has excellent flatness and crystallinity that is superior to the conventional one. Layer.

  As a result, it was found that the breakdown voltage characteristics of the nitride semiconductor layers 3, 4, and 5 formed on the layer 2 are improved due to the good crystallinity of the formed layer 2.

In the present invention, in any one cross section of the nitride semiconductor substrate, the number of recessed portions 10 having a diameter of 6 nm or more and 60 nm or less is 3 × 10 ⁸ pieces / cm ² from the interface between the base substrate 1 and the layer 2 to the base substrate 1 side. The density is 1 × 10 ¹¹ pieces / cm ² or less.

  The diameter W of the recess 10 is 6 nm or more and 60 nm or less. If the diameter W is less than 6 nm, an island-shaped formed body may not be generated, and if it exceeds 60 nm, the indentation 10 itself may be a source of new crystal defects.

  The indentation 10 preferably has a depth (average depth D) of 3 nm or more and 45 nm or less from the interface between the base substrate 1 and the layer 2 toward the base substrate 1 side. If the average depth D is less than 3 nm, island-shaped formations may not be generated, and if it exceeds 45 nm, the indentation 10 itself may become a new crystal defect source. More preferably, it is 10 nm or more and 20 nm or less.

In the present invention, the recessed portion 10 exists at a density of 3 × 10 ⁸ pieces / cm ² or more and 1 × 10 ¹¹ pieces / cm ² or less.

If it is less than 3 × 10 ⁸ pieces / cm ² , the distance between the island-shaped formed bodies is too wide, and the probability of growing and bonding to each other becomes extremely low, and crystal defects may remain. On the other hand, if it exceeds 1 × 10 ¹¹ pieces / cm ² , the distance between the indentations 10 is too narrow, and the island-like formed bodies that are generated from this as a starting point are grown and remain in a protruding shape. As a result, it may be a source of crystal defects.

  The recessed portion 10 is different from the base substrate 1 in at least one of composition, crystal structure, crystal orientation, and crystal phase. That is, the effect of the present invention is exhibited if the indentation 10 is different from the base substrate 1 in at least one of the forms listed above. In other words, the indentation 10 need not be “same” as the underlying substrate 1 and can take a wide range of forms.

  In addition, even if the hollow part 10 does not have any material, what is called a space | gap can also obtain the effect of this invention. Examples of voids include defects, voids, closed pores, and the like. Further, the gap may not necessarily be a space as a whole of the recess 10, but may have a form in which some material exists in part.

  Alternatively, the material X has the same composition as the base substrate 1 but is polycrystalline or amorphous with respect to the single crystal, or the crystal orientation is different between the single crystals. It can be said that the range.

  By having the above-described configuration, the initial nitride grown on the upper portion of the recess 10 is significantly different in the growth rate and growth direction from the initial nitride grown on the upper portion of the base substrate 1. Are formed effectively in the early stages of growth.

  As an example, if the base substrate 1 is a single crystal having a crystal orientation (111), the material X is the same single crystal, but an orientation other than the crystal orientation (111), for example, (100), (110), ( 115) or the like.

  The material X to be filled is preferably an inorganic material, more preferably a polycrystalline or amorphous oxide or nitride. Specific examples of the material X include oxygen precipitates contained in the surface layer portion of a high concentration boron-doped silicon single crystal substrate. That is, when the material X is polycrystalline or amorphous, filling of the recessed portion 10 with the polycrystalline or amorphous material is easily and reliably performed.

  Here, in the present invention, “filling” means that the depression 10 on the lower side, that is, on the base substrate 1 side, with one principal surface K as a boundary, is composed of only the material X (for example, the various inorganic materials). It shall be shown that However, the interface between the material X and the layer 2 does not have to be completely coincident with the one principal surface K, and the interface region between the material X and the layer 2 may form gentle irregularities. That is, as shown in FIG. 4, the presence of the overhanging portion 12 formed by the boundary line 20 or 21 in the vertical direction is also within the scope of the present invention.

  The interval between the overhang portions 12 (the range of irregularities on the surface of the overhang portion 12) is preferably within ± 20% of the average depth D, and more preferably within ± 10%. If the distance between the protruding portions 12 is too large, the degree of curvature of the unevenness is excessive, and the layer 2 formed immediately above may grow depending on the degree of curvature, which may cause crystal defects. Arise.

  The nitride semiconductor substrate according to the present invention includes an initial nitride layer 2 and nitride semiconductor layers 3, 4, 5 (buffer layer 3, electron transit layer 4, electron supply on one main surface K of the base substrate 1. Layers 5) are laminated in this order. Since the base substrate 1 has the characteristic recess 10 as described above, the dislocations in the initial nitride and the nitride semiconductor are few, and thereby a nitride semiconductor substrate with improved breakdown voltage characteristics can be obtained.

In the present invention, when the base substrate 1 is a silicon single crystal, it is more preferable that the silicon single crystal contains boron of 1 × 10 ¹⁸ atoms / cm ³ or more. If the boron concentration is too high, there is a concern that it may cause a new crystal defect, so the upper limit is preferably 5 × 10 ²⁰ atoms / cm ³ or less.

  When the silicon single crystal substrate 1 is highly doped with boron, the strength of the substrate increases and warpage is reduced. The base substrate 1 having a small warpage has a small deformation of the base substrate 1 at the time of initial nitride lamination, and synergistically exhibits the effect of suppressing the occurrence of dislocations.

  Further, since the silicon single crystal substrate 1 of high-concentration boron dope has a high density of oxygen precipitates that are the material of the recess 10, that is, the material X is relatively small in the surface layer portion, It is suitable for manufacturing the hollow part 10 which has the size and distribution which concerns on embodiment of this invention.

Note that it is more preferable that the boron concentration is 5 × 10 ¹⁸ atoms / cm ³ or more because the density of oxygen precipitates is further increased within the scope of the present invention and the effects of the present invention are improved.

Further, as a preferable manufacturing method of the nitride semiconductor substrate of the present invention, a silicon single crystal substrate 1 having an oxygen concentration of 8 × 10 ¹⁷ cm ⁻³ or more and 1.8 × 10 ¹⁸ cm ⁻³ or less is at least 1000 ° C. or more. And a step of heat treatment in a non-oxidizing atmosphere for 1 minute or longer.

When the silicon single crystal substrate 1 having an oxygen concentration of 8 × 10 ¹⁷ cm ⁻³ or more and 1.8 × 10 ¹⁸ cm ⁻³ or less is heat-treated in a non-oxidizing atmosphere at least 1000 ° C. for 1 minute or more, it is exposed on the surface of the substrate. Part or all of the oxygen precipitates disappear due to the outward diffusion of oxygen by heat treatment in a non-oxidizing atmosphere, and the traces of the precipitates remain as cavities. In the present invention, this is utilized as the recess 10.

  Here, the large hollow recess is filled with the initial nitride, the small recess is filled with the remaining silicon oxide and the initial nitride, and the deposited portion without the recess constitutes the material X of the recess 10 as it is.

The silicon single crystal substrate 1 having an oxygen concentration of 8 × 10 ¹⁷ cm ⁻³ or more and 1.8 × 10 ¹⁸ cm ⁻³ or less is heat-treated in a non-oxidizing atmosphere at least 1000 ° C. for 1 minute or more. Thus, the base substrate 1 having a diameter W, an average depth D, and a density distribution can be obtained. If the oxygen concentration is too low, the density becomes too small, and if the oxygen concentration is too high, the diameter W and the average depth D may become excessive.

  Further, the diameter W, the average depth D, and the density of the recessed portion 10 can be adjusted by heat treatment in a non-oxidizing atmosphere at 1000 ° C. or more for 1 minute or more. When the temperature of the heat treatment is too low or the time of the heat treatment is too short, the values of the diameter W and the average depth D are too low, the temperature of the heat treatment is too high, or the time of the heat treatment is too long, The diameter W and the average depth D may be too large.

  Of course, the indentation 10 may be formed by other methods capable of realizing the diameter W, the average depth D, and the density of the present invention, such as chemical surface treatment.

  As described above, the nitride semiconductor substrate according to the present invention has a unique structure in which a large number of very small depressions 10 that may be filled with an inorganic material are formed on one main surface of a base substrate. With this structure alone, dislocations in the nitride semiconductor layer formed on the base substrate can be reduced, and particularly the breakdown voltage characteristics can be dramatically improved.

  EXAMPLES Hereinafter, although this invention is demonstrated further more concretely based on an Example, this invention is not restrict | limited by the following Example.

[Example 1]
(Preparation of base substrate)
First, a silicon single crystal substrate having a diameter of 6 inches, a plane orientation (111), boron doping, a specific resistance of 0.004 Ωcm, and an oxygen concentration of 1.0 × 10 ¹⁸ cm ⁻³ was prepared as a base substrate.

(Lamination of initial nitride and nitride semiconductor)
A nitride semiconductor substrate having a layer structure as shown in FIG. 1 was produced by the following steps.
First, the silicon single crystal substrate was set in an MOCVD apparatus, and after heat-up and gas replacement, heat treatment was performed in an atmosphere of 1000 ° C. for 15 minutes and 100% hydrogen.
Subsequently, trimethylaluminum (TMA) and ammonia (NH ₃ ) were used as source gases, and an initial nitride layer 2 made of an AlN single crystal having a carbon concentration of 1 × 10 ¹⁸ atoms / cm ³ and a thickness of 100 nm was formed at 500 ° C. Vapor phase growth. In all subsequent formations of the group 13 nitride semiconductor layer, the reference of the growth temperature is set to 1000 ° C., and fine adjustment is made in the range of 1 to 15 ° C. On the layer 2, trimethylgallium (TMG), TMA, and NH ₃ are used as source gases, and an Al _x Ga _1-x N single crystal layer (x x 5 × 10 ¹⁹ atoms / cm ³ , 300 nm thick) = 0.1) was vapor grown.
Next, TMG, TMA, and NH ₃ are used as the source gas, and an AlN single crystal layer having a thickness of 5 nm and a GaN single crystal layer having a thickness of 30 nm are alternately formed at a carbon concentration of 5 × 10 ¹⁹ atoms / cm ^3. by vapor phase growth, subsequently, at a carbon concentration ^{1 × 10 18 atoms / cm 3} , laminated in the same manner GaN single crystal layer having a thickness of 1250 nm, to form a buffer layer 3.
Thereafter, a GaN single crystal layer having a carbon concentration of 1 × 10 ¹⁶ atoms / cm ³ and a thickness of 700 nm is stacked in the same manner as an electron transit layer that is the active layer 4, and an 18 nm-thick Al layer is further formed as an electron supply layer. _{A y} Ga _1-y N single crystal layer (y = 0.26) was laminated in the same manner to obtain a group 13 nitride semiconductor substrate.
Note that the thickness and carbon concentration of each layer formed by vapor phase growth were controlled by adjusting the flow rate and supply time of the source gas, the substrate temperature, and other known growth conditions.

[Comparative Example 1]
A sample of Comparative Example 1 was prepared and evaluated in the same manner as in Example 1 except that the heat treatment condition was 1000 ° C. × 5 minutes.

  The breakdown voltage of the nitride semiconductor substrate manufactured as described above was evaluated. In the breakdown voltage evaluation, recesses in the recess gate region and the element isolation region are formed by dry etching on each nitride semiconductor substrate obtained, and a Ni / Au electrode is formed on the electron supply layer 5 side as a gate electrode, and a source electrode and a drain. A Ti / Al electrode as an electrode and a Ti / Al electrode as a back electrode on the back side of the base substrate were formed by vacuum deposition, respectively, and 28 HEMT elements were produced in the plane. About this HEMT element, the pressure | voltage resistance was measured using the commercially available curve tracer. A pass rate of all 28 pieces was determined as a pressure-resistant yield (%), with 600V or higher being accepted and less than 600V being rejected.

  In Table 1, the size and density of the indentation 10 are measured using TEM at three locations, one central part of the main surface of the substrate and 20 mm inside (both ends) from the outer periphery, and the results are combined with the results of the breakdown voltage yield. Show. In Table 1, an evaluation was made with a breakdown voltage yield of 50% or more as (◯) and less than 50% as (x).

  From the results shown in Table 1, in Example 1 within the scope of the present invention, the breakdown voltage yield was as good as 80% or more. On the other hand, Comparative Example 1 in which the diameter W is outside the implementation range of the present invention has a breakdown voltage yield of less than 50%, which is inferior to Example 1.

  The oxide film formed on the surface of the silicon single crystal substrate completely disappears in Example 1 where the heat treatment time is long, and partially remains in Comparative Example 1 where the heat treatment time is short compared to Example 1. ing. For this reason, in Example 1, the recessed part 10 is uniformly formed on one main surface as a whole, and as a result, the recessed part 10 with each comparatively small diameter W is formed in high density.

  On the other hand, in Comparative Example 1, since the oxide film partially remains, the recessed portion 10 is hardly formed in the portion where the oxide film remains, and is concentrated in the portion where there is no oxide film. 10 is formed. As a result, the diameter W of the single depression 10 is increased, and the density of the depression 10 is also reduced.

  In addition, the hollow part 10 observed in Example 1 and Comparative Example 1 has a void material as a whole and an amorphous material X containing a part of the void and the remainder of silicon, oxygen, and nitrogen. It was a mixture of things.

  Here, in comparison between Example 1 and Comparative Example 1, Example 1 having a longer heat treatment time had a diameter W and an average depth D smaller than those of Comparative Example 1, and the conditions for the heat treatment described above were used. The behavior was slightly different from that of Therefore, the inventors of the present invention conducted further experiments and studied more preferable conditions for carrying out the present invention.

[Example 2]
A sample of Example 2 was prepared and evaluated in the same manner as in Example 1 except that the heat treatment condition was 1000 ° C. × 7 minutes.

[Example 3]
A sample of Example 3 was prepared and evaluated in the same manner as Example 1 except that the heat treatment condition was 1000 ° C. × 10 minutes.

[Example 4]
A sample of Example 4 was prepared and evaluated in the same manner as Example 1 except that the heat treatment condition was 1000 ° C. × 30 minutes.

[Comparative Example 2]
A sample of Comparative Example 2 was prepared and evaluated under the same conditions as in Example 1 except that the heat treatment conditions were 1100 ° C. × 10 minutes.

[Comparative Example 3]
A sample of Comparative Example 3 was prepared and evaluated under the same conditions as in Example 1 except that the heat treatment conditions were 900 ° C. × 10 minutes.
[Comparative Example 4]
A sample of Comparative Example 4 was prepared and evaluated under the same conditions as in Example 1 except that the heat treatment conditions were 800 ° C. × 10 minutes.

  Similarly to Table 1, each size and density of the recessed part 10 of Examples 2-4 and Comparative Examples 2-4 were measured. Table 2 shows the yield results of breakdown voltage. In Table 2, the pressure yield was evaluated as (◯) when the breakdown voltage yield exceeded 60%, (Δ) when 50% or more and 60% or less, and (×) when less than 50%.

  From the results of Table 2, Example 2 had a breakdown voltage yield of 60%, which was inferior to the breakdown voltage yield of Example 1 of 90%. This is presumably because the heat treatment time in Example 2 is shorter than that in Example 1, so that the oxide film partially remains and the size of the diameter W is relatively large. However, also in Example 2, since the density of the hollow part 10 is sufficiently high as compared with Comparative Example 1, a level exceeding the breakdown voltage yield of 50% can be secured.

  Example 3 had a breakdown voltage yield of 95%, which was superior to that of Example 1 with a breakdown voltage yield of 90%. As described above, when the oxide film formed on the surface of the silicon single crystal substrate remains, the diameter W of the indented portion 10 tends to increase, but in Example 3, the time for the heat treatment is almost complete. Therefore, the diameter W was smaller than that of Example 1 and appropriate. In addition, since the oxide film is almost absent, it is considered that the recessed portion 10 is also formed uniformly on one main surface, and the breakdown voltage yield is further improved.

  For this reason, in Example 2 in which the heat treatment time was shorter than that in Example 3, the breakdown voltage yield tended to decrease slightly due to the influence of the remaining oxide film. That is, the state in which the heat treatment time is optimally controlled and the oxide film formed on the surface of the silicon single crystal substrate is just zero is the best mode of the present invention. At this time, the breakdown voltage yield is particularly high. It will be a thing.

  However, if the time for the heat treatment is too long, the generated indentation 10 further grows and both the diameter W and the average depth D increase. Since the heat treatment time in Example 1 is longer than that in Example 3, the size of each recess 10 is relatively large. Regarding the breakdown voltage yield, it can be seen that the breakdown voltage yield of Example 3 is further improved as compared with Example 1. That is, in Example 3, it is considered that the size of the indentation part 10 is made more appropriate, and a more preferable range of the diameter W of the present invention is 10 nm or more and 20 nm or less.

  Example 4 had a breakdown voltage yield of 85%, which was better than Example 2, but was inferior to Example 1. In Example 4, since the heat treatment time was set to 30 minutes longer than that in Example 1, the growth of the recessed portion 10 further progressed, and it was separated from the more preferable range of the diameter W from 10 nm to 20 nm. Yield seems to have fallen slightly.

  On the other hand, in Comparative Example 2, the diameter W was 70 nm exceeding the implementation range of the present invention, and as a result, the breakdown voltage yield was greatly reduced to 30%. This is because, in Comparative Example 2, the temperature of the heat treatment was set to 1100 ° C., which is higher than 1000 ° C. in Examples 1 to 4, so that the growth of the recessed portion 10 was rapidly promoted and the size thereof was enlarged. This is thought to be the cause. Note that the temperature of the heat treatment has a greater influence on the growth of the recessed portion 10 than the time of the heat treatment.

  In Comparative Example 3, the temperature of the heat treatment was lowered to 900 ° C. As a result, the diameter W was as small as 4 nm, and the breakdown voltage yield was reduced to 10%. When the temperature of the heat treatment is low, a number of extremely minute holes are partially formed in the oxide film, and the minute depressions 10 are formed under these holes. Therefore, although the recess 10 itself is formed, the size is hardly increased due to the influence of the oxide film as compared with the first to fourth embodiments, and the oxide film remains almost, so the nitride formed thereon is formed. The crystallinity of the physical semiconductor layer is deteriorated, resulting in a large leakage current, leading to a decrease in breakdown voltage yield.

  In Comparative Example 4, the temperature of the heat treatment was further lowered to 800 ° C. compared to Comparative Example 3. In this case, since the temperature is too low and the oxide film substantially remains, the recessed portion 10 is not formed. Therefore, since the oxide film remains on the entire surface of the base substrate, the crystallinity of the nitride semiconductor layer formed thereon is remarkably deteriorated, the leakage current increases, and the breakdown voltage yield becomes zero.

  From the above, in the case where a silicon single crystal is used for the base substrate 1, the size of the indented portion 10 is effective in removing the oxide film formed on the silicon single crystal substrate almost completely. It can be said that a preferred embodiment of the present invention is to optimize the heat treatment conditions before the formation of the layer made of the initial nitride so as to obtain an appropriate size within the obtained range.

1 Base substrate (silicon single crystal substrate)
2 Layer made of initial nitride 3 Nitride semiconductor layer (buffer layer)
4 Nitride semiconductor layer (electron transit layer)
5 Nitride semiconductor layer (electron supply layer)
DESCRIPTION OF SYMBOLS 10 Indentation part 12 Overhang | projection part 20, 21 The boundary line of a base substrate and the layer which consists of initial nitrides W The diameter of the indentation part D The average depth of the indentation part K One main surface of a base board X Material p1, p2, p3 , P4 corner p5 center

Claims (4)

A nitride semiconductor substrate in which an initial nitride and a nitride semiconductor are sequentially stacked on one main surface of a base substrate,
In an arbitrary cross section of the nitride semiconductor substrate, 3 × 10 ⁸ / cm ^{2 to} 1 × 10 indentations having a diameter of 6 nm to 60 nm are formed on the base substrate side from the interface between the base substrate and the initial nitride. A nitride semiconductor substrate having ¹¹ / cm ² or less.   2. The nitride semiconductor substrate according to claim 1, wherein the recess has a depth of 3 nm or more and 45 nm or less from an interface between the base substrate and the initial nitride toward the base substrate side. .   3. The nitride semiconductor substrate according to claim 1, wherein at least one of a composition, a crystal structure, a crystal orientation, and a crystal phase is different from the base substrate.   4. The nitride semiconductor substrate according to claim 3, wherein the indented portion is at least one of a void or a form filled with a polycrystalline or amorphous inorganic material.

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