JP2016537724A - ベクトル処理動作のために実行ユニットに入力ベクトルデータのインフライトフォーマット変換を提供するためにベクトルデータメモリと実行ユニットとの間でデータフローパスにおいてフォーマット変換回路を利用するベクトル処理エンジン(vpe)および関連するベクトル処理システムと方法 - Google Patents
ベクトル処理動作のために実行ユニットに入力ベクトルデータのインフライトフォーマット変換を提供するためにベクトルデータメモリと実行ユニットとの間でデータフローパスにおいてフォーマット変換回路を利用するベクトル処理エンジン(vpe)および関連するベクトル処理システムと方法 Download PDFInfo
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30181—Instruction operation extension or modification
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
- G06F9/30025—Format conversion instructions, e.g. Floating-Point to Integer, decimal conversion
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/76—Architectures of general purpose stored program computers
- G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
- G06F15/8053—Vector processors
- G06F15/8076—Details on data register access
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
- G06F9/30032—Movement instructions, e.g. MOVE, SHIFT, ROTATE, SHUFFLE
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
- G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
- G06F9/3887—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled by a single instruction for multiple data lanes [SIMD]
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
- G06F9/3887—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled by a single instruction for multiple data lanes [SIMD]
- G06F9/38873—Iterative single instructions for multiple data lanes [SIMD]
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
- G06F9/3893—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled in tandem, e.g. multiplier-accumulator
- G06F9/3895—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled in tandem, e.g. multiplier-accumulator for complex operations, e.g. multidimensional or interleaved address generators, macros
- G06F9/3897—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled in tandem, e.g. multiplier-accumulator for complex operations, e.g. multidimensional or interleaved address generators, macros with adaptable data path
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/76—Arrangements for rearranging, permuting or selecting data according to predetermined rules, independently of the content of the data
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- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Software Systems (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Mathematical Physics (AREA)
- Computing Systems (AREA)
- Advance Control (AREA)
- Executing Machine-Instructions (AREA)
- Complex Calculations (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US14/082,088 US9880845B2 (en) | 2013-11-15 | 2013-11-15 | Vector processing engines (VPEs) employing format conversion circuitry in data flow paths between vector data memory and execution units to provide in-flight format-converting of input vector data to execution units for vector processing operations, and related vector processor systems and methods |
| US14/082,088 | 2013-11-15 | ||
| PCT/US2014/065200 WO2015073526A1 (en) | 2013-11-15 | 2014-11-12 | Vector processing engine employing format conversion circuitry in data flow paths between vector data memory and execution units, and related method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2016537724A true JP2016537724A (ja) | 2016-12-01 |
| JP2016537724A5 JP2016537724A5 (enExample) | 2018-04-26 |
Family
ID=52007281
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2016530970A Pending JP2016537724A (ja) | 2013-11-15 | 2014-11-12 | ベクトル処理動作のために実行ユニットに入力ベクトルデータのインフライトフォーマット変換を提供するためにベクトルデータメモリと実行ユニットとの間でデータフローパスにおいてフォーマット変換回路を利用するベクトル処理エンジン(vpe)および関連するベクトル処理システムと方法 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US9880845B2 (enExample) |
| EP (1) | EP3069232A1 (enExample) |
| JP (1) | JP2016537724A (enExample) |
| CN (1) | CN105723328A (enExample) |
| WO (1) | WO2015073526A1 (enExample) |
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| US9495154B2 (en) | 2013-03-13 | 2016-11-15 | Qualcomm Incorporated | Vector processing engines having programmable data path configurations for providing multi-mode vector processing, and related vector processors, systems, and methods |
| US9619227B2 (en) | 2013-11-15 | 2017-04-11 | Qualcomm Incorporated | Vector processing engines (VPEs) employing tapped-delay line(s) for providing precision correlation / covariance vector processing operations with reduced sample re-fetching and power consumption, and related vector processor systems and methods |
| US9977676B2 (en) | 2013-11-15 | 2018-05-22 | Qualcomm Incorporated | Vector processing engines (VPEs) employing reordering circuitry in data flow paths between execution units and vector data memory to provide in-flight reordering of output vector data stored to vector data memory, and related vector processor systems and methods |
| US9792118B2 (en) | 2013-11-15 | 2017-10-17 | Qualcomm Incorporated | Vector processing engines (VPEs) employing a tapped-delay line(s) for providing precision filter vector processing operations with reduced sample re-fetching and power consumption, and related vector processor systems and methods |
| US9684509B2 (en) | 2013-11-15 | 2017-06-20 | Qualcomm Incorporated | Vector processing engines (VPEs) employing merging circuitry in data flow paths between execution units and vector data memory to provide in-flight merging of output vector data stored to vector data memory, and related vector processing instructions, systems, and methods |
| CN107315564B (zh) * | 2016-04-26 | 2020-07-17 | 中科寒武纪科技股份有限公司 | 一种用于执行向量超越函数运算的装置和方法 |
| CN107315567B (zh) * | 2016-04-26 | 2020-08-07 | 中科寒武纪科技股份有限公司 | 一种用于执行向量最大值最小值运算的装置和方法 |
| CN111651203B (zh) * | 2016-04-26 | 2024-05-07 | 中科寒武纪科技股份有限公司 | 一种用于执行向量四则运算的装置和方法 |
| CN111651201B (zh) * | 2016-04-26 | 2023-06-13 | 中科寒武纪科技股份有限公司 | 一种用于执行向量合并运算的装置和方法 |
| CN107092530B (zh) * | 2017-03-01 | 2021-01-05 | 广州银禾网络通信有限公司 | 一种基于分布式内存的信令数据处理方法及系统 |
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| US11277455B2 (en) | 2018-06-07 | 2022-03-15 | Mellanox Technologies, Ltd. | Streaming system |
| US20200106828A1 (en) * | 2018-10-02 | 2020-04-02 | Mellanox Technologies, Ltd. | Parallel Computation Network Device |
| US11625393B2 (en) | 2019-02-19 | 2023-04-11 | Mellanox Technologies, Ltd. | High performance computing system |
| EP3699770B1 (en) | 2019-02-25 | 2025-05-21 | Mellanox Technologies, Ltd. | Collective communication system and methods |
| US20190220278A1 (en) * | 2019-03-27 | 2019-07-18 | Menachem Adelman | Apparatus and method for down-converting and interleaving multiple floating point values |
| CN111813447B (zh) | 2019-04-12 | 2022-11-08 | 杭州中天微系统有限公司 | 一种数据拼接指令的处理方法和处理装置 |
| CN111813446A (zh) * | 2019-04-12 | 2020-10-23 | 杭州中天微系统有限公司 | 一种数据加载和存储指令的处理方法和处理装置 |
| CN111814093A (zh) * | 2019-04-12 | 2020-10-23 | 杭州中天微系统有限公司 | 一种乘累加指令的处理方法和处理装置 |
| EP3987392A1 (en) * | 2019-06-25 | 2022-04-27 | Huawei Technologies Co., Ltd. | De-spreader system and method |
| US11221848B2 (en) * | 2019-09-25 | 2022-01-11 | Intel Corporation | Sharing register file usage between fused processing resources |
| US11750699B2 (en) | 2020-01-15 | 2023-09-05 | Mellanox Technologies, Ltd. | Small message aggregation |
| US11252027B2 (en) | 2020-01-23 | 2022-02-15 | Mellanox Technologies, Ltd. | Network element supporting flexible data reduction operations |
| US11876885B2 (en) | 2020-07-02 | 2024-01-16 | Mellanox Technologies, Ltd. | Clock queue with arming and/or self-arming features |
| US11556378B2 (en) | 2020-12-14 | 2023-01-17 | Mellanox Technologies, Ltd. | Offloading execution of a multi-task parameter-dependent operation to a network device |
| CN116010762A (zh) * | 2021-10-22 | 2023-04-25 | 意法半导体(格勒诺布尔2)公司 | 包括硬件计算器的集成电路和相应的计算方法 |
| US20230135306A1 (en) * | 2021-11-03 | 2023-05-04 | Apple Inc. | Crossbar circuit for unaligned memory access in neural network processor |
| US12309070B2 (en) | 2022-04-07 | 2025-05-20 | Nvidia Corporation | In-network message aggregation for efficient small message transport |
| US11922237B1 (en) | 2022-09-12 | 2024-03-05 | Mellanox Technologies, Ltd. | Single-step collective operations |
| US12489657B2 (en) | 2023-08-17 | 2025-12-02 | Mellanox Technologies, Ltd. | In-network compute operation spreading |
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-
2013
- 2013-11-15 US US14/082,088 patent/US9880845B2/en active Active
-
2014
- 2014-11-12 CN CN201480062431.9A patent/CN105723328A/zh active Pending
- 2014-11-12 JP JP2016530970A patent/JP2016537724A/ja active Pending
- 2014-11-12 EP EP14806777.0A patent/EP3069232A1/en not_active Withdrawn
- 2014-11-12 WO PCT/US2014/065200 patent/WO2015073526A1/en not_active Ceased
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| JP2006504165A (ja) * | 2002-10-23 | 2006-02-02 | フリースケール セミコンダクター インコーポレイテッド | 単一命令多重データ・マイクロプロセッサにおけるベクトル並べ換えのための装置、システム及び方法 |
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Also Published As
| Publication number | Publication date |
|---|---|
| US9880845B2 (en) | 2018-01-30 |
| US20150143086A1 (en) | 2015-05-21 |
| WO2015073526A1 (en) | 2015-05-21 |
| CN105723328A (zh) | 2016-06-29 |
| EP3069232A1 (en) | 2016-09-21 |
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