JP2016537723A - フィルタベクトル処理動作のためのタップ付き遅延線を利用するベクトル処理エンジンと、関連するベクトル処理システムおよび方法 - Google Patents
フィルタベクトル処理動作のためのタップ付き遅延線を利用するベクトル処理エンジンと、関連するベクトル処理システムおよび方法 Download PDFInfo
- Publication number
- JP2016537723A JP2016537723A JP2016530966A JP2016530966A JP2016537723A JP 2016537723 A JP2016537723 A JP 2016537723A JP 2016530966 A JP2016530966 A JP 2016530966A JP 2016530966 A JP2016530966 A JP 2016530966A JP 2016537723 A JP2016537723 A JP 2016537723A
- Authority
- JP
- Japan
- Prior art keywords
- vector data
- data sample
- sample set
- input
- correlation
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
- G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/76—Architectures of general purpose stored program computers
- G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
- G06F15/8053—Vector processors
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
- G06F9/3001—Arithmetic instructions
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
- G06F9/3887—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled by a single instruction for multiple data lanes [SIMD]
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
- G06F9/3887—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled by a single instruction for multiple data lanes [SIMD]
- G06F9/38873—Iterative single instructions for multiple data lanes [SIMD]
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
- G06F9/3893—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled in tandem, e.g. multiplier-accumulator
- G06F9/3895—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled in tandem, e.g. multiplier-accumulator for complex operations, e.g. multidimensional or interleaved address generators, macros
- G06F9/3897—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled in tandem, e.g. multiplier-accumulator for complex operations, e.g. multidimensional or interleaved address generators, macros with adaptable data path
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Software Systems (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Computational Mathematics (AREA)
- Computing Systems (AREA)
- Mathematical Analysis (AREA)
- Mathematical Optimization (AREA)
- Pure & Applied Mathematics (AREA)
- Mathematical Physics (AREA)
- Advance Control (AREA)
- Executing Machine-Instructions (AREA)
- Complex Calculations (AREA)
- Data Exchanges In Wide-Area Networks (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US14/082,079 | 2013-11-15 | ||
| US14/082,079 US9619227B2 (en) | 2013-11-15 | 2013-11-15 | Vector processing engines (VPEs) employing tapped-delay line(s) for providing precision correlation / covariance vector processing operations with reduced sample re-fetching and power consumption, and related vector processor systems and methods |
| PCT/US2014/065190 WO2015073520A1 (en) | 2013-11-15 | 2014-11-12 | Vector processing engines employing a tapped-delay line for correlation vector processing operations, and related vector processor systems and methods |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2016537723A true JP2016537723A (ja) | 2016-12-01 |
| JP2016537723A5 JP2016537723A5 (enExample) | 2017-11-30 |
Family
ID=52001100
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2016530966A Pending JP2016537723A (ja) | 2013-11-15 | 2014-11-12 | フィルタベクトル処理動作のためのタップ付き遅延線を利用するベクトル処理エンジンと、関連するベクトル処理システムおよび方法 |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US9619227B2 (enExample) |
| EP (1) | EP3069234A1 (enExample) |
| JP (1) | JP2016537723A (enExample) |
| KR (1) | KR20160084460A (enExample) |
| CN (1) | CN105723330A (enExample) |
| WO (1) | WO2015073520A1 (enExample) |
Families Citing this family (19)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9495154B2 (en) | 2013-03-13 | 2016-11-15 | Qualcomm Incorporated | Vector processing engines having programmable data path configurations for providing multi-mode vector processing, and related vector processors, systems, and methods |
| US9880845B2 (en) | 2013-11-15 | 2018-01-30 | Qualcomm Incorporated | Vector processing engines (VPEs) employing format conversion circuitry in data flow paths between vector data memory and execution units to provide in-flight format-converting of input vector data to execution units for vector processing operations, and related vector processor systems and methods |
| US9977676B2 (en) | 2013-11-15 | 2018-05-22 | Qualcomm Incorporated | Vector processing engines (VPEs) employing reordering circuitry in data flow paths between execution units and vector data memory to provide in-flight reordering of output vector data stored to vector data memory, and related vector processor systems and methods |
| US9684509B2 (en) | 2013-11-15 | 2017-06-20 | Qualcomm Incorporated | Vector processing engines (VPEs) employing merging circuitry in data flow paths between execution units and vector data memory to provide in-flight merging of output vector data stored to vector data memory, and related vector processing instructions, systems, and methods |
| US9792118B2 (en) | 2013-11-15 | 2017-10-17 | Qualcomm Incorporated | Vector processing engines (VPEs) employing a tapped-delay line(s) for providing precision filter vector processing operations with reduced sample re-fetching and power consumption, and related vector processor systems and methods |
| US11277455B2 (en) | 2018-06-07 | 2022-03-15 | Mellanox Technologies, Ltd. | Streaming system |
| US20200106828A1 (en) * | 2018-10-02 | 2020-04-02 | Mellanox Technologies, Ltd. | Parallel Computation Network Device |
| US11625393B2 (en) | 2019-02-19 | 2023-04-11 | Mellanox Technologies, Ltd. | High performance computing system |
| EP3699770B1 (en) | 2019-02-25 | 2025-05-21 | Mellanox Technologies, Ltd. | Collective communication system and methods |
| CN112434253A (zh) * | 2019-08-26 | 2021-03-02 | 吕纪竹 | 一种实时判断大数据或流数据离散程度的方法 |
| US11750699B2 (en) | 2020-01-15 | 2023-09-05 | Mellanox Technologies, Ltd. | Small message aggregation |
| US11252027B2 (en) | 2020-01-23 | 2022-02-15 | Mellanox Technologies, Ltd. | Network element supporting flexible data reduction operations |
| US11876885B2 (en) | 2020-07-02 | 2024-01-16 | Mellanox Technologies, Ltd. | Clock queue with arming and/or self-arming features |
| US11556378B2 (en) | 2020-12-14 | 2023-01-17 | Mellanox Technologies, Ltd. | Offloading execution of a multi-task parameter-dependent operation to a network device |
| US12313774B2 (en) * | 2022-03-23 | 2025-05-27 | Nxp B.V. | Direction of arrival (DOA) estimation using circular convolutional network |
| US12309070B2 (en) | 2022-04-07 | 2025-05-20 | Nvidia Corporation | In-network message aggregation for efficient small message transport |
| US11922237B1 (en) | 2022-09-12 | 2024-03-05 | Mellanox Technologies, Ltd. | Single-step collective operations |
| US12489657B2 (en) | 2023-08-17 | 2025-12-02 | Mellanox Technologies, Ltd. | In-network compute operation spreading |
| CN117674961B (zh) * | 2023-11-20 | 2024-05-28 | 航天恒星科技有限公司 | 基于时空特征学习的低轨卫星网络时延预测方法 |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH10327126A (ja) * | 1997-04-30 | 1998-12-08 | Lucent Technol Inc | Cdma受信機 |
| JP2000349688A (ja) * | 1999-06-09 | 2000-12-15 | Nec Ic Microcomput Syst Ltd | デジタルマッチドフィルタ |
| JP2012505455A (ja) * | 2008-10-08 | 2012-03-01 | アーム・リミテッド | Simd積和演算動作を行うための装置及び方法 |
| WO2013063440A1 (en) * | 2011-10-27 | 2013-05-02 | Lsi Corporation | Vector processor having instruction set with vector convolution funciton for fir filtering |
Family Cites Families (21)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4504923A (en) * | 1982-07-19 | 1985-03-12 | General Dynamics, Pomona Division | Real time two-dimensional digital correlator |
| EP0466997A1 (en) | 1990-07-18 | 1992-01-22 | International Business Machines Corporation | Improved digital signal processor architecture |
| US5563817A (en) | 1992-07-14 | 1996-10-08 | Noise Cancellation Technologies, Inc. | Adaptive canceller filter module |
| US6704348B2 (en) * | 2001-05-18 | 2004-03-09 | Global Locate, Inc. | Method and apparatus for computing signal correlation at multiple resolutions |
| US7769076B2 (en) | 2001-05-18 | 2010-08-03 | Broadcom Corporation | Method and apparatus for performing frequency synchronization |
| US7756196B1 (en) | 2005-04-04 | 2010-07-13 | Acorn Technologies, Inc. | Efficient adaptive filters for CDMA wireless systems |
| US7933405B2 (en) * | 2005-04-08 | 2011-04-26 | Icera Inc. | Data access and permute unit |
| US8255446B2 (en) * | 2006-12-12 | 2012-08-28 | Arm Limited | Apparatus and method for performing rearrangement and arithmetic operations on data |
| JP5118155B2 (ja) | 2007-03-02 | 2013-01-16 | クゥアルコム・インコーポレイテッド | 中継器構成 |
| US7782252B2 (en) | 2007-06-02 | 2010-08-24 | Inchul Kang | System and method for GPS signal acquisition |
| US8407456B2 (en) | 2007-12-05 | 2013-03-26 | Qualcomm Incorporated | Method and instruction set including register shifts and rotates for data processing |
| US20110182169A1 (en) | 2009-09-13 | 2011-07-28 | Research Institute Of Tsinghua University In Shenzhen | Code division multiplexing method and system |
| US9092227B2 (en) | 2011-05-02 | 2015-07-28 | Anindya SAHA | Vector slot processor execution unit for high speed streaming inputs |
| US9275014B2 (en) | 2013-03-13 | 2016-03-01 | Qualcomm Incorporated | Vector processing engines having programmable data path configurations for providing multi-mode radix-2x butterfly vector processing circuits, and related vector processors, systems, and methods |
| US9495154B2 (en) | 2013-03-13 | 2016-11-15 | Qualcomm Incorporated | Vector processing engines having programmable data path configurations for providing multi-mode vector processing, and related vector processors, systems, and methods |
| US20140280407A1 (en) | 2013-03-13 | 2014-09-18 | Qualcomm Incorporated | Vector processing carry-save accumulators employing redundant carry-save format to reduce carry propagation, and related vector processors, systems, and methods |
| US9684509B2 (en) | 2013-11-15 | 2017-06-20 | Qualcomm Incorporated | Vector processing engines (VPEs) employing merging circuitry in data flow paths between execution units and vector data memory to provide in-flight merging of output vector data stored to vector data memory, and related vector processing instructions, systems, and methods |
| US9880845B2 (en) | 2013-11-15 | 2018-01-30 | Qualcomm Incorporated | Vector processing engines (VPEs) employing format conversion circuitry in data flow paths between vector data memory and execution units to provide in-flight format-converting of input vector data to execution units for vector processing operations, and related vector processor systems and methods |
| US9792118B2 (en) | 2013-11-15 | 2017-10-17 | Qualcomm Incorporated | Vector processing engines (VPEs) employing a tapped-delay line(s) for providing precision filter vector processing operations with reduced sample re-fetching and power consumption, and related vector processor systems and methods |
| US20150143076A1 (en) | 2013-11-15 | 2015-05-21 | Qualcomm Incorporated | VECTOR PROCESSING ENGINES (VPEs) EMPLOYING DESPREADING CIRCUITRY IN DATA FLOW PATHS BETWEEN EXECUTION UNITS AND VECTOR DATA MEMORY TO PROVIDE IN-FLIGHT DESPREADING OF SPREAD-SPECTRUM SEQUENCES, AND RELATED VECTOR PROCESSING INSTRUCTIONS, SYSTEMS, AND METHODS |
| US9977676B2 (en) | 2013-11-15 | 2018-05-22 | Qualcomm Incorporated | Vector processing engines (VPEs) employing reordering circuitry in data flow paths between execution units and vector data memory to provide in-flight reordering of output vector data stored to vector data memory, and related vector processor systems and methods |
-
2013
- 2013-11-15 US US14/082,079 patent/US9619227B2/en not_active Expired - Fee Related
-
2014
- 2014-11-12 JP JP2016530966A patent/JP2016537723A/ja active Pending
- 2014-11-12 EP EP14805754.0A patent/EP3069234A1/en not_active Withdrawn
- 2014-11-12 CN CN201480062412.6A patent/CN105723330A/zh active Pending
- 2014-11-12 KR KR1020167015676A patent/KR20160084460A/ko not_active Withdrawn
- 2014-11-12 WO PCT/US2014/065190 patent/WO2015073520A1/en not_active Ceased
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH10327126A (ja) * | 1997-04-30 | 1998-12-08 | Lucent Technol Inc | Cdma受信機 |
| JP2000349688A (ja) * | 1999-06-09 | 2000-12-15 | Nec Ic Microcomput Syst Ltd | デジタルマッチドフィルタ |
| JP2012505455A (ja) * | 2008-10-08 | 2012-03-01 | アーム・リミテッド | Simd積和演算動作を行うための装置及び方法 |
| WO2013063440A1 (en) * | 2011-10-27 | 2013-05-02 | Lsi Corporation | Vector processor having instruction set with vector convolution funciton for fir filtering |
Also Published As
| Publication number | Publication date |
|---|---|
| WO2015073520A1 (en) | 2015-05-21 |
| US20150143079A1 (en) | 2015-05-21 |
| KR20160084460A (ko) | 2016-07-13 |
| US9619227B2 (en) | 2017-04-11 |
| EP3069234A1 (en) | 2016-09-21 |
| CN105723330A (zh) | 2016-06-29 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP6373991B2 (ja) | フィルタベクトル処理動作のためのタップ付き遅延線を利用するベクトル処理エンジンと、関連するベクトル処理システムおよび方法 | |
| JP6339197B2 (ja) | 実行ユニットとベクトルデータメモリとの間のマージング回路を備えるベクトル処理エンジンおよび関連する方法 | |
| CN105765523B (zh) | 在向量数据存储器与执行单元之间的数据流路径中采用重排序电路系统的向量处理引擎以及相关的方法 | |
| JP2016537724A (ja) | ベクトル処理動作のために実行ユニットに入力ベクトルデータのインフライトフォーマット変換を提供するためにベクトルデータメモリと実行ユニットとの間でデータフローパスにおいてフォーマット変換回路を利用するベクトル処理エンジン(vpe)および関連するベクトル処理システムと方法 | |
| JP2016537723A (ja) | フィルタベクトル処理動作のためのタップ付き遅延線を利用するベクトル処理エンジンと、関連するベクトル処理システムおよび方法 | |
| JP2016537725A (ja) | 実行ユニットとベクトルデータメモリとの間のデータフローパスにおいて逆拡散回路を利用するベクトル処理エンジン、および関連する方法 | |
| JP6243000B2 (ja) | マルチモードベクトル処理を提供するためのプログラム可能データ経路構成を有するベクトル処理エンジン、ならびに関連ベクトルプロセッサ、システム、および方法 | |
| EP2972988A2 (en) | Vector processing engines having programmable data path configurations for providing multi-mode radix-2x butterfly vector processing circuits, and related vector processors, systems, and methods |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20171019 |
|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20171019 |
|
| A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20180720 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20180731 |
|
| A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 20190312 |