JP2016524241A - Fragment shader that performs vertex shader operations - Google Patents

Abstract

Graphic processing includes executing a vertex shader and a pixel shader by a GPU. The vertex index output from the vertex shader is written to the cache. The vertex index written in the cache is accessed by the pixel shader, and the vertex parameter value associated with the vertex index is accessed by the pixel shader in the memory unit. It is emphasized that this abstract is provided to comply with rules that require abstracts that allow researchers or other readers to immediately know the subject of technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims. [Selection] Figure 2B

Description

  Aspects of the present disclosure relate to computer graphics. In particular, this disclosure relates to the use of vertex shaders and pixel shaders in graphic processing devices.

  Graphics processing typically involves the cooperation of two processors: a central processing unit (CPU) and a graphics processing unit (GPU). A GPU is a dedicated electronic circuit designed to accelerate the creation of images in a frame buffer for output to a display. GPUs are used in embedded systems, tablet computers, portable gaming devices, mobile phones, personal computers, workstations and game consoles. GPUs are usually designed to be efficient when manipulating computer graphics. GPUs often have highly parallel processing architectures that make GPUs more effective than general-purpose CPUs due to algorithms that process large blocks of data in parallel.

  The CPU can perform specific graphics processing tasks and send commands to the GPU to render, for example, specific textures that have changed for the previous frame of the image. These drawing commands are coordinated by the CPU along with the graphics application interface (API) to send out graphics rendering commands corresponding to the state of the virtual environment of the particular application.

  To render a texture for a particular program, the GPU performs a series of processing tasks in a “graphics pipeline” to convert the video in the virtual environment into an image that is rendered on the display. A regular graphics pipeline generates a predetermined rendering or shading operation on a virtual object in virtual space, transforms and rasterizes the virtual object in the scene, generating pixel data in a format suitable for output to the display, and rendered Performing additional rendering tasks on pixels (or fragments) prior to outputting the image to the display.

  Virtual objects in images are often described in virtual space with respect to shapes known as primitives, which together constitute the shape of the object in the virtual scene. For example, rendered objects in the 3D virtual world are reduced to a series of individual triangle primitives with vertices defined with respect to their coordinates in 3D space, so that these polygons constitute the surface of the object To do. Each polygon has a corresponding index used by the graphics processing system to distinguish a given polygon from other polygons. Similarly, each vertex has a corresponding index used to distinguish a given vertex from other vertices. The graphic pipeline performs predetermined operations on these primitives to generate a video for the virtual scene and converts this data into a two-dimensional format suitable for playback by display pixels. As used herein, the term graphic primitive information (or simply “primitive information”) is used to refer to data representing graphic primitives. Such data includes, but is not limited to, vertex information (eg, data representing vertex position or vertex index) and polygon information, eg, polygon index and information that associates a particular vertex with a particular polygon. .

  A GPU can perform graphics pipeline rendering tasks by executing a program commonly known as a shader. Normal graphics pipelines display pixel data by manipulating vertex shaders (also known as "fragment shaders") that can manipulate specific properties of primitives per vertex, and downstream from vertex shaders in the graphics pipeline It includes a pixel shader that can manipulate a predetermined value for each pixel before sending it to. The pipeline is also a geometric shader that uses the output of the vertex shader to generate a new set of primitives (or corresponding primitive information) at various stages of the pipeline, executed by the GPU, and other predetermined general operations. Other shaders such as a computational shader (CS) that performs the task may be included.

  One challenge with processing graphics in the pipeline is that certain bottlenecks occur and degrade performance as data is input to and output from various shaders in the pipeline. In addition, to give developers more control over how aspects of shaders utilize various visual parameters and underlying data to allow developers of specific applications that run video to optimize the rendering process Is desirable.

  In this context, aspects of the present disclosure arise.

  According to aspects of this disclosure, a computer graphics processing method is adapted to write vertex index output from a vertex shader to a cache, to access a vertex index written to the cache by a pixel shader, and to support a vertex index by a pixel shader. Including accessing the attached vertex parameter value in the memory unit.

  In certain embodiments of the present disclosure, the computer graphic processing method further includes performing a vertex shader operation on the vertex parameter value by the pixel shader.

  In certain embodiments, the computer graphic processing method further includes interpolating vertex parameter values with a pixel shader.

  In some embodiments, accessing the vertex index includes replicating the vertex index from the cache to the local memory portion of the GPU, and accessing the index in the local memory portion by a pixel shader.

  In one embodiment, vertex shader operations include manipulating the visual effects of primitive vertices in a three-dimensional virtual space.

  In one embodiment, accessing vertex parameter values includes accessing parameter values for all three vertices of a triangle primitive.

  In one embodiment, the method includes performing a vertex shader operation on the vertex parameter value by the pixel shader, interpolating the parameter value by the pixel shader, and by the pixel shader after accessing the vertex parameter value. It further includes performing a pixel shader operation on the interpolated parameter value.

  In one embodiment, vertex shader output is limited to vertex position and vertex index, and the pixel shader performs the remaining vertex shader operations after accessing the vertex index.

  In one embodiment, the memory portion is the main memory of the system.

  In one embodiment, the parameter value is stored in a vertex buffer in main memory.

  According to aspects of the present disclosure, a graphics processing system includes a graphics processing unit (GPU), a memory unit, and a cache, the system implements a vertex shader and a pixel shader with the GPU, and vertex index output from the vertex shader to the cache. Implementing a graphics processing method including writing, accessing a vertex index written to the cache by a pixel shader, and accessing a vertex parameter value associated with the vertex index by a pixel shader in a memory unit Configured.

  In some embodiments, the memory portion is the main memory portion of the system.

  In one embodiment, the GPU includes a plurality of arithmetic units and a plurality of local memory units, and each of the local memory units is associated with one of the arithmetic units.

  In one embodiment, accessing the vertex index includes replicating the vertex index from the cache to the local memory portion, and accessing the vertex index from the local memory portion by the pixel shader.

  In one embodiment, the cache is integrated into the GPU.

  According to aspects of this disclosure, a non-transitory computer readable medium has computer readable instructions embodied therein, wherein the computer readable instructions are configured to perform a graphic processing method when executed, The method writes the vertex index output from the vertex shader to the cache, accesses the vertex index written to the cache by the pixel shader, and changes the vertex parameter value associated with the vertex index from the memory unit by the pixel shader. Including access.

  The teachings of the present disclosure can be readily understood by considering the following detailed description in conjunction with the accompanying drawings, in which:

1A-1C are schematic diagrams of triangle primitives illustrating various graphic processing techniques. 1D-1E are flow diagrams of conventional graphic processing techniques. FIG. 2A is an explanatory diagram of a conventional graphic processing technique having similarity to the embodiment of FIG. 1E. FIG. 2B is an illustration of a graphic processing technique according to aspects of the present disclosure. FIG. 3 is a flow diagram of a graphic processing technique according to aspects of the present disclosure. FIG. 4 is an illustration of a system for implementing a graphics processing technique in accordance with aspects of the present disclosure.

  The following detailed description includes a number of specific details for purposes of explanation, but those skilled in the art should understand that many variations and modifications to the following details are within the scope of the invention. is there. Accordingly, the exemplary embodiments of the invention described below are detailed without any loss of generality or limitation to the claimed invention.

Introduction According to aspects of this disclosure, the vertex shader output is reduced to the output position and vertex index only, and the pixel shader performs the residual vertex shader operation in the same way as a normal pixel shader operation, resulting in accelerated rendering of the object. It is.

  According to aspects of the present disclosure, in order to perform vertex shader operations on prime parameter values of a vertex, the pixel shader accesses the parameter values directly in system memory. The pixel shader then interpolates the parameter values and performs a pixel shader operation before the rendered pixel is output from the pixel shader to the frame buffer. Bottlenecks associated with throughput and parameter value replication are mitigated by outputting vertex indices and not all output parameters from the vertex shader, and using these indices to identify the parameter values in memory with the pixel shader. The

  1A-1C illustrate various aspects of a graphic processing technique and how vertex parameter interpolation is used to process a graphic and render a virtual object in an image. In order to define parameter values at various positions of the virtual object to be displayed, the graphic processing technique uses centroid interpolation processing. By way of example and not limitation, the parameter values are the position, color, texture coordinates, light emission, etc. at each vertex of the primitive located in the virtual space, and the centroid interpolation of these vertex parameters is the parameter at any position within the primitive. Used to specify a value. For example, any number of pixels may be located within a primitive when used to render a virtual scene into a display pixel, and the vertex parameter values described above may be used to identify the corresponding parameter value at the pixel location within the primitive. Interpolation is used.

  A mode related to the description of the interpolation processing using the barycentric coordinate system is shown in FIG. 1A. FIG. 1A shows a polygon (eg, triangle) 102 used as a primitive for processing graphics by the GPU. Note that a triangle is a two-dimensional shape having the minimum number of vertices (three points), and since each triangle is guaranteed to be a plane, it is generally used as a primitive in graphic processing. The surface of a virtual object, such as a three-dimensional object, in the rendered image can be composed of a number of triangle primitives 102 that are oriented in virtual space. Triangle 102 includes vertices 104a, 104b and 104c, each having a predetermined parameter value P0, P1 and P2, respectively.

By interpolating the vertex parameter values P0, P1, and P2, the parameter values P _{i, j} at any point of the triangle 102 are defined using the linear relationship between the parameters at the corners of the shape. The coordinates i and j correspond to the position of the pixel (or pixel center) when an image having a virtual object is rendered in the screen space on the display. Thus, this interpolation process is used to specify the parameter value for any of the pixels located in the primitive 102. Any triangle 102 of the virtual object can have any number of pixel centers located within the triangle. For example, there can be 0, 1, 10 or more pixels that can be located within a primitive.

In order to interpolate the vertex parameters at positions i, j, one of the vertex parameter values is subtracted from the parameter value of the other vertex, and these subtraction values are the barycentric coordinates in triangle 102 corresponding to the position of the desired parameter value. Multiply by each of the positions. This is expressed mathematically as follows, where the vertex parameter P0 is subtracted from the other two vertex parameters P1 and P2 and these subtracted values are multiplied by the corresponding coordinate values i, j.
Pi, j = P0 + (P1-P0) i + (P2-P0) j

  FIG. 1B shows a plurality of triangles 102a-d similar to the triangle 102 of FIG. 1A used to render virtual objects for graphics processing applications. FIG. 1B and the following description are simplified schematic descriptions to illustrate various aspects in which vertex parameter data is utilized and stored in implementing a graphic processing technique.

  Each of the triangles 102a-d has three vertices, each with a corresponding parameter value. Furthermore, the triangles 102a-d share a number of common vertices, and thus many of the parameter values are common to different triangles. Rather than storing parameter values multiple times so that they are associated with each of the triangles, each vertex is assigned to an identification index. As a simple example, the vertices shown in FIG. 1B are assigned to identification indexes 0, 1, 3, 9, 10 and 4, respectively. These indexes and their corresponding parameter values are stored in what is commonly known as a “vertex buffer”. Further, each of the triangles 102a-d is identified by their corresponding vertex index, for example, triangle 102a is identified by (0,1,3), triangle 102b is identified by (1,3,9), Similarly, this information is stored in what is commonly known as an “index buffer”. Accordingly, a common vertex parameter value is associated with each individual triangle 102a-d by a respective index identified in the buffer.

  FIG. 1B also shows a series of pixel locations af overlaid on primitives 102a-d. For example, parameter value interpolation as described above with respect to FIG. 1A is used to identify the parameter value at each of the pixel locations a-f within each primitive based on each vertex parameter value and index identifying each primitive. The By way of example and not limitation, triangles 102a-d are oriented in a three-dimensional virtual environment, and pixel locations af are the pixels of the two-dimensional screen used to display the rendered virtual environment image. Correspond.

  To illustrate the various ways in which parameter values are assigned to pixels a, b and c located within the triangle, FIG. 1C shows the triangles 102a and 102b of FIG. 1B. As shown in FIG. 1C, vertex parameter values P0, P1, and P2 are uniquely assigned to each individual triangle 102a and 102b and identified based on indexes 0, 1, 3, and 9 stored in the index buffer. . Interpolation is performed by accessing the corresponding parameter value in the vertex buffer and subtracting the parameter value P0 from the remaining vertex parameters P1 and P2, as described above with respect to FIG. 1A.

  As an alternative to interpolating the parameter values of each primitive, a technique known as “flat shading” may be used. With flat shading, a “starting vertex”, eg, P0, is defined for each triangle, and differences from the remaining vertices, eg, P1-P0 and P2-P0 are simply set to zero. Arbitrary pixels located within the triangle are output from the vertex shader together with the parameter value of the vertex as the starting point. This can save a lot of overhead associated with the interpolation operation, but makes the virtual object look like this, which is undesirable in many applications.

  FIG. 1D shows a flow diagram of various aspects according to the description of performing vertex parameter interpolation according to a conventional method 100a, where the entire interpolation is performed before being received by the pixel shader. To illustrate how vertex parameters are interpolated in cooperation with vertex shader 110 and pixel shader 112 to identify parameter values for pixels a-f, method 100a of FIG. Utilize triangles 102a-d as shown in 1C (note that af is more precisely a fragment or pre-fetch because further modification is performed by the pixel shader before outputting af to the frame buffer. It means a pixel, but here it is simply referred to as a pixel for convenience of explanation).

  The method 100a includes performing a predetermined vertex shader operation 114 by the vertex shader 110, which is a vertex of a virtual object according to a drawing command received from a graphics API that adjusts the rendered graphic in the virtual environment of the application. Includes predetermined operations for each parameter vertex. The vertex shader 110 outputs corresponding vertex parameter values P0, P1, and P2 for each of the triangles 102a-d shown in FIG. 1D.

These vertex parameter values P0, P1, and P2 are interpolated at 116 for each triangle to identify the parameter values P _a -P _f at pixel positions a-f located within the corresponding triangles 102a-d. Interpolation at 116 subtracts the vertex parameter value P0 from the other two vertex parameter values P1 and P2, for example as described with respect to FIG. 1A, and multiplies these subtraction values by their corresponding barycentric coordinates, Adding the multiplication values to interpolate the parameters at the defined pixel positions. In the approach shown in FIG. 1D, interpolation 116 is generally performed by the parameter interpolation hardware component associated with the GPU before the pixel shader program 112 receives the parameter value as input. The pixel shader 112 further manipulates each pixel af by performing a predetermined pixel shader operation at 118 for each pixel af, ie, pixel by pixel, to obtain an output pixel 120. Output pixels 120 are stored in a frame buffer and output as an image to be rendered on the display.

FIG. 1E shows a flow diagram of various aspects according to the description of performing vertex parameter interpolation by another conventional method 100b. The conventional method 100b shown in FIG. 1E is similar to the conventional method 100a shown in FIG. 1D, except that only the subtractor 122 of the interpolation 116 is executed before the parameters reach the pixel shader 112. is there. In this method 100b, the subtractor 122 of the interpolation 116 receives the parameter value that has been subtracted by the pixel shader program 112 and performs the rest of the interpolation 116 before executing the rest of the interpolation 116. Executed by. Thus, the remainder of the vertex parameter interpolation 116 is a simple multiplication at 124 of the absolute vertex parameter P0, the subtraction parameter values P10 and P20 subtracted from the parameter P0 and the coordinates of the desired parameter P relative to the absolute vertex parameter value P0. And the addition operation is reduced. For each of the corresponding triangles 102a-d, P10 = P1-P0 and P20 = P1-P0. This yields the desired parameter values P _a -P _f described above, which are further manipulated by the pixel shader at 118 to produce the output pixel 120.

  FIG. 2A shows an illustration of a method 200a performed on various hardware and software components configured to process graphics in a conventional manner. The method 200a shown in FIG. 2A is similar to the method 100b shown in FIG. 1E.

  Vertex shader 210 includes various other rendering effects 234 for each primitive vertex, such as manipulation of primitive vertex position 230 in screen space, vertex lighting, shadows, colors, etc. A vertex shader operation 214 is executed. Various parameters P 0, P 1 and P 2 resulting from the vertex shader operation 214 are written to the parameter cache 236 for temporary storage, and the system's parameter interpolation hardware component 222 receives each set of parameters from the parameter cache 236. Part of the interpolation is performed by subtracting the parameter value before writing the parameter to each small-capacity local memory unit 237 of each processing unit of the GPU. Each local memory unit 237 is a small-capacity but high-speed local memory unit also known as a local data share (LDS) associated with each calculation unit of the GPU, and operates a plurality of shader programs in parallel. There are a memory part and a calculation part.

  Vertex shader output position 230 is used by hardware component 238 to generate pixel centroid coordinates i, j for each primitive, for example, as described herein, as they are used to interpolate parameter values. The The pixel shader 212 completes the interpolation by performing a multiply and add operation 224 using the coordinates of each desired parameter i, j, in order to complete the interpolation with an absolute parameter value P0 and relative parameter values P10 and P20. To access. The pixel shader 212 then performs a predetermined further pixel shader operation 218 to further manipulate the pixel before outputting it to, for example, a frame buffer.

  One drawback of the technique 200a described above is that certain bottlenecks associated with parameter throughput for the pixel shader occur, which can slow down the rendering of virtual objects. For one thing, parameter write throughput to the parameter cache has been recognized as a bottleneck. For example, each parameter becomes a large attribute variable, such as a 32-bit floating point number, and the vertex shader writes these attribute variables to the parameter cache 236 as a series of, for example, four wavefronts at a time. In addition, the use of a parameter cache further limits the number of vertex shader wavefronts stored, creating additional bottlenecks. The parameters are then replicated to the local data share 237 and temporarily stored before being accessed by the pixel shader, by limiting the number of wavefronts in the pixel shader, thereby limiting the throughput and total local data share usage. A bottleneck occurs again.

  Another disadvantage of the technique 200a described above is that the pixel shader cannot directly access the raw parameter values P1 and P2, since the subtracted parameter values P10 and P20 are calculated before reaching the pixel shader 212. This limits the type of rendering effect performed by the pixel shader.

Example FIG. 2B illustrates an example of an aspect of the present disclosure. FIG. 2B shows a schematic diagram of a technique 200b implemented by various hardware and software components configured to process graphics according to various aspects of the disclosure. In the embodiment shown in FIG. 2B, for example, bottlenecks associated with parameter value throughput as described above are addressed by giving the pixel shader direct access to the vertex parameter values. The pixel shader then performs a number of operations on these prime vertex parameter values conventionally associated with the vertex shader, similar to the vertex parameter interpolation prior to performing the normal pixel shader operation. be able to.

  As shown in FIG. 2B, the pixel shader 210 performs a vertex shader operation as shown at 214a. In some cases, these operations may be limited to identifying a vertex position 230 and outputting an index so that other parameter values are omitted from the vertex shader output. Rather than writing the vertex shader output parameters to the parameter cache 236, the vertex shader 210 simply writes the vertex indices I0, I1 and I0 identifying each primitive (eg, a triangle or other polygon) to the parameter cache 236. Composed. These indexes are then sent to the local data share 237 so that the pixel shader can access them locally. Since these indexes I0, I1 and I2 can be accessed, the pixel shader 212 can directly access the raw parameter values P0, P1 and P2 associated with the index in the main memory of the system, for example, the vertex buffer. Having access to these parameter values, the pixel shader 212 can perform a residual vertex shader operation 214b that can include other visual effects 234 on the vertices of the triangle. Then, the pixel shader performs interpolation 216 of the parameter value obtained from the remaining vertex shader calculation 214b using the coordinates i and j in order to specify the parameter value at each pixel position. The pixel shader 212 then performs additional pixel shader operations 218 that include additional visual effects on the pixels on the interpolated values to generate output pixels.

  In the embodiment according to this description, the indexes I0, I1 and I2 sent to the pixel shader are much smaller data amounts than the attribute variables used for the parameter values, so for example the index is basically only one number. Thus, the bottleneck associated with the throughput of these parameter values is reduced.

  However, by causing the pixel shader 212 to execute the vertex shader calculation 214b and the interpolation 216 in the manner shown in FIG. 2B, the calculation load on the pixel shader increases as with the entire shader. For example, an image usually has more pixels than visible vertices. In the described method, the vertex shader operation 214b is performed by the pixel shader 212, not the vertex shader operation 210, so they do not execute them once per vertex, as the vertex shader does, they are 3 per pixel. Times (ie, for each vertex of the triangle primitive containing the pixel). Therefore, it is contrary to conventional wisdom to increase the calculation load in this manner, and this seems to be undesirable because the performance decreases by increasing the calculation load. However, the bottleneck associated with parameter throughput is a more limiting factor than rendering speed, and even if more operations have to be performed by the pixel shader, the overall performance is actually increased and the rendering of the object Is accelerated.

  Still further, for example, with the conventional flat shading techniques described above, the pixel shader cannot directly access all of the indices and all of the vertex parameters for each triangle. At best, it only has access to the starting vertex, eg executable rendering and visual effects that can be generated, such as preventing the pixel shader from executing the vertex shader operation 214b as shown in FIG. 2B. Will limit the type of.

  FIG. 3 shows a flow diagram of a method 300 for processing graphics by a vertex shader and a pixel shader in accordance with various aspects of the present disclosure. The method 300 is similar to the graphic processing technique 200b shown in FIG. 2B.

  The described method 300 includes performing a vertex shader operation 314a by a vertex shader 310. A number of normal vertex shader operations are omitted from the operation 314a performed by the vertex shader 310 and are instead performed pixel by pixel using the pixel shader 312. The output of vertex shader 310 is limited to the vertex output position and vertex index for each of primitives 302a-d. The primitives are triangles each having three vertices identified by indices I0, I1 and I2, and are similar to the triangles 102a-d shown in FIG. 1B.

The index is sent to the pixel shader 312 which can directly access each of the vertex parameter values P0, P1 and P2 for each of the different primitives 302a-d using the indices I0, I1 and I2. The pixel shader 312 directly accesses the raw parameter value, for example, by directly accessing the system memory having the parameter value stored in the vertex buffer associated with the vertex index. The pixel shader performs a residual vertex shader operation 314b using the parameter values, which includes rendering a predetermined visual effect for each vertex of each primitive. Then, the pixel shader 312 interpolates the obtained parameter value after executing the pixel shader calculation 314b in order to extract the parameter value P _a -P _f at each pixel position in the primitive. The pixel shader 312 then generates an additional visual effect for the pixel by performing a pixel shader operation 318 on the pixel using the interpolation parameter value, and the rendered pixel 320 is placed in, for example, a frame buffer in the system memory. Output.

  Aspects of the present disclosure include a graphics processing system configured to implement the above-described configuration. By way of example and not limitation, FIG. 4 illustrates a block diagram of a computer system 400 used to perform graphics processing according to aspects of the present disclosure. According to aspects of this disclosure, system 400 is an embedded system, mobile phone, personal computer, tablet computer, portable gaming device, workstation, game console, and the like.

  The system 400 generally includes a central processing unit (CPU) 470, a graphics processing unit (GPU) 471, and a main memory 472 that is accessible to both the CPU and GPU. Each of CPU 470 and GPU 471 includes one or more processor cores, eg, a single core, two cores, four cores, eight cores or more. Main memory 472 may be in the form of an integrated circuit that provides addressable memory, such as RAM, DRAM, and the like.

  By way of example and not limitation, the CPU 470 and GPU 471 access the main memory 472 using the data bus 476. In some cases, it may be useful for system 400 to include two or more different buses. Main memory 472 includes data accessible by CPU 470 and GPU 472. Main memory temporarily stores data in buffers including vertex buffer 463, index buffer 466 and frame buffer 464.

  The CPU is configured to execute CPU code, which includes an application 460 that utilizes rendered graphics, and a driver / compiler 461 and graphics API 462 for sending drawing commands to a program executed by the GPU. Including. The CPU code also implements physical simulation and other functions. The GPU is configured to operate as described above with respect to embodiments in accordance with the description of the present disclosure. In particular, the GPU executes GPU code, which implements the vertex shader 410 and the pixel shader 412 as described above. These shaders interface with data in main memory 472, and the pixel shader outputs the rendered pixels to frame buffer 464 for temporary storage before output to the display. The GPU includes a plurality of computing units (CUs) 465 configured to execute graphic processing tasks in parallel. Each computing unit includes its own dedicated local memory store, such as the local data share (LDS) 437 described above. The system 400 also includes a cache 436 for temporarily storing vertex index data 468, which is replicated from the cache 436 to each LDS 437, which implements a shader program that uses the data in parallel. The parameter cache 436 may be integrated in the GPU, or may be separate from the GPU and accessible to the GPU via the bus 476, for example. The GPU can also execute other programs such as, for example, geometric shaders and arithmetic shaders.

  System 400 may include a known support function 477, which can communicate with other components of the system, for example, via bus 476. Such support functions include, but are not limited to, input / output (I / O) element 479, power supply (P / S) 480 and clock (CLK) 481.

  The device 400 optionally includes a mass storage device 484 such as a disk drive, CD-ROM drive, flash memory, tape drive, etc. that stores programs and / or data. The device 400 also includes a display portion 486 and a user interface portion 488 that facilitate interaction between the device 400 and the user. The display unit 486 is a flat panel display, a cold cathode tube (CRT) screen, a touch screen, or other device capable of displaying text, numbers, graphical symbols or images. Display 486 displays rendered image 487 that has been processed by the various techniques described herein. User interface 488 includes a keyboard, mouse, joystick, light pen, game controller, or other device used in connection with a graphical user interface (GUI). System 400 also includes a network interface 490 that allows the device to communicate with other devices over a network. The network is, for example, a local area network (LAN), a personal area network such as a wide area network Bluetooth® network such as the Internet, or other type of network. These components are implemented in hardware, software or firmware or a combination of two or more thereof.

  While the above is a complete description of the preferred embodiment of the present invention, it is possible to use various modifications, variations and equalizations. The scope of the invention should, therefore, be determined not with reference to the above description, but instead should be determined with reference to the appended claims along with their full scope of equivalents. Any configuration described herein, whether preferred or not, may be combined with other configurations described herein, whether preferred or not. In the following claims, the indefinite article “A” or “An” means one or more quantities of items following the article, unless expressly stated otherwise. The accompanying claims are intended to include means-plus-function invention matters, unless such invention-specific matters are explicitly stated in a given claim using the word "means for ..." Should not be interpreted as.

Claims (19)

A computer graphic processing method comprising:
Writing the vertex index output from the vertex shader to the cache;
Accessing the vertex index written to the cache by a pixel shader; and accessing a vertex parameter value associated with the vertex index in the memory unit by the pixel shader.   The method of claim 1, further comprising performing a vertex shader operation on the vertex parameter value by the pixel shader.   3. The method of claim 2, wherein the vertex shader operation includes manipulating the visual effects of primitive vertices in a three-dimensional virtual space.   The method of claim 1, further comprising interpolating the vertex parameter value with the pixel shader.   The method of claim 1, wherein accessing the vertex index is replicating the vertex index from the cache to a local memory unit of a GPU, and accessing the index in the local memory unit by the pixel shader. Said method.   2. The method of claim 1, wherein accessing the vertex parameter values includes accessing parameter values for all three vertices of a triangle primitive. The method of claim 1, wherein after accessing the vertex parameter value,
Performing a vertex shader operation on the vertex parameter value by the pixel shader;
The method further comprising interpolating the parameter value with the pixel shader and performing a pixel shader operation on the parameter value interpolated with the pixel shader.   The method of claim 1, wherein vertex shader output is limited to a vertex position and the vertex index, and the pixel shader performs a residual vertex shader operation after accessing the vertex index.   The method of claim 1, wherein the memory portion is a system main memory.   The method of claim 9, wherein the parameter value is stored in a vertex buffer in the main memory. A graphics processing system,
Graphics processing unit (GPU),
A memory unit and a cache,
The system is configured to implement a graphics processing method, the method comprising:
Implementing a vertex shader and a pixel shader with the GPU;
Writing the vertex index output from the vertex shader into the cache;
The system comprising: accessing the vertex index written to the cache by the pixel shader; and accessing the vertex parameter value associated with the vertex index in the memory unit by the pixel shader.   12. The system according to claim 11, wherein the memory unit is a main memory unit of the system.   12. The system according to claim 11, wherein the GPU includes a plurality of arithmetic units and a plurality of local memory units, and each of the local memory units is associated with one of the arithmetic units.   14. The system of claim 13, wherein accessing the vertex index is replicating the vertex index from the cache to the local memory unit, and accessing the vertex index from the local memory unit by the pixel shader. Said system.   12. The system of claim 11, wherein the cache is integrated with the GPU.   The system of claim 11, wherein the method further comprises performing a vertex shader operation on the vertex parameter value by the pixel shader.   The system of claim 11, wherein the method further comprises interpolating the parameter value with the pixel shader.   12. The system according to claim 11, wherein the system is an embedded system, a mobile phone, a personal computer, a tablet computer, a portable game device, a workstation or a game console. A non-transitory computer readable medium having computer readable instructions embodied therein, wherein the computer readable instructions are configured to perform a graphic processing method when executed, the graphic processing method comprising:
Writing the vertex index output from the vertex shader to the cache;
Non-transitory computer readable comprising: accessing a vertex index written to the cache by a pixel shader; and accessing a vertex parameter value associated with the vertex index from a memory unit by the pixel shader. Medium.

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