JP2016223947A - Phase margin gain margin measuring circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To allow measurements of a phase margin and a gain margin of a measurement target circuit without cutting connection between an output terminal of an operational amplifier and a feedback circuit and inserting a measurement device between the output terminal and the feedback circuit, even if a measurement resistor is not inserted in a part of a closed loop.SOLUTION: The measurement device includes: a phase gain calculating part 22 calculating a phase and a gain of a measurement target circuit 1; a frequency control part 24 making the frequency of a signal VS output from a signal source 21 variable; and a margin specification part 25 specifying a phase margin and a gain margin of the measurement target circuit 1 based on phases and gains of the measurement target circuit 1 at various different frequencies.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a phase margin gain margin measuring circuit for measuring the phase margin and gain margin of a closed loop operational amplifier circuit which is a circuit to be measured.

Operational amplifier circuit of a general closed-loop, non-inverting input terminal (+) to the voltage V _in is applied, an operational amplifier for outputting a voltage V _out from the output terminal, one end connected to the output terminal of the operational amplifier, the other end And a feedback circuit (feedback circuit) connected to the inverting input terminal (−) of the operational amplifier.
Here, when the open loop gain of the operational amplifier is A ₀ and the transfer function of the feedback circuit is β, the voltage V _in applied to the non-inverting input terminal (+) of the operational amplifier and the voltage V output from the output terminal of the operational amplifier. The relationship with _out is expressed as in the following formula (1).

In Expression (1), A ₀ β is a loop gain of the operational amplifier circuit. If A ₀ β = −1, V _out = ∞.
The state in which V _out = ∞ is oscillation, and the conditions for oscillation are expressed by the following equations (2) and (3). This oscillation condition is called Barkhausen oscillation condition.
| A ₀ β | = 1 (2)
Phase = −180 ° ± (360 ° × n) (3)
n = 0, ± 1, ± 2, ...
In equation (2), | A ₀ β | = 1 corresponds to a gain of 0 dB.

The phase margin of the operational amplifier circuit indicates how much the phase of the operational amplifier circuit when the gain is 0 dB is different from the phase satisfying the oscillation condition shown in Expression (3). .
Further, the gain margin of the operational amplifier circuit indicates how much negative value the gain of the operational amplifier circuit has when the phase is −180 ° ± (360 ° × n) with respect to 0 dB. It is.
Generally, it is desirable that the phase margin is 45 ° or more and the gain margin is 10 dB or more.

Generally, when measuring the phase margin and gain margin of an operational amplifier circuit, disconnect the connection between the operational amplifier output terminal and the feedback circuit, and insert a measuring instrument between the operational amplifier output terminal and the feedback circuit. To do.
At this time, if the signal source of the measuring device outputs the P2 signal to the feedback circuit, the P1 signal output from the output terminal of the operational amplifier is obtained by multiplying the P2 signal by −A ₀ β. The measuring device measures the P1 signal and the P2 signal, thereby calculating the loop gain A ₀ β of the operational amplifier circuit, and obtaining the phase margin and gain margin from the loop gain A ₀ β.

  When measuring the phase margin and gain margin of an operational amplifier circuit, disconnect the connection between the operational amplifier output terminal and the feedback circuit, and insert a measuring instrument between the operational amplifier output terminal and the feedback circuit. In order to eliminate the problem, in Patent Document 1 below, a measurement resistance is inserted in advance in a part of a closed loop of a circuit to be measured, and a loop characteristic is obtained by measuring a voltage at both ends of the measurement resistance. A method is disclosed.

JP-A-62-218274

Since the conventional phase margin gain margin measurement circuit is configured as described above, if the measurement target circuit is an operational amplifier circuit in which a measurement resistor is inserted in advance in a part of a closed loop, the phase of the operational amplifier circuit When measuring the margin and gain margin, the connection between the output terminal of the operational amplifier and the feedback circuit can be disconnected, and the trouble of inserting a measuring instrument between the output terminal of the operational amplifier and the feedback circuit can be saved. . However, not all measurement target circuits are operational amplifier circuits in which a measurement resistor is inserted in advance in a part of a closed loop. The gain margin cannot be measured. Therefore, for an operational amplifier circuit in which no measurement resistor is inserted, it is necessary to disconnect the connection between the output terminal of the operational amplifier and the feedback circuit and insert a measuring instrument between the output terminal of the operational amplifier and the feedback circuit. In addition, there is a problem that much labor and time are required to measure the phase margin and the gain margin.
In addition, when the measurement target circuit is an operational amplifier circuit in which a measurement resistor is inserted in advance in a part of a closed loop, the measurement resistor can be inserted even if the time required for measuring the phase margin and gain margin is eliminated. As a result, there is a problem that the operational characteristics of the operational amplifier circuit are different.

  The present invention has been made to solve the above-described problems, and disconnects the connection between the output terminal of the operational amplifier and the feedback circuit even when a measurement resistor is not inserted in a part of the closed loop. An object of the present invention is to obtain a phase margin gain margin measuring circuit capable of measuring the phase margin and gain margin of a circuit to be measured without inserting a measuring instrument between the output terminal of the operational amplifier and the feedback circuit.

  The phase margin gain margin measuring circuit according to the present invention is a non-inverted operational amplifier when measuring the phase margin and gain margin of a circuit to be measured in which a feedback circuit is connected between the output terminal and the inverting input terminal of the operational amplifier. When measuring the phase margin and gain margin of the signal source connected to the input terminal and the circuit to be measured, it is connected to the output terminal of the operational amplifier, the inverting input terminal of the operational amplifier, and the non-inverting input terminal of the operational amplifier. Using the signal output from the output terminal to the feedback circuit, the signal output from the feedback circuit to the inverting input terminal of the operational amplifier, and the signal output from the signal source to the non-inverting input terminal of the operational amplifier, A phase gain calculation unit for calculating the gain and a frequency control unit for changing the frequency of the signal output from the signal source are provided, and the margin specifying unit is configured to control the frequency. Each time the signal frequency is changed by the unit, the phase and gain calculated by the phase gain calculation unit are collected, and the phase margin and gain margin of the measurement target circuit are obtained from the phase and gain of the measurement target circuit at each frequency. Is specified.

  According to the present invention, when measuring the phase margin and gain margin of the measurement target circuit, when measuring the phase margin and gain margin of the signal source connected to the non-inverting input terminal of the operational amplifier and the measurement target circuit, Connected to the output terminal of the operational amplifier, the inverting input terminal of the operational amplifier, and the non-inverting input terminal of the operational amplifier, the signal output from the output terminal of the operational amplifier to the feedback circuit, and the signal output from the feedback circuit to the inverting input terminal of the operational amplifier And a phase gain calculation unit that calculates the phase and gain of the circuit to be measured using a signal output from the signal source to the non-inverting input terminal of the operational amplifier, and a frequency control unit that varies the frequency of the signal output from the signal source The margin specifying unit collects the phase and gain calculated by the phase gain calculation unit every time the frequency of the signal is changed by the frequency control unit. Since the phase margin and gain margin of the measurement target circuit are specified from the phase and gain of the measurement target circuit at each frequency, the measurement resistor is not inserted in a part of the closed loop. Disconnect the connection between the output terminal of the operational amplifier and the feedback circuit, and measure the phase margin and gain margin of the circuit under measurement without inserting a measuring instrument between the output terminal of the operational amplifier and the feedback circuit. There is an effect that can.

It is a block diagram which shows the phase margin gain margin measurement circuit by Embodiment 1 of this invention. It is a flowchart which shows the processing content of the phase margin gain margin measurement circuit by Embodiment 1 of this invention. It is a Bode diagram showing gain dB (A ₀ β) and phase phase (A ₀ β) of loop gain A ₀ β at each frequency. It is explanatory drawing which shows the simulation result at the time of simulating with a computer the phase margin and gain margin which are measured by the phase margin gain margin measurement circuit. It is explanatory drawing which shows an example of the policy which increases a phase margin and a gain margin. It is a block diagram which shows the phase margin gain margin measurement circuit by Embodiment 2 of this invention. It is a Bode diagram which shows the phase margin before and behind the phase compensation process by adjusting the capacitance value of the variable capacitor | condenser 32, and a gain margin. It is a block diagram which shows the phase margin gain margin measurement circuit by Embodiment 3 of this invention. It is a block diagram which shows the phase margin gain margin measurement circuit by Embodiment 4 of this invention. It is a block diagram which shows the phase margin gain margin measurement circuit by Embodiment 5 of this invention. It is a block diagram which shows the variable element circuit 61 of the phase margin gain margin measurement circuit by Embodiment 5 of this invention. It is explanatory drawing which shows the opening-and-closing state of the switch in the case of connecting the variable capacitor 76 between the output terminal of the operational amplifier 12, and an inverting input terminal (-). It is explanatory drawing which shows the opening-and-closing state of the switch in the case of connecting the series circuit which consists of the variable resistor 73 and the variable capacitor 76 between the output terminal of operational amplifier 12, and a ground. FIG. 6 is an explanatory diagram showing an open / close state of a switch when a series circuit composed of a variable resistor 73 and a variable capacitor 76 is connected between a non-inverting input terminal (+) and an inverting input terminal (−) of the operational amplifier 12.

  Hereinafter, in order to describe the present invention in more detail, modes for carrying out the present invention will be described with reference to the accompanying drawings.

Embodiment 1 FIG.
1 is a block diagram showing a phase margin gain margin measuring circuit according to Embodiment 1 of the present invention.
In FIG. 1, a measurement target circuit 1 is a circuit in which a phase margin and a gain margin are measured by a phase margin gain margin measurement circuit 2, and no measurement resistor is inserted in a part of the closed loop.
The input circuit 11 is a circuit that gives a signal to the non-inverting input terminal (+) of the operational amplifier 12.
The operational amplifier 12 is an operational amplifier having a non-inverting input terminal (+), an inverting input terminal (−), and an output terminal.
The feedback circuit 13 is a feedback circuit connected between the output terminal of the operational amplifier 12 and the inverting input terminal (−).

The signal source 21 of the phase margin gain margin measuring circuit 2 is connected to the non-inverting input terminal (+) of the operational amplifier 12 when measuring the phase margin and gain margin of the circuit 1 to be measured. Output. At this time, the input circuit 11 is removed from the non-inverting input terminal (+) of the operational amplifier 12.
When the phase gain calculation unit 22 measures the phase margin and gain margin of the measurement target circuit 1, the output terminal of the operational amplifier 12, the inverting input terminal (−) of the operational amplifier 12, and the non-inverting input terminal (+) of the operational amplifier 12. And connected to.
The phase gain calculation unit 22 outputs the signal P1 output from the output terminal of the operational amplifier 12 to the feedback circuit 13, the signal P2 output from the feedback circuit 13 to the inverting input terminal (−) of the operational amplifier 12, and the non-operation of the operational amplifier 12 from the signal source 21. An operation for calculating the phase and gain of the measurement target circuit 1 using the measuring device 22a for measuring the signal VS output to the inverting input terminal (+) and the signals P1, P2, and VS measured by the measuring device 22a. And a container 22b.

The phase gain storage unit 23 includes a storage device such as a RAM or a hard disk, and stores the phase and gain of the measurement target circuit 1 calculated by the phase gain calculation unit 22.
The frequency control unit 24 is a control circuit that varies the frequency of the signal VS output from the signal source 21.
The margin specifying unit 25 is composed of, for example, a semiconductor integrated circuit on which a CPU is mounted or a one-chip microcomputer, and the measurement target circuit 1 at each frequency varied from the phase gain storage unit 23 by the frequency control unit 24. The phase and gain are read out, and processing for specifying the phase margin and gain margin of the measurement target circuit 1 from the phase and gain of the measurement target circuit 1 at each frequency is performed.
FIG. 2 is a flowchart showing the processing contents of the phase margin gain margin measuring circuit according to the first embodiment of the present invention.

Next, the operation will be described.
When measuring the phase margin and gain margin of the measurement target circuit 1, the output terminal of the signal source 21 of the phase margin gain margin measurement circuit 2 is connected to the non-inverting input terminal (+) of the operational amplifier 12.
In addition, the measuring instrument 22a of the phase gain calculating unit 22 is connected to a signal line connecting the output terminal of the operational amplifier 12 and the feedback circuit 13 using, for example, a probe, and the inverting input terminal of the feedback circuit 13 and the operational amplifier 12 Connected to signal line connecting (-).
Since the measuring instrument 22a of the phase gain calculation unit 22 is always connected to the output terminal of the signal source 21, the output terminal of the signal source 21 is connected to the non-inverting input terminal (+) of the operational amplifier 12. The measuring device 22a of the phase gain calculation unit 22 is also connected to the non-inverting input terminal (+) of the operational amplifier 12.

In the first embodiment, for convenience of explanation, the signal source 21 _f 1 is the frequency _of, f 2, · · ·, the open loop gain of the operational amplifier 12 when the signal VS of _{f N} is output _{A 0} and feedback circuit 13 The transfer function β is calculated.
Hereinafter referred to the frequency of the signal VS output from the signal source 21 at f _n. n is a variable indicating the frequency of the signal VS, and n = 1, 2,.
However, in the initial stage of starting the measurement of the phase margin and the gain margin, n = 1 is set, and the value of n is sequentially incremented.

First, the frequency control unit 24 of the phase margin gain margin measurement circuit 2 initially sets the frequency of the signal VS output to the non-inverting input terminal (+) of the operational amplifier 12 and the phase gain calculation unit 22 to f ₁ (FIG. 2). Step ST1).
Signal source 21, the frequency control unit 24 initializes the frequency of the signal VS to f _1, and outputs the signal VS of the frequency f ₁ to the non-inverting input terminal (+) and phase gain calculating unit 22 of the operational amplifier 12 (step ST2).
When the signal output from the signal source 21 to the non-inverting input terminal (+) of the operational amplifier 12 is VS, the signal output from the output terminal of the operational amplifier 12 to the feedback circuit 13 is P1, and the feedback circuit 13 inverts the operational amplifier 12. Assuming that the signal output to the input terminal (−) is P2, the measuring device 22a of the phase gain calculation unit 22 measures the signals P1, P2, and VS (step ST3).

When the measuring device 22a measures the signals P1, P2, and VS, the arithmetic unit 22b of the phase margin gain margin measuring circuit 2 uses the signals P1, P2, and VS as shown in the following equation (4) to obtain an operational amplifier. calculating the open loop gain _{a 0} of 12 (step ST4).
Further, the calculator 22b of the phase margin gain margin measuring circuit 2 calculates the transfer function β of the feedback circuit 13 using the signals P1 and P2 as shown in the following equation (5) (step ST4).

Here, the gain dB (A ₀ ) and the phase phase (A ₀ ) of the open loop gain A ₀ are expressed by the following equations (6) and (7).
dB (A ₀ ) = dB (P1) −dB (P2−VS) (6)
phase (A ₀ ) = phase (P1) −phase (P2-VS) (7)
Further, the gain dB (β) and the phase phase (β) of the transfer function β are expressed by the following equations (8) and (9).
dB (β) = dB (P2) −dB (P1) (8)
phase (β) = phase (P2) −phase (P1) (9)
The gain dB (A ₀ β) and the phase phase (A ₀ β) of the entire loop gain A ₀ β of the measurement target circuit 1 are expressed by the following equations (10) and (11).
dB (A ₀ β) = dB (A ₀ ) + dB (β) (10)
phase (A ₀ β) = phase (A ₀ ) + phase (β) (11)

The open loop gain A ₀ of the operational amplifier 12 and the transfer function β of the feedback circuit 13 calculated by the calculator 22 b of the phase margin gain margin measuring circuit 2 are combined with the frequency f ₁ initially set by the frequency control unit 24, It is stored in the phase gain storage unit 23.
The frequency controller 24 increments the value of n (step ST5). If the value of n does not exceed N (step ST6: NO), the non-inversion of the operational amplifier 12 is performed according to the incremented value of n. input terminal (+) and the frequency of the signal VS to be output to the phase gain calculating unit 22 is changed to _{f n} (step ST7).

Signal source 21, the frequency controller 24 changes the frequency of the signal VS to _{f n,} and outputs the signal VS of the frequency _{f n} to the non-inverting input terminal (+) and phase gain calculating unit 22 of the operational amplifier 12 (step ST2 ).
Instrument 22a of the phase gain calculating unit 22, the signal source 21 and outputs the signal VS of the frequency _{f n,} measuring the signal P1, P2, VS (step ST3).
When the measuring device 22a measures the signals P1, P2, and VS, the arithmetic unit 22b of the phase margin gain margin measuring circuit 2 uses the signals P1, P2, and VS as shown in the above equation (4) to obtain an operational amplifier. calculating the open loop gain _{a 0} of 12 (step ST4).
Further, the calculator 22b of the phase margin gain margin measurement circuit 2 calculates the transfer function β of the feedback circuit 13 using the signals P1 and P2 as shown in the above equation (5) (step ST4).

The open loop gain A ₀ of the operational amplifier 12 and the transfer function β of the feedback circuit 13 calculated by the arithmetic unit 22 b of the phase margin gain margin measuring circuit 2 are combined with the frequency f _n changed by the frequency control unit 24 to obtain the phase Stored in the gain storage unit 23.
The frequency controller 24 increments the value of n (step ST5). If the value of n does not exceed N (step ST6: NO), the non-inversion of the operational amplifier 12 is performed according to the incremented value of n. The frequency f _n of the signal VS output to the input terminal (+) and the phase gain calculation unit 22 is changed (step ST7).
Thereafter, the processes of steps ST2 to ST7 are repeatedly performed until the value of n exceeds N, and when the value of n exceeds N (step ST6: YES), the process proceeds to step ST8.

Margin specifying unit 25, the frequency _f 1 to the phase gain storage section _23, f 2, · · ·, the transfer function of the open loop gain _{A 0} and feedback circuit 13 of operational amplifier 12 stored it becomes _{f N} and set β Is read (step ST8).
Margin specifying unit 25, the frequency _{f 1,} f 2, · · ·, reading the β open loop gain _{A 0} and the transfer function at _{f N,} the frequency _{f 1,} f 2, · · ·, open at _{f N} the loop gain _{a 0} and transfer functions beta by substituting the above equation (10) (11), the frequency _{f 1,} f 2, · · ·, the gain of the loop gain _{a 0} beta at _{f N} dB _{(a 0} β) and phase phase (A ₀ β) are calculated (step ST9).

FIG. 3 is a Bode diagram showing the gain dB (A ₀ β) and phase phase (A ₀ β) of the loop gain A ₀ β at each frequency. However, in FIG. 3, the gain dB (A ₀ β) and the phase phase (A ₀ β) are deformed and drawn for convenience of explanation.
As shown in FIG. 3, the phase margin of the measurement target circuit 1 is expressed by a difference of 180 ° from the phase phase (A ₀ β) when the gain dB (A ₀ β) is 0 dB.
Further, as shown in FIG. 3, the gain margin of the circuit 1 to be measured is represented by the difference between the gain dB (A ₀ β) and 0 dB when the phase phase (A ₀ β) is 180 °.
Therefore, a margin specifying unit 25, the frequency _{f 1,} f 2, · · ·, calculating the gain of the loop gain _{A 0} beta at _{f N} dB _{(A 0 β)} and the phase phase _{(A 0 β),} Gain dB The phase margin of the measurement target circuit 1 is calculated by calculating the difference between the phase phase (A ₀ β) when (A ₀ β) is 0 dB and 180 ° (step ST10).
Further, the margin specifying unit 25 calculates the gain margin of the circuit 1 to be measured by obtaining the difference between the gain dB (A ₀ β) and 0 dB when the phase phase (A ₀ β) is 180 ° (step S1). ST10).

FIG. 4 is an explanatory diagram showing simulation results when the phase margin and gain margin measured by the phase margin gain margin measurement circuit are simulated by a computer.
FIG. 4A shows a case where measurement is performed by cutting the connection between the output terminal of the operational amplifier 12 and the feedback circuit 13 and inserting a measuring instrument between the output terminal of the operational amplifier 12 and the feedback circuit 13. FIG. 4B shows a case where measurement is performed by the phase margin gain margin measuring circuit 2 of the first embodiment.
This simulation result shows that the phase margin and the gain margin are measured in substantially the same manner in both FIGS. 4 (a) and 4 (b).
That is, in both FIGS. 4A and 4B, the phase margin is 18 °. Further, the gain margin of FIG. 4A is 27 dB, and the gain margin of FIG. 4B is 26 dB, which is only 1 dB.

As apparent from the above, according to the first embodiment, when measuring the phase margin and the gain margin of the circuit 1 to be measured, the signal source 21 connected to the non-inverting input terminal (+) of the operational amplifier 12 When measuring the phase margin and gain margin of the circuit 1 to be measured, it is connected to the output terminal of the operational amplifier 12, the inverting input terminal (−) of the operational amplifier 12, and the non-inverting input terminal (+) of the operational amplifier 12. The signal P1 output from the output terminal of the operational amplifier 12 to the feedback circuit 13, the signal P2 output from the feedback circuit 13 to the inverting input terminal (−) of the operational amplifier 12, and the non-inverting input terminal (+) of the operational amplifier 12 from the signal source 21. A phase gain calculation unit 22 that calculates the phase and gain of the circuit 1 to be measured using the signal VS output to the signal VS, and the signal VS output from the signal source 21 And a frequency controller 24 for varying the frequency f _n provided, allowance specifying unit 25, each time the frequency f _n of the signal is varied by the frequency control unit 24, collects phase and gain calculated by the phase gain calculation section 22 In addition, since the phase margin and gain margin of the measurement target circuit 1 are specified from the phase and gain of the measurement target circuit 1 at each frequency, the measurement resistor is not inserted in a part of the closed loop. However, the connection between the output terminal of the operational amplifier 12 and the feedback circuit 13 is disconnected, and the phase margin of the measurement target circuit 1 is not inserted between the output terminal of the operational amplifier 12 and the feedback circuit 13. In addition, there is an effect that the gain margin can be measured.

Embodiment 2. FIG.
In the first embodiment, a margin specifying unit 25, the frequency _{f 1,} f 2, · · ·, the loop gain at _{f N A 0} gain β dB _{(A 0} β) and the phase phase _{(A 0} β) Although the calculation of the phase margin and gain margin of the measurement target circuit 1 is shown, if the phase margin and gain margin of the measurement target circuit 1 are insufficient, the phase margin and gain margin of the measurement target circuit 1 are increased. It may be.

In general, it is desirable that the phase margin is 45 ° or more and the gain margin is 10 dB or more. For example, as a method for increasing the phase margin and the gain margin, for example, a method of adding a phase compensation capacitor, a snubber circuit A method of adding a signal and a method of performing phase compensation between input terminals are conceivable.
FIG. 5 is an explanatory diagram showing an example of a measure for increasing the phase margin and the gain margin.
5A shows a method of adding a phase compensation capacitor, FIG. 5B shows a method of adding a snubber circuit, and FIG. 5C shows a method of performing phase compensation between input terminals. Yes.

6 is a block diagram showing a phase margin gain margin measuring circuit according to Embodiment 2 of the present invention. In FIG. 6, the same reference numerals as those in FIG.
One end of the switch 31 is connected to the output terminal of the operational amplifier 12.
The variable capacitor 32 is a capacitor whose capacitance value can be varied. One end is connected to the other end of the switch 31 and the other end is connected to the inverting input terminal (−) of the operational amplifier 12.
The capacitor control unit 33 is a circuit that controls the opening and closing of the switch 31 and adjusts the capacitance value of the variable capacitor 32 according to the phase margin and the gain margin of the measurement target circuit 1 specified by the margin specifying unit 25.

Next, the operation will be described.
However, the switch 31, the variable capacitor 32, and the capacitor control unit 33 are the same as those in the first embodiment except that the switch 31, the variable capacitor 32, and the capacitor control unit 33 are added. .
First, when measuring the phase margin and gain margin of the circuit 1 to be measured, the capacitor control unit 33 controls the switch 31 to be in an open state, so that the output terminal of the operational amplifier 12 and the inverting input terminal (−) are connected. The variable capacitor 32 is not connected between them.
In this state, when the phase margin and gain margin of the measurement target circuit 1 specified by the margin specifying unit 25 are insufficient, for example, when the phase margin is less than 45 ° or the gain margin is less than 10 dB, the capacitor The control unit 33 controls the switch 31 to be closed so that the variable capacitor 32 is connected between the output terminal and the inverting input terminal (−) of the operational amplifier 12, and then the phase margin and gain margin are set. The variable capacitor 32 is controlled so that the capacitance value of the variable capacitor 32 increases as the value decreases.

The state in which the variable capacitor 32 is connected between the output terminal and the inverting input terminal (−) of the operational amplifier 12 corresponds to a state in which a phase compensation capacitor is added as shown in FIG. If the phase is advanced at a high frequency by increasing the capacitance value of the variable capacitor 32, the phase margin can be increased.
After the capacitor control unit 33 adjusts the capacitance value of the variable capacitor 32, the phase margin and the gain margin of the measurement target circuit 1 are measured as in the first embodiment.
The adjustment of the capacitance value of the variable capacitor 32 and the measurement of the phase margin and the gain margin are repeatedly performed until the phase margin and gain margin of the measurement target circuit 1 reach the desired phase margin and gain margin.
As a result, if the capacitance value of the variable capacitor 32 at which the phase margin and gain margin of the measurement target circuit 1 become the desired phase margin and gain margin is known, a capacitor having the capacitance value is appropriately connected in parallel with the feedback circuit 13. Therefore, it is possible to optimize the phase margin and gain margin of the circuit 1 to be measured.

FIG. 7 is a Bode diagram showing the phase margin and the gain margin before and after the phase compensation processing by adjusting the capacitance value of the variable capacitor 32.
FIG. 7A shows the phase margin and gain margin before the phase compensation processing, and FIG. 7B shows the phase margin and gain margin after the phase compensation processing.
In the example of FIG. 7, it can be seen that the phase margin is improved from 18 ° to 61 ° and the gain margin is improved from 26 dB to 35 dB by adjusting the capacitance value of the variable capacitor 32.

  As apparent from the above, according to the second embodiment, one end is connected to the output terminal of the operational amplifier 12, one end is connected to the other end of the switch 31, and the other end is the inversion of the operational amplifier 12. The variable capacitor 32 connected to the input terminal (−) and the opening / closing of the switch 31 are controlled, and the capacitance of the variable capacitor 32 is determined according to the phase margin and the gain margin of the measurement target circuit 1 specified by the margin specifying unit 25. Since the capacitor control unit 33 that adjusts the value is provided, the phase margin and gain margin of the measurement target circuit 1 can be optimized.

Embodiment 3 FIG.
In the second embodiment, the variable capacitor 32 is connected between the output terminal and the inverting input terminal (−) of the operational amplifier 12 to increase the phase margin and the gain margin of the circuit 1 to be measured. In the third embodiment, a description will be given of an example in which the phase margin and gain margin of the measurement target circuit 1 are increased by adding a snubber circuit as shown in FIG.

8 is a block diagram showing a phase margin gain margin measuring circuit according to Embodiment 3 of the present invention. In FIG. 8, the same reference numerals as those in FIG.
One end of the switch 41 is connected to the output terminal of the operational amplifier 12.
The variable resistor 42 is a resistor whose resistance value can be varied, and one end is connected to the other end of the switch 41.
The variable capacitor 43 is a capacitor whose capacitance value can be varied. One end is connected to the other end of the variable resistor 42 and the other end is grounded.
The resistance capacitor control unit 44 controls the opening and closing of the switch 41, and the resistance value of the variable resistor 42 and the capacitance value of the variable capacitor 43 according to the phase margin and gain margin of the circuit 1 to be measured specified by the margin specifying unit 25. It is a circuit that adjusts.

Next, the operation will be described.
However, since the switch 41, the variable resistor 42, the variable capacitor 43, and the resistor capacitor control unit 44 are added except that the switch 41, the variable resistor 42, the variable capacitor 43, and the resistor capacitor control unit 44 are added, here, the switch 41, the variable resistor 42, the variable capacitor 43 and the resistor capacitor control unit 44 will be described.
First, when measuring the phase margin and the gain margin of the circuit 1 to be measured, the resistance capacitor control unit 44 controls the switch 41 to be in an open state so that it can be varied between the output terminal of the operational amplifier 12 and the ground. A series circuit composed of the resistor 42 and the variable capacitor 43 is not connected.
In this state, when the phase margin and gain margin of the measurement target circuit 1 specified by the margin specifying unit 25 are insufficient, for example, when the phase margin is less than 45 ° or the gain margin is less than 10 dB, the resistance The capacitor control unit 44 controls the switch 41 to be in a closed state so that a series circuit including the variable resistor 42 and the variable capacitor 43 is connected between the output terminal of the operational amplifier 12 and the ground. The resistance value of the variable resistor 42 and the capacitance value of the variable capacitor 43 are adjusted according to the phase margin and the gain margin.

The state in which the series circuit composed of the variable resistor 42 and the variable capacitor 43 is connected between the output terminal of the operational amplifier 12 and the ground is that in which a snubber circuit is added as shown in FIG. Equivalent to. Since the snubber circuit has an effect of suppressing the gain peak, the closed loop can be stabilized.
After the resistance capacitor control unit 44 adjusts the resistance value of the variable resistor 42 and the capacitance value of the variable capacitor 43, the phase margin and the gain margin of the measurement target circuit 1 are measured as in the first embodiment.
The adjustment of the resistance value of the variable resistor 42 and the capacitance value of the variable capacitor 43 and the measurement of the phase margin and the gain margin are repeated until the phase margin and gain margin of the measurement target circuit 1 reach the desired phase margin and gain margin. carry out.
Thus, if the resistance value of the variable resistor 42 and the capacitance value of the variable capacitor 43 at which the phase margin and gain margin of the measurement target circuit 1 become the desired phase margin and gain margin are known, the resistance having the resistance value is appropriately selected. In addition, a series circuit with a capacitor having the capacitance value can be connected between the output terminal of the operational amplifier 12 and the ground, so that the phase margin and gain margin of the measurement target circuit 1 can be optimized.

  As is apparent from the above, according to the third embodiment, the switch 41 whose one end is connected to the output terminal of the operational amplifier 12, the variable resistor 42 whose one end is connected to the other end of the switch 41, and one end Is connected to the other end of the variable resistor 42 and the other end of the variable resistor 43 is grounded, and controls the opening and closing of the switch 41, and the phase margin of the measurement target circuit 1 specified by the margin specifying unit 25 and Since the resistance capacitor control unit 44 that adjusts the resistance value of the variable resistor 42 and the capacitance value of the variable capacitor 43 according to the gain margin is provided, the phase margin and the gain margin of the measurement target circuit 1 are optimized. There is an effect that can be achieved.

Embodiment 4 FIG.
In the second embodiment, the variable capacitor 32 is connected between the output terminal and the inverting input terminal (−) of the operational amplifier 12 to increase the phase margin and the gain margin of the circuit 1 to be measured. In the fourth embodiment, as shown in FIG. 5C, a description will be given of an example in which the phase margin and gain margin of the measurement target circuit 1 are increased by performing phase compensation between the input terminals.

FIG. 9 is a block diagram showing a phase margin gain margin measuring circuit according to Embodiment 4 of the present invention. In FIG. 9, the same reference numerals as those in FIG.
One end of the switch 51 is connected to the non-inverting input terminal (+) of the operational amplifier 12.
The variable resistor 52 is a resistor whose resistance value can be varied, and one end is connected to the other end of the switch 51.
The variable capacitor 53 is a capacitor whose capacitance value can be varied. One end of the variable capacitor 53 is connected to the other end of the variable resistor 52, and the other end is connected to the inverting input terminal (−) of the operational amplifier 12.
The resistance capacitor control unit 54 controls the opening and closing of the switch 51, and the resistance value of the variable resistor 52 and the capacitance value of the variable capacitor 53 according to the phase margin and gain margin of the circuit 1 to be measured specified by the margin specifying unit 25. It is a circuit that adjusts.

Next, the operation will be described.
However, except that a switch 51, a variable resistor 52, a variable capacitor 53, and a resistor capacitor control unit 54 are added, the configuration is the same as that of the first embodiment. Therefore, here, the switch 51, the variable resistor 52, the variable capacitor 53 and the resistor capacitor control unit 54 will be described.
First, when measuring the phase margin and gain margin of the circuit 1 to be measured, the resistance capacitor control unit 54 controls the switch 51 to be in an open state, whereby the non-inverting input terminal (+) and the inverting input of the operational amplifier 12 are controlled. A series circuit including the variable resistor 52 and the variable capacitor 53 is not connected between the terminal (−).
In this state, when the phase margin and gain margin of the measurement target circuit 1 specified by the margin specifying unit 25 are insufficient, for example, when the phase margin is less than 45 ° or the gain margin is less than 10 dB, the resistance The capacitor control unit 54 controls the switch 51 to be closed, and a series circuit including a variable resistor 52 and a variable capacitor 53 is provided between the non-inverting input terminal (+) and the inverting input terminal (−) of the operational amplifier 12. After being connected, the resistance value of the variable resistor 52 and the capacitance value of the variable capacitor 53 are adjusted according to the phase margin and gain margin.

As shown in FIG. 5C, a series circuit composed of the variable resistor 52 and the variable capacitor 53 is connected between the non-inverting input terminal (+) and the inverting input terminal (−) of the operational amplifier 12. This is equivalent to performing phase compensation between input terminals.
After the resistance capacitor control unit 54 adjusts the resistance value of the variable resistor 52 and the capacitance value of the variable capacitor 53, the phase margin and the gain margin of the measurement target circuit 1 are measured as in the first embodiment.
The adjustment of the resistance value of the variable resistor 52 and the capacitance value of the variable capacitor 53 and the measurement of the phase margin and gain margin are repeated until the phase margin and gain margin of the measurement target circuit 1 reach the desired phase margin and gain margin. carry out.
Thus, if the resistance value of the variable resistor 52 and the capacitance value of the variable capacitor 53 at which the phase margin and gain margin of the measurement target circuit 1 become the desired phase margin and gain margin are known, the resistor having the resistance value is appropriately selected. , A series circuit with a capacitor having the capacitance value can be connected between the non-inverting input terminal (+) and the inverting input terminal (−) of the operational amplifier 12, and the phase margin and gain of the circuit 1 to be measured It is possible to optimize the margin.

  As is apparent from the above, according to the fourth embodiment, the switch 51 having one end connected to the non-inverting input terminal (+) of the operational amplifier 12 and the variable having one end connected to the other end of the switch 51. The resistor 52, one end connected to the other end of the variable resistor 52, the other end connected to the inverting input terminal (−) of the operational amplifier 12, and the opening / closing of the switch 51, and a margin specifying unit Since it is configured to include a resistance capacitor control unit 54 that adjusts the resistance value of the variable resistor 52 and the capacitance value of the variable capacitor 53 in accordance with the phase margin and gain margin of the circuit 1 to be measured specified by 25. There is an effect that the phase margin and the gain margin of the target circuit 1 can be optimized.

Embodiment 5. FIG.
In the second embodiment, the variable capacitor 32 is connected between the output terminal of the operational amplifier 12 and the inverting input terminal (−). In the third embodiment, the variable resistor is connected between the output terminal of the operational amplifier 12 and the ground. In the fourth embodiment, a variable resistor 52 and a variable capacitor 53 are provided between the non-inverting input terminal (+) and the inverting input terminal (−) of the operational amplifier 12 in the fourth embodiment. It shows what connects a series circuit.
In the fifth embodiment, a phase margin gain margin measuring circuit capable of selecting the connection state of the second embodiment, the connection state of the third embodiment, or the connection state of the fourth embodiment as necessary. explain.

10 is a block diagram showing a phase margin gain margin measuring circuit according to Embodiment 5 of the present invention, and FIG. 11 is a block diagram showing a variable element circuit 61 of the phase margin gain margin measuring circuit according to Embodiment 5 of the present invention. It is. 10, the same reference numerals as those in FIG. 1 denote the same or corresponding parts.
10 and 11, the variable element circuit 61 is connected to the non-inverting input terminal (+), the inverting input terminal (−), and the output terminal of the operational amplifier 12, and includes a variable resistor 73 and a variable capacitor 76 as variable elements. In addition, the circuit includes a plurality of switches 71, 72, 74, 75, 77, 78.
The switch control unit 62 is a circuit that controls opening and closing of the switches 71, 72, 74, 75, 77, and 78 that constitute the variable element circuit 61.
The resistance capacitor control unit 63 determines the resistance value of the variable resistor 73 and the capacitance value of the variable capacitor 76 constituting the variable element circuit 61 in accordance with the phase margin and gain margin of the measurement target circuit 1 specified by the margin specifying unit 25. It is a circuit that adjusts.

The switch 71 is a first switch having one end connected to the non-inverting input terminal (+) of the operational amplifier 12.
The switch 72 is a second switch having one end connected to the output terminal of the operational amplifier 12.
The variable resistor 73 is a resistor whose resistance value can be varied, and one end is connected to the other ends of the switches 71 and 72.
The switch 74 is a third switch having one end connected to the other end of the variable resistor 73.

The switch 75 is a fourth switch having one end connected to the output terminal of the operational amplifier 12.
The variable capacitor 76 is a capacitor whose capacitance value can be varied, and one end is connected to the other ends of the switches 74 and 75.
The switch 77 is a fifth switch having one end connected to the inverting input terminal (−) of the operational amplifier 12.
The switch 78 is a sixth switch having one end connected to the other end of the variable capacitor 76 and the switch 77 and the other end grounded to the ground.

Next, the operation will be described.
First, when measuring the phase margin and gain margin of the circuit 1 to be measured, the switch control unit 62, as shown in FIG. 11, switches 71, 72, 74, and 75 that constitute the variable element circuit 61. , 77, 78 are controlled to be in an open state, so that the variable element circuit 61 is not connected.
In this state, when the phase margin and gain margin of the measurement target circuit 1 specified by the margin specifying unit 25 are insufficient, the switch control unit 62 configures the switch constituting the variable element circuit 61 as shown in FIG. After controlling 75 and 77 to the closed state, the resistance capacitor control unit 63 adjusts the capacitance value of the variable capacitor 76 constituting the variable element circuit 61 according to the phase margin and the gain margin.
The circuit configuration when the switches 75 and 77 are closed and the switches 71, 72, 74 and 78 are open is such that the variable capacitor 32 is connected between the output terminal of the operational amplifier 12 and the inverting input terminal (−). The configuration is the same as that of the second embodiment.

Here, an example is shown in which the switch control unit 62 controls the switches 75 and 77 to the closed state. However, from the state of FIG. 11 in which the switches 71, 72, 74, 75, 77, and 78 are open, The control unit 62 may control the switches 72, 74, and 78 constituting the variable element circuit 61 to be closed as shown in FIG.
The resistance capacitor control unit 63 determines the resistance value of the variable resistor 73 and the capacitance of the variable capacitor 76 constituting the variable element circuit 61 in accordance with the phase margin and gain margin of the measurement target circuit 1 specified by the margin specifying unit 25. Adjust the value.
The circuit configuration when the switches 72, 74, 78 are closed and the switches 71, 75, 77 are open is a series of a variable resistor 42 and a variable capacitor 43 between the output terminal of the operational amplifier 12 and the ground. The configuration is the same as in the third embodiment to which a circuit is connected.

Further, from the state of FIG. 11 in which the switches 71, 72, 74, 75, 77, 78 are open, the switch control unit 62 forms the variable element circuit 61 as shown in FIG. 74, 77 may be controlled to be closed.
Also in this case, the resistance capacitor control unit 63 determines the resistance value and variable of the variable resistor 73 constituting the variable element circuit 61 according to the phase margin and gain margin of the measurement target circuit 1 specified by the margin specifying unit 25. The capacitance value of the capacitor 76 is adjusted.
The circuit configuration when the switches 71, 74, 77 are closed and the switches 72, 75, 78 are open is between the non-inverting input terminal (+) and the inverting input terminal (−) of the operational amplifier 12. The configuration is similar to that of the fourth embodiment, in which a series circuit composed of a variable resistor 52 and a variable capacitor 53 is connected.

  As is apparent from the above, according to the fifth embodiment, the switch control unit 62 that controls opening and closing of the switches 71, 72, 74, 75, 77, and 78 constituting the variable element circuit 61, and the margin specification A resistance capacitor control unit 63 that adjusts the resistance value of the variable resistor 73 and the capacitance value of the variable capacitor 76 constituting the variable element circuit 61 in accordance with the phase margin and gain margin of the measurement target circuit 1 specified by the unit 25. As in the second to fourth embodiments, the phase margin and the gain margin of the measurement target circuit 1 can be optimized. In addition, the circuit configuration for increasing the phase margin and the gain margin can be switched as necessary.

  In the present invention, within the scope of the invention, any combination of the embodiments, or any modification of any component in each embodiment, or omission of any component in each embodiment is possible. .

  DESCRIPTION OF SYMBOLS 1 Measurement object circuit, 2 Phase margin gain margin measurement circuit, 11 Input circuit, 12 Operational amplifier, 13 Feedback circuit (feedback circuit), 21 Signal source, 22 Phase gain calculation part, 22a Measuring instrument, 22b Calculator, 23 Phase gain storage Unit, 24 frequency control unit, 25 margin specifying unit, 31 switch, 32 variable capacitor, 33 capacitor control unit, 41 switch, 42 variable resistor, 43 variable capacitor, 44 resistor capacitor control unit, 51 switch, 52 variable resistor, 53 variable Capacitor, 54 Resistor Capacitor Control Unit, 61 Variable Element Circuit, 62 Switch Control Unit, 63 Resistor Capacitor Control Unit, 71 Switch (First Switch), 72 Switch (Second Switch), 73 Variable Resistor, 74 Switch (1st 3 switch), 75 switch (No. Switch), 76 a variable capacitor, 77 switch (fifth switch) 78 switch (sixth switch of).

Claims (8)

A signal source connected to the non-inverting input terminal of the operational amplifier when measuring the phase margin and the gain margin of the measurement target circuit in which the feedback circuit is connected between the output terminal and the inverting input terminal of the operational amplifier;
When measuring the phase margin and the gain margin of the circuit to be measured, the operational amplifier is connected to the output terminal of the operational amplifier, the inverting input terminal of the operational amplifier, and the non-inverting input terminal of the operational amplifier, and from the output terminal of the operational amplifier Using the signal output to the feedback circuit, the signal output from the feedback circuit to the inverting input terminal of the operational amplifier, and the signal output from the signal source to the non-inverting input terminal of the operational amplifier, And a phase gain calculation unit for calculating the gain;
A frequency control unit that varies the frequency of the signal output from the signal source;
Each time the frequency of the signal is changed by the frequency control unit, the phase and gain calculated by the phase gain calculation unit are collected, and from the phase and gain of the measurement target circuit at each frequency, the measurement target circuit A phase margin gain margin measuring circuit including a margin identifying unit for identifying a phase margin and a gain margin. A variable capacitor having one end connected to the output terminal of the operational amplifier and the other end connected to the inverting input terminal of the operational amplifier;
The phase margin gain according to claim 1, further comprising: a capacitor control unit that adjusts a capacitance value of the variable capacitor according to a phase margin and a gain margin of the measurement target circuit identified by the margin identification unit. Margin measuring circuit. A series circuit composed of a variable resistor and a variable capacitor connected between the output terminal of the operational amplifier and the ground;
A resistance capacitor control unit that adjusts the resistance value of the variable resistor and the capacitance value of the variable capacitor constituting the series circuit according to the phase margin and the gain margin of the measurement target circuit specified by the margin specifying unit; The phase margin gain margin measuring circuit according to claim 1, further comprising: A series circuit comprising a variable resistor and a variable capacitor connected between a non-inverting input terminal and an inverting input terminal of the operational amplifier;
A resistance capacitor control unit that adjusts the resistance value of the variable resistor and the capacitance value of the variable capacitor constituting the series circuit according to the phase margin and the gain margin of the measurement target circuit specified by the margin specifying unit; The phase margin gain margin measuring circuit according to claim 1, further comprising: A first switch having one end connected to the non-inverting input terminal of the operational amplifier;
A second switch having one end connected to the output terminal of the operational amplifier;
A variable resistor having one end connected to the other end of the first and second switches;
A third switch having one end connected to the other end of the variable resistor;
A fourth switch having one end connected to the output terminal of the operational amplifier;
A variable capacitor having one end connected to the other end of the third and fourth switches;
A fifth switch having one end connected to the inverting input terminal of the operational amplifier;
A variable element circuit having one end connected to the other end of the variable capacitor and the fifth switch and the other end grounded to the ground;
A switch control unit for controlling opening and closing of the first to sixth switches constituting the variable element circuit;
A resistance capacitor control unit that adjusts the resistance value of the variable resistor and the capacitance value of the variable capacitor constituting the variable element circuit in accordance with the phase margin and gain margin of the measurement target circuit specified by the margin specifying unit. The phase margin gain margin measuring circuit according to claim 1, further comprising: The switch control unit controls the first to third and sixth switches to an open state, and controls the fourth and fifth switches to a closed state.
6. The phase margin gain according to claim 5, wherein the resistance capacitor control unit adjusts a capacitance value of the variable capacitor according to a phase margin and a gain margin of the measurement target circuit specified by the margin specifying unit. Margin measuring circuit. The switch control unit controls the first, fourth, and fifth switches to an open state, and controls the second, third, and sixth switches to a closed state,
The resistance capacitor control unit adjusts a resistance value of the variable resistor and a capacitance value of the variable capacitor according to a phase margin and a gain margin of a measurement target circuit specified by the margin specifying unit. Item 6. A phase margin gain margin measuring circuit according to Item 5. The switch control unit controls the second, fourth, and sixth switches to an open state, and controls the first, third, and fifth switches to a closed state,
The resistance capacitor control unit adjusts a resistance value of the variable resistor and a capacitance value of the variable capacitor according to a phase margin and a gain margin of a measurement target circuit specified by the margin specifying unit. Item 6. A phase margin gain margin measuring circuit according to Item 5.

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