JP2016208441A - Time synchronization method and time synchronization device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To solve the problem that it take time to generate reference timing for measuring a delay fluctuation amount on a packet network.SOLUTION: A transmission-side time synchronization device transmits a test packet for measuring delay fluctuation to a reception-side time synchronization device in a preset transmission cycle. The reception-side time synchronization device generates first reference timing indicating a reception cycle of the test packet, calculates the delay fluctuation amount based on a time difference between reception timing of the test packet and the first reference timing, corrects deviation of time from the transmission-side time synchronization device, and discriminates whether time information of the first reference timing is valid/invalid based on a device state. If the time information of the first reference timing is valid, time information of the first reference timing is stored. If the first reference timing disappears, the first reference timing is restored based on the stored time information of the first reference timing.SELECTED DRAWING: Figure 2

Description

  The present invention relates to a technique for realizing time synchronization between devices connected via a packet network.

  A technique for performing time synchronization by transmitting and receiving time synchronization packets (PTP (Precision Time Protocol) packets) between devices connected via a packet network has been standardized (see Non-Patent Document 1). However, since a time error occurs due to delay fluctuations that occur in the packet network, it is difficult to obtain a highly accurate time accuracy on the order of μs, for example. Therefore, in order to achieve highly accurate time synchronization, delay distribution measurement test packets (reference packets (hereinafter referred to as Ref packets)) are sent and received, and delay fluctuations in PTP packets (Sync packets, DelayReq packets, etc.) A technique for correcting the above has been studied (see Patent Document 1). Here, when a time synchronization device having a reference time is a master (Master) device, and a time synchronization device synchronized with the time of the master device is a slave (Slave) device, for example, the Slave device generates a reference timing, The delay distribution is measured by measuring the difference between the reception timing of the Ref packet and the reference timing for each reception. Here, since the Master device and the Slave device operate with the same frequency-synchronized clock, the Slave device can accurately count the transmission cycle and can accurately measure the delay distribution. Then, the Slave device corrects the delay fluctuation of the PTP packet based on the minimum value of the delay distribution of the Ref packet. Here, when high-precision time synchronization is performed, 1/2 of the difference between the minimum values of the delay distributions in the direction from the Master device to the Slave device and in the direction from the Slave device to the Master device is within the target time accuracy. Therefore, it is usually necessary to measure the delay distribution over several hours or more.

IEEE1588-2008

JP 2013-030892 A

  The reference timing is generated by the Master device, or is generated at the timing when the Slave device receives the first Ref packet. Once the reference timing is generated, the transmission period is counted by an internal counter of the master device that is frequency-synchronized with the grand master device or the slave device. However, the reference timing may be lost due to insertion / removal of the package (circuit board, etc.) of the receiving unit of the slave device. Alternatively, there are cases where the reference timing fluctuates because frequency synchronization cannot be performed between the Master device and the Slave device due to a transmission path failure or the like. In this case, since the Slave device cannot correct normal delay fluctuation, it is necessary to measure delay distribution again. On the other hand, since it takes several hours to measure the delay distribution, it is difficult to operate the Slave device immediately after the package is inserted and after recovery from the failure.

  A first invention is a time synchronization method for performing time synchronization by transmitting and receiving time synchronization packets between time synchronization devices connected by a packet network, wherein the time synchronization device on the transmission side has a transmission cycle set in advance. A test packet for measuring delay fluctuation is transmitted to the time synchronizer on the receiving side, and the time synchronizer on the receiving side generates a first reference timing indicating a reception period of the test packet. The amount of delay fluctuation is obtained based on the time difference from one reference timing, the time deviation from the time synchronization device on the transmission side is corrected, and the validity / invalidity of the time information at the first reference timing is determined based on the device state. The time information of the first reference timing is stored when the time information of the first reference timing is valid, and the stored first reference data is stored when the first reference timing is lost. Characterized by restoring the first reference timing based on a timing of the time information.

  According to a second aspect of the invention, the time synchronization device on the transmission side transmits a test packet to the time synchronization device on the reception side based on the second reference timing generated at a preset transmission cycle, and the second reference timing The validity / invalidity of the time information is determined based on the apparatus state, the time information of the second reference timing is saved when the time information of the second reference timing is valid, and the time information is saved when the second reference timing disappears The second reference timing is restored on the basis of the time information of the second reference timing.

  According to a third aspect of the present invention, a reference time timing is generated at a preset period, and a time difference between at least one of a time difference between the reference time timing and the first reference timing and a time difference between the reference time timing and the second reference timing is determined. Is obtained and stored.

  According to a fourth aspect of the present invention, a value less than one second of the time of the first reference timing and the second reference timing is extracted and stored as time information of the first reference timing or the second reference timing. .

  A fifth invention is a time synchronization device that performs time synchronization by transmitting and receiving a time synchronization packet to and from an opposite device connected by a packet network, in order to measure delay fluctuation at a transmission cycle set in advance from the opposite device. Generating a first reference timing indicating a reception period of the test packet, obtaining a delay fluctuation amount based on a time difference between the reception timing of the test packet and the first reference timing, A correction unit that corrects a time lag between the first reference timing and the validity / invalidity of the time information of the first reference timing based on the device state, and the first reference timing when the time information of the first reference timing is valid And a first reference based on the time information of the first reference timing stored by the storage unit when the first reference timing is lost. And having a restoring portion for restoring the timing.

  The sixth invention further includes a transmission unit that transmits a test packet for measuring delay fluctuation at a preset period to the opposite device based on the second reference timing, and the storage unit has the second reference timing The validity / invalidity of the time information is determined based on the device state, and the time information of the second reference timing is stored when the time information of the second reference timing is valid, and the restoration unit has lost the second reference timing In this case, the second reference timing is restored based on the time information of the second reference timing stored by the storage unit.

  The seventh aspect of the present invention further includes a generation unit that generates a reference time timing at a preset period, and the storage unit includes a time difference between the reference time timing and the first reference timing, and the reference time timing and the second reference time. It is characterized by acquiring and storing at least one of the time differences from the timing.

  In an eighth aspect of the invention, the storage unit extracts values less than 1 second of the time of the first reference timing and the second reference timing, respectively, and stores the values as time information of the first reference timing or the second reference timing, respectively. It is characterized by.

  The time synchronization method and the time synchronization apparatus according to the present invention can restore the reference timing from the backup when the reference timing is lost by backing up the time information of the reference timing, and obtain the reference timing. It is possible to avoid measurement of the delay distribution.

It is a figure which shows an example of a network structure. It is a figure which shows an example of a Master apparatus and a Slave apparatus. It is a figure which shows an example of a backup process. It is a figure which shows an example of an acquisition value and a backup value. It is a figure which shows an example of a valid / invalid determination process. It is a figure which shows an example of a decompression | restoration process. It is a figure which shows an example of an apparatus state and a backup value. It is a figure which shows an example of the acquired value of a reference time timing and a reference timing. It is a figure which shows the example of a storage of an acquired value and a backup value. It is a figure which shows an example of the acquired value of a reference timing. It is a figure which shows the example of restoration | restoration of a reference timing.

Hereinafter, embodiments of a time synchronization method and a time synchronization apparatus according to the present invention will be described with reference to the drawings.
[Network configuration]
FIG. 1 shows an example of a network configuration. FIG. 1A shows an example in which one Master device 101a and one Slave device 102a are connected via a packet network 103a. FIG. 1B shows an example in which the Master device 101b (0) and the Slave device 102b are connected via the transmission path 104b, and the Master device 101b (1) and the Slave device 102b are connected via the packet network 103b. Indicates. Here, the present embodiment relates to a time synchronization method in a time synchronization apparatus connected via a packet network. In FIG. 1A, the master device 101a and the slave device 102a connected via the packet network 103a are examples of time synchronization devices. In FIG. 1B, the master device 101b (1) and the slave device 102b connected via the packet network 103b are examples of time synchronization devices.

  The network configuration in FIG. 1A will be described. In FIG. 1A, a master device 101a is connected to a higher-level GrandMaster device 105a via a transmission path 104a. The GrandMaster device 105a is frequency-synchronized with the reference clock distributed from the reference clock 106a. The master device 101a can acquire the reference time from a GNSS (Global Navigation Satellite System) 107a. Similarly, the Slave device 102a can acquire the reference time from the GNSS 107b.

  The network configuration in FIG. 1B will be described. In FIG. 1B, the Master device 101b (0) is connected to the higher-level GrandMaster device 105b via the transmission path 104c. On the other hand, the Master apparatus 101b (1) is connected to the upper GrandMaster apparatus 105b via the transmission path 104d. The GrandMaster device 105b is frequency-synchronized with the reference clock distributed from the reference clock 106b. Further, the GrandMaster device 105b can acquire the reference time from the GNSS 107c. Further, the master device 101b (0) and the slave device 102b are connected via a transmission path 104b. On the other hand, the Master device 101b (1) and the Slave device 102b are connected via the packet network 103b.

  Here, in the following description, when the matters common to the packet network 103a in FIG. 1A and the packet network 103b in FIG. write. Similarly, when the matters common to the transmission path 104a in FIG. 1A and the transmission path 104b, the transmission path 104c, and the transmission path 104d in FIG. Notation is as follows. The reference clock 106a and the reference clock 106b are devices that supply the reference clock, and in the following description, when common items are described, the alphabet at the end of the code is omitted and expressed as the reference clock 106. Similarly, the GNSS 107a, the GNSS 107b, and the GNSS 107c are a common system that supplies a reference time. When the common items are described, the alphabet at the end of the code is omitted and expressed as GNSS 107.

  Furthermore, the GrandMaster device 105a and the GrandMaster device 105b have the same function of supplying the reference clock and the reference time to the lower device. Therefore, in the following description, when a matter common to the GrandMaster device 105a and the GrandMaster device 105b is described, the alphabet at the end of the code is omitted and the description is expressed as the GrandMaster device 105.

  The master device 101a, the master device 101b (0), and the master device 101b (1) perform clock synchronization and time synchronization with the higher-level GrandMaster device 105, and the lower-level slave device 102a and slave device 102b The functions for clock synchronization and time synchronization are common. Therefore, in the following description, when the matters common to the master device 101a, the master device 101b (0), and the master device 101b (1) are described, the alphabet at the end of the code is omitted and the description is expressed as the master device 101.

Similarly, the slave device 102a and the slave device 102b share the same function for clock synchronization and time synchronization with the master device 101 on the host side. Therefore, in the following description, when the matters common to the Slave device 102a and the Slave device 102b are described, the alphabet at the end of the code is omitted and the description is expressed as the Slave device 102.
[About delay fluctuation]
In FIG. 1, since the packet network 103 relays a packet by a network device such as a router or a switch, variation (referred to as delay fluctuation) occurs in the delay time of packets transmitted and received in the packet network 103. On the other hand, since the transmission path 104 shown in FIG. 1 is relayed not by an asynchronous network such as a router or a switch but by a synchronous network, for example, delay fluctuation does not occur.

  For example, in FIG. 1A, since the master device 101a and the slave device 102a are connected via the packet network 103a, delay fluctuation occurs in the PTP packet transmitted and received in the packet network 103a. For this reason, when connected by the packet network 103a, it is difficult to achieve time synchronization with higher accuracy than when connected by the transmission path 104 in which no delay fluctuation occurs. Similarly, in FIG. 1B, no delay fluctuation occurs between the Master device 101b (0) and the Slave device 102b connected by the transmission path 104b. However, delay fluctuation occurs between the Master apparatus 101b (1) and the Slave apparatus 102b connected by the packet network 103b.

  For this reason, processing for measuring and correcting the amount of delay fluctuation occurring between the master device 101 and the slave device 102 connected via the packet network 103 is performed. For example, the master device 101 on the transmission side transmits a test packet (Ref packet) for measuring the amount of delay fluctuation to the slave device 102 at a preset period. On the other hand, the Slave device 102 generates a reference timing indicating the reception cycle of the Ref packet based on the first Ref packet received from the Master device 101, for example. Then, the Slave device 102 measures the time difference between the reception timing of the second and subsequent Ref packets and the reference timing, and obtains a time difference distribution (delay distribution) over several hours, for example. For example, the slave device 102 corrects the time lag with the master device 101 using the minimum value of the delay distribution as the amount of delay fluctuation. Similar processing is executed not only in the direction from the Master device 101 to the Slave device 102 but also in the direction from the Slave device 102 to the Master device 101.

  As described above, the reference timing is an important parameter for obtaining the delay fluctuation amount. When the reference timing is lost, the reference timing is generated again and the delay fluctuation amount over several hours must be measured again. The problem of having to occur arises. In the present embodiment, the reference timing is backed up, and even if the reference timing is lost, the reference timing can be quickly restored, and it is necessary to generate the reference timing again and remeasure the delay fluctuation amount. Disappear.

  Here, when the Ref packet is transmitted from the Master device 101 to the Slave device 102, both the transmission reference timing of the Ref packet in the Master device 101 on the transmission side and the reception reference timing of the Ref packet in the Slave device 102 on the reception side are determined. Need to back up. Similarly, when a Ref packet is transmitted from the Slave device 102 to the Master device 101, both the transmission reference timing of the Ref packet in the Slave device 102 on the transmission side and the reception reference timing of the Ref packet in the Master device 101 on the reception side. Need to back up. Therefore, the master device 101 and the slave device 102 back up the four reference timings for the Ref packets transmitted and received between each other.

As a reference timing backup method, for example, a method is used in which the time of the reference timing is acquired based on the reference time of the internal clock, and a value less than 1 second of the acquired time is stored as a backup value. Alternatively, as another backup method of the reference timing, for example, by generating a reference time timing of a predetermined cycle (1PPS (1 Pulse Per Second: pulse signal output at intervals of 1 second), etc.) And a method of storing a time difference between the reference timing and the reference timing as a backup value. In this case, it is desirable that the cycle of the reference time timing is an integer multiple of the cycle of the reference timing. This is because, when it is not an integer multiple, when the reference timing is restored, it deviates from the cycle of the reference timing at the time of backup. For example, when the reference time timing is 1 PPS and the reference timing is 50 msec, a time difference from the reference time timing is obtained for each of about 20 reference timings and stored as a backup value.
[GrandMaster device 105]
In FIG. 1, the GrandMaster device 105 generates a reference time using a clock synchronized with a reference clock distributed from the outside, and supplies the reference time and the reference clock to a lower-level device.

  For example, the GrandMaster device 105a illustrated in FIG. 1A includes a reception processing unit Rx1 on the upper side and a transmission processing unit Tx2 and a reception processing unit Rx2 on the lower side.

  Here, in FIG. 1A and FIG. 1B, the reception processing unit Rx * (* is a number) and the transmission processing unit Tx * (* is a number) are reception Rx * (* is a number) and transmission Tx. * (* Is a number).

  In FIG. 1A, the reception processing unit Rx1 receives the reference clock distributed from the reference clock 106a. The GrandMaster device 105a has a clock that outputs a reference time inside, and operates with the reference clock. Further, the transmission processing unit Tx2 and the reception processing unit Rx2 transmit and receive PTP packets conforming to the IEEE 1588-2008 standard to and from the lower-level master device 101a. As a result, the Master device 101a can achieve time synchronization with the GrandMaster device 105a.

  On the other hand, the GrandMaster device 105b shown in FIG. 1B includes a reception processing unit Rx9 and a reception processing unit Rx10 on the upper side, a transmission processing unit Tx11, a reception processing unit Rx11, a transmission processing unit Tx12, and a reception processing unit Rx12 on the lower side. Have The reception processing unit Rx9 receives the reference time distributed from the GNSS 107c. The reception processing unit Rx10 receives the reference clock distributed from the reference clock 106b. In addition, the transmission processing unit Tx11 and the reception processing unit Rx11 transmit and receive PTP packets to and from the lower-level master device 101b (0). Thereby, Master device 101b (0) can aim at time synchronization with GrandMaster device 105b. The transmission processing unit Tx12 and the reception processing unit Rx12 transmit and receive PTP packets to and from the lower-level master device 101b (1). Thereby, Master device 101b (1) can aim at time synchronization with GrandMaster device 105b.

Here, between the higher-order apparatus and the lower-order apparatus described in the present embodiment, processing for performing clock synchronization (frequency synchronization) is performed together with time synchronization. For example, in the case of FIG. 1A, the upper device of the Slave device 102a is the Master device 101a, and the upper device of the Master device 101a is the GrandMaster device 105a. Similarly, in FIG. 1B, the upper devices of the Slave device 102b are the Master device 101b (0) and the Master device 101b (1), and the upper devices of the Master device 101b (0) and the Master device 101b (1). The device on the side is the GrandMaster device 105b.
[Master device 101]
In FIG. 1, the Master device 101 has a clock inside, and generates time with a clock synchronized with a reference clock distributed from the GrandMaster device 105. Then, the Master apparatus 101 transmits / receives a PTP packet to / from the GrandMaster apparatus 105, and synchronizes the time of the own apparatus with the time of the GrandMaster apparatus 105. The master device 101 transmits and receives PTP packets to and from the slave device 102 on the lower side.

  For example, the Master device 101a illustrated in FIG. 1A includes a reception processing unit Rx3, a reception processing unit Rx4 and a transmission processing unit Tx4 on the upper side, and a transmission processing unit Tx5 and a reception processing unit Rx5 on the lower side. The reception processing unit Rx3 receives the reference time distributed from the GNSS 107a. Further, the reception processing unit Rx4 and the transmission processing unit Tx4 transmit / receive PTP packets to / from the higher-level GrandMaster device 105a. As a result, the Master device 101a can achieve time synchronization with the GrandMaster device 105a. Furthermore, the transmission processing unit Tx5 and the reception processing unit Rx5 transmit and receive PTP packets to and from the slave device 102a on the lower side. Thereby, the Slave device 102a can achieve time synchronization with the Master device 101a.

  On the other hand, the Master apparatus 101b (0) illustrated in FIG. 1B includes a reception processing unit Rx13 and a transmission processing unit Tx13 on the upper side, and a transmission processing unit Tx14 and a reception processing unit Rx14 on the lower side. The reception processing unit Rx13 and the transmission processing unit Tx13 transmit and receive PTP packets to and from the higher-level GrandMaster device 105b. Thereby, Master device 101b (0) can aim at time synchronization with GrandMaster device 105b. Further, the transmission processing unit Tx14 and the reception processing unit Rx14 transmit / receive PTP packets to / from the slave device 102b on the lower side. Thereby, the Slave device 102b can achieve time synchronization with the Master device 101b (0).

The master device 101b (1) illustrated in FIG. 1B includes a reception processing unit Rx15 and a transmission processing unit Tx15 on the upper side, and a transmission processing unit Tx16 and a reception processing unit Rx16 on the lower side. The reception processing unit Rx15 and the transmission processing unit Tx15 transmit and receive PTP packets to and from the higher-level GrandMaster device 105b. Thereby, Master device 101b (1) can aim at time synchronization with GrandMaster device 105b. Further, the transmission processing unit Tx16 and the reception processing unit Rx16 transmit / receive PTP packets to / from the slave device 102b on the lower side. Thereby, the Slave device 102b can achieve time synchronization with the Master device 101b (1).
[Slave device 102]
The slave device 102 has a clock inside, and generates time with a clock synchronized with the reference clock distributed from the master device 101. Then, the Slave device 102 transmits / receives a PTP packet to / from the Master device 101, and synchronizes the time of the internal clock with the time of the Master device 101. When the same slave device 102 is connected to the lower side, the own device becomes the master device and transmits / receives a PTP packet to / from the lower level slave device.

  For example, the Slave device 102a illustrated in FIG. 1A includes a reception processing unit Rx6, a reception processing unit Rx7 and a transmission processing unit Tx7 on the upper side, and a transmission processing unit Tx8 and a reception processing unit Rx8 on the lower side. The reception processing unit Rx6 receives the reference time distributed from the GNSS 107b. In addition, the reception processing unit Rx7 and the transmission processing unit Tx7 transmit and receive PTP packets to and from the upper master device 101a. Thereby, the Slave device 102a can synchronize the time of the internal clock with the time of the Master device 101a. Note that the transmission processing unit Tx8 and the reception processing unit Rx8 transmit and receive PTP packets when a slave device similar to the slave device 102a is connected to the lower side.

On the other hand, the Slave device 102b shown in FIG. 1B includes a reception processing unit Rx17, a transmission processing unit Tx17, a reception processing unit Rx18 and a transmission processing unit Tx18 on the upper side, and a transmission processing unit Tx19 and a reception processing unit Rx19 on the lower side. Have The reception processing unit Rx17 and the transmission processing unit Tx17 transmit and receive PTP packets to and from the upper master device 101b (0). Thereby, the Slave device 102b can achieve time synchronization with the Master device 101b (0). In addition, the reception processing unit Rx18 and the transmission processing unit Tx18 transmit and receive PTP packets to and from the upper master device 101b (1). Thereby, the Slave device 102b can achieve time synchronization with the Master device 101b (1). The transmission processing unit Tx19 and the reception processing unit Rx19 transmit and receive PTP packets when a slave device similar to the slave device 102b is connected to the lower side.
[Applicable part of this embodiment]
The time synchronization method according to the present embodiment can be applied to a case where time synchronization is achieved by correcting delay fluctuation between devices connected via the packet network 103 shown in FIG. For example, in FIG. 1A, the portion of the dotted frame 151 (transmission processing unit Tx5 and reception processing unit Rx5) of the Master device 101a and the portion of the dotted frame 152 of the Slave device 102a (reception processing unit Rx7 and transmission processing unit Tx7). Applicable to and. In the example of FIG. 1B, the portion of the dotted frame 153 (transmission processing unit Tx16 and reception processing unit Rx16) of the Master device 101b (1) and the portion of the dotted frame 154 of the Slave device 102b (reception processing unit Rx18). And the transmission processing unit Tx18).

Here, in the present embodiment, the Slave device 102 can acquire time information from a time path of another system. For example, in the case of FIG. 1A, the Slave device 102a acquires time information from the GNSS 107b connected via the reception processing unit Rx6 as a time path of another system. In the case of FIG. 1B, the Slave device 102b acquires time information from the Master device 101b (0) connected via the reception processing unit Rx17 and the transmission processing unit Tx17 as a time path of another system.
[Configuration example of time synchronization device]
A configuration example of the time synchronization apparatus according to the present embodiment will be described.

  FIG. 2 shows an example of the Master device 201 and the Slave device 202. The Master device 201 and the Slave device 202 are examples of time synchronization devices, respectively. Here, the Master device 201 is an example of the Master device 101a or Master device 101b (1) described in FIG. The slave device 202 is an example of the slave device 102a or the slave device 102b described in FIG. In FIG. 2, the solid arrow indicates the flow of the control signal / data signal, the broken line arrow indicates the flow of the frequency signal, and the dotted arrow indicates the flow of the time signal.

  In FIG. 2, the Master device 201 includes a transmission processing unit 211 and a reception processing unit 212. Here, the transmission processing unit 211 of the Master device 201 is, for example, the transmission processing unit Tx5 of the Master device 101a illustrated in FIG. 1A or the transmission of the Master device 101b (1) illustrated in FIG. An example of processing part Tx16 is shown. Further, the reception processing unit 212 of the Master device 201 is, for example, the reception processing unit Rx5 of the Master device 101a illustrated in FIG. 1A or the reception processing of the Master device 101b (1) illustrated in FIG. An example of the unit Rx16 is shown.

  In FIG. 2, the slave device 202 includes a reception processing unit 221 and a transmission processing unit 222. Note that the Slave device 202 acquires time information from a time path of a different system from the Master device 201. Here, the reception processing unit 221 of the Slave device 202 is, for example, the reception processing unit Rx7 of the Slave device 102a illustrated in FIG. 1A or the reception processing unit Rx18 of the Slave device 102b illustrated in FIG. An example is shown. Further, the transmission processing unit 222 of the Slave device 202 is, for example, the transmission processing unit Tx7 of the Slave device 102a illustrated in FIG. 1A or the transmission processing unit Tx18 of the Slave device 102b illustrated in FIG. An example is shown.

  The Master device 201 and the Slave device 202 according to the present embodiment back up the reference timing in case the reference timing for measuring the delay fluctuation is lost due to the insertion / removal of a package or a failure. As a result, the Master device 201 and the Slave device 202 according to the present embodiment do not need to newly generate a reference timing and measure a delay distribution that takes several hours, and can quickly restore the reference timing. In the example of FIG. 2, the four reference timings generated in each of the transmission processing unit 211 and the reception processing unit 212 of the master device 201 and the transmission processing unit 222 and the reception processing unit 221 of the slave device 202 are backed up.

  Here, the transmission processing unit 211 and the reception processing unit 212 of the master device 201 operate by sharing information with each other. For example, in the time synchronization processing conforming to the IEEE 1588-2008 standard, the transmission processing unit 211 of the Master device 201 transmits, for example, a Sync packet, FollowUp packet, DelayResp packet, and the like to the reception processing unit 221 of the Slave device 202. On the other hand, the transmission processing unit 222 of the Slave device 202 transmits, for example, a DelayReq packet to the reception processing unit 212 of the Master device 201. In this way, based on the time information such as the reception time and transmission time of the PTP packet transmitted / received between the Master device 201 and the Slave device 202, the time difference between the Master device 201 and the Slave device 202 is corrected. Seek time synchronization.

Note that the reception processing unit 212 of the master device 201 has a reception unit 320 and receives a packet transmitted by the slave device 202, but has the same or similar function as the reception processing unit 221 of the slave device 202 described below. Therefore, the description is omitted here, and will be described together with the reception processing unit 221 of the slave device 202.
[Transmission processing unit 211]
In FIG. 2, the transmission processing unit 211 includes a frequency extraction unit 301, a frequency generation unit 302, a time generation unit 303, a transmission unit 304, a PTP packet processing unit 305, a Ref packet processing unit 306, a counter 307, a memory 308, and a monitoring unit 309. A determination unit 310, a read control unit 311, a memory 312, and a control unit 313.

  The frequency extraction unit 301 extracts a reference frequency clock from, for example, a signal inside the apparatus (including another PKG (Package)), and outputs the extracted reference frequency clock to the frequency generation unit 302.

  The frequency generation unit 302 generates an internal clock having a necessary frequency based on the reference frequency clock received from the frequency extraction unit 301. The frequency generation unit 302 supplies the generated internal clock to the time generation unit 303, the counter 307, and the like.

  The time generation unit 303 clocks time based on the clock received from the frequency generation unit 302 and outputs the time. The time output by the time generation unit 303 is the reference time for the transmission processing unit 211. For example, the time generation unit 303 outputs the time to the counter 307, the memory 308, and the PTP packet processing unit 305. The reference time timing signal such as 1PPS may be output by the time generation unit 303 or may be generated by the counter 307. Here, the time generation unit 303 acquires time information from a time path of another system. For example, in the case of the Master device 101a shown in FIG. 1A, the Master device 101a can acquire the reference time from the GNSS 107a. Alternatively, in the case of the Master device 101b (0) illustrated in FIG. 1B, the Master device 101b (0) can acquire the reference time from the GrandMaster device 105b.

  The transmission unit 304 transmits data packets such as PTP packets and Ref packets, and a clock signal.

  The PTP packet processing unit 305 performs generation and sequence processing of PTP packets such as Sync packets, Follow Up packets, and DelayResp packets in accordance with the IEEE 1588-2008 standard. The PTP packet processing unit 305 performs PTP packet transmission processing. On the other hand, the reception processing unit 212 has a reception block corresponding to the PTP packet processing unit 305 for performing reception processing of PTP packets, and receives PTP packets such as DelayReq packets from the Slave device 202. Thus, the PTP packet processing unit 305 operates in cooperation with the PTP packet reception process of the reception processing unit 212. Then, the master device 201 and the slave device 202 perform a process of correcting a time lag between the devices based on information of PTP packets that are transmitted and received with each other. Note that the reception processing of the PTP packet by the reception processing unit 212 is executed in the same manner as the PTP packet processing unit 405 of the reception processing unit 221 of the slave device 202, and will be described together with the PTP packet processing unit 405.

  The Ref packet processing unit 306 generates a Ref packet, transmits a Ref packet, and the like. The Ref packet processing unit 306 sets a reference timing (transmission reference timing) for transmitting a Ref packet in the counter 307, and the counter 307 periodically outputs the reference timing. Here, the Ref packet processing unit 306 performs Ref packet transmission processing. On the other hand, the reception processing unit 212 has a reception block corresponding to the Ref packet processing unit 306 for performing Ref packet reception processing, and receives the Ref packet transmitted by the slave device 202. Then, the reception processing unit 212 measures the delay distribution of the Ref packet received from the Slave device 202 and executes a process for obtaining the delay fluctuation amount. Since the reception processing of the Ref packet of the reception processing unit 212 is executed in the same manner as the Ref packet processing unit 406 of the reception processing unit 221 of the Slave device 202, it will be described together with the Ref packet processing unit 406 of the Slave device 202. . In this embodiment, the time information of the reference timing (transmission reference timing) generated by the Ref packet processing unit 306 is temporarily stored in the memory 308, and after determining whether or not to back up, the memory 312 is determined. Is backed up. As a result, even if the reference timing is lost due to a failure or a package insertion / extraction, the Ref packet processing unit 306 does not need to newly generate a reference timing and remeasure delay fluctuations.

  The counter 307 counts the number of clocks received from the frequency generation unit 302. The counter 307 outputs the operation timing for each predetermined count value, that is, at a predetermined cycle. For example, the counter 307 outputs a reference timing for periodically transmitting Ref packets. Alternatively, the counter 307 outputs a reference time timing such as 1PPS.

  The memory 308 has a storage area for storing time information (acquired value) of the reference timing. The transmission processing unit 211 acquires the time information of the reference timing output from the counter 307 and stores the acquired value in the memory 308. For example, the transmission processing unit 211 acquires the time of the reference timing based on the reference time output by the time generation unit 303, and takes in time information of less than 1 second into the memory 308 as an acquired value. For example, when the time of the reference timing is 2.00002 seconds, 0.00002 seconds after the decimal point is stored in the memory 308 as time information. Alternatively, the transmission processing unit 211 generates a reference time timing of a predetermined period (for example, 1PPS), and takes the time difference between the reference time timing and the reference timing into the memory 308 as an acquired value. For example, when the time of the reference timing is 1.00001 seconds and the time of the reference time timing is 1.0000 seconds, a time difference of 0.00001 seconds is stored in the memory 308 as time information. Here, for example, a plurality of reference timing acquisition values for a predetermined time period (reference timing acquisition interval) may be stored in the memory 308. In FIG. 2, the memory 308 is a simple storage area and the time information is stored in the memory 308 by the transmission processing unit 211. However, the memory 308 itself is provided with a processing function to store the memory 308. You may make it the block of a process part.

  The monitoring unit 309 monitors whether or not the device state is normal. Here, the information indicating the device status includes, for example, information on whether or not the own device (Master device 201) has failed, information on whether or not the time can be normally acquired from a time path of another system, Information indicating the communication state with the device (GrandMaster device 105 in the example of FIG. 1), information indicating whether the time and frequency are normally acquired, and the frequency synchronization between the Master device 201 and the Slave device 202 is normally performed. It includes information on whether or not

  The determination unit 310 refers to information indicating the device state notified from the monitoring unit 309 and determines whether or not the reference timing is acquired under normal conditions. For example, the determination unit 310 determines that the acquired reference timing value is “invalid” when there is a failure or abnormality in the own device, an abnormality in communication with the host device, an abnormality in time or frequency, or the like. . On the other hand, the determination unit 310 determines that the acquired value of the reference timing acquired when there is no abnormality in time and frequency with the communication with the own device or the host device is “valid”. Here, when processing a plurality of reference timings within the reference timing acquisition interval as a set, the determination unit 310 performs backup when the acquisition values of all the reference timings within the reference timing acquisition interval are “valid”. . In the present embodiment, for example, the oldest acquired value in time among the plurality of acquired values is backed up. The reason why the oldest acquired value is backed up is a case where the acquired value of the reference timing at the next reference timing acquisition interval becomes an abnormal value due to a failure of the packet network or a failure of the own device. In this case, it can be considered that it is preferable to back up the acquired value that is not affected by the abnormality as much as possible. Therefore, the determination unit 310 backs up the oldest acquired value farthest in time from the next reference timing acquisition interval. Note that the determination unit 310 may back up acquired values obtained by performing statistical processing such as an average value or minimum value of a plurality of acquired values, weighting processing, or the like without backing up the oldest acquired values. .

  Here, the number of reference timings included in the reference timing acquisition interval may be one. In this case, the determination unit 310 determines validity / invalidity for each reference timing, and backs up the acquired value of the reference timing when “valid”.

  When the determination result of the determination unit 310 is valid, the read control unit 311 reads the acquired value stored in the memory 308 and stores it in the memory 312 as a backup value. Alternatively, when a plurality of acquired values corresponding to the reference timing acquisition interval are stored in the memory 308, the read control unit 311 uses, for example, the oldest acquired value within the reference timing acquisition interval of the memory 308 as a backup value. Read to.

  The memory 312 is a non-volatile storage device having a storage area for storing backup values. For example, when the determination result of validity / invalidity by the determination unit 310 is valid, the transmission processing unit 211 stores the acquired value of the reference timing stored in the memory 308 in the memory 312 as a backup value. Alternatively, when processing a plurality of acquired values within the reference timing acquisition interval, the transmission processing unit 211, for example, obtains the oldest acquisition when all of the acquired values of the plurality of reference timings within the reference timing acquisition interval are valid. The value is stored in the memory 312 as a backup value. In FIG. 2, the memory 312 is used as a simple storage area and the time information is stored in the memory 312 by the transmission processing unit 211. However, the memory 312 itself is provided with a processing function to store the memory 312. You may make it the block of a process part.

  For example, when the package of the transmission processing unit 211 is inserted or removed by a maintenance person or the like, the control unit 313 uses a trigger for restoring the reference timing as a Ref packet processing unit 306 or a memory 312 (or the transmission processing unit 211). To give. Thereby, the backup process of each unit is executed.

  As described above, the transmission processing unit 211 of the Master device 201 can back up the reference timing for transmitting the Ref packet in the memory 312. As a result, even if the reference timing is lost due to a failure or a package insertion / extraction, the Ref packet processing unit 306 does not need to newly generate a reference timing for transmitting the Ref packet.

Here, since the reception processing unit 212 of the Master device 201 performs the same configuration and operation as the reception processing unit 221 of the Slave device 202, it will be described together with the reception processing unit 221 of the Slave device 202 described below.
[Reception Processing Unit 221]
In FIG. 2, the reception processing unit 221 includes a frequency extraction unit 401, a frequency generation unit 402, a time generation unit 403, a reception unit 404, a PTP packet processing unit 405, a Ref packet processing unit 406, a counter 407, a memory 408, and a monitoring unit 409. , Determination unit 410, read control unit 411, memory 412, and control unit 413.

  In the frequency extraction unit 401, for example, the reception unit 404 extracts a reference frequency clock from a reception signal outside the apparatus (such as the master device 201), and outputs the extracted reference frequency clock to the frequency generation unit 402.

  Based on the reference frequency clock received from the frequency extraction unit 401, the frequency generation unit 402 generates an internal clock having a frequency necessary for each unit. The frequency generation unit 402 supplies the generated internal clock to the time generation unit 403 and the counter 407.

  The time generation unit 403 corrects the time based on the time offset calculated by the PTP packet processing unit 405 and matches the time of the slave device 202 with the time of the master device 201. Note that the time offset output by the PTP packet processing unit 405 is a value obtained by correcting the delay fluctuation amount measured by the Ref packet processing unit 406. Then, the time generation unit 403 clocks time based on the clock received from the frequency generation unit 402 and outputs the time. The time output by the time generation unit 403 is the reference time of the reception processing unit 221. For example, the time generation unit 403 outputs to the counter 407 and the memory 408. The reference time timing signal such as 1PPS may be output by the time generation unit 303 or may be generated by the counter 307.

  The receiving unit 404 receives data packets such as PTP packets and Ref packets, and a clock signal.

  The PTP packet processing unit 405 performs PTP packet reception processing that conforms to the IEEE 1588-2008 standard. For example, the PTP packet processing unit 405 receives a Sync packet, a Follow Up packet, a DelayResp packet, and the like. The PTP packet processing unit 405 performs PTP packet reception processing. On the other hand, the transmission processing unit 222 has a transmission block corresponding to the PTP packet processing unit 405 for performing transmission processing of a PTP packet, and transmits a PTP packet such as a DelayReq packet to the master device 201. As described above, the PTP packet processing unit 405 operates in cooperation with the PTP packet transmission processing of the transmission processing unit 222. Then, the master device 201 and the slave device 202 perform a process of correcting a time lag between the devices based on information of PTP packets that are transmitted and received with each other. Note that the PTP packet transmission processing of the transmission processing unit 222 is executed in the same manner as the PTP packet processing unit 305 of the transmission processing unit 211 as described in the master device 201.

  The Ref packet processing unit 406 performs reception of a Ref packet, measurement of delay distribution, calculation of delay fluctuation, generation of a reference timing (reception reference timing) for receiving a Ref packet, and the like. The Ref packet processing unit 406 sets the reception reference timing of the Ref packet in the counter 407, and the counter 407 periodically outputs the reference timing. Here, the Ref packet processing unit 406 performs Ref packet reception processing. On the other hand, the transmission processing unit 222 has a transmission block corresponding to the Ref packet processing unit 406 for performing Ref packet transmission processing, and transmits the Ref packet to the Master device 201. The Ref packet transmission process of the transmission processing unit 222 is executed in the same manner as the Ref packet processing unit 306 of the transmission processing unit 211 described in the master device 201. In this embodiment, the time information of the reference timing (reception reference timing) generated by the Ref packet processing unit 406 is temporarily stored in the memory 408, and after determining whether or not to back up, the memory 412 Is backed up. As a result, even if the reference timing is lost due to a failure or the insertion / removal of a package, the Ref packet processing unit 406 does not need to newly generate the reference timing and re-measure the delay fluctuation.

  The counter 407 counts the number of clocks received from the frequency generation unit 402. Then, the counter 407 outputs an operation timing for each predetermined count value, that is, at a predetermined cycle. For example, the counter 407 outputs a reference timing (reception reference timing) for receiving a Ref packet. Then, the Ref packet processing unit 406 can determine the time distribution between the reception timing of the Ref packet received from the Master device 201 and the reference timing, measure the delay distribution, and determine the amount of delay fluctuation.

  The memory 408 has a storage area for storing time information (acquired value) of the reference timing. The reception processing unit 221 acquires the time information of the reference timing output by the counter 407 based on the time output by the time generation unit 403 and stores the acquired value in the memory 408. For example, the reception processing unit 221 acquires the time of the reference timing based on the reference time output from the time generation unit 403, and takes in the time information of less than 1 second into the memory 408 as an acquired value. For example, when the time of the reference timing is 2.00002 seconds, 0.00002 seconds after the decimal point is stored in the memory 408 as time information. Alternatively, the reception processing unit 221 generates a reference time timing having a predetermined period (for example, 1PPS), and takes the time difference between the reference time timing and the reference timing into the memory 408 as an acquired value. For example, similarly to the transmission processing unit 211 of the master device 201, when the time of the reference timing is 1.00001 seconds and the time of the reference time timing is 1.0000 seconds, the time difference of 0.00001 seconds is stored in the memory 408 as time information. Here, for example, a plurality of reference timing acquisition values for a predetermined time (reference timing acquisition interval) may be stored in the memory 408. In FIG. 2, the memory 408 is a simple storage area and the time information is stored in the memory 408 by the transmission processing unit 211. However, the memory 408 is provided with a processing function and stores the memory 408. You may make it the block of a process part.

  The monitoring unit 409 monitors whether or not the device state is normal. Here, as described in the monitoring unit 309 of the master device 201, the information indicating the device status is, for example, information on whether or not the own device (Slave device 202) is out of order, and the time from a time path of another system. Including information on whether or not the time and frequency have been acquired normally, information on whether or not the frequency is normally synchronized between the Master device 201 and the Slave device 202, etc. .

  The determination unit 410 refers to the information indicating the device state notified from the monitoring unit 409 and determines whether the reference timing acquisition value is acquired under normal conditions. For example, the determination unit 410 determines that the acquired reference timing acquisition value is “invalid” when there is a failure or abnormality in the own device, an abnormality in communication with the host device, an abnormality in time or frequency, or the like. . Conversely, the determination unit 410 determines that the acquired reference timing acquisition value is “valid” when there is no communication with the own device or the host device and there is no abnormality in time or frequency. Here, when a plurality of reference timings within the reference timing acquisition interval are processed as a set, as described in the determination unit 310 of the Master device 201, the determination unit 410 determines all reference timings within the reference timing acquisition interval. Backup is performed when the acquired value is "valid". For example, in the present embodiment, the determination unit 410 backs up the oldest acquired value in time among a plurality of acquired values, for example. The reason for backing up the oldest acquired value is as described in the determination unit 310 of the Master device 201. Note that the determination unit 410 may back up acquired values obtained by performing statistical processing such as an average value or minimum value of a plurality of acquired values, weighting processing, or the like without backing up the oldest acquired values. . Here, the number of reference timings included in the reference timing acquisition interval may be one. In this case, the determination unit 410 determines validity / invalidity for each reference timing, and backs up the acquired value of the reference timing when “valid”.

  When the determination result of the determination unit 410 is valid, the read control unit 411 reads the acquired value stored in the memory 408 and stores it in the memory 412 as a backup value. Alternatively, when a plurality of acquired values corresponding to the reference timing acquisition interval are stored in the memory 408, the read control unit 411 uses, for example, the oldest acquired value within the reference timing acquisition interval of the memory 408 as the backup value. Read to.

  The memory 412 is a non-volatile storage device having a storage area for storing backup values. For example, when the determination result of validity / invalidity by the determination unit 410 is valid, the reception processing unit 221 stores the acquired value of the reference timing stored in the memory 408 in the memory 412 as a backup value. Alternatively, when processing a plurality of acquired values within the reference timing acquisition interval, the reception processing unit 221 determines, for example, the oldest acquisition when all of the acquired values of the plurality of reference timings within the reference timing acquisition interval are valid. The value is stored in the memory 412 as a backup value. In FIG. 2, the memory 412 is a simple storage area, and the time information is stored in the memory 412 by the transmission processing unit 211. However, the memory 412 itself is provided with a processing function to store the memory 412. You may make it the block of a process part.

  For example, when the package of the reception processing unit 221 is inserted / removed by a maintenance person or the like, the control unit 413 uses the Ref packet processing unit 406 or the memory 412 (or the reception processing unit 221) as a trigger for restoring the reference timing. To give. Thereby, the backup process of each unit is executed.

  As described above, the reception processing unit 221 of the Slave device 202 can back up the reference timing for receiving the Ref packet in the memory 412. As a result, even if the reference timing is lost due to a failure or a package insertion / extraction, the Ref packet processing unit 406 does not need to newly generate a reference timing for transmitting the Ref packet.

Here, the transmission processing unit 222 of the Slave device 202 performs the same configuration and the same operation as the transmission processing unit 211 described in the Master device 201, and thus a duplicate description is omitted.
[Backup method]
FIG. 3 shows an example of the backup procedure. FIG. 3A shows an example of a backup procedure of the reference timing on the transmission side such as the transmission processing unit 211 of the Master device 201 and the transmission processing unit 222 of the Slave device 202 shown in FIG. FIG. 3B shows an example of a backup procedure of the reference timing on the reception side such as the reception processing unit 221 of the slave device 202 and the reception processing unit 212 of the master device 201 shown in FIG.
(Sending side backup procedure)
3A, for example, the transmission processing unit 211 of the Master apparatus 201 illustrated in FIG. 2 executes a backup procedure as follows.

  In step S101, the transmission processing unit 211 transmits the first Ref packet from the Ref packet processing unit 306.

  In step S102, the transmission processing unit 211 uses the Ref packet processing unit 306 to generate a reference timing (transmission reference timing), and causes the counter 307 to start counting the transmission cycle of the Ref packet.

  In step S <b> 103, the transmission processing unit 211 acquires time information of the reference timing output by the counter 307.

  In step S104, the transmission processing unit 211 stores the acquired time information (acquired value) of the reference timing in the memory 308.

  In step S105, the transmission processing unit 211 determines whether the acquired value stored in the memory 308 is valid or invalid. Here, as described in the determination unit 310 in FIG. 2, the valid / invalid determination is acquired under the condition that the acquired value of the reference timing is normal based on the information indicating the device state notified from the monitoring unit 309. It is determined by whether or not it has been done.

  In step S <b> 106, the transmission processing unit 211 determines whether or not all the acquired reference timing values for a predetermined number of times (K times (K is a positive integer)) are valid. The transmission processing unit 211 proceeds to the process of step S107 when all the acquired values for K times are valid, and proceeds to the process of step S108 when the acquired values for K times include an invalid acquired value.

  In step S <b> 107, the transmission processing unit 211 stores the oldest acquired value among the acquired values for K times in the backup memory 312. For example, when the acquired values for K times acquired in chronological order are stored in the memory 308 at times t1, t2, t3,..., The oldest acquired value is the acquired value at time t1. Note that, as described above, the transmission processing unit 211 may back up the acquired values obtained by statistically processing the acquired values for K times in the memory 312. When K = 1, the transmission processing unit 211 performs valid / invalid determination every time the acquired value of the reference timing is acquired, and stores the acquired value in the backup memory 312 when the acquired value is valid.

  In step S108, the transmission processing unit 211 retains the previous backup value without updating the backup value stored in the backup memory 312.

In this way, the transmission processing unit 211 of the Master device 201 can determine whether the acquired value of the reference timing is valid / invalid and back up the acquired value of the reference timing. Note that when all the preset reference timing acquisition values are valid, the reference timing acquisition value backup method backs up the reference timing acquisition value when the reference timing acquisition value is reliable. Therefore, the reliability of the backed up acquired value can be improved.
(Receiver backup procedure)
In FIG. 3B, for example, the reception processing unit 221 of the Slave device 202 illustrated in FIG. 2 executes a backup procedure as follows.

  In step S <b> 201, the Ref packet processing unit 406 of the reception processing unit 221 receives the first Ref packet from the Master device 201.

  In step S202, the reception processing unit 221 generates the reference timing (reception reference timing) of the Ref packet received by the Ref packet processing unit 406, and causes the counter 407 to start counting the reception cycle of the Ref packet.

  In step S <b> 203, the reception processing unit 221 acquires time information of the reference timing output from the counter 407.

  In step S <b> 204, the reception processing unit 221 stores the acquired time information (acquired value) of the reference timing in the memory 408.

  In step S205, the reception processing unit 221 determines whether the acquired value stored in the memory 408 is valid or invalid. Here, the validity / invalidity of the acquired value is determined based on whether or not the reference timing is acquired under normal conditions, as in step S105 of FIG.

  In step S206, the reception processing unit 221 determines whether or not all the acquired reference timing values for a predetermined number of times (K times) are valid, as in step S106 of FIG. . The reception processing unit 221 proceeds to the process of step S207 when all the acquired values for K times are valid, and proceeds to the process of step S208 when the acquired values for K times include an invalid acquired value. Here, the predetermined number K determined in step S206 on the receiving side may not be the same as the predetermined number K described in step S106 on the transmitting side.

  In step S207, the reception processing unit 221 stores the oldest acquired value among the acquired values for K times in the backup memory 412. Note that, as described in step S107 of FIG. 3A, here, although described as the oldest acquired value, the reception processing unit 221 statistically processes the acquired value for K times and backs up to the memory 412. May be. Further, when K = 1, the reception processing unit 221 determines validity / invalidity every time the acquired value of the reference timing is acquired, and stores the acquired value in the backup memory 312 when the acquired value is valid.

  In step S208, the reception processing unit 221 retains the previous backup value without updating the backup value stored in the backup memory 412.

In this way, the reception processing unit 221 of the slave device 202 can determine whether the acquired value of the reference timing is valid / invalid and back up the acquired value of the reference timing. Note that when all the preset reference timing acquisition values are valid, the reference timing acquisition value backup method backs up the reference timing acquisition value when the reference timing acquisition value is reliable. Therefore, the reliability of the backed up acquired value can be improved.
(Specific example of backup processing)
Here, backup processing of a plurality of reference timings within the reference timing acquisition interval will be described. For example, the latest acquired values for K times are stored in the memory 308 shown in FIG. 2 every cycle Ts seconds of the reference timing. Then, when the determination result on whether the acquired value is valid / invalid is valid for all the acquired values, for example, the oldest acquired value (the acquired value before (Ts × K) seconds) is backed up. Here, when at least one of the acquired values for K times is invalid, the backup value is not updated and the previous value (previous backup value) is retained. Thereby, it is possible to prevent backup of an acquired value with low reliability acquired when the acquired value is abnormal (the device state is abnormal). In addition, (Ts x K) seconds acts as a protection time, and when all the acquired values acquired during the period of (Ts x K) seconds are valid, the acquired values are backed up so that the operation is stable. The acquired acquired value with high reliability can be backed up.

  FIG. 4 shows an example of a method for selecting a backup value from a plurality of acquired values. FIG. 4A shows an example of a backup value when all of the K acquired values are valid. FIG. 4B shows an example of a backup value when a part of the K acquired values is invalid. Here, in FIG. 4, the valid / invalid flag indicates that “0” indicates “valid” and “1” indicates “invalid”.

  4A, the first acquired value a is valid, the second acquired value b is valid,... The K-th acquired value i is valid. In this case, since all the acquired values for K times are valid, the Master device 201 and the Slave device 202 store the oldest acquired value a for the first time among the acquired values for K times as a backup value for the reference timing.

On the other hand, in the example of FIG. 4B, the first acquired value a is invalid, the second acquired value b is valid,... The K-th acquired value i is valid. In this case, the master device 201 and the Slave device 202 do not back up the acquired value and retain the previous backup value h because the first acquired value of the K acquired values is invalid.
[Valid / Invalid Judgment Processing]
FIG. 5 shows an example of the valid / invalid determination process. Note that the determination process illustrated in FIG. 5 is executed by, for example, the transmission processing unit 211 of the Master apparatus 201 illustrated in FIG. Here, in the reception processing unit 212 of the master device 201, the reception processing unit 221 and the transmission processing unit 222 of the slave device 202, the same determination processing as that of the transmission processing unit 211 is executed. Here, the process of the determination unit 310 of the Master device 201 will be described.

  In step S <b> 301, the determination unit 310 determines whether the time can be normally acquired from the time path of another system. The determination unit 310 proceeds to the process of step S302 when the time can be normally acquired, and proceeds to the process of step S305 when the time cannot be normally acquired.

  In step S <b> 302, the determination unit 310 determines whether frequency synchronization is normally performed between the master device 201 and the slave device 202. The determination unit 310 proceeds to the process of step S303 when the frequency synchronization is normally performed, and proceeds to the process of step S305 when the frequency synchronization is not normally performed.

  In step S303, the determination unit 310 determines whether a failure has occurred in the device itself. The determination unit 310 proceeds to the process of step S304 if no failure has occurred, and proceeds to the process of step S305 if a failure has occurred. Here, the determination unit 310 may determine whether or not the own device is a backup target device. The determination as to whether or not the device is a backup target device can be made as to whether or not it is a backup target device, for example, from the presence / absence of delay fluctuation correction processing in packet transmission. Note that the processing described in this embodiment is applied only when connecting to a packet network in which delay fluctuations occur, and is not applied otherwise. That is, when applying this process, the setting of the delay fluctuation correction process becomes valid when the operator sets the delay fluctuation correction process for the port connected to the packet network to be valid. It is possible to determine whether the apparatus is a backup target apparatus by referring to the setting of the delay fluctuation correction process.

  In step S304, the determination unit 310 determines that the acquired value of the reference timing is valid.

  In step S305, the determination unit 310 determines that the reference timing acquisition value is invalid.

  Here, information on whether or not the time can be normally acquired from a time path of another system, information on whether or not frequency synchronization is normally performed between the Master device 201 and the Slave device 202, and the own device Information indicating the device state, such as information indicating whether or not a failure has occurred, is notified from the monitoring unit 309 to the determination unit 310.

As described above, the determination unit 410 can determine whether the acquired value of the reference timing is acquired under normal conditions based on the information indicating the apparatus state notified from the monitoring unit 409. Here, when a plurality of acquired values within the reference timing acquisition interval are processed as a set, the validity / invalidity determination is performed for each of the plurality of acquired values of the reference timing.
[How to restore]
When the reference timing is lost, it is necessary to restore the reference timing. For example, when the reference timing is lost due to the insertion / removal of a package in the master device 201 or the slave device 202, an abnormality in the reference timing occurs when the time or frequency cannot be acquired normally due to a transmission path failure or frequency disturbance. Then, after the event in which the reference timing becomes abnormal is recovered, the Master device 201 or the Slave device 202 is able to acquire the time and frequency normally, or whether a failure or the like has occurred in the own device (that is, Check if the reference timing can be restored normally. Note that the master device 201 and the slave device 202 determine the normality of time and frequency using a message (Announce Message, SSM (Synchronization Status Message)) indicating the quality of time notified from the higher-level device. can do.

  In the restoration process, first, the Master device 201 and the Slave device 202 confirm that the reference time can be acquired, or can be acquired by a reference time timing signal such as 1PPS generated by the counter 307 or the counter 407. Here, the reference time is generated by a clock in the master device 201 or the slave device 202. The Master device 201 or the Slave device 202 estimates that the device itself is abnormal when the reference time in the device cannot be confirmed despite the fact that the time information can be normally received from the host device. It is determined that the reference timing cannot be restored. In this case, the Master device 201 or the Slave device 202 generates a new reference timing by the method described in Patent Document 1 or the like, remeasures the delay distribution of the Ref packet, and obtains the delay fluctuation amount. Further, the master device 201 or the slave device 202 confirms whether or not the backup value is stored in the backup memory (the memory 312 or the memory 412 in the example of FIG. 2). When the backup value is not stored in the backup memory, the master device 201 or the slave device 202 generates a new reference timing by the method described in Patent Document 1 and the like, and re-reads the delay distribution of the Ref packet. Measure and obtain the amount of delay fluctuation.

  FIG. 6 shows an example of the restoration process. 6 is executed by the transmission processing unit 211 of the master device 201 shown in FIG. 2, for example. Here, also in the reception processing unit 212 of the master device 201, the reception processing unit 221 and the transmission processing unit 222 of the slave device 202, the same restoration processing as the transmission processing unit 211 is executed. Here, the process of the determination unit 310 of the Master device 201 will be described.

  In step S401, the determination unit 310 determines whether the time can be normally acquired from the time path of another system, similarly to step S301. The determination unit 310 proceeds to the process of step S402 when the time can be normally acquired, and proceeds to the process of step S407 when the time cannot be normally acquired. Here, when a plurality of acquired values within the reference timing acquisition interval are processed as a set, the same determination is performed for each of the acquired values of the reference timing multiple times. For example, when all the acquired values within the reference timing acquisition interval have acquired the time normally, the determination unit 310 proceeds to the process of step S402, and at least one acquired value within the reference timing acquisition interval is normal. If the time has not been acquired, the process proceeds to step S407.

  In step S402, the determination unit 310 determines whether or not frequency synchronization is normally performed between the master device 201 and the slave device 202, as in step S302. The determination unit 310 proceeds to the process of step S403 when the frequency synchronization is normally performed, and proceeds to the process of step S407 when the frequency synchronization is not normally performed. Here, similarly to step S401, when a plurality of acquired values within the reference timing acquisition interval are processed as a set, the same determination is performed for each of the acquired values of the plurality of reference timings. For example, when all the acquired values within the reference timing acquisition interval are normally acquired, the determination unit 310 proceeds to the process of step S403, and at least one acquired value within the reference timing acquisition interval is normally acquired. If not, the process proceeds to step S407.

  In step S403, the determination unit 310 determines whether or not a failure has occurred in its own device, as in step S303. Then, the determination unit 310 proceeds to the process of step S404 if no failure has occurred, and proceeds to the process of step S407 if a failure has occurred. Here, as in step S303, the determination unit 310 may determine whether the own device is a backup target device. Here, similarly to step S401, when a plurality of acquired values within the reference timing acquisition interval are processed as a set, the same determination is performed for each of the acquired values of the plurality of reference timings. For example, when all the acquired values within the reference timing acquisition interval are normally acquired, the determination unit 310 proceeds to the process of step S404, and at least one acquired value within the reference timing acquisition interval is normally acquired. If not, the process proceeds to step S407.

  In step S404, the transmission processing unit 211 determines whether there is a reference time. If there is a reference time, the process proceeds to step S405. If there is no reference time, the process proceeds to step S407.

  In step S405, the transmission processing unit 211 determines whether there is a backup value. If there is a backup value, the process proceeds to step S406. If there is no backup value, the process proceeds to step S407.

  In step S406, the transmission processing unit 211 restores the reference timing. For example, the transmission processing unit 211 restores the reference timing based on the backup value held in the memory 312 and the reference time inside the apparatus, and sets the reference timing in the counter 307.

  In step S407, the transmission processing unit 211 determines that the reference timing cannot be restored. In this case, the transmission processing unit 211 uses the method described in Patent Document 1 and the like, the Master device 201 or the Slave device 202 generates a new reference timing, remeasures the delay distribution of the Ref packet, and delays the delay. Find the amount of fluctuation.

As described above, the transmission processing unit 211 performs the reference timing restoration process when the information indicating the apparatus state notified from the monitoring unit 409 is normal and when the reference time and the backup value exist.
(Specific example of restoration processing)
As described with reference to FIG. 3, the master device 201 or the slave device 202 backs up the acquired value of the reference timing when the device state is normal. When the apparatus status becomes abnormal, the backup value at the normal time is held without performing backup. Further, when the device state becomes normal from the abnormality, the master device 201 or the slave device 202 restores the reference timing using the acquired value backed up at the normal time.

  FIG. 7 shows a specific example of the process for restoring the reference timing. In FIG. 7, the horizontal axis indicates a time axis, and shows an example of a change in apparatus state, a reference timing, a backup value of the reference timing, and a reference time timing (1PPS).

The apparatus state shown in FIG. 7 is “normal” until time tx, but changes to “abnormal” at time tx and recovers to “normal” at time tz. Further, the reference timing is output in a cycle of Ts seconds from time g to time r. The backup value stores the time information of the reference timing as a backup value after Ta seconds depending on the processing time. For example, in FIG. 7, the backup value at time h at the reference timing is held after Ta seconds from the reference timing at time h. Here, in the example of FIG. 7, the reference timing at the time h (time ti1) immediately after the reference time timing at time tr1 is backed up. Note that the backup value can be obtained, for example, as a time difference Tb between the time tr1 of the reference time timing and the time Ti1 of the reference timing (Formula 1).
Tb = Ti1-Tr1 (Formula 1)
In the above example, the time difference between the reference time and the reference timing is used as the backup value. However, time information of one second or less of the time of the reference clock with respect to the reference timing may be held as the backup value.

  In FIG. 7, since the device state is “normal” until time tx, the master device 201 or the slave device 202 backs up the acquired value of the reference timing, but the device state becomes “abnormal” from time tx to time tz. Therefore, the backup value at time h is maintained without being updated.

Then, after the device state returns to normal at time tz, the backup value Tb is added to the reference time timing at the first time tr2, and the reference timing at time Ti2 is restored (Formula 2).
Ti2 = Tr2 + Tb (Formula 2)
In this way, the master device 201 or the slave device 202 according to the present embodiment performs backup while updating the backup value at the reference timing in the normal state, and holds the backup value without updating in the abnormal state. Then, when the device state becomes normal from the abnormality, the master device 201 or the slave device 202 can restore the reference timing based on the stored backup value. Here, in the example of FIG. 7, the case where the time difference between the reference time timing and the reference timing is backed up as a backup value has been described. In addition, the reference timing can be restored by adding the backup value to the reference time.

  After restoring the reference timing, for example, the counter 307 or the counter 407 shown in FIG. 2 counts the transmission / reception cycle of the Ref packet. For example, in the case of the transmission processing unit 211 of the Master device 201 shown in FIG. 2, the transmission processing unit 211 reads the backup value Tb from the memory 312 and adds the backup value Tb to the time Tr2 of the reference time timing to generate the reference timing Ti2. To restore. Then, the transmission processing unit 211 sets the restored reference timing Ti2 in the counter 307, and the counter 307 counts the transmission cycle of the Ref packet. Similarly, in the case of the reception processing unit 221 of the slave device 202 illustrated in FIG. 2, the reception processing unit 221 reads, for example, the backup value Tb from the memory 412 and adds the backup value Tb to the time Tr2 at the reference time timing. Restore the reference timing Ti2. Then, the reception processing unit 221 sets the restored reference timing Ti2 in the counter 407, and the counter 407 counts the reception period of the Ref packet.

In this way, the master device 201 and the slave device 202 can restore the reference timing.
[First Embodiment]
The backup of the reference timing holds both the backup value acquired at each reference timing and the accumulated value of the backup value acquired at a certain time and the value obtained by updating the clock time from that time. A method is considered. Here, the former method will be described.

  When the reference timing is backed up, a reference time timing having a cycle Tp that is an integral multiple of the reference timing generation cycle Ts is used. This is because, as described with reference to FIG. 2, if the reference timing is restored when the period Tp is not an integer multiple of the period Ts, the generation period of the original reference timing is shifted. The reference time timing is output at regular intervals from a clock inside the apparatus (in the example of the transmission processing unit 211 in FIG. 2, the time generation unit 303).

  FIG. 8 shows an example of the acquired value of the reference timing. The example of FIG. 8 shows a relationship with a reference time timing period Tp (eg, 1 PPS) that is an integral multiple of the reference timing generation period Ts. 8A and FIG. 8B show the same timing chart, but the timing chart of FIG. 8B shows the time ti10, the time ti11, and the time ti12 of the timing chart of FIG. 8A. It is the figure which expanded the part.

  In FIG. 8B, the time difference (acquired value) between the time of the reference time timing (ti10, ti11, and ti12) and the time of the reference timing immediately after the reference time timing (to10, to11, and 12) is obtained for each reference timing. get. For example, the time difference Tb1 between the time ti10 at the reference time timing and the reference timing to10 immediately after that is the acquired value at the time to10. Similarly, the time difference Tb2 between the time ti11 at the reference time timing and the reference timing to11 immediately after that is the acquired value at the time to11. Further, the time difference Tb3 between the time ti12 at the reference time timing and the reference timing to12 immediately after that becomes the acquired value at the time to12.

  In this way, the immediately subsequent reference timing acquisition value is obtained for each reference time timing. For example, the master device 201 or the slave device 202 illustrated in FIG. 2 stores the acquired value acquired at each reference timing in a backup memory (for example, the memory 312 or the memory 412).

  Here, in the present embodiment, an example is shown in which the reference timing immediately after the reference time timing is targeted, but the Master device 201 or the Slave device 202 is the nth (n is a positive integer) reference timing after the reference time timing. The time difference may be obtained for the target. The case where n = 1 corresponds to the case immediately after the reference time timing.

Further, the master device 201 or the slave device 202 determines whether the acquired value acquired at each reference time timing is valid / invalid. Note that the valid / invalid determination method is as described in the determination unit 310 illustrated in FIG. Then, the master device 201 or the slave device 202 stores the acquired value in the backup memory 312 or the memory 412 when the acquired value is valid, and does not store the acquired value when the acquired value is invalid. Keep backup value.
[Second Embodiment]
In the first embodiment, since the time difference between the reference time timing and the reference timing is acquired with respect to the reference timing immediately after the reference time timing, the reference timing other than the reference timing immediately after the reference time timing is not referred to. In contrast, in the second embodiment, a time is acquired at each reference timing based on a reference time inside the apparatus, and a numerical value of less than 1 second of the acquired time is backed up as an acquired value of the reference timing. For example, if the reference timing time is 2.00001 seconds, 0.00001 is backed up as the acquired value, and if the reference timing time is 2.00004 seconds, 0.00004 is backed up as the acquired value.

  In the second embodiment, a reference timing acquisition interval with a plurality of predetermined reference timings as a set is provided. Then, the master device 201 or the slave device 202 determines whether the time information of each reference timing within the reference timing acquisition interval is valid or invalid. The master device 201 or the slave device 202 backs up time information when the time information of all the reference timings within the reference timing acquisition interval is valid, and backs up the time information when the time information includes invalid reference timing. Process so as not to perform.

  FIG. 9 shows an example of a reference timing backup method in the second embodiment. Here, the reference timing backup method shown in FIG. 9 is executed in a time synchronization device such as the Master device 201 or the Slave device 202 shown in FIG.

  In FIG. 9, the horizontal axis indicates time, and the reference timing is output in a cycle of Ts seconds. The time of each reference timing is acquired by a clock (reference time) inside the apparatus. It is assumed that a clock inside the apparatus (for example, the time generation unit 303 shown in FIG. 2) has highly accurate time information of less than 1 second.

  In FIG. 9, the time of the reference timing h is t1, the time of the next reference timing i is t2, the time of the reference timing j is t3, the time of the reference timing k is t4, the time of the reference timing l is t5, and the time of the reference timing m The time of each reference timing is acquired as t6. Then, time information (reference timing time information) of less than 1 second (and 0 seconds or more) of the time of the acquired reference timing is extracted. For example, in FIG. 9, time information less than 1 second at time t1 is t1 ', time information less than 1 second at time t2 is t2', time information less than 1 second at time t3 is t3 ', and less than 1 second at time t4 The time information of each reference timing is obtained as an acquired value, such as t4 ′ for the time information, t5 ′ for time information of less than 1 second of time t5.

  Here, the example of FIG. 9 shows a case where the reference timing acquisition interval is Td seconds, and the reference timings in the period from the timing T1 to the timing T2 are processed as one set. Similarly, the reference timing in the period Td from the timing T2 to the timing T3 is processed as a set. Then, a set of reference timing acquisition values is stored in a memory (for example, the memory 308 or the memory 408 shown in FIG. 2). For example, in the case of FIG. 9, the reference timing acquisition values t1 ′, t2 ′,..., T5 ′ at the time t1 are the memory 308 or the memory 408 in the reference timing acquisition interval Td seconds from the timing T1 to the timing T2. Stored in Here, for example, the times t1, t2, t3, t4, and t5 increase with the passage of time, such as 1.00001 seconds, 1.00002 seconds, 1.00003 seconds, 1.00004 seconds, and 1.00005 seconds, respectively. The acquired values t1 ′, t2 ′, t3 ′, t4 ′, and t5 ′ in this case are obtained as 0.00001 seconds, 0.00002 seconds, 0.00003 seconds, 0.00004 seconds, and 0.00005 seconds, respectively.

  Then, the master device 201 or the slave device 202 determines the device state for each of a plurality of acquired values within the reference timing acquisition interval Td seconds. For example, the Master device 201 or the Slave device 202 determines that the device state is valid if the device state determination result is normal for all the acquired values within the reference timing acquisition interval Td seconds.

  Note that a method of providing a reference timing acquisition interval that includes a plurality of predetermined reference timings as a set may be applied to the first embodiment.

  FIG. 10 shows an example of the memory 308 that stores acquired values. FIG. 10 is a diagram similar to FIG. 4, and the acquired value when the number of times of the reference timing within the reference timing acquisition interval is K and a flag (valid: 0, invalid) indicating the valid / invalid determination result. : 1) and an example of the backup value. 10, the first reference timing acquisition value t1 ′ is 0.000001 seconds, the second reference timing acquisition value t2 ′ is 0.000002 seconds, the third reference timing acquisition value t3 ′ is 0.000003 seconds, and the Kth time. The reference timing acquisition value of tk 'seconds. The first reference timing valid / invalid flag is 0 (valid), the second reference timing valid / invalid flag is 0 (valid), and the third reference timing valid / invalid flag is 0 (valid). ..Kth reference timing valid / invalid flag is 0 (valid). Here, as described with reference to FIG. 4, since all the acquired values of the reference timing within the reference timing acquisition interval Td seconds are valid, the master device 201 or the slave device 202 performs a backup process. For example, the oldest acquired value t1 ′ = 0.000001 seconds in the time series in the reference timing within the reference timing acquisition interval Td seconds is backed up in the memory 312. As described with reference to FIG. 4, when there is an invalid reference timing within the reference timing acquisition interval Td seconds, the Master device 201 or the Slave device 202 does not perform backup processing, and the memory 312 stores the previous backup value. Retained.

  Here, the master device 201 and the slave device 202 do not back up the oldest acquired values, but obtain the acquired values obtained by performing statistical processing such as an average value or minimum value of a plurality of acquired values, weighting processing, or the like. You may back up. For example, if the acquired values t1 ', t2', t3 ', t4', t5 'vary such as 0.000010 seconds, 0.000021 seconds, 0.000029 seconds, 0.000039 seconds, 0.000050 seconds, find the average value of the difference between the front and back You may back up. In this case, t2'-t1 '= 0.000011, t3'-t2' = 0.000008, t4'-t3 '= 0.000010, t5'-t64' = 0.000011, and the average value is 0.00001.

  FIG. 11 shows an example of restoring the reference timing. In FIG. 11, the reference timing with respect to the reference time 10:10:01 is +0.000001 seconds, and +0.000001 seconds are backed up. In FIG. 11, although the master device 201 or the slave device 202 fails, it recovers from the failure after a while. Then, after recovering from the failure, the backup value +0.000001 seconds is added to the time 10:30:30 to restore the reference timing.

  In this way, the master device 201 or the slave device 202 according to the present embodiment backs up the reference timing when it is normal, and holds the backup value without updating it when it is abnormal. Then, when the device state becomes normal from the abnormality, the master device 201 or the slave device 202 restores the reference timing based on the stored backup value. Further, in the present embodiment, when processing a plurality of reference timings within the reference timing acquisition interval as a set, for example, by performing backup processing when acquisition values of all reference timings are valid, the backup acquisition is performed. The reliability of the value can be improved.

  As described above, the time synchronization method and the time synchronization apparatus according to the present embodiment backs up the reference timing, so that even if the reference timing is lost due to a failure or the like, the reference timing is restored from the backup after recovery. Can be restored. In particular, the time synchronization apparatus according to the present embodiment acquires a backup value when the apparatus state is normal, and does not update the backup value when the apparatus state is abnormal, so that a backup value with high reliability can be acquired. In addition, the time synchronization apparatus according to the present embodiment acquires an abnormal backup value by managing a history of acquired values of reference timing (apparatus state at the time of acquisition) and determining whether each acquired value is valid / invalid Can be avoided. Furthermore, the time synchronization apparatus according to the present embodiment restores the reference timing from the backup value as long as the time can be normally acquired even when the reference timing is lost or the reference timing becomes an abnormal value. Can do. As a result, the time synchronization apparatus according to the present embodiment can immediately restore the reference timing, so that it is not necessary to remeasure the delay distribution, and the lead time until the operation is resumed can be shortened.

101, 101a, 101b (0), 101b (1) ... Master device; 102, 102a, 102b ... Slave device; 103a, 103b ... packet network; 104, 104a, 104b, 104c, 104d. 105, 105a, 105b ... GrandMaster device; 106, 106a, 106b ... reference clock; 107, 107a, 107b ... GNSS; 201 ... Master device; 202 ... Slave device; 211 ... transmission processing unit; 212 ... reception processing unit; 221 ... reception processing unit; 222 ... transmission processing unit; 301 ... frequency extraction unit; 302 ... frequency generation unit; ..Time generation unit; 304 ... transmission unit; 305 ... PTP packet processing unit; 306 ... Ref packet processing unit; 307 ... counter; 309 ... monitoring unit; 310 ... determining unit; 311 ... reading control unit; 312 ... memory; 313 ... control unit; 320 ... receiving unit; 401 ... frequency extracting unit; 402: frequency generation unit; 403 ... time generation unit; 404 ... reception unit; 405 ... PTP packet processing unit; 406 ... Ref packet processing unit; 407 ... counter; Memory: 409: Monitoring unit; 410: Determination unit; 411: Read control unit: 412 ... Memory: 413 ... Control unit: 420 ... Transmission unit

Claims (8)

A time synchronization method for performing time synchronization by transmitting and receiving time synchronization packets between time synchronization devices connected by a packet network,
The time synchronization device on the transmission side transmits a test packet for measuring delay fluctuations in a preset transmission cycle to the time synchronization device on the reception side,
The time synchronizer on the receiving side generates a first reference timing indicating a reception period of the test packet, obtains a delay fluctuation amount based on a time difference between the reception timing of the test packet and the first reference timing, While correcting the time lag with respect to the time synchronizer on the transmitting side, the validity / invalidity of the time information of the first reference timing is determined based on the device state, and the time information of the first reference timing is valid. Storing the time information of the first reference timing in some cases, and restoring the first reference timing based on the stored time information of the first reference timing when the first reference timing is lost. A time synchronization method characterized by the above. The time synchronization method according to claim 1,
The time synchronizer on the transmitting side transmits the test packet to the time synchronizer on the receiving side based on a second reference timing generated at a preset transmission cycle, and When the validity / invalidity of the time information is determined based on the apparatus state, the time information of the second reference timing is stored when the time information of the second reference timing is valid, and the second reference timing is lost And restoring the second reference timing based on the stored time information of the second reference timing. The time synchronization method according to claim 2,
A reference time timing is generated with a preset period, and at least one of a time difference between the reference time timing and the first reference timing and a time difference between the reference time timing and the second reference timing is acquired. The time synchronization method is characterized in that it is stored as The time synchronization method according to claim 2,
A value of less than 1 second of the time of the first reference timing and the second reference timing is extracted and stored as time information of the first reference timing or the second reference timing, respectively. Method. In a time synchronization device that performs time synchronization by transmitting and receiving a time synchronization packet to and from an opposite device connected by a packet network,
A receiving unit that receives a test packet for measuring delay fluctuation at a preset transmission period from the opposite device;
A first reference timing indicating a reception period of the test packet is generated, a delay fluctuation amount is obtained based on a time difference between the reception timing of the test packet and the first reference timing, and a time shift between the opposite device A correction unit for correcting
A storage unit that determines validity / invalidity of the time information of the first reference timing based on a device state, and stores the time information of the first reference timing when the time information of the first reference timing is valid;
A time synchronization apparatus comprising: a restoration unit that restores the first reference timing based on time information of the first reference timing stored by the storage unit when the first reference timing is lost . In the time synchronizer of Claim 5,
A transmission unit for transmitting a test packet for measuring delay fluctuation at a preset period to the opposite device based on a second reference timing;
The storage unit determines validity / invalidity of the time information of the second reference timing based on a device state, and stores the time information of the second reference timing when the time information of the second reference timing is valid And
The restoration unit restores the second reference timing based on the time information of the second reference timing saved by the saving unit when the second reference timing is lost. . In the time synchronizer of Claim 6,
A generator that generates a reference time in a preset cycle;
The storage unit acquires and stores at least one of a time difference between the reference time timing and the first reference timing and a time difference between the reference time timing and the second reference timing. Time synchronizer. In the time synchronizer of Claim 6,
The storage unit extracts a value of less than 1 second of the time of the first reference timing and the second reference timing, and stores each value as time information of the first reference timing or the second reference timing. A time synchronizer characterized by the above.

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