JP2016201641A - Communication device and buffer control method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a communication device which can prevent a buffer overflow in the event of a delay caused by an external factor.SOLUTION: A communication device 1 includes: buffer units 16-16which store each frame in which a tolerable delay time which is a time capable of being resident in a device is specified; an external delay detection unit 12 which detects a delay which is generated outside the self-device and influences a frame residence time; a delay management unit 13 which determines a period in which frame storage into the buffer units 16-16is halted, on the basis of the delay time detected by the external delay detection unit 12 and the tolerable delay time; a buffer blocking control unit 14 which controls the buffer units 16-16to discard each frame received in the period determined by the delay management unit 13; and a buffer clearance control unit 15 which, when the external delay detection unit 12 detects a delay, discards the frame stored in the buffer units 16-16.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a communication device for transferring a frame and a buffer control method.

  For services with high real-time characteristics that transmit audio, video, etc., there is a strong demand for shortening the delay time that occurs when the transmission device transfers frames, and the delay time (hereinafter referred to as the frame retention time allowed in the transmission device). , Referred to as allowable delay time). For this reason, the transmission device discards a frame that exceeds the allowable delay time because the validity of the frame is lost if the delay time of processing from reception of the frame to transmission exceeds the allowable delay time. Yes. In the conventional method, (1) a frame transmission time is calculated from a frame reception time or transmission time and a frame transmission interval for a frame for which an allowable delay time is set, and (2) each frame stored in the buffer. (3) Calculate the estimated discard time by adding the allowable delay time and the frame reception time, and (4) discard the frame when the scheduled transmission time exceeds the estimated discard time. By performing the processing, a frame to be transmitted exceeding the allowable delay time is discarded (see Patent Document 1).

Japanese Patent No. 5347811

  In frame transfer for a frame for which the allowable delay time is set, a frame that does not satisfy the set allowable delay time is discarded. The conventional method calculates and manages the scheduled transmission time and the scheduled disposal time, and further performs complicated buffer control for each frame, so that there is a problem that the circuit scale and power consumption increase. In addition, if there is a delay due to external factors such as switching to a redundant path when a failure occurs during frame accumulation, or receiving a Pause frame that instructs a temporary suspension of transmission, a delay occurs in the scheduled transmission time, and the frame can be output. In some cases, the buffer overflows without being accumulated. In this case, there is a problem in that a subsequent frame that can be output is discarded due to overflow and cannot be output.

  The present invention has been made in view of the above, and an object of the present invention is to obtain a communication device capable of preventing a buffer from overflowing when a delay due to an external factor occurs.

  In order to solve the above-described problems and achieve the object, a communication device according to the present invention includes a buffer unit for storing a frame in which an allowable delay time, which is a stagnation time in the device, is defined, and a buffer unit And an external delay detection unit that detects a delay generated outside the apparatus that affects a frame residence time, which is a time from when a frame is written to when the frame is read. In addition, a delay management unit that determines a period for stopping writing of a frame to the buffer unit based on the delay time of the delay detected by the external delay detection unit and the allowable delay time, and a period determined by the delay management unit A buffer blockage control unit that controls the buffer unit to discard the received frame. In addition, a buffer clear control unit is provided that discards a frame stored in the buffer unit when the external delay detection unit detects a delay.

  According to the present invention, it is possible to prevent the buffer from overflowing when a delay due to an external factor occurs.

1 is a diagram illustrating a configuration example of a communication device according to a first embodiment. The figure which shows the structure of a Pause frame A flowchart showing an operation example of the allowable delay identification unit according to the first embodiment. A flowchart showing an operation example of the buffer allocating unit according to the first embodiment. A flowchart showing an operation example of the external delay detection unit of the first embodiment. A flowchart showing an operation example of the delay management unit according to the first embodiment. The flowchart which shows the operation example of the buffer block | close control part of Embodiment 1. A flowchart showing an operation example of the buffer clear control unit according to the first embodiment. Flowchart showing an operation example of the buffer write control unit according to the first embodiment. A flowchart showing an operation example of the buffer read control unit of the first embodiment. The flowchart which shows the operation example of the output control part of Embodiment 1. The figure which shows the structural example of the communication apparatus concerning Embodiment 2. FIG. The flowchart which shows the operation example of the delay management part of Embodiment 2. The flowchart which shows the operation example of the output discard control part of Embodiment 2. A flowchart showing an operation example of the buffer read control unit of the second embodiment. The flowchart which shows the operation example of the output control part of Embodiment 2. The figure which shows an example of the hardware constitutions which implement | achieve each part of a communication apparatus

  Hereinafter, a communication device and a buffer control method according to an embodiment of the present invention will be described in detail with reference to the drawings. Note that the present invention is not limited to the embodiments.

Embodiment 1 FIG.
FIG. 1 is a diagram illustrating a configuration example of a communication apparatus according to the first embodiment of the present invention. In the communication device 1 shown in FIG. 1, the allowable delay identifying unit 10 identifies an allowable delay time that is a delay time in which an input frame, that is, a frame received from another communication device is allowed to stay. The buffer distribution unit 11 receives the frame and the information on the allowable delay time of the frame from the allowable delay identification unit 10, and distributes the received frame to the buffer based on the allowable delay time. The external delay detector 12 detects an external delay time that is a delay time of an external factor. The delay manager 13 generates a control signal to be output to the buffer block controller 14 and the buffer clear controller 15 based on the external delay time detected by the external delay detector 12. The buffer block control unit 14 uses the control signal from the delay management unit 13 to perform block control of a plurality of buffers to which frames are allocated for each allowable delay time. The buffer clear control unit 15 uses the control signal from the delay management unit 13 to perform clear control of each buffer that stores frames. The plurality of buffer units 16 _{1 to} 16 ₃ store frames of allowable delay times associated with the own buffers. The output control unit 17 performs output control of the frames stored in the buffer units 16 _{1 to} 16 ₃ .

Although FIG. 1 shows an example in which there are three buffer units, the number of buffer units may be two or less or four or more. There may not be a plurality of buffer units. Each of the buffer units 16 _{1 to} 16 ₃ stores a frame having the same allowable delay time. In the present embodiment, since there are three buffer units, there are three types of allowable delay times. In the present embodiment, the allowable delay times of the buffer units 16 _{1 to} 16 ₃ are set as delays # 1 to # 3, and delay # 1 <delay # 2 <delay # 3. In the following description, the buffer units 16 _{1 to} 16 ₃ may be expressed as buffers # 1 to # 3.

The buffer units 16 _{1 to} 16 ₃ have the same configuration. In FIG. 1, describes only the configuration of the buffer section 16 _1, thus omitting some configuration of the buffer section 16 ₂ and 16 _3. Each of the buffer units 16 _{1 to} 16 ₃ is stored in a buffer write control unit 161 that performs frame writing and frame discard control to a frame buffer 162 described later, a frame buffer 162 that stores frames, and a frame buffer 162. A buffer read control unit 163 that performs read control of the frame being read.

  Hereinafter, the operation of the communication apparatus 1 will be described. Here, in communication apparatus 1 of the present embodiment, it is assumed that a Pause frame is expected to be generated in advance and a path switching occurs due to the occurrence of a failure, in which a delay of a predetermined time is expected. In other words, when a delay due to an external factor occurs due to the reception of a Pause frame or the occurrence of path switching accompanying the occurrence of a failure, the frame exceeding the allowable delay time is discarded from the frame buffer. An example of a delay time generated by receiving a Pause frame will be described with reference to FIG. FIG. 2 is a diagram illustrating a configuration of a Pause frame. The Pause frame is defined in IEEE 802.3x, and includes Preamble, SFD (Start Frame Delimiter), MAC-DA (Media Access Control-Destination Address), MAC-SA (Media Access Control-Source Address), Length / Type, and operation. Each field includes a code field, an interruption time field, a PAD (Padding) field, and an FCS (Frame Check Sequence) field. Details of each field are omitted. The communication device that transmits and receives frames receives “01: 80: C2: 00: 00: 01” in the “MAC-DA” field of the Pause frame, “0x8808” in the “Length / Type” field, and “0x8808” in the “operation code” field. By specifying “transmission interruption time” in the “0x0001” and “interruption time” fields and transmitting to another communication device, it is possible to wait for transmission of the frame by the other communication device. “Interruption time × 512 bit time” is an actual transmission interruption time, and when the communication apparatus receives a Pause frame, the communication apparatus stops frame transmission for “interruption time × 512 bit time”. In addition, when a failure occurs on the transmission path of a frame, the communication device 1 according to the present embodiment is assumed to receive a notification of a delay time associated with the occurrence of the failure from another communication device that has detected the failure. The delay time associated with the occurrence of a failure is, for example, the time required for switching the transmission path. While the transmission path is being switched, the frame continues to stay in the apparatus without being transferred, and the frame residence time, that is, the delay time becomes longer, which may exceed the allowable delay time. As a method of notifying the delay time associated with the occurrence of the failure by another communication apparatus that has detected the failure, it is conceivable to transmit a frame storing delay time information, but the notification method is not limited to this. When another communication apparatus that detects a failure notifies a delay time associated with the occurrence of the failure, a Pause frame or a frame corresponding thereto may be used.

<Normal operation>
First, a normal operation, that is, an operation in a state where the external delay detector 12 has not detected the external delay time will be described. In the present embodiment, the overall operation of the communication device 1 will be described, and then the operation of each component will be described again.

In the communication device 1 in normal operation, a frame transmitted from another communication device is input to the allowable delay identification unit 10, and the allowable delay identification unit 10 analyzes the frame and converts it into information stored in the frame. Based on this, an allowable delay time is identified, and information indicating the frame and the allowable delay time of the frame is output to the buffer distribution unit 11. The buffer allocating unit 11 outputs the frame received from the allowable delay identifying unit 10 to the buffer unit 16 ₁ , 16 ₂ or 16 ₃ corresponding to the allowable delay time. The operation up to this point is the same as the “operation when a delay occurs due to an external factor” described later. That is, regardless of whether or not the external delay detection unit 12 detects the external delay time, the allowable delay identification unit 10 and the buffer distribution unit 11 perform the same operation. In the present embodiment, the allowable delay identifying unit 10 and the buffer allocating unit 11 are configured separately, but may be configured as a single unit.

In the buffer units 16 _{1 to} 16 ₃ , the buffer write control unit 161 writes the frame input from the buffer distribution unit 11 to the frame buffer 162. During normal operation, all input frames are written to the frame buffer 162. When receiving a read instruction from the output control unit 17, the buffer read control unit 163 reads a frame from the frame buffer 162 and outputs the frame to the output control unit 17. In the read control by the output control unit 17, weighting according to the allowable delay time is performed using general WFQ (Weighted Fair Queuing) or the like, and the read from the buffer having a short allowable delay time is preferentially performed. The above is the operation during normal operation.

<Operation when delay occurs due to external factors>
Next, an operation when a delay occurs due to an external factor, that is, an operation when the external delay detection unit 12 detects an external delay time will be described. The operations of the permissible delay identifying unit 10 and the buffer allocating unit 11 are the same as in normal times, and thus the description thereof is omitted.

The external delay detection unit 12 notifies the delay management unit 13 of the external delay time, that is, the delay time generated by an external factor, when detecting an external delay by receiving a Pause frame from the communication apparatus to which the frame is transferred. To do. Delay management section 13, and an external delay time notified from the external delay detection unit 12, the allowable delay time of the buffer unit 16 ₁ to 16 _3, i.e., tolerance of each frame stored in the buffer unit 16 ₁ to 16 ₃ The buffer blocking time corresponding to the delay time is calculated. The buffer closing time is a time period during which frame writing to the buffer units 16 _{1 to} 16 ₃ is temporarily stopped, and the buffer closing time has a different value for each of the buffer units 16 _{1 to} 16 ₃ . The buffer closing time becomes longer as the buffer stores a frame having a shorter allowable delay time. The buffer closing time can be, for example, “(buffer closing time) = (external delay time) − (allowable delay time)”, but the buffer closing time calculation method is not limited to this. After calculating the buffer closing time, the delay management unit 13 notifies the buffer closing control unit 14 of the calculated buffer closing time of each buffer, and instructs the buffer clear control unit 15 to clear the buffer. When the buffer closing time is negative, the delay managing unit 13 does not need to notify the buffer closing control unit 14 of the buffer closing time and give the buffer clear control unit 15 a buffer clear instruction. When a part of the buffer closing time is negative among the buffer closing times of each buffer, the delay managing unit 13 notifies the buffer closing control unit 14 of the buffer closing time and clears the buffer closing time with a negative value. It is not necessary to give a buffer clear instruction to the control unit 15.

  When the buffer closing time of each buffer unit is notified from the delay managing unit 13, the buffer closing control unit 14 holds this and instructs the buffer writing control unit 161 of each buffer unit to stop writing the frame. . When the notified buffer closing time is negative, the buffer closing control unit 14 does not instruct the buffer writing control unit 161 of the buffer unit corresponding to the negative buffer closing time to stop frame writing. After instructing the buffer write control unit 161 of each buffer unit to stop frame writing, the buffer blockage control unit 14 monitors whether or not the held buffer blockage time has elapsed. When detecting the elapse of the buffer blockage time, the buffer blockage control unit 14 instructs the buffer write control unit 161 of the buffer unit for which the buffer blockage time has elapsed to restart frame writing to the frame buffer 162 (write stop). Cancel).

  The buffer write control unit 161 of each buffer unit, when instructed to stop writing the frame from the buffer closing control unit 14, frames the frames input from the buffer allocating unit 11 until the write stop is released. Discard without writing to the buffer 162.

When receiving a buffer clear instruction from the delay management unit 13, the buffer clear control unit 15 discards the frames in the frame buffer 162 of the buffer units 16 _{1 to} 16 ₃ . When the notified buffer closing time is negative, the buffer clear control unit 15 does not discard the frame in the frame buffer 162 of the buffer unit corresponding to the negative buffer closing time.

  In this embodiment, the delay management unit 13 instructs the buffer clear control unit 15 to clear the buffer. However, the external delay detection unit 12 may instruct the buffer clear control unit 15 to clear the buffer.

  In this embodiment, the external delay detection unit 12, the delay management unit 13, the buffer blockage control unit 14, and the buffer clear control unit 15 are configured separately, but these two or more are combined into one. Also good. For example, the external delay detection unit 12 and the delay management unit 13 may be combined into one, or the buffer blockage control unit 14 and the buffer clear control unit 15 may be combined into one. A configuration in which part or all of them are combined into one may be adopted. Further, the external delay detection unit 12, the delay management unit 13, the buffer blockage control unit 14, and the buffer clear control unit 15 may be combined into one.

  Next, the operation of each unit of the communication device 1 will be described using a flowchart.

  FIG. 3 is a flowchart illustrating an operation example of the allowable delay identifying unit 10. The allowable delay identifying unit 10 monitors the presence / absence of external frame input (step S11, step S11: No), and when a frame is input (step S11: Yes), the allowable delay time of the input frame. And the input frame is output to the buffer distribution unit 11 together with the allowable delay time (step S12). In step S12, the allowable delay identifying unit 10 identifies the allowable delay time based on, for example, a ToS (Type of Service) value and a CoS (Class of Service) value of the input frame. The ToS value and the CoS value are information indicating the priority of a frame, and the allowable delay time of frames having the same priority is the same. In addition, the allowable delay time of a frame with a high priority is shorter than the allowable delay time of a frame with a low priority. Alternatively, the permissible delay identifying unit 10 may identify the permissible delay time by writing permissible delay time information in the frame and confirming the permissible delay time information. Note that the method of identifying the allowable delay time is not limited to these. The allowable delay time may be identified by any method.

FIG. 4 is a flowchart illustrating an operation example of the buffer allocating unit 11. The buffer allocating unit 11 continuously monitors the presence / absence of a frame input from the allowable delay identifying unit 10 (step S21, step S21: No), and if a frame is input (step S21: Yes), the frame The information indicating the allowable delay time of the input frame that is input together is confirmed, and the frame is distributed to _one of the buffer units 16 _{1 to} 16 ₃ (step S22). The buffer allocating unit 11 knows the correspondence between the allowable delay time of the frame and the buffer units 16 _{1 to} 16 ₃ , and when a frame is input, the buffer unit 16 ₁ associated with the allowable delay time. and it outputs the frame to to 16 _3.

  FIG. 5 is a flowchart showing an operation example of the external delay detection unit 12. The external delay detector 12 continuously monitors whether or not an external delay has occurred (step S31, step S31: No), and when an external delay is detected (step S31: Yes), the external delay time is determined as a delay manager. 13 is notified (step S32). When the external delay detection unit 12 receives a Pause frame from a frame transfer destination communication device, or receives a frame storing information indicating the occurrence of a failure from the frame transfer destination communication device, an external delay occurs. Judge. When the Pause frame is received, the external delay detector 12 calculates the external delay time from the value stored in the “interruption time” field. Specifically, the external delay detection unit 12 calculates “interruption time × 512 bit time” and sets the calculated time as the external delay time. When a frame storing information indicating the occurrence of a failure is received from a communication apparatus that is a transfer destination of the frame, and information on the interruption time of the transfer process is written in this received frame, the external delay detection unit 12 The time indicated by the interruption time information is set as the external delay time.

FIG. 6 is a flowchart illustrating an operation example of the delay management unit 13. The delay management unit 13 continuously monitors the presence or absence of notification of the external delay time (step S41, step S41: No), and when the external delay time is notified from the external delay detection unit 12 (step S41: Yes), based on the notified external delay time, the buffer blocking times of the buffer units 16 _{1 to} 16 ₃ are individually calculated, and the calculated buffer blocking time is notified to the buffer blocking control unit 14 (step S42). Further, the delay management unit 13 instructs the buffer clear control unit 15 to clear the buffer (step S43).

FIG. 7 is a flowchart showing an operation example of the buffer blockage control unit 14. The buffer closing control unit 14 continuously monitors the presence or absence of notification of the buffer closing time (step S51, step S51: No), and when the buffer closing time is notified from the delay management unit 13 (step S51: Yes), the buffer write control units 161 of the buffer units 16 _{1 to} 16 ₃ are instructed to stop writing frames to the frame buffer 162 (step S52).

Next, the buffer closing control unit 14 continuously checks whether or not the buffer closing time of the buffer # ₃ which is the buffer unit 163 has passed (Step S53, Step S53: No), and the buffer closing time has passed. If it has been done (step S53: Yes), the buffer write control unit 161 of the buffer # 3 is instructed to resume writing (step S54). In the present embodiment, it is assumed that the allowable delay time of frames stored in buffer # 3 is longer than the allowable delay time of frames stored in buffers # 2 and # 1. Therefore, the buffer closing time of buffer # 3 is shorter than the buffer closing times of buffers # 1 and # 2. That is, the relationship between the buffer closing times of the buffers # 1 to # 3 is such that the buffer closing time of the buffer # 1> the buffer closing time of the buffer # 2> the buffer closing time of the buffer # 3, and FIG. Combined flow.

Next, the buffer closed control unit 14 continues to whether the buffer occlusion time of buffer # 2 has passed a buffer unit 16 ₂ confirmed (step S55, step S55: No), the buffer occlusion time has passed If it has been performed (step S55: Yes), the buffer write control unit 161 of the buffer # 2 is instructed to resume writing (step S56).

Next, the buffer closing control unit 14 continuously checks whether or not the buffer closing time of the buffer # ₁ that is the buffer unit 161 has elapsed (step S57, step S57: No), and the buffer closing time has elapsed. If it has been done (step S57: Yes), the buffer write control unit 161 of the buffer # 1 is instructed to resume writing (step S58).

  FIG. 8 is a flowchart illustrating an operation example of the buffer clear control unit 15. The buffer clear control unit 15 continuously monitors the presence or absence of a buffer clear instruction (step S61, step S61: No), and when the buffer clear is instructed from the delay management unit 13 (step S61: Yes), All frames stored in the frame buffers 162 of # 1 to # 3 are discarded (step S62).

  FIG. 9 is a flowchart illustrating an operation example of the buffer write control unit 161. The buffer write control unit 161 continuously monitors the presence / absence of a frame input from the buffer distribution unit 11 (step S71, step S71: No), and when a frame is input (step S71: Yes), It is confirmed whether or not writing is being stopped, that is, whether or not an instruction to stop writing to the frame buffer 162 has been received from the buffer closing control unit 14 (step S72). When the writing is not stopped (step S72: No), the buffer writing control unit 161 writes the frame input from the buffer allocating unit 11 to the frame buffer 162 (step S73). On the other hand, when the writing is stopped (step S72: Yes), the buffer writing control unit 161 discards the frame input from the buffer allocating unit 11 (step S74).

  FIG. 10 is a flowchart illustrating an operation example of the buffer read control unit 163. The buffer read control unit 163 continuously monitors the presence / absence of a frame read instruction (step S81, step S81: No), and receives a read instruction from the output control unit 17 (step S81: Yes), the frame The frame stored in the buffer 162 is read and output to the output control unit 17 (step S82).

FIG. 11 is a flowchart illustrating an operation example of the output control unit 17. The output control unit 17 continuously monitors whether or not it is the frame transmission timing (step S91, step S91: No). The output control unit 17 is configured to repeat the operation of reading and outputting a frame from any of the buffer units 16 _{1 to} 16 ₃ , and when the output (transfer) of the previously read frame to another communication device is completed. It is determined that the output timing of the frame has come. When it is the frame transmission timing (step S91: Yes), the output control unit 17 checks whether or not the frame can be output (step S92). For example, the output control unit 17 determines that the transmission of the frame is impossible in the period instructed not to transmit the frame by the Pause frame from the other communication device of the frame transmission destination, and otherwise the transmission is possible. to decide. When frame transmission is not possible (step S92: No), the output control unit 17 returns to step S91. If the frame can be transmitted (step S92: Yes), the output control unit 17 instructs the buffer read control unit 163 of any of the buffer units 16 _{1 to} 16 ₃ to read the frame (step S93). As described above, the output control unit 17 performs weighting according to the allowable delay time using, for example, WFQ, etc., and gives priority to the buffer units 16 _{1 to} 16 ₃ in which frames with a short allowable delay time are stored. Instruct to read. Note that the method of determining the buffer unit that instructs reading is not limited to this. The output control unit 17 instructs the buffer read control unit 163 to read a frame, and then monitors the presence / absence of a frame input from the buffer read control unit 163 for a specified time (step S94). The output control unit 17 directs the frame received from the buffer read control unit 163 to another communication device when the frame is input before the specified time elapses after the frame read is instructed (step S94: Yes). (Step S95). The output control unit 17 returns to step S91 when the frame is not input before the specified time elapses after instructing the reading of the frame (step S94: No).

  In this embodiment, the buffer write control unit 161 of each buffer unit stops writing to the frame buffer 162 and discards the frame during the buffer closing time, but the buffer clear control unit 15 The frame buffer 162 may be continuously cleared during the buffer closing time. That is, during the buffer closing time, the buffer write control unit 161 writes the frame received from the buffer distribution unit 11 to the frame buffer 162 as in the conventional case, and the buffer clear control unit 15 performs the frame buffer 162 of each buffer unit. Whether or not a frame is written is monitored, and if a frame is written, it may be discarded.

As described above, in the communication device 1 according to the present embodiment, when a delay due to an external factor occurs, the delay management unit 13 determines the allowable delay time based on the delay time due to the external factor and the allowable delay time of the frame to be transferred. Calculates a buffer closing time for stopping frame writing to the plurality of buffer units 16 _{1 to} 16 ₃ in which different frames are stored, and the buffer closing control unit 14 waits until the buffer closing time elapses. The buffer write control unit 161 is controlled so as to discard the frames without writing them in the frame buffers 162 _{1 to} 16 ₃ . As a result, when a delay due to an external factor occurs, a frame that does not satisfy the allowable delay time is discarded without being input to the frame buffer 162. Therefore, the frame buffer 162 is prevented from overflowing, and a subsequent frame that can be output originally Can be prevented from being discarded.

Embodiment 2. FIG.
In the first embodiment, the method of discarding an externally input frame without writing it to the frame buffer has been described. On the other hand, in the present embodiment, an embodiment will be described in which data is written to the frame buffer and discarded at the time of reading.

FIG. 12 is a diagram illustrating a configuration example of the communication apparatus according to the second embodiment. The communication device 1a according to the second embodiment includes the delay management unit 13, the buffer units 16 _{1 to} 16 ₃ and the output control unit 17 included in the communication device 1 according to the first embodiment, the delay management unit 13a, and the buffer units 16a ₁ to 16a. 16a ₃ and the output control unit 17a, the buffer block control unit 14 and the buffer clear control unit 15 are deleted, and an output discard control unit 20 is added.

Buffer units 16a _{1 to} 16a ₃ are buffer write control unit 161 and buffer read control unit 163 provided in buffer units 16 _{1 to} 16 _{3 of the} first embodiment, and buffer write control unit 161a and buffer read control unit 163a. It has been replaced with.

  In this embodiment, parts different from those in Embodiment 1 will be described.

The delay management unit 13a calculates a read discard time, which will be described later, based on the external delay time notified from the external delay detection unit 12. The output discard control unit 20 instructs the buffer units 16a _{1 to} 16a ₃ to discard the frame. The buffer write control unit 161 a writes the frame input from the buffer distribution unit 11 to the frame buffer 162. The buffer read control unit 163a reads a frame from the frame buffer 162 and outputs it to the discard or output control unit 17a. Similarly to the output control unit 17 of the first embodiment, the output control unit 17a performs weighting according to the allowable delay time, and preferentially performs reading from the buffer with the short allowable delay time.

  Hereinafter, the operation of the communication device 1a will be described. The normal operation, that is, the operation in a state where the external delay detection unit 12 does not detect the external delay is the same as that in the first embodiment. Therefore, an operation when the external delay detection unit 12 detects an external delay will be described.

<Operation when delay occurs due to external factors>
When the external delay detection unit 12 detects an external delay, the external delay detection unit 12 notifies the delay management unit 13a of the external delay time. The delay management unit 13a calculates a read discard time according to the external delay time notified from the external delay detection unit 12 and the allowable delay time of the buffer units 16a _{1 to} 16a ₃ . The read discard time is a time period during which the buffer read control unit 163a reads a frame from the frame buffer 162 and discards the frame without outputting it to the output control unit 17a in the frames 16a _{1 to} 16a ₃ . The read discard time has a different value for each of the buffer units 16a _{1 to} 16a ₃ . The read discard time becomes longer for a buffer storing a frame having a shorter allowable delay time. For example, “(read discard time) = (external delay time) − (allowable delay time)” can be set. The calculation method is not limited to this. After calculating the read discard time, the delay management unit 13a notifies the output discard control unit 20 of the calculated read discard time of each buffer, and outputs the longest read discard time among the calculated read discard times. Notify

  When the read discard time is notified from the delay management unit 13a, the output discard control unit 20 manages this and requests the buffer read control unit 163a of each buffer unit to discard the frame. When the buffer read control unit 163a of each buffer unit receives a frame discard request from the output discard control unit 20, the buffer read control unit 163a receives a frame read instruction from the output control unit 17a until the frame discard request is canceled. The frame stored in the frame buffer 162 is read out and discarded without being output to the output control unit 17a. The output discard control unit 20 monitors whether or not the managed read discard time has elapsed, and when detecting the elapse of the read discard time, the output discard control unit 20 determines the buffer read control unit 163a of the buffer unit for which the read discard time has elapsed. Instructs the output of the frame stored in the frame buffer 162 to the output control unit 17a to be resumed (cancel the frame discard request).

When receiving the notification of the read discard time from the delay management unit 13a, the output control unit 17a determines whether or not the frame can be output at the frame transmission timing until the notified read discard time elapses. Without confirmation, the buffer read control unit 163a of any of the buffer units 16a _{1 to} 16a ₃ is instructed to read a frame.

  Next, operations of the delay management unit 13a, the output discard control unit 20, and the buffer read control unit 163a will be described using a follow chart.

FIG. 13 is a flowchart illustrating an operation example of the delay management unit 13a. The flowchart in FIG. 13 corresponds to the operation in which steps S42 and S43 in the flowchart in FIG. 6 showing the operation example of the delay management unit 13 in the first embodiment are replaced with steps S44 and S45. In step S44, the delay management unit 13a individually calculates the read discard time of the buffer units 16a _{1 to} 16a ₃ based on the external delay time notified from the external delay detection unit 12, and uses the calculated read discard time. The output discard control unit 20 is notified. In step S45, the delay management unit 13a notifies the output control unit 17a of the longest read discard time among the calculated read discard times.

FIG. 14 is a flowchart illustrating an operation example of the output discard control unit 20. The output discard control unit 20 continuously monitors whether or not the read discard time is notified (step S101, step S101: No), and when the read discard time is notified from the delay management unit 13a (step S101: Yes), the buffer read control unit 163a of the buffer units 16a _{1 to} 16a ₃ is requested to discard the frame stored in the frame buffer 162 (step S102).

Next, the output discard control unit 20 continuously checks whether or not the read discard time of the buffer # ₃ which is the buffer unit 16a ₃ has elapsed (step S103, step S103: No), and the read discard time has elapsed. If so (step S103: Yes), the buffer read control unit 163a of the buffer # 3 is instructed to resume reading (step S104). Since the allowable delay time of the frame stored in the buffer # 3 is longer than the allowable delay time of the frame stored in the buffers # 2 and # 1, the read discard time of the buffer # 3 is the buffer # 1, # 2. Shorter than the read discard time. The relationship between the read discard times of the buffers # 1 to # 3 is the read discard time of the buffer # 1> the read discard time of the buffer # 2> the read discard time of the buffer # 3.

Next, the output discard control unit 20 continuously checks whether or not the read discard time of the buffer # ₂ that is the buffer unit 16a ₂ has elapsed (step S105, step S105: No), and the read discard time has elapsed. If so (step S105: Yes), the buffer read control unit 163a of the buffer # 2 is instructed to resume reading (step S106).

Next, the output discard control unit 20 continuously checks whether or not the read discard time of the buffer # ₁ that is the buffer unit 16a ₁ has elapsed (step S107, step S107: No), and the read discard time has elapsed. If it is (step S107: Yes), the buffer read control unit 163a of the buffer # 1 is instructed to resume reading (step S108).

  FIG. 15 is a flowchart illustrating an operation example of the buffer read control unit 163a. This is equivalent to adding the steps S83 and S84 to the flowchart of FIG. 10 showing an operation example of the buffer read control unit 163 of the first embodiment. When the buffer read control unit 163a receives a read instruction from the output control unit 17a (step S81: Yes), it is determined whether or not a discard request is being made, that is, whether or not the output discard control unit 20 requests frame discard. Is confirmed (step S83). When the discard request is not being made (step S83: No), the buffer read control unit 163a reads the frame stored in the frame buffer 162 and outputs it to the output control unit 17a (step S82). On the other hand, when a discard request is being made (step S83: Yes), the buffer read controller 163a reads the frame stored in the frame buffer 162 and discards it without outputting it to the output controller 17a (step S84).

  FIG. 16 is a flowchart illustrating an operation example of the output control unit 17a. The operation flow of the output control unit 17a illustrated in FIG. 16 is obtained by adding step S96 to the flowchart of FIG. 11 illustrating the operation example of the output control unit 17 of the first embodiment. In step S96, the output control unit 17a confirms whether or not it is during the read discard period, that is, whether or not the read discard time is notified from the delay management unit 13a and before the notified read discard time has elapsed. . If the output control unit 17a is in the read discard period (step S96: Yes), the process proceeds to step S93. If the output control unit 17a is not in the read discard period (step S96: No), the process proceeds to step S92.

As described above, in the communication device 1a according to the present embodiment, when a delay due to an external factor occurs, the delay management unit 13a determines the allowable delay time based on the delay time due to the external factor and the allowable delay time of the frame to be transferred. Calculates a read discard time for discarding frames stored in the plurality of buffer units 16a _{1 to} 16a _{3 in} which different frames are stored, and the output discard control unit 20 waits until the read discard time elapses. The buffer read control unit 163a is controlled to discard the frames stored in the frame buffers 162 of the buffer units 16a _{1 to} 16a ₃ without outputting them to the output control unit 17a. Thus, when a delay due to an external factor occurs, even if a frame that does not satisfy the allowable delay time is stored in the frame buffer 162, the frame can be discarded without being output. Therefore, the frame buffer 162 can be prevented from overflowing, and the subsequent frame that can be output can be prevented from being discarded.

  FIG. 17 is a diagram illustrating an example of a hardware configuration that implements each unit of the communication device 1 according to the first embodiment and each unit of the communication device 1a according to the second embodiment. Each unit of the communication devices 1 and 1a includes a processor 101 such as a CPU (Central Processing Unit) and a system LSI (Large Scale Integration), and a memory 102 including a RAM (Random Access Memory) and a ROM (Read Only Memory). It can be realized by the input / output interface 103. The processor 101, the memory 102, and the input / output interface 103 are connected to the bus 100, and can exchange data, control information, and the like via the bus 100. The input / output interface 103 is used when the communication devices 1 and 1a transmit and receive frames to and from other communication devices. Various data and programs are stored in the memory 102.

  An allowable delay identifying unit 10, a buffer allocating unit 11, an external delay detecting unit 12, a delay managing unit 13, 13a, a buffer closing control unit 14, a buffer clear control unit 15, an output control unit 17, 17a of the communication device 1 or 1a; The output discard control unit 20, the buffer write control units 161 and 161a, and the buffer read control units 163 and 163a can be realized by the processor 101 executing corresponding programs. Note that a plurality of processors and a plurality of memories may cooperate to implement each unit of the communication devices 1 and 1a. The frame buffer 162 can be realized using the memory 102.

  The configuration described in the above embodiment shows an example of the contents of the present invention, and can be combined with another known technique, and can be combined with other configurations without departing from the gist of the present invention. It is also possible to omit or change the part.

1,1a communication device, 10 allowable delay identification unit, 11 a buffer allocation unit, 12 external delay detection unit, 13, 13a delay management section, 14 a buffer occlusion control unit, 15 a buffer clear control section, 16 ₁ ~ 16 _3, 16a _{1 to} 16a ₃ buffer unit, 17, 17a output control unit, 20 output discard control unit, 161, 161a buffer write control unit, 162 frame buffer, 163, 163a buffer read control unit, 100 bus, 101 processor, 102 memory, 103 Input / output interface.

Claims (6)

A buffer unit for storing a frame in which an allowable delay time, which is a time in which the apparatus can stay, is defined;
An external delay detection unit that detects a delay that occurs outside the device, which affects a frame residence time that is a time from when a frame is written to the buffer unit until the frame is read;
A delay management unit that determines a period during which writing of a frame to the buffer unit is stopped based on the delay time of the delay detected by the external delay detection unit and the allowable delay time;
A buffer blockage control unit that controls the buffer unit to discard frames received in the period determined by the delay management unit;
A buffer clear control unit for discarding a frame stored in the buffer unit when the external delay detection unit detects the delay;
A communication apparatus comprising: A buffer unit for storing a frame in which an allowable delay time, which is a time in which the apparatus can stay, is defined;
An external delay detection unit that detects a delay that occurs outside the device, which affects a frame residence time that is a time from when a frame is written to the buffer unit until the frame is read;
A delay management unit for determining a period of discarding without outputting the frame stored in the buffer unit based on the delay time of the delay detected by the external delay detection unit and the allowable delay time;
When the period is determined by the delay management unit, the buffer unit is instructed to discard a frame corresponding to the read instruction when receiving a frame read instruction, and when the period ends, An output discard control unit that instructs the buffer unit to output a frame corresponding to the read instruction when receiving a frame read instruction;
A communication apparatus comprising:   The communication apparatus according to claim 1, wherein the external delay detection unit detects the delay based on information stored in a frame received from another communication apparatus.   The communication apparatus according to claim 3, wherein the other communication apparatus is a communication apparatus that is a transmission destination of a frame stored in the buffer unit. A buffer control method in a communication device having a buffer unit for storing a frame in which an allowable delay time, which is a time in which the device can stay, is defined,
An external delay detection step for detecting a delay generated outside the device, which affects a frame residence time which is a time from when a frame is written to the buffer unit until the frame is read;
A write stop period determining step for determining a period during which writing of a frame to the buffer unit is stopped based on the delay time of the delay detected in the external delay detection step and the allowable delay time;
A frame discarding step for discarding a received frame within the period determined in the write stop period determining step;
A buffer clear step for discarding frames stored in the buffer unit when the delay is detected in the external delay detection step;
A buffer control method comprising: A buffer control method in a communication device having a buffer unit for storing a frame in which an allowable delay time, which is a time in which the device can stay, is defined,
An external delay detection step for detecting a delay generated outside the device, which affects a frame residence time which is a time from when a frame is written to the buffer unit until the frame is read;
A frame discard period determining step for determining a period of discarding without outputting the frame stored in the buffer unit based on the delay time detected in the external delay detecting step and the allowable delay time;
A frame discarding step of discarding a frame to be transmitted from the buffer unit when the frame transmission timing is reached in the period determined in the frame discarding period determining step;
A buffer control method comprising:

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