JP2016184753A - Semiconductor photodetection element - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor photodetection element that facilitates the connection between a first electrode and a signal line while increasing the area.SOLUTION: A photodiode array PDA includes a plurality of avalanche photodiodes APD, a plurality of quenching resistors R1, a signal line TL to which the plurality of quenching resistors R1 are connected in parallel, and an electrode E3 which is electrically connected to the signal line TL. A through electrode TE which is electrically connected to the electrode E3 is formed in the semiconductor substrate 1 N for each photodiode array PDA. The avalanche photodiode APD has a first semiconductor region 1PA and a second semiconductor region 1PB. The first semiconductor region 1PA is formed on the principal surface 1Na side of the semiconductor substrate 1N. The second semiconductor region 1PB is formed in the first semiconductor region 1PA, and has a higher impurity concentration than the first semiconductor region 1PA. In plan view, the area of the electrode E3 is larger than the area of the second semiconductor region 1PB.SELECTED DRAWING: Figure 2

Description

  The present invention relates to a light detection device.

  A photodiode array (semiconductor photodetecting element) including a plurality of avalanche photodiodes operating in Geiger mode and a quenching resistor connected in series to each avalanche photodiode is known (for example, , See Patent Document 1). In this photodiode array, when the avalanche photodiode constituting the pixel detects photons and performs Geiger discharge, a pulsed signal is obtained by the action of a quenching resistor connected to the avalanche photodiode. Each avalanche photodiode counts photons. Therefore, even when a plurality of photons are incident at the same timing, the number of incident photons is determined according to the output charge amount or the signal intensity of the total output pulse.

JP 2011-003739 A

  In order to meet the demand for a large area in a photodetection device, a semiconductor photodetection element having a plurality of channels with the photodiode array described above as one channel may be used. In a semiconductor photodetecting element having a plurality of channels, the distance of wiring for guiding a signal output from each channel (hereinafter referred to as “wiring distance”) may differ between channels. If they are different from each other, the time resolution differs between channels due to the influence of the resistance and capacitance of the wiring.

  In order to make the time resolution the same between the channels, it is necessary to set the wiring distance of each channel according to the channel having a long wiring distance. However, in this case, the wiring distance of each channel becomes relatively long, and there is a limit to improving the time resolution.

  An object of the present invention is to provide a photodetection device capable of further improving the time resolution while increasing the area.

  A photodetection device according to the present invention includes a semiconductor photodetection element having a semiconductor substrate including first and second main surfaces facing each other, a second photodetection element disposed opposite to the semiconductor photodetection element, and a second main surface of the semiconductor substrate. A mounting substrate having an opposing third main surface and a fourth main surface facing the third main surface, wherein the semiconductor photodetecting element operates in Geiger mode and has a plurality of elements formed in the semiconductor substrate. An avalanche photodiode, a quenching resistor connected in series to each avalanche photodiode and disposed on the first main surface side of the semiconductor substrate, and a quenching resistor are connected in parallel and A photodiode array including a signal line arranged on one main surface side is used as one channel, and there are a plurality of channels, and the mounting board corresponds to each channel. A plurality of first electrodes are arranged on the third main surface side, and a signal processing unit that is electrically connected to the plurality of first electrodes and processes output signals from each channel is arranged on the fourth main surface side. In the semiconductor substrate, a through electrode that is electrically connected to the signal line and penetrates from the first main surface side to the second main surface side is formed for each channel, and corresponds to the through electrode and the through electrode. The first electrode is electrically connected via a bump electrode.

  In the photodetection device according to the present invention, the semiconductor photodetection element has a plurality of channels with the above-described photodiode array as one channel, thereby realizing a photodetection device with a large area. Can do.

  In the present invention, a through electrode that is electrically connected to the signal line and penetrates from the first main surface side to the second main surface side is formed for each channel on the semiconductor substrate of the semiconductor photodetection device. Since the through electrode and the first electrode of the mounting substrate are electrically connected via the bump electrode, the wiring distance of each channel can be extremely shortened and the values thereof can be made uniform. Therefore, the influence of the resistance and capacitance of the wiring is remarkably suppressed, and the time resolution is improved.

  A semiconductor substrate further comprising a glass substrate disposed on the first main surface side of the semiconductor substrate and having a fifth main surface facing the first main surface of the semiconductor substrate and a sixth main surface facing the fifth main surface. The side surface of the glass substrate and the side surface of the glass substrate may be flush with each other. In this case, the mechanical strength of the semiconductor substrate can be increased by the glass substrate. Moreover, since the side surface of the semiconductor substrate and the side surface of the glass substrate are flush with each other, dead space can be reduced.

  The sixth main surface of the glass substrate may be flat. In this case, the scintillator can be installed on the glass substrate very easily.

  The through electrode may be located in the central region of the channel. In this case, in each channel, the wiring distance from the avalanche photodiode to the through electrode can be shortened.

  The through electrode may be located in a region between the channels. In this case, it is possible to prevent a decrease in the aperture ratio in each channel.

  The semiconductor photodetecting element may further include a second electrode that is disposed on the first main surface side of the semiconductor substrate and connects the signal line and the through electrode. In this case, the signal line and the through electrode can be reliably electrically connected.

  According to the present invention, it is possible to provide a photodetecting device capable of further improving the time resolution while increasing the area.

It is a schematic perspective view which shows the photon detection apparatus which concerns on this embodiment. It is a figure for demonstrating the cross-sectional structure of the photon detection apparatus which concerns on this embodiment. It is a schematic plan view of a semiconductor photodetection element. It is a schematic plan view of a semiconductor photodetection element. It is a schematic plan view of a photodiode array. It is a circuit diagram of a photon detection device. It is a schematic plan view of a mounting substrate. It is a figure for demonstrating the manufacturing process of the photon detection apparatus which concerns on this embodiment. It is a figure for demonstrating the manufacturing process of the photon detection apparatus which concerns on this embodiment. It is a figure for demonstrating the manufacturing process of the photon detection apparatus which concerns on this embodiment. It is a figure for demonstrating the manufacturing process of the photon detection apparatus which concerns on this embodiment. It is a figure for demonstrating the manufacturing process of the photon detection apparatus which concerns on this embodiment. It is a figure for demonstrating the manufacturing process of the photon detection apparatus which concerns on this embodiment. It is a figure for demonstrating the manufacturing process of the photon detection apparatus which concerns on this embodiment. It is a figure for demonstrating the manufacturing process of the photon detection apparatus which concerns on this embodiment. It is a figure for demonstrating the manufacturing process of the photon detection apparatus which concerns on this embodiment. It is a figure for demonstrating the manufacturing process of the photon detection apparatus which concerns on this embodiment. It is a schematic plan view of a semiconductor photodetection element. It is a schematic plan view of a photodiode array. It is a figure for demonstrating the cross-sectional structure of the photon detection apparatus which concerns on the modification of this embodiment. It is a schematic plan view of a semiconductor photodetection element.

  Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. In the description, the same reference numerals are used for the same elements or elements having the same function, and redundant description is omitted.

  With reference to FIGS. 1-7, the structure of the photon detection apparatus 1 which concerns on this embodiment is demonstrated. FIG. 1 is a schematic perspective view showing a photodetecting device according to the present embodiment. FIG. 2 is a diagram for explaining a cross-sectional configuration of the photodetecting device according to the present embodiment. 3 and 4 are schematic plan views of the semiconductor photodetector element. FIG. 5 is a schematic plan view of the photodiode array. FIG. 6 is a circuit diagram of the photodetector. FIG. 7 is a schematic plan view of the mounting substrate.

  As shown in FIGS. 1 and 2, the light detection device 1 includes a semiconductor light detection element 10, a mounting substrate 20, and a glass substrate 30. The mounting substrate 20 is disposed to face the semiconductor light detection element 10. The glass substrate 30 is disposed so as to face the semiconductor photodetector 10. The semiconductor light detection element 10 is disposed between the mounting substrate 20 and the glass substrate 30.

  As shown in FIG. 3, the semiconductor photodetector 10 has a plurality of channels, that is, a plurality of photodiode arrays PDA, with one photodiode array PDA as one channel. The semiconductor photodetector 10 has a semiconductor substrate 1N that has a rectangular shape in plan view. The semiconductor substrate 1N includes a main surface 1Na and a main surface 1Nb facing each other. The semiconductor substrate 1N is an N-type (first conductivity type) semiconductor substrate made of Si.

  Each photodiode array PDA includes a plurality of avalanche photodiodes APD formed on the semiconductor substrate 1N. As shown in FIG. 5, a quenching resistor R1 is connected in series to each avalanche photodiode APD. One avalanche photodiode APD constitutes one pixel in each photodiode array PDA. Each avalanche photodiode APD is connected in parallel with each other in series with the quenching resistor R1, and a reverse bias voltage is applied from the power supply. The output current from the avalanche photodiode APD is detected by a signal processing unit SP described later.

  Each avalanche photodiode APD has a P-type (second conductivity type) first semiconductor region 1PA and a P-type (second conductivity type) second semiconductor region 1PB. The first semiconductor region 1PA is formed on the main surface 1Na side of the semiconductor substrate 1N. The second semiconductor region 1PB is formed in the first semiconductor region 1PA and has a higher impurity concentration than the first semiconductor region 1PA. The planar shape of the second semiconductor region 1PB is, for example, a polygon (in this embodiment, a quadrangle). The depth of the first semiconductor region 1PA is deeper than that of the second semiconductor region 1PB.

  The semiconductor substrate 1N has an N-type (first conductivity type) semiconductor region 1PC. The semiconductor region 1PC is formed on the main surface 1Na side of the semiconductor substrate 1N. The semiconductor region 1PC prevents a PN junction formed between the N-type semiconductor substrate 1N and the P-type first semiconductor region 1PA from being exposed to a through-hole TH in which a later-described through-electrode TE is disposed. The semiconductor region 1PC is formed at a position corresponding to the through hole TH (through electrode TE).

  As shown in FIG. 5, the avalanche photodiode APD has electrodes E1 disposed on the main surface 1Na side of the semiconductor substrate 1N. The electrode E1 is electrically connected to the second semiconductor region 1PB. The avalanche photodiode APD has an electrode (not shown) that is disposed on the main surface 1Nb side of the semiconductor substrate 1N and is electrically connected to the semiconductor substrate 1N. The first semiconductor region 1PA is electrically connected to the electrode E1 through the second semiconductor region 1PB.

  As shown in FIG. 5, the photodiode array PDA has a signal line TL and an electrode E3 formed on the semiconductor substrate 1N outside the second semiconductor region 1PB via the insulating layer L1. The signal line TL and the electrode E3 are disposed on the main surface 1Na side of the semiconductor substrate 1N. The electrode E3 is located in the central region of each channel (photodiode array PDA).

  The signal line TL includes a plurality of signal lines TL1 and a plurality of signal lines TL2. Each signal line TL1 extends in the Y-axis direction between adjacent avalanche photodiodes APD in plan view. Each signal line TL2 extends in the X-axis direction between adjacent avalanche photodiodes APD to electrically connect the plurality of signal lines TL1. The signal line TL2 is connected to the electrode E3. The signal line TL1 is electrically connected to the electrode E3 via the signal line TL2, except for the signal line TL1, which is not directly connected to the electrode E3.

  The photodiode array PDA has a quenching resistor R1 formed on the semiconductor substrate 1N outside the second semiconductor region 1PB via the insulating layer L1 for each individual avalanche photodiode APD. That is, the quenching resistor R1 is arranged on the main surface 1Na side of the semiconductor substrate 1N. The quenching resistor R1 has one end connected to the electrode E1 and the other end connected to the signal line TL1. 3 and 5, the description of the insulating layers L1 and L3 shown in FIG. 2 is omitted for clarity of the structure.

  Each avalanche photodiode APD (region immediately below the first semiconductor region 1PA) is connected to the signal line TL1 via the quenching resistor R1. A plurality of avalanche photodiodes APD are connected to one signal line TL1 via quenching resistors R1, respectively.

  An insulating layer L3 is arranged on the main surface 1Na side of the semiconductor substrate 1N. The insulating layer L3 is formed so as to cover the electrodes E1 and E3, the quenching resistor R1, and the signal line TL.

  Each photodiode array PDA includes a through electrode TE. The through electrode TE is provided for each individual photodiode array PDA, that is, for each individual channel. The through electrode TE is formed so as to penetrate the semiconductor substrate 1N from the main surface 1Na side to the main surface 1Nb side. That is, the through electrode TE is disposed in the through hole TH that penetrates the semiconductor substrate 1N. The insulating layer L2 is also formed in the through hole TH. Therefore, the through electrode TE is disposed in the through hole TH via the insulating layer L2.

  The through electrode TE has one end connected to the electrode E3. That is, the electrode E3 connects the signal line TL and the through electrode TE. The quenching resistor R1 is electrically connected to the through electrode TE through the signal line TL and the electrode E3.

  The quenching resistor R1 has a higher resistivity than the electrode E1 to which it is connected. Quenching resistor R1 is made of polysilicon, for example. As a method for forming the quenching resistor R1, a CVD (Chemical Vapor Deposition) method can be used.

  The electrodes E1, E3 and the through electrode TE are made of a metal such as aluminum. When the semiconductor substrate is made of Si, AuGe / Ni or the like is often used as the electrode material in addition to aluminum. As a method for forming the electrodes E1, E3 and the through electrode TE, a sputtering method can be used.

  When Si is used, a Group 3 element such as B is used as the P-type impurity, and a Group 5 element such as N, P, or As is used as the N-type impurity. Even if N-type and P-type semiconductors are substituted for each other to form an element, the element can function. As a method for adding these impurities, a diffusion method or an ion implantation method can be used.

  As a material of the insulating layers L1, L2, and L3, SiO2 or SiN can be used. As a method of forming the insulating layers L1, L2, and L3, when the insulating layers L1, L2, and L3 are made of SiO2, a thermal oxidation method or a sputtering method can be used.

  In the case of the above structure, an avalanche photodiode APD is formed by forming a PN junction between the N-type semiconductor substrate 1N and the P-type first semiconductor region 1PA. The semiconductor substrate 1N is electrically connected to an electrode (not shown) formed on the back surface of the substrate 1N, and the first semiconductor region 1PA is connected to the electrode E1 through the second semiconductor region 1PB. The quenching resistor R1 is connected in series with the avalanche photodiode APD (see FIG. 6).

  In the photodiode array PDA, each avalanche photodiode APD is operated in the Geiger mode. In the Geiger mode, a reverse voltage (reverse bias voltage) larger than the breakdown voltage of the avalanche photodiode APD is applied between the anode and the cathode of the avalanche photodiode APD. That is, the (−) potential V1 is applied to the anode and the (+) potential V2 is applied to the cathode. The polarities of these potentials are relative, and one of the potentials can be a ground potential.

  The anode is a P-type first semiconductor region 1PA, and the cathode is an N-type semiconductor substrate 1N. When light (photons) enters the avalanche photodiode APD, photoelectric conversion is performed inside the substrate to generate photoelectrons. Avalanche multiplication is performed in a region near the PN junction interface of the first semiconductor region 1PA, and the amplified electron group flows toward an electrode formed on the back surface of the semiconductor substrate 1N. That is, when light (photon) is incident on any pixel (avalanche photodiode APD) of the photodiode array PDA, it is multiplied and extracted as a signal from the electrode E3 (through electrode TE).

  The other end of the quenching resistor R1 connected to each avalanche photodiode APD is electrically connected to a common signal line TL along the surface of the semiconductor substrate 1N. The plurality of avalanche photodiodes APD operate in Geiger mode, and each avalanche photodiode APD is connected to a common signal line TL. For this reason, when photons simultaneously enter a plurality of avalanche photodiodes APD, the outputs of the plurality of avalanche photodiodes APD are all input to a common signal line TL, and as a whole, a high-intensity signal corresponding to the number of incident photons. It is measured. In the semiconductor photodetecting element 10, a signal is output for each channel (photodiode array PDA) through the corresponding through electrode TE.

  As shown in FIG. 2, the mounting board 20 has a main surface 20 a and a main surface 20 b that face each other. The mounting substrate 20 has a rectangular shape in plan view. Main surface 20a is opposed to main surface 1Nb of semiconductor substrate 1N. The mounting substrate 20 includes a plurality of electrodes E9 arranged on the main surface 20a side. As shown in FIGS. 2 and 7, the electrode E9 is disposed corresponding to the through electrode TE. That is, the electrode E9 is formed on each region facing the through electrode TE in the main surface 20a. The electrode E9 is provided for each channel (photodiode array PDA). In FIG. 2, illustration of the bump electrodes described on the main surface 20 b side of the mounting substrate 20 is omitted.

  The through electrode TE and the electrode E9 are connected by a bump electrode BE. Thereby, the electrode E3 is electrically connected to the electrode E9 via the penetration electrode TE and the bump electrode BE. The quenching resistor R1 is electrically connected to the electrode E9 via the signal line TL, the electrode E3, the through electrode TE, and the bump electrode BE. The electrode E9 is also made of a metal such as aluminum like the electrodes E1 and E3 and the through electrode TE. As an electrode material, AuGe / Ni or the like may be used in addition to aluminum. The bump electrode BE is made of, for example, solder. The bump electrode BE is formed on the through electrode TE via a UBM (Under Bump Metal) BM.

  The mounting substrate 20 has a signal processing unit SP. The signal processing unit SP is disposed on the main surface 20b side of the mounting substrate 20. The signal processing unit SP constitutes an ASIC (Application Specific Integrated Circuit). Each electrode E9 is electrically connected to the signal processing unit SP via a wiring (not shown) formed in the mounting substrate 20 and a bonding wire. The signal processing unit SP receives an output signal from each channel (photodiode array PDA), and the signal processing unit SP processes the output signal from each channel. The signal processing unit SP includes a CMOS circuit that converts an output signal from each channel into a digital pulse.

  A passivation film PF having openings formed at positions corresponding to the bump electrodes BE is disposed on the main surface 1Nb side of the semiconductor substrate 1N and the main surface 20a side of the mounting substrate 20. The passivation film PF is made of SiN, for example. As a method for forming the passivation film PF, a CVD (Chemical Vapor Deposition) method can be used.

  The glass substrate 30 has a main surface 30a and a main surface 30b facing each other. The glass substrate 30 has a rectangular shape in plan view. Main surface 30a faces main surface 1Nb of semiconductor substrate 1N. The main surface 30b is flat. In the present embodiment, the main surface 30a is also flat. The glass substrate 30 and the semiconductor photodetecting element 10 are optically connected by an optical adhesive (not shown). The glass substrate 30 may be formed directly on the semiconductor photodetecting element 10.

  Although not shown, a scintillator is optically connected to the main surface 30b of the glass substrate 30 by an optical adhesive. The scintillation light from the scintillator passes through the glass substrate 30 and enters the semiconductor light detection element 10.

  The side surface 1Nc of the semiconductor substrate 1N and the side surface 30c of the glass substrate 30 are flush with each other as shown in FIG. In other words, the outer edge of the semiconductor substrate 1N and the outer edge of the glass substrate 30 coincide with each other in plan view.

  Next, with reference to FIGS. 8 to 17, a method for manufacturing the above-described photodetector 1 will be described. 8-17 is a figure for demonstrating the manufacturing process of the photon detection apparatus based on this embodiment.

  First, a portion corresponding to the semiconductor photodetecting element 10, that is, a portion corresponding to each channel (photodiode array PDA) (first semiconductor region 1PA, second semiconductor region 1PB, insulating layer L1, quenching resistor R1, electrode E1, A semiconductor substrate 1N on which E3 and a signal line TL) are formed is prepared (see FIG. 8). The semiconductor substrate 1N is prepared in the form of a semiconductor wafer in which a plurality of portions corresponding to the semiconductor photodetector 10 are formed.

  Next, the insulating layer L3 is formed on the main surface 1Na side of the prepared semiconductor substrate 1N, and then the semiconductor substrate 1N is thinned from the main surface 1Nb side (see FIG. 9). The insulating layer L3 is made of SiO2. As a method of forming the insulating layer L3, a CVD (Chemical Vapor Deposition) method can be used. As a thinning method of the semiconductor substrate 1N, a mechanical polishing method or a chemical polishing method can be used.

  Next, an insulating layer L2 is formed on the main surface 1Nb side of the prepared semiconductor substrate 1N (see FIG. 10). The insulating layer L2 is made of SiO2. As a method of forming the insulating layer L2, a CVD (Chemical Vapor Deposition) method can be used.

  Next, a region where the through hole TH is formed in the insulating layer L2 is removed (see FIG. 11). As a method for removing the insulating layer L2, a dry etching method can be used.

  Next, a through hole TH for arranging the through electrode TE is formed in the semiconductor substrate 1N (see FIG. 12). As a method for forming the through hole TH, a dry etching method and a wet etching method can be appropriately selected and applied. When the alkali etching method is used as the wet etching method, the insulating layer L1 functions as an etching stop layer.

  Next, after forming the insulating layer L2 again on the main surface 1Nb side of the prepared semiconductor substrate 1N, a part of the insulating layer L1 and the insulating layer L2 is removed to expose the electrode E3 (see FIG. 13). . As a method for removing the insulating layer L1 and the insulating layer L2, a dry etching method can be used.

  Next, the through electrode TE is formed (see FIG. 14). As described above, the through electrode TE can be formed by sputtering.

  Next, a passivation film PF having an opening formed at a position corresponding to the bump electrode BE is formed on the main surface 1Nb side of the semiconductor substrate 1N, and then the bump electrode BE is formed (see FIG. 15). Thereby, the semiconductor photodetection element 10 is obtained. Prior to the formation of the bump electrode BE, an UBM (Under Bump Metal) is formed in a region exposed from the passivation film PF in the through electrode TE. The UBM is made of a material that is electrically and physically connected to the bump electrode BE. An electroless plating method can be used as a method for forming the UBM. As a method for forming the bump electrode BE, a method of mounting a solder ball or a printing method can be used.

  Next, the glass substrate 30 is bonded to the semiconductor photodetector 10 via an optical adhesive (see FIG. 16). Thereby, the glass substrate 30 and the semiconductor light detection element 10 are optically connected. Similarly to the semiconductor substrate 1N, the glass substrate 30 is also prepared in the form of a glass substrate base material including a plurality of glass substrates 30. The step of bonding the glass substrate 30 and the semiconductor photodetecting element 10 may be performed after forming the insulating layer L3 on the semiconductor substrate 1N.

  Next, the laminated body which consists of the glass substrate 30 (glass substrate base material) and the semiconductor photodetector 10 (semiconductor wafer) is cut | disconnected by dicing. Thereby, the side surface 1Nc of the semiconductor substrate 1N and the side surface 30c of the glass substrate 30 are flush with each other.

  Next, bump connection is made with the semiconductor photodetector 10 with the glass substrate 30 disposed opposite to the mounting substrate 20 prepared separately (see FIG. 17). Through these processes, the photodetection device 1 is obtained. A bump electrode BE is formed on the mounting substrate 20 on the main surface 20a side at a position corresponding to the electrode E9.

  As described above, in the present embodiment, since the semiconductor photodetector 10 has a plurality of channels with the photodiode array PDA as one channel, the photodetector 1 with a large area is realized. can do.

  In the photodetection device 1, a through electrode TE that is electrically connected to the signal line TL and penetrates from the main surface 1Na side to the main surface 1Nb side is formed on the semiconductor substrate 1N of the semiconductor photodetection element 10 for each channel. The through electrode TE of the light detection element 10 and the electrode E9 of the mounting substrate 20 are electrically connected via the bump electrode BE. As a result, the distance of the wiring for guiding the signal from each channel can be made extremely short, and the values can be made uniform without variation. Therefore, the influence of the resistance and capacitance of the wiring is remarkably suppressed, and the time resolution is improved.

  The photodetection device 1 includes a glass substrate 30 disposed on the main surface 1Na side of the semiconductor substrate 1N. Thereby, the mechanical strength of the semiconductor substrate 1 </ b> N can be increased by the glass substrate 30. The side surface 1Nc of the semiconductor substrate 1N and the side surface 30c of the glass substrate 30 are flush with each other. Thereby, dead space can be reduced.

  The main surface 30b of the glass substrate 30 is flat. Thereby, installation of the scintillator to the glass substrate 30 can be performed very easily.

  The through electrode TE is located in the central region of each channel. Thereby, in each channel, the wiring distance from each avalanche photodiode APD to the penetration electrode TE can be shortened.

  The semiconductor photodetecting element 10 is disposed on the main surface 1Na side of the semiconductor substrate 1N and includes an electrode E3 that connects the signal line TL and the through electrode TE. Thereby, the signal line TL and the through electrode TE can be reliably electrically connected.

  The preferred embodiments of the present invention have been described above. However, the present invention is not necessarily limited to the above-described embodiments, and various modifications can be made without departing from the scope of the present invention.

  As shown in FIGS. 18 and 19, the through electrode TE may be located in a region between each channel (photodiode array PDA). In this case, it is possible to prevent a decrease in the aperture ratio in each channel. 18 and 19, the insulating layer L1 shown in FIG. 2 is omitted for clarity of the structure.

  As shown in FIGS. 20 and 21, the bump electrode BE may be disposed outside the through hole TH. In the example shown in FIGS. 20 and 21, a plurality of bump electrodes (four bump electrodes in this example) BE are formed for one through electrode TE. The bump electrode BE is disposed on an electrode portion that is continuous with the through electrode TE and is disposed on the main surface 1Nb side of the semiconductor substrate 1N. In FIG. 21, the description of the passivation film PF shown in FIG. 2 is omitted for clarity of the structure.

  The shapes of the first and second semiconductor regions 1PB and 1PB are not limited to the shapes described above, and may be other shapes (for example, a circular shape). Further, the number (number of rows and number of columns) and arrangement of the avalanche photodiode APD (second semiconductor region 1PB) are not limited to those described above. Further, the number and arrangement of the channels (photodiode arrays PDA) are not limited to those described above.

  The present invention can be used in a light detection device that detects weak light.

  DESCRIPTION OF SYMBOLS 1 ... Photodetection apparatus, 1N ... Semiconductor substrate, 1Na, 1Nb ... Main surface, 1Nc ... Side surface, 1PA ... First semiconductor region, 1PB ... Second semiconductor region, 10 ... Semiconductor photodetection element, 20 ... Mounting substrate, 20a, 20b ... main surface, 30 ... glass substrate, 30a, 30b ... main surface, 30c ... side surface, APD ... avalanche photodiode, BE ... bump electrode, E1, E3, E9 ... electrode, PDA ... photodiode array, R1 ... quenching Resistance, SP ... signal processing unit, TE ... through electrode, TL ... signal line.

Claims (5)

A semiconductor photodetecting element having a photodiode array,
The photodiode array is
A plurality of avalanche photodiodes operating in a Geiger mode and formed in a semiconductor substrate;
A plurality of quenching resistors connected in series to each of the avalanche photodiodes and disposed on the first main surface side of the semiconductor substrate;
A plurality of quenching resistors connected in parallel and disposed on the first main surface side of the semiconductor substrate; and
A first electrode that is electrically connected to the signal line and disposed on the first main surface side of the semiconductor substrate;
In the semiconductor substrate, corresponding to the photodiode array, a through hole penetrating from the first main surface side to the second main surface side facing the first main surface is formed,
The through-hole is electrically connected to the first electrode, and the through-electrode electrically connected to the signal line included in the corresponding photodiode array is disposed through the first electrode. And
Each avalanche photodiode is
The semiconductor substrate of the first conductivity type;
A first semiconductor region of a second conductivity type formed on the first main surface side of the semiconductor substrate;
A second semiconductor region of a second conductivity type formed in the first semiconductor region and having an impurity concentration higher than that of the first semiconductor region,
Each of the second semiconductor regions is electrically connected to the first electrode via the corresponding quenching resistor and the signal line,
A semiconductor photodetecting element, wherein the area of the first electrode is larger than the area of the second semiconductor region in plan view.   The semiconductor photodetecting element according to claim 1, wherein the through electrode is disposed in the through hole via an insulating layer.   The semiconductor photodetecting element according to claim 1, wherein the through electrode is located immediately below the first electrode and connected to the first electrode. The photodiode array has a plurality of the signal lines,
The semiconductor photodetecting element according to claim 1, wherein the first electrode is electrically connected to the plurality of signal lines.   Each of the avalanche photodiodes includes a second electrode that is disposed on the first main surface side of the semiconductor substrate and electrically connects the second semiconductor region and the quenching resistor. The semiconductor photodetector element as described in any one of -4.

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