JP2016177423A - Control system having multi-core microcontroller and control method thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a control system including a control device on which a multi-core microcomputer is mounted for switching the start/stop of a CPU core in preparation for the increase/decrease of a processing load due to a control object at the optimal timing.SOLUTION: A control device capable of acquiring much more situations and pieces of information of a control object even when a processing load varies every moment in accordance with the state of the control object estimates the state of the control object after a predetermined time lapsed since the information is acquired, and determines the necessity of a CPU core to withstand the processing load generated in accordance with a change in the state of the control object in the control device as the target of switching, and instructs the control device as the target of the switching of the start/stop of the CPU core, and the control device which has received the start/stop instruction switches the start/stop of the CPU core in accordance with the instruction. Thus, it is possible to execute, at the optimal timing, the switching of the start/stop of the CPU core in preparation for the increase/decrease of the processing load under the consideration of the state of the control object.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a control system including a control device provided with a multi-core microcontroller, and more particularly to start / stop control of a CPU core of a multi-core microcontroller for reducing power consumption.

  A multi-core microcontroller (microcomputer) installed in a control device or a control device system to which a plurality of control devices are connected has a plurality of CPU (Central Processing Unit) cores that perform data processing. Thus, the same or different data processing can be performed. The parallel processing by the plurality of CPU cores can increase the data processing amount of the entire microcomputer as compared with a single CPU core microcomputer.

  However, starting many CPU cores to increase the amount of data processing increases the amount of power consumed by the entire microcomputer.

  For the reasons described above, in order to keep the power consumption of the microcomputer itself low, it is important to activate only the necessary CPU cores according to the data processing amount. By doing so, the power consumption of the control device and the control device system is reduced. It leads to reduction.

  Conventionally, a method of switching CPU cores that reduces power consumption by controlling the number of CPU cores of a multi-core microcomputer that performs data processing has been studied. For example, in a multi-core microcomputer including two CPU cores 1 and 2, the processing load on the CPU core 1 may be increased or increased by the load estimation unit when the CPU core 2 is not activated. It is detected and estimated from the data obtained from its own processing load and control target.

  In the conventional method of switching the start and stop of the CPU core in such a system configuration, the CPU core 1 executes task A and task B according to the scheduled result. When the load estimation unit detects that the processing load on the CPU core 1 has increased or is likely to be increased, the CPU core 2 determines the context of the predetermined task (for example, task A according to the processing order) from the CPU core 1. CPU core 2 performs test execution of task A. Then, after the test execution, the CPU core that executes the task A is switched from the CPU core 1 to the CPU core 2.

Japanese Patent No. 5195913

  However, the conventional method for estimating the processing load from the state of the controlled object and switching the start and stop of the CPU core based on the estimated result has the following problems.

  For example, in the CPU core start / stop switching method described in Patent Document 1, an increase in processing load is estimated from the control target of the control device itself. However, in a control device system in which a plurality of control devices used in, for example, automobiles are connected, the control contents change depending on not only the control target of the control device itself but also the state of the entire vehicle, and processing is performed in a short time. The load may change. Therefore, even if the processing load is estimated only by the control target of the control device itself, there is a possibility that the deviation from the actual processing load may become large, and the switching between starting and stopping of the CPU core may not be performed at the optimal timing. There is a problem that there is.

  The present invention has been made in order to solve the above-described problems, and a plurality of control devices having different control targets, including a control device equipped with a multi-core microcomputer, communicate with each other to share information. It is an object of the present invention to provide a control system or the like in which the CPU core can be switched between starting and stopping in consideration of the processing load in accordance with the control state of other control devices.

  The present invention includes a first control device provided with a first microcomputer and a second control device provided with a second microcomputer comprising a multi-core microcomputer equipped with a plurality of CPU cores. A control system in which a plurality of control devices each having a control target are communicably connected via a network, wherein the first control device is configured by the first microcomputer. An information collection unit that collects information on each control target and state information of the second microcomputer, and a control state of the second control device after a preset time according to the information collected by the information collection unit The state estimation unit to be estimated, the information collected by the information collection unit, and the estimation result of the state estimation unit are used to determine whether it is necessary to switch activation of the plurality of CPU cores of the second control device A switching execution determining unit, and a core switching instructing unit for instructing the second control device to start switching the CPU core in accordance with a CPU core activation switching determination result of the switching execution determining unit, and the second control A switching execution determination unit configured to determine whether or not the CPU core can be switched based on a state of the second microcomputer when receiving a start switching instruction from the first control device, the device including the second microcomputer. A control system that includes a core switching unit that switches between starting and stopping of the CPU core when the switching execution determining unit determines that switching is possible, and an arithmetic control unit that adjusts allocation of arithmetic processing in each CPU core Etc.

  In this invention, in a control system in which a plurality of control devices each having a different control target, including a control device equipped with a multi-core microcomputer, are connected by communication in order to share information with each other, the control state of the other control device is set. Therefore, it is possible to provide a control system capable of switching between starting and stopping the CPU core in consideration of the processing load.

It is a block diagram of the control system which concerns on Embodiment 1 of this invention. It is an operation | movement flowchart in the meter control apparatus of the control system which concerns on Embodiment 1 of this invention. It is an operation | movement flowchart in the engine control apparatus of the control system which concerns on Embodiment 1 of this invention. It is a figure which shows an example of the vehicle state estimation map in Embodiment 1 of this invention. It is a time chart for demonstrating the process of the control system in Embodiment 1 of this invention. It is an operation | movement flowchart in the engine control apparatus of the control system which concerns on Embodiment 2 of this invention. It is a block diagram of the control system which concerns on Embodiment 3 of this invention. It is an operation | movement flowchart in the meter control apparatus of the control system which concerns on Embodiment 3 of this invention. It is an operation | movement flowchart in the engine control apparatus of the control system which concerns on Embodiment 3 of this invention. It is a block diagram of the control system which concerns on Embodiment 4 of this invention. It is an operation | movement flowchart in the engine control apparatus of the control system which concerns on Embodiment 4 of this invention.

  The present invention provides a control device that can obtain a large amount of information and information on the inside and outside of the vehicle, even when the processing load changes momentarily according to the information on the inside and outside of the vehicle and the operation of the driver. Estimating the vehicle state, determining the necessity of the CPU core so that it can withstand the processing load caused by the change in the vehicle state in the control device to be switched, starting the CPU core in the target control device, The control device instructing the switching of the stop and receiving the start / stop instruction switches the start / stop of the CPU core in accordance with the instruction to prepare for the increase / decrease of the processing load in consideration of the vehicle state at an optimal timing. Switch the start and stop of the core.

Hereinafter, preferred embodiments of a control system and a control method thereof according to the present invention will be described with reference to the drawings. In the drawings, the same or corresponding parts will be described with the same reference numerals.
In the following embodiments, a case where the present invention is applied to a vehicle control system will be described as an example, but the control target of the control system and the control method of the present invention is not limited to the vehicle.

Embodiment 1 FIG.
FIG. 1 is a configuration diagram of a control system according to Embodiment 1 of the present invention. The control system includes an engine control device 300 constituting the second control device, a meter control device 200 constituting the first control device, a brake control device 400, and a transmission control device 450.
Are connected via a communication line 150.

The configuration of the meter control device 200 will be described. The meter control device 200 is connected to a meter unit 201 that is a control target.
The meter control device 200 includes a first microcontroller (microcomputer) 210, a first storage device 211, an information collection unit 212, a vehicle state estimation unit 220, and a core switching instruction unit that constitute a first arithmetic processing unit. 221, a switching execution determination unit 222, a switching control unit 223, and a first communication unit 213.
The meter control device 200 has necessary components in addition to the above-described components, but the description thereof is omitted because it is not directly related to the first embodiment.

The first microcomputer 210 performs various processes and calculations based on a program recorded in the first storage device 211.
The first storage device 211 is composed of a nonvolatile memory and a volatile memory, and is a device that records data and programs. The first storage device 211 stores a control calculation processing program for the meter unit 201, data necessary for the control calculation, other processing programs not directly related to these, data, and the like. In addition, a program for determining CPU core switching of the engine control device 300 is recorded.
Note that the vehicle state estimation unit 220, the information collection unit 212, the core switching instruction unit 221, the switching execution determination unit 222, the switching control unit 223, and the first communication unit 213 are used for the CPU core switching determination according to the present invention. The processing executed by one microcomputer 210 is shown as a functional block. Actually, a program for causing the first microcomputer 210 to execute these functions is stored in the first storage device 211. In addition, about the 1st communication part 213, the hardware communication apparatus used for normal communication between control apparatuses is used.
The vehicle state estimation unit 220 estimates a future vehicle state based on the information collected by the information collection unit 212.
The switching execution determination unit 222 performs the second execution in the second microcomputer 310 after a preset time from the current processing of the second microcomputer 310 of the engine control device 300 and the vehicle state estimated by the vehicle state estimation unit 220. The necessity of the second CPU core 310b is determined. The core switching instruction unit 221 instructs the engine control device 300 to start the second CPU core 310b via the communication line 150 when the switching execution determination unit 222 determines that it is necessary. If it is not determined that it is necessary, the engine control device 300 is instructed to stop the second CPU core 310b via the communication line 150. The first communication unit 213 communicates with the engine control device 300, the brake control device 400, and the transmission control device 450 via the communication line 150, and performs data transmission / reception.

Next, the configuration of the engine control device 300 will be described. The engine control device 300 is connected to an engine unit 301 that is a control target.
The engine control device 300 includes a second microcomputer 310 that constitutes a second arithmetic processing unit, a second storage device 311, a second communication unit 312, a switching execution determination unit 320, a core switching unit 321, arithmetic control. Part 323 is provided.
The engine control device 300 includes necessary components in addition to the above-described components, but the description thereof is omitted because it is not directly related to the first embodiment.

The second microcomputer 310 is a multi-core microcomputer having two CPU cores, a first CPU core 310a and a second CPU core 310b, and performs various operations based on a program recorded in the second storage device 311. Perform the process. Here, it is assumed that there are a task A, a task B, a task C, and a task D as arithmetic processing related to engine control. The CPU core for processing a task is not dynamically changed, but the CPU core for processing is determined based on a predetermined allocation. And each will be processed periodically. Further, the time required for processing each task increases or decreases depending on the processing contents at that time. When each task is not processed by the second microcomputer 310, the task enters an idle state that is a waiting state.
The second storage device 311 is composed of a nonvolatile memory, a volatile memory, and the like, and is a device that records data and programs. The second storage device 311 stores control arithmetic processing (task A, task B, task C, task D) programs for the engine unit 301, data necessary for control arithmetic, other processing programs not directly related to these, data Etc. are recorded.
Note that the switching execution determination unit 320, the core switching unit 321, the arithmetic control unit 323, and the second communication unit 312 are functional blocks that perform the processing executed by the first microcomputer 310 for CPU core switching according to the present invention. It is shown. Actually, a program for causing the second microcomputer 310 to execute these functions is stored in the second storage device 311. The second communication unit 312 uses a hardware communication device used for normal communication between the control devices.
When receiving a CPU core switching instruction from the meter control device 200, the switching execution determining unit 320 determines whether or not the CPU core can be activated. The core switching unit 321 switches activation and stop of the second CPU core 310b based on the determination result of the switching execution determination unit 320. The arithmetic control unit 323 adjusts the allocation of arithmetic processing to be performed according to the activation status. The second communication unit 312 communicates with the meter control device 200, the brake control device 400, and the transmission control device 450 via the communication line 150, and performs data transmission / reception.

  Although detailed configurations of the brake control device 400 and the transmission control device 450 are not described, each has a communication unit, communicates with the meter control device 200 via the communication line 150, and the brake control device 400 has a brake pedal operation amount. The transmission control device 450 transmits the shift position to the meter control device 200, respectively.

  Next, with reference to FIG. 2, the flow of processing in the meter control device 200 for estimating the processing load of the engine control device 300 from the information in the vehicle and determining whether to start or stop the CPU core will be described. The meter control device 200 performs the process shown in the flowchart of FIG. 2 twice or more at a preset first time interval, and the second microcomputer 310 of the engine control device 300 at the next first time interval. The switching of the second CPU core 310b is determined. Here, the first time interval is 10 ms, and the number of executions is 10 times.

  In step S <b> 200, the switching control unit 223 confirms how many times the processing related to the CPU core activation / determination determination has been performed in the current first time interval. In the case of the first time, the start / stop switching determination process is terminated, and the process proceeds to step S201. In the case of the second time, the process proceeds to step S202. In the case of the third time or more, the process proceeds to step S206.

  In step S <b> 201, the information collection unit 212 collects the status of the control target and sensor information collected by each control device for control from other control devices connected by the communication line 150. Here, the engine speed is collected from the engine control device 300, the brake pedal operation amount is collected from the brake control device 400, and the shift position is collected from the transmission control device 450.

  In step S202, the same processing as that in step S201 is performed, and thus the description thereof is omitted.

  In step S203, the vehicle state estimation unit 220 estimates the vehicle state at the next first time interval from the engine speed, the brake pedal operation amount, and the shift position obtained in step S202. Here, for example, the vehicle state is estimated using a vehicle state estimation map stored in advance in, for example, the first storage device 211 shown in FIG. However, this is merely an example, and numerical values are simplified for the sake of explanation, and vehicle state estimation is not limited to the vehicle state estimation map.

  In step S204, the information collection unit 212 collects the current processing load of the second microcomputer 310 (including the processing load rate (%), the activation state of the second CPU core 310b, etc.) from the engine control device 300. To do.

In step S <b> 205, the switching execution determination unit 222 detects the current processing load of the second microcomputer 310 of the engine control device 300 collected by the information collection unit 212 and the next first time estimated by the vehicle state estimation unit 220. The necessity of the second CPU core 310b in the second microcomputer 310 of the engine control device 300 at the next first time interval is determined from the vehicle state at the interval.
Here, the switching execution determination unit 222
1) The state where the second CPU core 310b is not activated,
2) A state in which the current processing load of the second microcomputer 310 exceeds a preset first threshold (here, the first threshold is set to 60%, but the present invention is not limited to this).
3) A state in which it is determined that the vehicle state is “state 2” (the engine speed may increase and the processing load of the engine control device 300 increases),
When all these three conditions are satisfied, it is determined that the second CPU core 310b needs to be activated.
In addition, the switching execution determination unit 222
1) The state where the second CPU core 310b is activated,
2) When the current processing load of the second microcomputer 310 is less than the second threshold (40% here, but not limited to this),
3) A state in which the vehicle state is determined to be “state 3” (“the engine speed may be lowered and the processing load of the engine control device 300 is reduced”;
When all these three conditions are satisfied, it is determined that activation of the second CPU core 310b is unnecessary.

In step S206, the switching control unit 223 determines whether it is time to execute the CPU core switching notification. Here, the necessity of notification is determined based on the number of executions of processing related to the determination of CPU core activation / deactivation. The timing at which the engine control apparatus 300 actually switches the start and stop of the second CPU core 310b can be adjusted by this number of times. Here, as an example, it is determined that notification is necessary only at the fifth time. If notification is necessary, the process proceeds to step S207. If notification is not necessary, the process is terminated.
That is, here, five times the time from time t00 to time t01 in FIG. 5, which will be described later, after the determination that CPU core activation switching is necessary, that is, the time from time t00 to time t05 (first time interval). After the elapse of half), the second control device 300 is instructed to switch activation of the CPU core. Half of this first time interval is the first switching time.
In step S207, when it is determined that the second CPU core 310b needs to be activated, the core switching instruction unit 221 notifies the engine control device 300 of the activation of the second CPU core 310b via the communication line 150. To do. If it is determined that it is not necessary, the engine control apparatus 300 is notified of the stop of the second CPU core 310b via the communication line 150.

  As described above, the meter control device 200 determines and notifies the start and stop of the second CPU core 310b of the engine control device 300.

  Next, referring to FIG. 3, the flow of execution processing for starting and stopping the second CPU core 310b in the engine control apparatus 300 will be described. This execution process is performed every time the engine control device 300 receives a CPU core switching notification from the meter control device 200. When the second CPU core 310b is stopped, all tasks (tasks A to D) are all processed by the first CPU core 310a, and the second CPU core 310b is activated. If so, the first CPU core 310a performs task A and task B, and the second CPU core 310b performs task C and task D.

In step S300, the switching execution determination unit 320 confirms whether the CPU core switching notification is a startup notification or a stop notification of the second CPU core 310b.
If it is a start notification, the process proceeds to step S301. If it is a stop notification, the process proceeds to step S305.

In step S301, the switching execution determination unit 320 confirms whether the second CPU core 310b can be activated.
here,
1) The second CPU core 310b is not activated,
2) Tasks C and D of the first CPU core 310a are in an idle state (not activated).
When the above two conditions are satisfied at the same time, it is determined that activation is possible.
Otherwise, it is judged impossible.
If it can be activated, the process proceeds to step S302. If it cannot be activated, the process proceeds to step S304.

  In step S302, the core switching unit 321 activates the second CPU core 310b.

  In step S303, the arithmetic control unit 323 changes task assignment so that the tasks C and D are processed by the second CPU core 310b.

  In step S304, the switching execution determination unit 320 confirms whether or not a predetermined time has elapsed (here, 10 ms) since the CPU core switching notification is received. When it has not elapsed, the process proceeds to step S301, and when it has elapsed, the process is terminated.

In step S305, the switching execution determination unit 320 confirms whether the first CPU core 310a can be stopped.
here,
1) The second CPU core 310b is activated,
2) Tasks A and B of the first CPU core 310a are all idle (not activated).
3) Tasks C and D of the second CPU core 310b are all idle (not activated).
When the above three conditions are satisfied simultaneously, it is determined that the stop is possible. Otherwise, it is determined that it cannot be stopped.
If it can be stopped, the process proceeds to step S306, and if this is not possible, this process is repeated until it is determined that it is possible.

  In step S306, the arithmetic control unit 323 changes the task assignment so that the tasks A to D are processed by the first CPU core 310a.

  In step S307, the core switching unit 321 stops the second CPU core 310b.

  In step S308, it is confirmed whether a preset time has elapsed (here, 10 ms) since the CPU core switching notification is received. When it has not elapsed, the process proceeds to step S305, and when it has elapsed, the process is terminated.

  The engine control device 300 starts and stops the second CPU core 310b in accordance with the notification of the start and stop of the second CPU core 310b notified in this way, and changes the assignment of tasks to the CPU core to perform arithmetic processing. Will be carried out.

The operation related to the process of starting and stopping the CPU core in the engine control apparatus 300 having such a configuration will be described with reference to the time chart of FIG.
In FIG. 5, t is a time unit, and a first time interval (period) T0 is configured from time t00 to time t10, and a first time interval (period) T1 is configured from time t10 to time t20.
Further, it is assumed that the second CPU core 310b is stopped during the period T0 in the present embodiment.

At time t00, the switching control unit 223 of the meter control device 200 confirms how many times the processing related to the determination of starting and stopping the CPU core in the first period T0 has been performed (step S200). Here, since this is the first processing, the information collection unit 212 determines the engine speed from the engine control device 300, the brake pedal operation amount from the brake control device 400, and the shift position from the transmission control device 450. Are collected (step S201), and the processing related to the determination of starting and stopping the CPU core is terminated. here,
The engine speed is 3500 rpm,
Brake pedal operation amount is 20%,
Shift position is “3”
Suppose that

  At time t01, the switching control unit 223 of the meter control device 200 confirms how many times the processing related to the CPU core activation / determination determination in the first period T0 has been performed (step S200). Here, the processing is continued for the second processing.

Then, the information collection unit 212 collects the engine speed from the engine control device 300, the brake pedal operation amount from the brake control device 400, and the shift position from the transmission control device 450 (step S202).
The engine speed is 3500 rpm,
Brake pedal operation amount is 65%,
Shift position is “3”
Suppose that

Furthermore, the vehicle state estimation part 220 judges from the acquired various information, and estimates the vehicle state of the following 1st period T1. Here, the engine speed “2000 rpm to 4000 rpm” in the vehicle state estimation map of FIG.
Brake pedal operation variation “10% -65%”,
Shift position “≧ 2”
Therefore, it is determined that the vehicle state is “state 2 (deceleration with downshift)” (there is a possibility of an increase in the engine speed and the processing load on the engine control device 300 increases) (step S203). ).

  Further, the information collection unit 212 collects the current processing load of the second microcomputer 310 from the engine control device 300. Here, it is assumed that the processing load is 60% and the second CPU core 310b is in a stopped state (step S204).

The switching execution determination unit 222 also
The second CPU core 310b is not activated,
The current processing load of the second microcomputer 310 of the engine control device 300 is 60%;
The vehicle state of the next first period estimated by the vehicle state estimation unit 220 is “state 2”;
Thus, it is determined that the second CPU core 310b in the second microcomputer 310 of the engine control apparatus 300 in the next first period is necessary (step S205).

  Next, the switching control unit 223 determines whether notification is necessary or not based on the number of executions of processing related to determination of CPU core activation / deactivation (step S206). Here, since it is the second time, it is determined that notification is unnecessary, and the process is terminated.

  At t02, the switching control unit 223 of the meter control device 200 confirms how many times the processing related to the CPU core activation / deactivation determination in the first period T0 has been performed (step S200). Here, since it is the third time, it is determined whether notification is necessary or not, but since it is less than the preset five times, the processing is terminated (step S206).

  Since time t03 is the same as time t02, the description thereof is omitted.

  At time t04, the switching control unit 223 of the meter control device 200 confirms how many times the processing related to the determination of the CPU core activation / deactivation in the first period T0 has been performed (step S200). Here, since it is the fifth time, the necessity of notification is determined. In step S206, it is determined that notification is necessary.

  Since it is determined that the second CPU core 310 b is necessary, the core switching instruction unit 221 notifies the engine control device 300 of the activation of the second CPU core 310 b via the communication line 150.

Next, the engine control apparatus 300 that receives the notification starts a process for starting and stopping the second CPU core 310b.
Then, the switching execution determination unit 320 confirms that the notification content is an activation notification (step S300). Then, it waits until the tasks C and D of the first CPU core 310a become idle (not activated), and determines that the second CPU core 310b can be activated when it becomes idle (not activated).

  Next, the core switching unit 321 activates the second CPU core 310b (step S302), and the arithmetic control unit 323 changes the task assignment so that the tasks C and D are processed by the second CPU core 310b. (Step S303).

  From time t05 to t09, the number of times the switching control unit 223 performs the process is 3 times or more, and since it is not the fifth time, it is not necessary to notify the CPU core switching. (Step S200, Step S206).

At time t10, the switching control unit 223 of the meter control device 200 confirms how many times the processing related to the determination of the CPU core activation / deactivation in the first period T1 has been performed (step S200). Here, since it is the first process, the information collection unit 212 collects the brake pedal operation amount and the like from the brake control device 400 (step S201), and ends the process related to the determination of the CPU core activation / deactivation. Here, it is assumed that the brake pedal operation amount is 20% (not shown).
After time t11, the processing is the same as that in the first period T0, and thus description thereof is omitted.

  In this way, the meter control device 200 receives the engine speed obtained from the engine control device 300, the brake pedal operation amount obtained from the brake control device 400, and the shift position obtained from the transmission control device 450 after the first period. Estimating the vehicle state, taking into account the processing load of the second microcomputer 310 of the current engine control device 300, determining the activation of the second CPU core 310b of the second microcomputer 310, and notifying the engine control device 300 To do. The engine control apparatus 300 that has received the notification activates the second CPU core 310b, which is another CPU core of the second microcomputer, before the processing load may increase with a change in the vehicle state. The processing can be transferred to the second CPU core 310b that has activated the task that has been processed, so that the processing load can be increased.

  In such a control system, even when the processing load changes momentarily according to the situation inside and outside of the vehicle, information and the driver's operation, the brake control system that can obtain a large amount of situation and information inside and outside the vehicle, for example, The vehicle state is estimated from the operation amount. For example, the engine control device includes a multi-core microcomputer equipped with a plurality of CPU cores. The meter control device determines the necessity of a CPU core that can withstand a processing load that occurs in response to a change in the vehicle state in the engine control device, and instructs the engine control device to switch the CPU core. In response to the instruction, the engine control device switches the start and stop of the CPU core in accordance with the instruction, and switches the start and stop of the CPU core in preparation for the increase or decrease of the processing load in consideration of the vehicle state at an optimal timing. Can be implemented.

That is, even when the processing load changes momentarily according to the situation inside and outside the vehicle, information, and the operation of the driver, the first control device estimates the vehicle state from the obtained information, and is the second target to be switched. Determining the necessity of the CPU core so as to be able to withstand the processing load caused by the change of the vehicle state in the control device, and instructing the second control device to switch the CPU core after the first switching time. Can do.
In response to the instruction, the second control device switches activation / deactivation of the CPU core in accordance with the instruction to switch the activation / deactivation of the CPU core in preparation for the increase / decrease of the processing load in consideration of the vehicle state. Can be implemented.

Embodiment 2. FIG.
The configuration of the control system and the operation of the meter control device 200 according to the second embodiment of the present invention are basically the same as those described with reference to FIGS.

Hereinafter, the flow of execution processing for starting and stopping the second CPU core 310b in the engine control apparatus 300 will be described with reference to FIG. This execution process is performed every time the engine control device 300 receives a CPU core switching notification from the meter control device 200.
When the second CPU core 310b is stopped, all tasks (tasks A to D) are all processed by the first CPU core 310a, and the second CPU core 310b is activated. If so, the first CPU core 310a performs task A and task B, and the second CPU core 310b performs task C and task D.

  In FIG. 6, the processes with the same reference numerals as the processes shown in FIG.

In step S600, the switching execution determination unit 320 starts measuring the elapsed time after the CPU core switching notification from the meter control device 200.
In step S601, when the switching execution determination unit 320 confirms that the second CPU core 310b can be activated, in step S601, the switching execution determination unit 320 checks the elapsed time after notification. When the elapsed time exceeds the second switching time (here, 1 ms), the process proceeds to step S302, and when it has not elapsed, the process stays at step S601.

  Similarly, in step S602, switching execution determination unit 320 confirms the elapsed time after notification. When the elapsed time exceeds the second switching time (here, 1 ms), the process proceeds to step S306, and when it has not elapsed, the process stays at step S602.

  In step S603, the switching execution determining unit 320 stops counting the elapsed time after the notification and clears the measured time.

  By doing so, the engine control device 300 starts and stops the second CPU core 310b at a predetermined timing while following the notified start and stop notification of the second CPU core 310b. It is possible to change the assignment of tasks to the CPU core and perform arithmetic processing.

  In such a control system, even when the processing load changes momentarily according to the situation inside and outside the vehicle, information and the driver's operation, the brake operation obtained in the meter control device that can obtain a lot of information inside and outside the vehicle. The vehicle state after a preset time is estimated from the amount, the necessity of the CPU core is determined so that it can withstand the processing load caused by the change of the vehicle state in the engine control device to be switched, and the engine Instructing the controller to switch the CPU core, the engine controller that received the instruction considers its own timing and switches the start and stop of the CPU core according to the instruction, taking into account the vehicle state at the optimal timing. In preparation for the increase or decrease in the processing load, the CPU core can be switched between start and stop.

That is, even when the processing load changes momentarily according to the situation inside and outside the vehicle, information and the operation of the driver, the first control device estimates the vehicle state after a preset time from the obtained information, Determining the necessity of the CPU core so that it can withstand the processing load caused by the change in the vehicle state in the second control device to be switched, and instructing the second control device to switch the CPU core Can do.
The second control device that has received the instruction switches the start and stop of the CPU core according to the instruction at its own timing after the second switching time, thereby increasing or decreasing the processing load in consideration of the vehicle state at the optimal timing. In preparation for this, the CPU core can be switched between starting and stopping.

Embodiment 3 FIG.
FIG. 7 is a configuration diagram of a control system according to Embodiment 3 of the present invention. A control system for switching activation and deactivation of a CPU core of a multi-core microcomputer according to Embodiment 3 of the present invention includes an engine control device (second control device) 300, a meter control device (first control device) 200, The brake control device 400 and the transmission control device 450 are configured. In FIG. 7, the components having the same reference numerals as those shown in FIG. 1 are the same.

The configuration of the meter control device 200 will be described. The meter control device 200 is provided with a third switching time determination unit 700 in addition to the configuration of FIG.
The third switching time determination unit 700 determines the time until the engine control device 300 actually switches after receiving the start / stop notification of the second CPU core 310b via the communication line 150.

  Next, with reference to FIG. 8, the flow of processing in the meter control device 200 for estimating the processing load of the engine control device 300 from the information in the vehicle and determining whether to start or stop the CPU core will be described. In the meter control device 200, the process shown in the flowchart of FIG. 8 is performed twice or more at each first time interval, and the second microcomputer 310 of the engine control device 300 in the second first time interval performs the second process. It is determined whether the CPU core 310b is switched. Here, the first time interval is 10 ms, and the number of executions is 10 times.

  In FIG. 8, the processes with the same reference numerals as the processes shown in FIG.

  In step S800, the third switching time determination unit 700 waits until the core switching unit 321 of the engine control device 300 starts and stops the second CPU core 310b after notification of starting and stopping the second CPU core 310b. The third switching time (here, 1 ms) is determined.

  In step S801, when it is determined that the second CPU core 310b is necessary, the core switching instruction unit 221 notifies the engine control device 300 of the activation of the second CPU core 310b and the third switching time to the communication line. Notification via 150. If it is determined that it is unnecessary, the engine control device 300 is notified of the stop of the second CPU core 310b and the third switching time via the communication line 150.

  As described above, the meter control device 200 determines the start and stop of the second CPU core 310b of the engine control device 300, and notifies the time until switching between the start and stop.

  Next, the flow of execution processing for starting and stopping the second CPU core 310b in the engine control apparatus 300 will be described with reference to FIG.

  This execution process is performed every time the engine control device 300 receives a CPU core switching notification from the meter control device 200. When the second CPU core 310b is stopped, all tasks (tasks A to D) are all processed by the first CPU core 310a, and the second CPU core 310b is activated. If so, the first CPU core 310a performs task A and task B, and the second CPU core 310b performs task C and task D.

  In FIG. 9, the processes with the same reference numerals as the processes shown in FIG.

In step S900, the switching execution determination unit 320 confirms whether the CPU core switching notification is a startup notification of the second CPU core 310b or a stop notification. Also, the third switching time notified at the same time is confirmed. Here, it is set to 1 ms.
If it is a start notification, the process proceeds to step S301. If it is a stop notification, the process proceeds to step S305.

  In step S901, the switching execution determining unit 320 confirms the elapsed time after notification. When the elapsed time exceeds the third switching time, the process proceeds to step S302, and when it has not elapsed, the process stays at step S901.

  Similarly, in step S902, the switching execution determination unit 320 confirms the elapsed time after notification. When the elapsed time exceeds the third switching time, the process proceeds to step S306, and when it has not elapsed, the process stays at step S902.

  The engine control device 300 starts and stops the second CPU core 310b and changes the assignment of tasks to the CPU core according to the time until the start and stop notification and switching of the second CPU core 310b notified in this way. Thus, the arithmetic processing is performed.

  Note that the third switching time is not a fixed value and can be changed according to the vehicle state at that time. For example, even if it is determined that the vehicle state is “state 2” (the engine speed may be increased, the processing load of the engine control device 300 increases), the amount of change in the brake operation amount is further divided. By changing to the third switching time according to the amount of change, it is possible to change the time until switching, and when the amount of change is larger, it is possible to make an emergency response such as shortening the switching time.

  In such a control system, even when the processing load changes momentarily according to the situation inside and outside the vehicle, information and the driver's operation, the brake operation obtained in the meter control device that can obtain a lot of information inside and outside the vehicle. The vehicle state after a preset time is estimated from the amount, the necessity of the CPU core is determined so that it can withstand the processing load caused by the change of the vehicle state in the engine control device to be switched, and the engine Instructing the controller to switch the CPU core and the time until switching, the engine controller that received the instruction switches the start and stop of the CPU core according to the instruction after the third time, so that the vehicle status The CPU core can be switched between start and stop in preparation for an increase or decrease in processing load in consideration of the above.

That is, even when the processing load changes momentarily according to the situation inside and outside the vehicle, information and the operation of the driver, the first control device estimates the vehicle state after a preset time from the obtained information, The CPU core required for the processing load generated by the change of the vehicle state in the second control device to be switched and the time until the switching are determined, and the second control device until the CPU core is switched and switched. A third switching time can be indicated.
The second control device receiving the instruction considers the vehicle state at an optimal timing by switching the start and stop of the CPU core according to the instruction after the third switching time instructed by the first control device. In preparation for an increase or decrease in processing load, the CPU core can be switched between starting and stopping.

Embodiment 4 FIG.
FIG. 10 is a configuration diagram of a control system according to Embodiment 4 of the present invention. A control system for switching activation and deactivation of a CPU core of a multi-core microcomputer according to Embodiment 4 of the present invention includes an engine control device (second control device) 300, a meter control device (first control device) 200, The brake control device 400 and the transmission control device 450 are configured. 10, components having the same reference numerals as the components shown in FIG. 1 are the same.

The configuration of the engine control device 300 will be described. The engine control device 300 is provided with a failure detection unit 1000 in addition to the configuration of FIG.
The failure detection unit 1000 detects whether there is a failure, a phenomenon that is a sign of failure, or a failure that has already been recovered in the engine control apparatus 300.

  The meter control device 200 estimates the processing load of the engine control device 300 from the information in the vehicle, and the flow of the CPU core activation / deactivation switching determination process is the same as in FIG. Omitted.

Next, referring to FIG. 11, the flow of execution processing for starting and stopping the second CPU core 310b in the engine control apparatus 300 will be described.
This execution process is performed every time the engine control device 300 receives a CPU core switching notification from the meter control device 200. When the second CPU core 310b is stopped, all tasks (tasks A to D) are all processed by the first CPU core 310a, and the second CPU core 310b is activated. If so, the first CPU core 310a performs task A and task B, and the second CPU core 310b performs task C and task D.

  In FIG. 11, the processes with the same reference numerals as the processes shown in FIG.

  In step S <b> 1101, the failure detection unit 1000 detects whether there is a failure, a phenomenon that indicates a failure, or a failure that has already been recovered in the engine control apparatus 300. Here, if a failure is detected, the process is terminated and the second CPU core 310b is not started or stopped. If no failure is detected, the process proceeds to step S300.

  In this way, when a failure is detected in the engine control device 300, the activation and stop of the core are not switched, and the activation of the second CPU core 310b notified only when no failure is detected, In accordance with the stop notification, the engine control device 300 can start and stop the second CPU core 310b, change the assignment of tasks to the CPU core, and perform arithmetic processing.

  In such a control system, even when the processing load changes momentarily according to the situation inside and outside the vehicle, information and the driver's operation, the brake operation obtained in the meter control device that can obtain a lot of information inside and outside the vehicle. The vehicle state after a preset time is estimated from the amount, the necessity of the CPU core is determined so that it can withstand the processing load caused by the change of the vehicle state in the engine control device to be switched, and the engine The engine control device instructed to switch the CPU core to the control device, and considering the failure status of itself, the engine control device switches the start and stop of the CPU core and performs arithmetic processing, so that the vehicle can be The CPU core can be switched between starting and stopping in preparation for increase or decrease in processing load in consideration of the state.

That is, even when the processing load changes momentarily according to the situation inside and outside the vehicle, information and the operation of the driver, the first control device estimates the vehicle state after a preset time from the obtained information, Determining the necessity of the CPU core so that it can withstand the processing load caused by the change in the vehicle state in the second control device to be switched, and instructing the second control device to switch the CPU core Can do.
In response to the instruction, the second control device switches the start and stop of the CPU core in accordance with the instruction only when there is no failure in itself, so that the CPU can be prepared for increase or decrease in processing load in consideration of the vehicle state at an optimal timing. The core can be switched between starting and stopping.

  In Embodiment 1-4 described above, the brake operation amount, the engine speed, and the shift position, which are the operations of the driver, have been described as input information, but this is for simplifying the description. The estimation method is not limited to this. If one or more pieces of information directly collected and held by the first control device, such as a steering wheel angle obtained from the steering control device, is used in combination, the vehicle state can be estimated more accurately and the same effect can be obtained. .

  In Embodiment 1-4 above, failure information of another control device may be collected as input information, and when the other control device is faulty, it may be determined that the processing load of the control device increases as a vehicle state. . In this way, the CPU core can be switched between starting and stopping at an optimal timing in consideration of the influence of the failure of another control device.

  Furthermore, in Embodiment 1-4 described above, not only vehicle information but also forecast information related to the environment such as weather and wind speed is collected from each sensor (not shown) as input information, and wind speed such as rain and snow becomes stronger. When the vehicle behavior is likely to become unstable and additional processing for stabilization may occur, it may be determined that the processing load of the control device increases as the vehicle state. In this way, the CPU core can be switched between starting and stopping at an optimal timing in consideration of not only the information in the vehicle but also the influence of the environment outside the vehicle.

In the description of each of the above embodiments, the control devices of the control system are connected by a communication line. However, the present invention is a control system in which the control devices are connected to be communicable via a network regardless of wired or wireless. If so, it is applicable.
Further, the present invention is not limited to the above embodiments, and includes all possible combinations thereof.

150 communication lines, 200 meter control device, 201 meter unit,
210 first microcomputer, 211 first storage device, 212 information collecting unit,
213 first communication unit, 220 vehicle state estimation unit, 221 core switching instruction unit,
222 switching execution determination unit, 223 switching control unit, 300 engine control device,
301 engine unit, 310a first CPU core,
310b second CPU core, 310 second microcomputer, 311 second storage device,
312 Second communication unit, 320 switching execution determination unit, 321 core switching unit,
323 arithmetic control unit, 400 brake control device,
450 transmission control device, 700 third switching time determination unit,
1000 Fault detection unit.

Claims (9)

A plurality of different control objects each including a first control device provided with a first microcomputer and a second control device provided with a second microcomputer composed of a multi-core microcomputer equipped with a plurality of CPU cores A control system in which a control device is communicably connected via a network,
The first control device includes the first microcomputer.
An information collection unit that collects information on each control target of the plurality of control devices and state information of the second microcomputer;
A state estimating unit for estimating a control state of the second control device after a preset time according to the information collected by the information collecting unit;
A switching execution determination unit that determines whether or not activation switching of the plurality of CPU cores of the second control device is necessary based on the information collected by the information collection unit and the estimation result of the state estimation unit;
A core switching instructing unit for instructing the second control unit to start switching the CPU core according to the CPU core activation switching determination result of the switching execution determining unit;
Including
The second control device includes the second microcomputer.
A switching execution determination unit that determines whether or not the CPU core can be switched based on the state of the second microcomputer when receiving an instruction to start switching from the first control device;
A core switching unit that switches start and stop of the CPU core when the switching execution determining unit determines that switching is possible;
An arithmetic control unit for adjusting the allocation of arithmetic processing in each CPU core;
Including the control system.   The first control device causes the core switching instruction unit to instruct the CPU core activation switching after a first switching time when the switching execution determining unit determines that the CPU core activation switching is necessary. The control system according to claim 1, further comprising a switching control unit.   2. The core switching unit performs CPU core switching after a second switching time when the switching execution determination unit of the second control device receives a start switching instruction from the first control device. The control system described in. The first control device includes a third switching time determining unit that determines a third switching time from the information collected by the information collecting unit,
The core switching instruction unit sends the third switching time together with an instruction to start the CPU core to the second controller.
The control system according to claim 1, wherein the switching execution determination unit of the second control device causes the core switching unit to perform CPU core switching after the third switching time. The second control device includes a failure detection unit that detects a failure of the control device of itself and an indication of failure,
2. The control system according to claim 1, wherein the switching execution determination unit does not switch activation of the CPU core when the failure detection unit detects a failure.   The control system according to any one of claims 1 to 5, wherein the information collection unit of the first control device collects failure information of another control device connected to the network. The plurality of control devices are control devices for different control objects of the same vehicle, and in the first control device,
The information collection unit collects the state of the vehicle,
The state estimation unit estimates the state of the vehicle;
The control system according to any one of claims 1 to 6. The plurality of control devices are control devices for different control objects of the same vehicle, and in the first control device,
The information collection unit collects information on the environment outside the vehicle and road information,
The state estimating unit estimates the state of the vehicle from the environment outside the vehicle and road information;
The control system according to any one of claims 1 to 7. A plurality of different control objects each including a first control device provided with a first microcomputer and a second control device provided with a second microcomputer composed of a multi-core microcomputer equipped with a plurality of CPU cores In a control system in which control devices are communicably connected via a network,
By the first microcomputer of the first control device,
Collecting information of each control target of the plurality of control devices and status information of the second microcomputer,
According to the collected control target information and the second microcomputer state information, the control state of the second control device after a preset time is estimated,
Based on the collected control target information and the state information of the second microcomputer and the estimation result, it is determined whether or not it is necessary to switch activation of the plurality of CPU cores of the second control device,
Instructing the second control device to start CPU core switching according to the CPU core startup switching determination result,
By the second microcomputer of the second control device,
When receiving a start switching instruction from the first control device, it is determined whether the CPU core can be switched from the state of the second microcomputer,
When it is determined that switching is possible, the CPU core is switched between start and stop,
Adjust the allocation of arithmetic processing in each CPU core,
A control method in a control system.

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