JP2016173910A - Semiconductor device - Google Patents

Semiconductor device Download PDF

Info

Publication number
JP2016173910A
JP2016173910A JP2015052711A JP2015052711A JP2016173910A JP 2016173910 A JP2016173910 A JP 2016173910A JP 2015052711 A JP2015052711 A JP 2015052711A JP 2015052711 A JP2015052711 A JP 2015052711A JP 2016173910 A JP2016173910 A JP 2016173910A
Authority
JP
Japan
Prior art keywords
connection
terminal
circuit board
semiconductor device
receptacle
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2015052711A
Other languages
Japanese (ja)
Inventor
渡辺 章雄
Akio Watanabe
章雄 渡辺
量平 山口
Ryohei Yamaguchi
量平 山口
雅之 土肥
Masayuki Doi
雅之 土肥
拓 西山
Taku Nishiyama
拓 西山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP2015052711A priority Critical patent/JP2016173910A/en
Priority to CN201811378808.8A priority patent/CN109616802B/en
Priority to CN201610141749.7A priority patent/CN105990725B/en
Publication of JP2016173910A publication Critical patent/JP2016173910A/en
Pending legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01RELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
    • H01R13/00Details of coupling devices of the kinds covered by groups H01R12/70 or H01R24/00 - H01R33/00
    • H01R13/02Contact members
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01RELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
    • H01R12/00Structural associations of a plurality of mutually-insulated electrical connecting elements, specially adapted for printed circuits, e.g. printed circuit boards [PCB], flat or ribbon cables, or like generally planar structures, e.g. terminal strips, terminal blocks; Coupling devices specially adapted for printed circuits, flat or ribbon cables, or like generally planar structures; Terminals specially adapted for contact with, or insertion into, printed circuits, flat or ribbon cables, or like generally planar structures
    • H01R12/50Fixed connections
    • H01R12/51Fixed connections for rigid printed circuits or like structures
    • H01R12/55Fixed connections for rigid printed circuits or like structures characterised by the terminals
    • H01R12/57Fixed connections for rigid printed circuits or like structures characterised by the terminals surface mounting terminals
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01RELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
    • H01R12/00Structural associations of a plurality of mutually-insulated electrical connecting elements, specially adapted for printed circuits, e.g. printed circuit boards [PCB], flat or ribbon cables, or like generally planar structures, e.g. terminal strips, terminal blocks; Coupling devices specially adapted for printed circuits, flat or ribbon cables, or like generally planar structures; Terminals specially adapted for contact with, or insertion into, printed circuits, flat or ribbon cables, or like generally planar structures
    • H01R12/70Coupling devices
    • H01R12/71Coupling devices for rigid printing circuits or like structures
    • H01R12/712Coupling devices for rigid printing circuits or like structures co-operating with the surface of the printed circuit or with a coupling device exclusively provided on the surface of the printed circuit
    • H01R12/716Coupling device provided on the PCB
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01RELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
    • H01R13/00Details of coupling devices of the kinds covered by groups H01R12/70 or H01R24/00 - H01R33/00
    • H01R13/46Bases; Cases
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01RELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
    • H01R43/00Apparatus or processes specially adapted for manufacturing, assembling, maintaining, or repairing of line connectors or current collectors or for joining electric conductors
    • H01R43/16Apparatus or processes specially adapted for manufacturing, assembling, maintaining, or repairing of line connectors or current collectors or for joining electric conductors for manufacturing contact members, e.g. by punching and by bending
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01RELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
    • H01R43/00Apparatus or processes specially adapted for manufacturing, assembling, maintaining, or repairing of line connectors or current collectors or for joining electric conductors
    • H01R43/20Apparatus or processes specially adapted for manufacturing, assembling, maintaining, or repairing of line connectors or current collectors or for joining electric conductors for assembling or disassembling contact members with insulating base, case or sleeve
    • H01R43/24Assembling by moulding on contact members

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Coupling Device And Connection With Printed Circuit (AREA)
  • Details Of Connecting Devices For Male And Female Coupling (AREA)

Abstract

PROBLEM TO BE SOLVED: To suppress occurrence of a connection failure when an information apparatus and a peripheral device are connected with each other by means of USB.SOLUTION: A semiconductor device that enables data transfer by USB by being connected with a receptacle, comprises: a circuit board that has a wiring board with a plurality of connection pads, and a semiconductor component mounted on the wiring board; and a terminal part provided on the circuit board. The terminal part comprises: a terminal member that has a first connection part connectable with the receptacle, a tail part provided at an end part, and a junction part for joining the first connection part and the tail part; and an insulation member that holds at least a part of the junction part. The junction part has a second connection part exposed from the insulation member to the circuit board side, and electrically connected with at least one of the plurality of connection pads.SELECTED DRAWING: Figure 1

Description

実施形態の発明は、半導体装置に関する。   The present invention relates to a semiconductor device.

コンピュータ等の情報機器と周辺機器とを接続する際の接続規格の一つとしてUSB(Universal Serial Bus:USB)が知られている。例えば、オスコネクタ(プラグともいう)およびメスコネクタ(レセプタクルともいう)を用いたUSBコネクタにより情報機器と周辺機器とを接続することにより、データの転送が可能になるだけでなく、例えば情報機器から周辺機器の動作に必要な電源を得ることや、USBハブを介して複数の機器を接続することもできる。   USB (Universal Serial Bus: USB) is known as one of the connection standards for connecting information devices such as computers and peripheral devices. For example, by connecting an information device and a peripheral device with a USB connector using a male connector (also referred to as a plug) and a female connector (also referred to as a receptacle), it is possible not only to transfer data, but also from, for example, an information device It is also possible to obtain a power source necessary for the operation of peripheral devices and to connect a plurality of devices via a USB hub.

USB規格の一つであるUSB3.0では、USB2.0との互換性を保ちながら、USB2.0の10倍以上の転送速度を有する高速転送を行うことが可能である。USB3.0のUSBコネクタでは、USB2.0のUSBコネクタに設けられた4つの接続端子に加え、5つの接続端子が必要になる。USB3.0のUSBコネクタでは、例えばプラグを具備する半導体装置において、配線基板自体に接続端子の形成スペースを確保することが困難となる。   With USB 3.0, which is one of the USB standards, it is possible to perform high-speed transfer having a transfer speed 10 times or more that of USB 2.0 while maintaining compatibility with USB 2.0. The USB 3.0 USB connector requires five connection terminals in addition to the four connection terminals provided on the USB 2.0 USB connector. With a USB 3.0 USB connector, for example, in a semiconductor device having a plug, it is difficult to secure a space for forming a connection terminal on the wiring board itself.

USB3.0のプラグを具備する半導体装置では、例えば接続端子として機能する端子部材を有する端子部品を配線基板上に搭載する場合がある。上記端子部材は、絶縁部材により保護され、レセプタクルとの接続が可能なレセプタクル接続部と、端部に設けられたテール部と、レセプタクル接続部とテール部とを連接する連接部とを有する。配線基板が有する接続パッドと端子部材のテール部とを接続することにより、端子部材と配線基板との間を電気的に接続することができる。   In a semiconductor device having a USB 3.0 plug, for example, a terminal component having a terminal member functioning as a connection terminal may be mounted on a wiring board. The terminal member includes a receptacle connecting portion that is protected by an insulating member and can be connected to a receptacle, a tail portion provided at an end portion, and a connecting portion that connects the receptacle connecting portion and the tail portion. By connecting the connection pad of the wiring board and the tail part of the terminal member, the terminal member and the wiring board can be electrically connected.

しかしながら、端子部材のテール部と配線基板の接続パッドとを接続する場合、テール部に不要な負荷がかかりやすく、接続不良が起こる場合がある。このように、USBによるデータ転送が可能な半導体装置では、接続不良の発生を抑制することが求められている。   However, when the tail portion of the terminal member and the connection pad of the wiring board are connected, an unnecessary load is easily applied to the tail portion, and connection failure may occur. As described above, a semiconductor device capable of data transfer by USB is required to suppress the occurrence of connection failure.

特許第5144714号Japanese Patent No. 5144714

実施形態の発明が解決しようとする課題は、USBにより外部機器との接続が可能な接続端子と回路基板との接続不良の発生を抑制することである。   The problem to be solved by the invention of the embodiment is to suppress the occurrence of poor connection between a connection terminal that can be connected to an external device by USB and a circuit board.

実施形態の半導体装置は、レセプタクルと接続することによりUSBによるデータ転送が可能な半導体装置であって、複数の接続パッドを有する配線基板と、配線基板に搭載された半導体部品とを備える回路基板と、回路基板上に設けられた端子部と、を具備する。端子部は、レセプタクルとの接続が可能な第1の接続部と、端部に設けられたテール部と、第1の接続部とテール部とを連接する連接部と、を有する端子部材と、少なくとも連接部の一部を保持する絶縁部材と、を備える。連接部は、絶縁部材から回路基板側に露出し、かつ複数の接続パッドの少なくとも一つに電気的に接続された第2の接続部を有する。   A semiconductor device according to an embodiment is a semiconductor device capable of transferring data by USB by connecting to a receptacle, and includes a circuit board having a plurality of connection pads and a semiconductor component mounted on the wiring board; And a terminal portion provided on the circuit board. The terminal portion includes a first connecting portion that can be connected to the receptacle, a tail portion provided at an end portion, and a connecting member that connects the first connecting portion and the tail portion; And an insulating member that holds at least a part of the connecting portion. The connecting portion has a second connecting portion exposed from the insulating member to the circuit board side and electrically connected to at least one of the plurality of connecting pads.

半導体装置の構造例を示す断面模式図である。It is a cross-sectional schematic diagram which shows the structural example of a semiconductor device. 半導体装置の構造例を示す上面模式図である。It is an upper surface schematic diagram which shows the structural example of a semiconductor device. 端子部の表面を示す外観模式図である。It is an external appearance schematic diagram which shows the surface of a terminal part. 端子部の裏面の一部を示す外観模式図である。It is an external appearance schematic diagram which shows a part of back surface of a terminal part. 端子部の拡大図である。It is an enlarged view of a terminal part. 端子部の他の構造例を示す断面模式図である。It is a cross-sectional schematic diagram which shows the other structural example of a terminal part. 端子部の他の構造例を示す断面模式図である。It is a cross-sectional schematic diagram which shows the other structural example of a terminal part. 端子部の他の構造例を示す断面模式図である。It is a cross-sectional schematic diagram which shows the other structural example of a terminal part. 図8に示す端子部の上面模式図である。FIG. 9 is a schematic top view of the terminal portion shown in FIG. 8. 端子部の製造方法例を説明するための上面模式図である。It is an upper surface schematic diagram for demonstrating the example of the manufacturing method of a terminal part. 端子部の製造方法例を説明するための上面模式図である。It is an upper surface schematic diagram for demonstrating the example of the manufacturing method of a terminal part. 半導体装置の他の構造例を示す断面模式図である。It is a cross-sectional schematic diagram which shows the other structural example of a semiconductor device.

以下、実施形態について、図面を参照して説明する。なお、図面は模式的なものであり、例えば厚さと平面寸法との関係、各層の厚さの比率等は現実のものとは異なる場合がある。また、実施形態において、実質的に同一の構成要素には同一の符号を付し説明を省略する。   Hereinafter, embodiments will be described with reference to the drawings. The drawings are schematic, and for example, the relationship between the thickness and the planar dimensions, the ratio of the thickness of each layer, and the like may be different from the actual ones. In the embodiments, substantially the same constituent elements are denoted by the same reference numerals and description thereof is omitted.

図1および図2は、レセプタクルと接続することによりUSB3.0によるデータ転送が可能な半導体装置の構造例を示す模式図であり、図1は断面模式図であり、図2は上面模式図である。図1および図2では、一例としてSiP(System in a Package:SiP)である回路基板を具備する半導体装置を図示している。   FIGS. 1 and 2 are schematic views showing a structure example of a semiconductor device capable of transferring data by USB 3.0 by connecting to a receptacle, FIG. 1 is a schematic sectional view, and FIG. 2 is a schematic top view. is there. 1 and 2 illustrate a semiconductor device including a circuit board that is a SiP (System in a Package: SiP) as an example.

図1および図2に示す半導体装置10は、筐体1と、回路基板2と、端子部3とを具備する。筐体1は、非貫通穴である開口部11を備える。筐体1は、絶縁性を有し、例えばポリ塩化ビニル等の合成樹脂等により形成される。例えば、溝部を有し、合成樹脂を用いて成形された一対の筐体部材を溝部が向かい合うように貼り合わせることにより開口部11を有する筐体1を形成してもよい。なお、筐体1の形状は、図1に示す形状に限定されない。例えば、回路基板2の全てに重畳するように筐体1を設けてもよく、また回路基板2において筐体1から突出する部分を保護するキャップとしての機能を有する筐体を筐体1と別に設けてもよい。   A semiconductor device 10 shown in FIGS. 1 and 2 includes a housing 1, a circuit board 2, and a terminal portion 3. The housing 1 includes an opening 11 that is a non-through hole. The housing 1 has an insulating property and is formed of, for example, a synthetic resin such as polyvinyl chloride. For example, you may form the housing | casing 1 which has the opening part 11 by bonding together a pair of housing | casing member which has a groove part and was shape | molded using the synthetic resin so that a groove part may face. The shape of the housing 1 is not limited to the shape shown in FIG. For example, the casing 1 may be provided so as to overlap with the entire circuit board 2, and a casing having a function as a cap for protecting a portion protruding from the casing 1 in the circuit board 2 is separated from the casing 1. It may be provided.

回路基板2は、例えば開口部11に設けられる。回路基板2は、筐体1により固定されていることが好ましい。なお、回路基板2は、第1の面と第1の面に対して反対側の第2の面とを有する配線基板21と、配線基板21の第1の面に搭載されたメモリチップ22、コントローラチップ23等の半導体部品と、半導体部品を封止する樹脂層24と、を備える。なお、メモリチップ22およびコントローラチップ23に限定されず、他の半導体部品を用いてもよい。また、メモリチップ22とコントローラチップ23との位置は逆であってもよい。   The circuit board 2 is provided, for example, in the opening 11. The circuit board 2 is preferably fixed by the housing 1. The circuit board 2 includes a wiring substrate 21 having a first surface and a second surface opposite to the first surface, a memory chip 22 mounted on the first surface of the wiring substrate 21, A semiconductor component such as a controller chip 23 and a resin layer 24 for sealing the semiconductor component are provided. Note that the present invention is not limited to the memory chip 22 and the controller chip 23, and other semiconductor components may be used. Further, the positions of the memory chip 22 and the controller chip 23 may be reversed.

配線基板21の第1の面は、図1における配線基板21の下面に相当し、第2の面は、図1における配線基板21の上面に相当する。配線基板21は、第1の面に設けられた接続パッド211aと、接続パッド211bとを少なくとも含む複数の接続パッドを有する。また、配線基板21は、第2の面に設けられた接続パッド212aと、接続パッド212bとを少なくとも含む複数の接続パッドを有する。第1の面の接続パッドは、例えば配線基板21を貫通するビアを介して第2の面の接続パッド212aと接続パッド212bとに電気的に接続される。配線基板21としては、例えば表面に設けられた接続パッドを備える配線層を有する、ガラスエポキシ等の樹脂基板等を用いることができる。   The first surface of the wiring substrate 21 corresponds to the lower surface of the wiring substrate 21 in FIG. 1, and the second surface corresponds to the upper surface of the wiring substrate 21 in FIG. The wiring board 21 has a plurality of connection pads including at least a connection pad 211a and a connection pad 211b provided on the first surface. In addition, the wiring board 21 has a plurality of connection pads including at least a connection pad 212a and a connection pad 212b provided on the second surface. The connection pad on the first surface is electrically connected to the connection pad 212a and the connection pad 212b on the second surface through vias penetrating the wiring substrate 21, for example. As the wiring board 21, for example, a resin board such as glass epoxy having a wiring layer provided with connection pads provided on the surface can be used.

接続パッド211aおよび接続パッド211bは、半導体部品と配線基板21との間を電気的に接続するための接続パッドである。接続パッド212bは、レセプタクルとの接続が可能な接続端子としての機能を有する。接続端子としては、例えば電源端子(VBUS)、差動信号である通常転送用のデータ信号のための信号端子(D+、D−)、およびグランド端子(GND)等のUSB2.0またはUSB3.0によるデータ転送に必要な接続端子が挙げられる。なお、図1において、接続パッド212bは、筐体1(開口部11)から突出するように設けられているが、これに限定されず、開口部11に収まるように接続パッド212b(回路基板2)を設けてもよい。   The connection pad 211 a and the connection pad 211 b are connection pads for electrically connecting the semiconductor component and the wiring board 21. The connection pad 212b has a function as a connection terminal that can be connected to the receptacle. As the connection terminals, for example, a power supply terminal (VBUS), a signal terminal (D +, D−) for a normal transfer data signal that is a differential signal, and a USB 2.0 or USB 3.0 such as a ground terminal (GND). The connection terminals necessary for data transfer by the above are mentioned. In FIG. 1, the connection pad 212 b is provided so as to protrude from the housing 1 (opening 11). However, the connection pad 212 b is not limited to this, and the connection pad 212 b (circuit board 2) is included in the opening 11. ) May be provided.

メモリチップ22は、接続パッド211aに電気的に接続される。メモリチップ22は、例えば複数の半導体チップの積層を有し、複数の半導体チップは、接着層を挟んで一部が重畳するように互いに接着される。複数の半導体チップは、ワイヤボンディングによりそれぞれの半導体チップに設けられた電極パッド同士を接続することにより、互いに電気的に接続される。半導体チップとしては、例えばNANDフラッシュメモリ等の記憶素子を有するメモリチップ等を用いることができる。このとき、半導体チップは、メモリセルに加え、デコーダ等を備えていてもよい。   The memory chip 22 is electrically connected to the connection pad 211a. The memory chip 22 has, for example, a stack of a plurality of semiconductor chips, and the plurality of semiconductor chips are bonded to each other so that a part thereof is overlapped with an adhesive layer interposed therebetween. The plurality of semiconductor chips are electrically connected to each other by connecting electrode pads provided on each semiconductor chip by wire bonding. As the semiconductor chip, for example, a memory chip having a storage element such as a NAND flash memory can be used. At this time, the semiconductor chip may include a decoder or the like in addition to the memory cell.

コントローラチップ23は、接続パッド211bに電気的に接続される。コントローラチップ23は、メモリチップ22に対するデータの書き込みおよびデータの読み出し等の動作を制御する。コントローラチップ23は、半導体チップにより構成され、例えばワイヤボンディングにより半導体チップに設けられた電極パッドと配線基板21に設けられた接続パッド211bとを接続することにより配線基板21に電気的に接続される。   The controller chip 23 is electrically connected to the connection pad 211b. The controller chip 23 controls operations such as data writing and data reading with respect to the memory chip 22. The controller chip 23 is composed of a semiconductor chip, and is electrically connected to the wiring board 21 by connecting electrode pads provided on the semiconductor chip and connection pads 211b provided on the wiring board 21, for example, by wire bonding. .

メモリチップ22およびコントローラチップ23と配線基板21との接続方法としては、ワイヤボンディングに限定されず、フリップチップボンディングやテープオートメーテッドボンディング等のワイヤレスボンディングを用いてもよい。また、配線基板21の第1の面にメモリチップ22とコントローラチップ23とを積層させたTSV(Through Silicon Via:TSV)方式等の3次元実装構造を用いてもよい。   The method for connecting the memory chip 22 and controller chip 23 to the wiring board 21 is not limited to wire bonding, and wireless bonding such as flip chip bonding or tape automated bonding may be used. Alternatively, a three-dimensional mounting structure such as a TSV (Through Silicon Via: TSV) system in which the memory chip 22 and the controller chip 23 are stacked on the first surface of the wiring board 21 may be used.

樹脂層24は、メモリチップ22およびコントローラチップ23を封止するように設けられる。樹脂層24は、例えば無機充填材(例えばSiO)を含有する。樹脂層24は、例えば上記無機充填材を有機樹脂等と混合した封止樹脂を用いてトランスファモールド法、コンプレッションモールド法、インジェクションモールド法等のモールド法により形成される。 The resin layer 24 is provided so as to seal the memory chip 22 and the controller chip 23. The resin layer 24 contains, for example, an inorganic filler (for example, SiO 2 ). For example, the resin layer 24 is formed by a molding method such as a transfer molding method, a compression molding method, or an injection molding method using a sealing resin obtained by mixing the inorganic filler with an organic resin or the like.

端子部3は、回路基板2上に設けられる。例えば、端子部3は、筐体1により保持される。ここで、端子部3の構造例について図3および図4を参照して説明する。図3および図4は、端子部の構造例を示す模式図であり、図3は端子部の表面を示す外観図であり、図4は端子部の裏面の一部を示す外観図である。なお、半導体装置10に端子部3を用いる場合に限定されず、端子部3を他の構造の半導体装置にも適用可能な一つの端子部品として用いてもよい。また、例えば同様の信号を用いる規格であれば、他のUSB規格によるデータ転送が可能な半導体装置に端子部3を設けてもよい。   The terminal part 3 is provided on the circuit board 2. For example, the terminal unit 3 is held by the housing 1. Here, a structural example of the terminal portion 3 will be described with reference to FIGS. 3 and 4. 3 and FIG. 4 are schematic views showing an example of the structure of the terminal portion, FIG. 3 is an external view showing the surface of the terminal portion, and FIG. 4 is an external view showing a part of the back surface of the terminal portion. In addition, it is not limited to the case where the terminal part 3 is used for the semiconductor device 10, You may use the terminal part 3 as one terminal component applicable also to the semiconductor device of another structure. For example, if the standard uses the same signal, the terminal unit 3 may be provided in a semiconductor device capable of data transfer according to another USB standard.

図4に示すように、端子部3は、端子部材31と、絶縁部材32と、を具備する。なお、図3において、5つの端子部材31を図示しているが、端子部材31の数は、特に限定されない。また、図3において、レセプタクルと接続する側の端子部材31の形状はこれに限定されない。   As shown in FIG. 4, the terminal portion 3 includes a terminal member 31 and an insulating member 32. In addition, in FIG. 3, although the five terminal members 31 are illustrated, the number of the terminal members 31 is not specifically limited. Further, in FIG. 3, the shape of the terminal member 31 on the side connected to the receptacle is not limited to this.

端子部材31は、例えばレセプタクルとの接続が可能な接続端子としての機能を有する。接続端子としては、例えば、グランド端子(GND)、差動信号である高速転送用の送信データ信号のための信号端子(SSTX+、SSTX−)、差動信号である高速転送用の受信データ信号のための信号端子(SSRX+、SSRX−)等のUSB3.0による高速転送に必要な接続端子等が挙げられる。   The terminal member 31 has a function as a connection terminal that can be connected to, for example, a receptacle. The connection terminals include, for example, a ground terminal (GND), signal terminals (SSTX +, SSTX−) for transmission data signals for high-speed transfer that are differential signals, and reception data signals for high-speed transfer that are differential signals. For example, connection terminals necessary for high-speed transfer by USB 3.0 such as signal terminals (SSRX +, SSRX−), and the like are included.

図5は、端子部3の拡大図である。図5に示すように、端子部材31は、接続部31aと、テール部31bと、連接部31cと、を有する。   FIG. 5 is an enlarged view of the terminal portion 3. As illustrated in FIG. 5, the terminal member 31 includes a connection portion 31a, a tail portion 31b, and a connecting portion 31c.

接続部31aは、例えば半導体装置10をレセプタクルに挿入した際にレセプタクルとの接続が可能な部分である。このとき、接続部31aをレセプタクル接続部ともいう。接続部31aは、接触部31dを含む。接触部31dは、例えば接続部31aの第1の面に設けられる。図5において、接続部31aは絶縁部材32から突出している。   The connecting portion 31a is a portion that can be connected to the receptacle when the semiconductor device 10 is inserted into the receptacle, for example. At this time, the connecting portion 31a is also referred to as a receptacle connecting portion. The connection part 31a includes a contact part 31d. The contact portion 31d is provided on the first surface of the connection portion 31a, for example. In FIG. 5, the connecting portion 31 a protrudes from the insulating member 32.

接触部31dは、上側が凸となる湾曲面を有することが好ましい。これにより、接触部31dとレセプタクルとの間を電気的に接続させやすくなる。また、接続部31aは、ばね性を有することが好ましい。端子部材31とレセプタクルとの接続は、端子部材31の上側で行われるため、上記構造により、レセプタクルに半導体装置10を挿入した際に、端子部材31が下側に押し込まれ、ばね性により元に戻ろうとする力がレセプタクルの接続端子に向かって加わるため、レセプタクルとの接触強度を高めることができる。   It is preferable that the contact portion 31d has a curved surface that is convex on the upper side. This facilitates electrical connection between the contact portion 31d and the receptacle. Moreover, it is preferable that the connection part 31a has springiness. Since the connection between the terminal member 31 and the receptacle is performed on the upper side of the terminal member 31, when the semiconductor device 10 is inserted into the receptacle by the above structure, the terminal member 31 is pushed downward, and the spring property is the original. Since the force to return is applied toward the connection terminal of the receptacle, the contact strength with the receptacle can be increased.

テール部31bは、例えば端子部材31の端部に設けられる。テール部31bの一端は、端子部3を形成する際の切断面を有する。テール部31bの一端は、例えば平面形状を有する。図5において、テール部31bは、絶縁部材32から突出し、かつ回路基板2と離間している。すなわち、テール部31bを回路基板2に接触させない構造にすることにより、テール部31bにかかる負荷が抑制され、端子部材31の変形を抑制することができる。   The tail part 31b is provided at the end of the terminal member 31, for example. One end of the tail part 31 b has a cut surface when the terminal part 3 is formed. One end of the tail portion 31b has a planar shape, for example. In FIG. 5, the tail portion 31 b protrudes from the insulating member 32 and is separated from the circuit board 2. That is, by adopting a structure in which the tail portion 31 b is not in contact with the circuit board 2, a load applied to the tail portion 31 b can be suppressed, and deformation of the terminal member 31 can be suppressed.

連接部31cは、接続部31aとテール部31bとを連接するように設けられる。連接部31cは、例えば図5における下側が凸となる湾曲形状を有することが好ましい。連接部31cは、絶縁部材32から回路基板2側に露出し、複数の接続パッドの少なくとも一つ(ここでは接続パッド212a)に電気的に接続された接続部311を有する。絶縁部材32により接続部311の周りを保持することにより、異物による端子部3と回路基板2との接続不良を抑制することができる。   The connecting portion 31c is provided so as to connect the connecting portion 31a and the tail portion 31b. For example, the connecting portion 31c preferably has a curved shape in which the lower side in FIG. 5 is convex. The connecting portion 31c has a connecting portion 311 exposed from the insulating member 32 to the circuit board 2 side and electrically connected to at least one of the plurality of connecting pads (here, the connecting pad 212a). By holding the periphery of the connection portion 311 with the insulating member 32, it is possible to suppress a connection failure between the terminal portion 3 and the circuit board 2 due to foreign matter.

図5において、連接部31cは、接続パッド212aに電気的に接続される。このとき、接続部311を基板接続部ともいう。連接部31cは、例えば圧着やはんだ付け等により接続パッド212aに接合されていてもよい。また、端子部材31の延在方向において、テール部31bの長さを接続部311の長さよりも短くすることにより、端子部3を小型にすることができる。   In FIG. 5, the connecting portion 31c is electrically connected to the connection pad 212a. At this time, the connection portion 311 is also referred to as a substrate connection portion. The connecting portion 31c may be joined to the connection pad 212a by, for example, pressure bonding or soldering. Further, in the extending direction of the terminal member 31, the length of the tail portion 31 b is made shorter than the length of the connection portion 311, whereby the terminal portion 3 can be reduced in size.

端子部材31としては、例えば銅合金(例えばベリリウム銅、リン青銅、コバルト銅)やニッケル合金(例えばベリリウムニッケル)等のばね性を付与することが可能な材料を用いることができる。   As the terminal member 31, for example, a material capable of imparting spring properties such as a copper alloy (for example, beryllium copper, phosphor bronze, cobalt copper) or a nickel alloy (for example, beryllium nickel) can be used.

絶縁部材32は、少なくとも連接部31cの一部を保持する。図1ないし図5において、接続部31aおよびテール部31bは、絶縁部材32から突出している。絶縁部材32としては、例えば樹脂等を用いることができる。なお、接続パッド212aと連接部31cとの間に位置する絶縁部材32の一面(図5では絶縁部材32の下面)に連続する面を接続部311に設けることにより、絶縁部材32と接続部311との段差が少なくなるため、接続部311と接続パッド212aとの接続不良を抑制することができる。   The insulating member 32 holds at least a part of the connecting portion 31c. 1 to 5, the connection portion 31 a and the tail portion 31 b protrude from the insulating member 32. As the insulating member 32, for example, a resin or the like can be used. The connecting member 311 is provided with a surface continuous with one surface of the insulating member 32 (the lower surface of the insulating member 32 in FIG. 5) located between the connection pad 212a and the connecting portion 31c. Therefore, the connection failure between the connection portion 311 and the connection pad 212a can be suppressed.

端子部3の構造は、図1ないし図5に示す構造に限定されない。図6ないし図7は、端子部3の他の構造例を示す断面模式図である。   The structure of the terminal portion 3 is not limited to the structure shown in FIGS. 6 to 7 are schematic cross-sectional views showing other structural examples of the terminal portion 3.

図6に示す端子部3は、図5に示す端子部3と比較して、絶縁部材32から突出するように設けられた接続部311を有する点が少なくとも異なる。図6において、接続部311は、絶縁部材32から回路基板2側に突出するように設けられている。このとき、端子部3と回路基板2(配線基板21)との間に接着層4を設け、接着層4により、端子部3と回路基板2(配線基板21)とを接着することが好ましい。接着層4としては、例えばアクリル系接着剤やエポキシ系接着剤を用いることができる。また、接着層4に異方性導電樹脂を用いることもできる。なお、必ずしも接着層4を設けなくてもよい。   The terminal part 3 shown in FIG. 6 is different from the terminal part 3 shown in FIG. 5 in that it has a connecting part 311 provided so as to protrude from the insulating member 32. In FIG. 6, the connecting portion 311 is provided so as to protrude from the insulating member 32 to the circuit board 2 side. At this time, it is preferable that an adhesive layer 4 is provided between the terminal portion 3 and the circuit board 2 (wiring board 21), and the terminal section 3 and the circuit board 2 (wiring board 21) are bonded by the adhesive layer 4. As the adhesive layer 4, for example, an acrylic adhesive or an epoxy adhesive can be used. An anisotropic conductive resin can also be used for the adhesive layer 4. Note that the adhesive layer 4 is not necessarily provided.

端子部3の構造を図6に示す構造にすることにより、連接部31cにおける絶縁部材32から露出する連接部31cの面積が大きいため、図5に示す端子部3よりも接続部311の面積を大きくさせやすい。接続部311の面積を大きくすることにより、端子部材31と回路基板2との接続抵抗を低くすることができ、また接続不良も起こりにくくなる。   By making the structure of the terminal portion 3 as shown in FIG. 6, the area of the connecting portion 31c exposed from the insulating member 32 in the connecting portion 31c is larger, so the area of the connecting portion 311 is larger than that of the terminal portion 3 shown in FIG. Easy to enlarge. By increasing the area of the connection portion 311, the connection resistance between the terminal member 31 and the circuit board 2 can be reduced, and poor connection is less likely to occur.

図7に示す端子部3は、図5に示す端子部3と比較して、絶縁部材32に引っ込むように設けられた接続部311を有する点、換言すると接続部311を露出させる開口部320を有する絶縁部材32を有する点が少なくとも異なる。図7では、絶縁部材32の回路基板2側に開口部320を設ける。このとき、端子部3と回路基板2(配線基板21)との間に導電層5を設け、導電層5により、端子部3と回路基板2(配線基板21)とを接続することが好ましい。また、端子部材31毎に開口部320を設け、開口部320毎に導電層5を設けることにより、複数の端子部材31は互いに電気的に分離されている。   The terminal portion 3 shown in FIG. 7 has a connection portion 311 provided so as to be retracted into the insulating member 32 as compared with the terminal portion 3 shown in FIG. 5, in other words, the opening portion 320 that exposes the connection portion 311. The difference is that at least the insulating member 32 is provided. In FIG. 7, an opening 320 is provided on the insulating substrate 32 on the circuit board 2 side. At this time, it is preferable that the conductive layer 5 is provided between the terminal portion 3 and the circuit board 2 (wiring substrate 21), and the terminal portion 3 and the circuit board 2 (wiring substrate 21) are connected by the conductive layer 5. Further, by providing the opening 320 for each terminal member 31 and providing the conductive layer 5 for each opening 320, the plurality of terminal members 31 are electrically separated from each other.

端子部3の構造を図7に示す構造にすることにより、例えば異物による端子部材31と接続パッド212aとの接続不良を抑制することができる。   By making the structure of the terminal portion 3 as shown in FIG. 7, for example, a connection failure between the terminal member 31 and the connection pad 212a due to a foreign substance can be suppressed.

導電層5としては、銅等の金属材料やはんだ等の導電材料を用いることができる。また、図6に示す接着層4に適用可能な材料に加え、導電性を有する材料(導電性フィラー等)を含む接着材料を用いてもよい。これにより、開口部320において、導電層5を介して端子部材31と回路基板2(配線基板21)との間を電気的に接続することができる。   As the conductive layer 5, a metal material such as copper or a conductive material such as solder can be used. In addition to the material applicable to the adhesive layer 4 shown in FIG. 6, an adhesive material containing a conductive material (such as a conductive filler) may be used. Thereby, in the opening part 320, the terminal member 31 and the circuit board 2 (wiring board 21) can be electrically connected via the conductive layer 5.

図5ないし図7に示す端子部3は、例えば所望の形状を有する金型を用いて絶縁部材32を形成することにより製造される。また、上記方法で端子部材31の一部を覆うように絶縁部材32を形成し、その後絶縁部材32の一部を除去することにより、接続部311を露出させてもよい。   The terminal portion 3 shown in FIGS. 5 to 7 is manufactured, for example, by forming the insulating member 32 using a mold having a desired shape. Further, the connecting portion 311 may be exposed by forming the insulating member 32 so as to cover a part of the terminal member 31 by the above method and then removing a part of the insulating member 32.

図8に示す端子部3は、図5に示す端子部3と比較して絶縁部材32の構造と半導体部品に電気的に接続された接続パッド33を有する点が少なくとも異なる。接続パッド33は、レセプタクルに接続可能な接続部33aと、接続部33bと、を有する。レセプタクルと接続する際、接続パッド212bは、直接レセプタクルに接続されず、接続部33aがレセプタクルに接続される。   The terminal part 3 shown in FIG. 8 is at least different from the terminal part 3 shown in FIG. 5 in that the structure of the insulating member 32 and the connection pad 33 electrically connected to the semiconductor component are provided. The connection pad 33 includes a connection portion 33a that can be connected to the receptacle, and a connection portion 33b. When connecting to the receptacle, the connection pad 212b is not directly connected to the receptacle, and the connecting portion 33a is connected to the receptacle.

絶縁部材32は、少なくとも連接部31cの一部を保持する領域32aと、少なくとも接続パッド33の一部を保持する領域32bと、を有する。   The insulating member 32 has a region 32 a that holds at least a part of the connecting portion 31 c and a region 32 b that holds at least a part of the connection pad 33.

図8に示す端子部3において、接続パッド33は、レセプタクルに接続が可能な接続部33aと、絶縁部材32から露出し、かつ接続パッド212bに電気的に接続された接続部33bと、を有する。接続パッド33は、例えば端子部材31に適用可能な材料を用いて形成される。これに限定されず、端子部材31と異なる材料を用いて接続パッド33を形成してもよい。   In the terminal portion 3 shown in FIG. 8, the connection pad 33 includes a connection portion 33a that can be connected to the receptacle, and a connection portion 33b that is exposed from the insulating member 32 and is electrically connected to the connection pad 212b. . The connection pad 33 is formed using a material applicable to the terminal member 31, for example. However, the connection pad 33 may be formed using a material different from that of the terminal member 31.

端子部3の構造を図8に示す構造にすることにより、配線基板21における接続パッド212bの面積を小さくすることができる。よって、配線基板21における配線レイアウトの自由度を高めることができる。   By making the structure of the terminal portion 3 as shown in FIG. 8, the area of the connection pad 212b in the wiring board 21 can be reduced. Therefore, the degree of freedom of the wiring layout in the wiring board 21 can be increased.

図9は、図8に示す端子部3の上面図である。図9に示すように、上面視において、接続部33bは、接続部33aに重畳しない構造を有していてもよい。また、領域32bに限定されず、上面視において、領域32aの各端子部材31の間に接続パッド33を設けてもよい。このとき、領域32bを設けなくてもよい。   FIG. 9 is a top view of the terminal portion 3 shown in FIG. As shown in FIG. 9, the connection portion 33b may have a structure that does not overlap with the connection portion 33a when viewed from above. In addition, the connection pads 33 may be provided between the respective terminal members 31 in the region 32a as viewed from above, without being limited to the region 32b. At this time, the region 32b may not be provided.

接続パッド33は、例えば接続端子としての機能を有する。接続端子としては、例えば電源端子(VBUS)、差動信号である通常転送用のデータ信号のための信号端子(D+、D−)、およびグランド端子(GND)等のUSB2.0またはUSB3.0によるデータ転送に必要な接続端子が挙げられる。   The connection pad 33 has a function as a connection terminal, for example. As the connection terminals, for example, a power supply terminal (VBUS), a signal terminal (D +, D−) for a normal transfer data signal that is a differential signal, and a USB 2.0 or USB 3.0 such as a ground terminal (GND). The connection terminals necessary for data transfer by the above are mentioned.

図10および図11は、端子部3の製造方法例を説明するための模式図である。図10に示すように、まず端子部材30を準備する。端子部材30は、後に複数の端子部材31となる複数の歯を含む櫛歯形状を有する。   10 and 11 are schematic views for explaining an example of a method for manufacturing the terminal portion 3. As shown in FIG. 10, the terminal member 30 is prepared first. The terminal member 30 has a comb-tooth shape including a plurality of teeth that later become the plurality of terminal members 31.

次に、インサート成形等により端子部材30のそれぞれの歯の一部を保持するように絶縁部材32を設けることにより、接続部311を露出させつつ連接部31cを保持する。インサート成形とは、金型内に挿入した金属部品の周りに樹脂を注入して金属と樹脂を一体化する成形方法である。   Next, by providing the insulating member 32 so as to hold a part of each tooth of the terminal member 30 by insert molding or the like, the connection portion 31c is held while the connection portion 311 is exposed. Insert molding is a molding method in which a resin is injected around a metal part inserted into a mold and the metal and the resin are integrated.

次に、図11に示すように、線分X−Yを基準に端子部材30を切断して複数の歯を分離することにより複数の端子部材31を形成する。このときの切断面は、テール部31bの一部となる。以上により、端子部3を形成することができる。   Next, as shown in FIG. 11, the terminal member 30 is cut | disconnected on the basis of the line segment XY, and the several terminal member 31 is formed by isolate | separating a several tooth | gear. The cut surface at this time becomes a part of the tail portion 31b. The terminal part 3 can be formed by the above.

以上のように、本実施形態では、端子部における回路基板との接続部をテール部ではなく連接部に設けることにより、外力による接続不良等を抑制することができる。テール部は、切断等の際に外的な力が加わり、変形する場合がある。また、テール部に接続部を設ける場合、絶縁部材から露出したテール部を含む露出部を長くする必要となる。このため、露出部において複数の端子部材と回路基板とのショート、接続不良が起こる場合がある。これに対し、連接部に回路基板との接続部を設けることにより、接続部の周りを絶縁部材で覆いつつ、テール部を含む露出部を短くすることができ、接続不良が抑制される。また、端子部を小型化することができる。   As described above, in the present embodiment, the connection portion with the circuit board in the terminal portion is provided not in the tail portion but in the connecting portion, so that connection failure or the like due to external force can be suppressed. The tail portion may be deformed by an external force applied during cutting or the like. Moreover, when providing a connection part in a tail part, it is necessary to lengthen the exposed part containing the tail part exposed from the insulating member. For this reason, a short circuit and poor connection may occur between the plurality of terminal members and the circuit board in the exposed portion. On the other hand, by providing the connection part with the circuit board in the connection part, the exposed part including the tail part can be shortened while covering the periphery of the connection part with an insulating member, and connection failure is suppressed. In addition, the terminal portion can be reduced in size.

なお、回路基板2の構造は、図1に限定されない。半導体装置の他の構造例を図12に示す。図12では、一例としてPCBA(Printed Circuit Board Assembly:PCBA)である回路基板2を有する半導体装置を図示している。図12に示す半導体装置は、図1に示す半導体装置10と比較して、配線基板21の上面が第1の面であり、配線基板21の第1の面に設けられた接続パッド212aないし接続パッド212cと、メモリチップ22およびコントローラチップ23の代わりに配線基板21の第1の面に搭載された半導体パッケージ27を具備する点が少なくとも異なる。なお、図12において、図1に示す半導体装置10と同じ構成要素については図1の説明を適宜援用することができる。   The structure of the circuit board 2 is not limited to FIG. Another structural example of the semiconductor device is shown in FIG. In FIG. 12, a semiconductor device having a circuit board 2 which is a PCBA (Printed Circuit Board Assembly: PCBA) is illustrated as an example. In the semiconductor device shown in FIG. 12, the upper surface of the wiring board 21 is the first surface compared to the semiconductor device 10 shown in FIG. 1, and the connection pads 212 a or connections provided on the first surface of the wiring board 21. It differs at least in that it has a semiconductor package 27 mounted on the first surface of the wiring board 21 instead of the pad 212c and the memory chip 22 and the controller chip 23. Note that in FIG. 12, the description of FIG. 1 can be used as appropriate for the same components as those of the semiconductor device 10 illustrated in FIG.

半導体パッケージ27は、リードフレームが配線基板21の第1の面に設けられた接続パッド212cに電気的に接続される。半導体パッケージ27には、例えばメモリチップおよびコントローラチップ等の半導体部品を設けてもよい。図12に示すように、半導体部品としてリードフレームを具備する半導体パッケージを用い、半導体パッケージ上に封止樹脂層を形成してもよい。また、必ずしもメモリチップおよびコントローラチップを設けなくてもよい。   In the semiconductor package 27, the lead frame is electrically connected to the connection pads 212 c provided on the first surface of the wiring substrate 21. The semiconductor package 27 may be provided with semiconductor components such as a memory chip and a controller chip. As shown in FIG. 12, a semiconductor package including a lead frame may be used as a semiconductor component, and a sealing resin layer may be formed on the semiconductor package. Further, the memory chip and the controller chip are not necessarily provided.

また、図12に示す構造に限定されず、例えばプラグ組合せ型の半導体装置のプラグに上記構造の端子部を用いてもよい。例えば、プラグは、例えば配線基板21を用いた第1の配線基板と、第1の配線基板と異なる第2の配線基板と、第2の配線基板上に設けられた端子部と、第2の配線基板および端子部を覆う金属材料等の筐体と、を有する。このとき、端子部は、第2の配線基板に電気的に接続され、第2の配線基板は、接続端子等により第1の配線基板に電気的に接続される。上記構造の半導体装置では、プラグとレセプタクルとを接続することにより、半導体装置とレセプタクルを具備する情報機器との間でUSBによるデータ転送を行うことができる。   Further, the structure is not limited to the structure shown in FIG. 12, and the terminal portion having the above structure may be used for a plug of a plug combination type semiconductor device. For example, the plug includes, for example, a first wiring board using the wiring board 21, a second wiring board different from the first wiring board, a terminal portion provided on the second wiring board, and a second wiring board. And a housing made of a metal material or the like that covers the wiring board and the terminal portion. At this time, the terminal portion is electrically connected to the second wiring board, and the second wiring board is electrically connected to the first wiring board by a connection terminal or the like. In the semiconductor device having the above structure, data transfer by USB can be performed between the semiconductor device and an information device including the receptacle by connecting the plug and the receptacle.

なお、各実施形態は例として提示したものであり、発明の範囲を限定することは意図していない。これら新規な実施形態は、その他の様々な形態で実施し得るものであり、発明の要旨を逸脱しない範囲で、種々の省略、置き換え、変更を行うことができる。これら実施形態やその変形は、発明の範囲や要旨に含まれると共に、特許請求の範囲に記載された発明とその均等の範囲に含まれる。   Each embodiment is presented as an example and is not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, replacements, and changes can be made without departing from the scope of the invention. These embodiments and modifications thereof are included in the scope and gist of the invention, and are included in the invention described in the claims and the equivalents thereof.

1…筐体、2…回路基板、3…端子部、4…接着層、5…導電層、10…半導体装置、11…開口部、21…配線基板、211a…接続パッド、211b…接続パッド、212b…接続パッド、212b…接続パッド、22…メモリチップ、23…コントローラチップ、24…樹脂層、27…半導体パッケージ、30…端子部材、31…端子部材、31a…接続部、31b…テール部、31c…連接部、31d…接触部、32…絶縁部材、32a…領域、32b…領域、33…接続パッド、33a…接続部、33b…接続部、311…接続部、320…開口部。   DESCRIPTION OF SYMBOLS 1 ... Housing, 2 ... Circuit board, 3 ... Terminal part, 4 ... Adhesive layer, 5 ... Conductive layer, 10 ... Semiconductor device, 11 ... Opening part, 21 ... Wiring board, 211a ... Connection pad, 211b ... Connection pad, 212b ... connection pad, 212b ... connection pad, 22 ... memory chip, 23 ... controller chip, 24 ... resin layer, 27 ... semiconductor package, 30 ... terminal member, 31 ... terminal member, 31a ... connection part, 31b ... tail part, 31c ... articulation part, 31d ... contact part, 32 ... insulating member, 32a ... area, 32b ... area, 33 ... connection pad, 33a ... connection part, 33b ... connection part, 311 ... connection part, 320 ... opening.

Claims (5)

レセプタクルと接続することによりUSBによるデータ転送が可能な半導体装置であって、
複数の接続パッドを有する配線基板と、前記配線基板に搭載された半導体部品とを備える回路基板と、
前記回路基板上に設けられた端子部と、を具備し、
前記端子部は、
前記レセプタクルとの接続が可能な第1の接続部と、端部に設けられたテール部と、前記第1の接続部と前記テール部とを連接する連接部と、を有する端子部材と、
少なくとも前記連接部の一部を保持する絶縁部材と、を備え、
前記連接部は、前記絶縁部材から前記回路基板側に露出し、かつ前記複数の接続パッドの少なくとも一つに電気的に接続された第2の接続部を有する、半導体装置。
A semiconductor device capable of transferring data by USB by connecting to a receptacle,
A circuit board comprising a wiring board having a plurality of connection pads, and a semiconductor component mounted on the wiring board;
A terminal portion provided on the circuit board,
The terminal portion is
A terminal member having a first connecting portion capable of being connected to the receptacle, a tail portion provided at an end portion, and a connecting portion connecting the first connecting portion and the tail portion;
An insulating member that holds at least a part of the connecting portion,
The connecting portion includes a second connection portion exposed from the insulating member to the circuit board side and electrically connected to at least one of the plurality of connection pads.
前記テール部は、前記絶縁部材から突出し、かつ前記回路基板と離間する、請求項1に記載の半導体装置。   The semiconductor device according to claim 1, wherein the tail portion protrudes from the insulating member and is separated from the circuit board. 前記テール部の長さは、前記第2の接続部の長さよりも短い、請求項2に記載の半導体装置。   The semiconductor device according to claim 2, wherein a length of the tail portion is shorter than a length of the second connection portion. 前記第2の接続部は、前記複数の接続パッドの少なくとも一つと前記連接部との間に位置する前記絶縁部材の一面と連続する面を有する、請求項1ないし請求項3のいずれか一項に記載の半導体装置。   4. The second connection portion according to claim 1, wherein the second connection portion has a surface that is continuous with at least one of the plurality of connection pads and the one surface of the insulating member that is located between the connection portions. 5. A semiconductor device according to 1. 前記複数の接続パッドは、前記第2の接続部に電気的に接続された第1の接続パッドと、前記半導体部品に電気的に接続された第2の接続パッドと、を含み、
前記端子部は、第3の接続パッドをさらに備え、
前記絶縁部材は、少なくとも前記連接部の一部を保持する第1の領域と、少なくとも前記第3の接続パッドの一部を保持する第2の領域と、を有し、
前記第3の接続パッドは、前記レセプタクルとの接続が可能な第3の接続部と、前記絶縁部材から前記回路基板側に露出し、かつ前記第2の接続パッドに電気的に接続された第4の接続部とを有する、請求項1ないし請求項4のいずれか一項に記載の半導体装置。
The plurality of connection pads include a first connection pad electrically connected to the second connection part, and a second connection pad electrically connected to the semiconductor component,
The terminal portion further includes a third connection pad,
The insulating member has a first region that holds at least a part of the connecting portion, and a second region that holds at least a part of the third connection pad,
The third connection pad includes a third connection portion that can be connected to the receptacle, and a third connection portion that is exposed to the circuit board side from the insulating member and is electrically connected to the second connection pad. 5. The semiconductor device according to claim 1, comprising four connection portions.
JP2015052711A 2015-03-16 2015-03-16 Semiconductor device Pending JP2016173910A (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2015052711A JP2016173910A (en) 2015-03-16 2015-03-16 Semiconductor device
CN201811378808.8A CN109616802B (en) 2015-03-16 2016-03-11 Semiconductor device and method for manufacturing terminal component for plug
CN201610141749.7A CN105990725B (en) 2015-03-16 2016-03-11 The manufacturing method of semiconductor device and plug terminal part

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2015052711A JP2016173910A (en) 2015-03-16 2015-03-16 Semiconductor device

Publications (1)

Publication Number Publication Date
JP2016173910A true JP2016173910A (en) 2016-09-29

Family

ID=57009167

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2015052711A Pending JP2016173910A (en) 2015-03-16 2015-03-16 Semiconductor device

Country Status (2)

Country Link
JP (1) JP2016173910A (en)
CN (2) CN105990725B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20220083284A1 (en) * 2020-09-17 2022-03-17 Kioxia Corporation Usb memory and manufacturing method thereof

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI820615B (en) * 2022-02-25 2023-11-01 富佳得實業股份有限公司 electrical connector

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6276941B1 (en) * 2000-02-22 2001-08-21 Hon Hai Precision Ind. Co., Ltd. Board to board connector
CN2706895Y (en) * 2004-05-21 2005-06-29 富士康(昆山)电脑接插件有限公司 Electric connector
CN2798348Y (en) * 2005-04-30 2006-07-19 番禺得意精密电子工业有限公司 Electrical connector
KR20110088885A (en) * 2010-01-29 2011-08-04 삼성전자주식회사 Usb apparatus having pin module
CN201805024U (en) * 2010-03-25 2011-04-20 劲永国际股份有限公司 Usb connector
TWI458182B (en) * 2012-03-13 2014-10-21 Won Ching Entpr Co Ltd Usb connector
CN202797365U (en) * 2012-09-05 2013-03-13 莫列斯公司 Plug connector, electric connection device and electronic device
CN102957024B (en) * 2012-11-14 2015-09-23 深圳佰维存储科技有限公司 Electric connector, USB memory module and device, memory device
TWM458705U (en) * 2013-03-27 2013-08-01 Wan Ching Entpr Co Ltd Usb connector plug

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20220083284A1 (en) * 2020-09-17 2022-03-17 Kioxia Corporation Usb memory and manufacturing method thereof
CN114206002A (en) * 2020-09-17 2022-03-18 铠侠股份有限公司 USB memory and manufacturing method thereof
US11880609B2 (en) * 2020-09-17 2024-01-23 Kioxia Corporation USB memory and manufacturing method thereof
CN114206002B (en) * 2020-09-17 2024-01-26 铠侠股份有限公司 USB memory and manufacturing method thereof

Also Published As

Publication number Publication date
CN105990725B (en) 2018-12-14
CN109616802B (en) 2020-11-27
CN109616802A (en) 2019-04-12
CN105990725A (en) 2016-10-05

Similar Documents

Publication Publication Date Title
US8422236B2 (en) Pin module and chip on board type use device
CN109616802B (en) Semiconductor device and method for manufacturing terminal component for plug
JP6454656B2 (en) USB device and manufacturing method thereof
JP6334342B2 (en) Semiconductor device
EP2426624A1 (en) A USB device structure
JP5404454B2 (en) Semiconductor device and manufacturing method of semiconductor device
TWI591902B (en) Semiconductor device
TWI569515B (en) Method for manufacturing terminal parts for semiconductor devices and plugs
US9633923B2 (en) Electronic device module and manufacturing method thereof
TWI651897B (en) USB device and method of manufacturing same
US10757302B2 (en) Small, solid-state imaging module and harness unit
CN114206002B (en) USB memory and manufacturing method thereof
KR200434469Y1 (en) Package structure of secure digital memory card
TWI306221B (en) Usb flash card semiconductor device
JP2011253935A (en) Method of manufacturing semiconductor device
TW201316629A (en) Universal serial bus device and method for manufacturing the same

Legal Events

Date Code Title Description
A711 Notification of change in applicant

Free format text: JAPANESE INTERMEDIATE CODE: A712

Effective date: 20170609