JP2016171109A - Memory, memory device and volatile recording medium - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a memory, a memory device and a volatile recording medium which are formed by use of a titanium oxide having the composition, TiOand which data can be written into.SOLUTION: A memory element 6 is formed from a titanium oxide having the composition, Ti0, which causes a phase transition from a β phase of non-magnetic semiconductor to a λ phase of a paramagnetic metal state, differing from the β phase in resistance value, when supplied with a write current of 0.2-0.4 [A mm] in a range up to 460 [K]. In a memory device, when writing data into a memory cell, a write current is caused to pass through only the memory cell, whereby a memory element 6 of the memory cell 2a is caused to transition in phase from the β phase titanium oxide of to the λ phase titanium oxide. Thus, the data is written into the memory cell by changing the memory element 6 in resistance value.SELECTED DRAWING: Figure 11

Description

  The present invention relates to a memory, a memory device, and a volatile recording medium.

  In recent years, resistance change type memories such as ReRAM (Resistive RAM) have been developed as semiconductor memories (see, for example, Patent Document 1). Such a resistance change type memory can write data by changing a resistance value of the memory element by passing a write current through the memory element which is a variable resistance element. In the resistance change type memory, when a data read operation is performed, a read current is supplied to the memory element, a resistance state of the memory element is specified based on the change in the read current, and whether or not data is written is determined. obtain.

JP 2012-23271 A

  By the way, various materials such as transition metal oxides, sulfides, perovskite oxides, and semiconductors have been studied as variable resistance materials used in the memory element of such a resistance change type memory. Then, development of a new memory element using a new material that has not been conventionally desired is also desired.

Therefore, the present invention has been made in consideration of the above points, and proposes a memory, a memory device, and a volatile recording medium, which are made of titanium oxide having a composition of Ti ₃ O ₅ and can write data. With the goal.

In order to solve such a problem, a memory according to the present invention is a memory in which data is written by changing a resistance value of a memory element by supplying a write current to the memory element, and the memory element includes Ti ₃ and containing titanium oxide comprising at 0 ₅ composition, by the write current is supplied, the titanium oxide consisting of β-phase having the characteristics of the non-magnetic semiconductor, formed of a crystal structure of the paramagnetic metal state λ It is characterized in that the resistance value changes by phase transition to a phase.

  According to another aspect of the present invention, there is provided a memory device including a plurality of bit lines and a plurality of word lines, wherein a memory cell is disposed at each crossing position of the bit lines and the word lines. A memory according to any one of claims 1 to 6 is provided in a cell.

  According to another aspect of the present invention, there is provided a memory device including a plurality of bit lines and a plurality of word lines, wherein a memory cell is disposed at each crossing position of the bit lines and the word lines. A cell includes the memory according to claim 5, a selection transistor provided between the bit line and the memory, and a piezoelectric element side selection transistor to which a voltage is applied from the piezoelectric element control bit line. When the piezoelectric element side selection transistor is turned on, a voltage is applied to the piezoelectric element from the piezoelectric element control bit line, and the piezoelectric element is deformed.

Further, the volatile recording medium according to the present invention has a composition of Ti ₃ 0 ₅ and a β phase having a non-magnetic semiconductor characteristic from a λ phase having a paramagnetic metal crystal structure when a pressure is applied. The memory element formed of titanium oxide that undergoes phase transition from the β phase to the λ phase and is deformed when a voltage is applied to the memory element due to irradiation with write light. And the memory element is irradiated with the writing light in a state where pressure is applied by the piezoelectric element, so that the titanium oxide composed of the β phase is converted into the λ phase. It is characterized in that data is written after phase transition.

According to the present invention, it is possible to realize a memory, a memory device, and a volatile recording medium which are made of titanium oxide having a composition of Ti ₃ O ₅ and can write data.

It is the graph which showed roughly change of lambda phase, beta phase, and alpha phase. FIG. 2A is a graph showing a synchrotron radiation X-ray powder diffraction (SR-XRPD) pattern of λ phase, and FIG. 2B is a schematic diagram showing a crystal structure of λ phase. 2C is a schematic diagram showing an electron density distribution of the λ phase. 3A is a graph showing the SR-XRPD pattern of the β phase, FIG. 3B is a schematic diagram showing the crystal structure of the β phase, and FIG. 3C is a schematic diagram showing the electron density distribution of the β phase. FIG. 4A is a photograph of the phase transition from the β phase to the λ phase due to the current flowing, and FIG. 4B is an XRPD pattern before the current flows (β phase) and after the current flows (λ phase). FIG. 4C is a schematic diagram for explaining the crystal structure change during the phase transition from the β phase to the λ phase, and FIG. 4D shows the Gibbs free energy and charge non-charge when the current is supplied. It is a graph which shows the ratio of a local unit. It is a graph which shows the relationship between an electric current and expression of (lambda) phase. FIG. 6A is a graph schematically showing the transition of the λ phase, β phase, and α phase upon light irradiation, and FIG. 6B shows the light intensity at which the phase transition from the λ phase to the β phase and the β phase It is the graph which showed the light intensity which carries out a phase transition to (lambda) phase. FIG. 7A is a graph showing the SR-XRPD pattern of titanium oxide when a predetermined pressure is applied, FIG. 7B is a graph showing the ratio of the λ phase when the pressure is changed, and FIG. It is a graph which shows the ratio of (beta) phase when changing. FIG. 8A is a graph showing the relationship between Gibbs free energy and the ratio of charge delocalized units when the pressure is increased, and FIG. 8B shows the relationship between the ratio of charge delocalized units and the pressure. FIG. 8C is a graph showing the relationship between the Gibbs free energy and the ratio of charge delocalized units when the pressure is decreased. FIG. 9A is a photograph when the phase transition from the λ phase to the β phase and from the β phase to the λ phase, FIG. 9B is a graph of the differential XRD pattern showing the phase transition of the λ phase and the β phase, and FIG. FIG. 9D is a schematic diagram for explaining the crystal structure change during the phase transition from the λ phase to the β phase and from the β phase to the λ phase, and FIG. 9D is a Gibbs freedom when pressure is applied and when light is irradiated. It is a graph which shows energy and the ratio of a charge delocalization unit. 1 is a schematic diagram showing a configuration of a memory device according to a first embodiment. 1 is a schematic diagram showing a configuration of a memory according to a first embodiment. FIG. 5 is a schematic diagram showing a configuration of a memory device according to a second embodiment. FIG. 5 is a schematic diagram showing a configuration of a memory according to a second embodiment. FIG. 6 is a schematic diagram showing a configuration of a memory cell according to a third embodiment. FIG. 10 is a schematic diagram showing a configuration of a memory according to a fourth embodiment.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

(1) Outline of Titanium Oxide Used for Memory of the Present Invention Titanium oxide used for the memory of the present invention may be made from either anatase type titanium oxide or rutile type titanium oxide as a raw material. Will be described taking as an example the case where anatase-type titanium oxide is used as a raw material. In addition, the manufacturing method of the titanium oxide used for the memory of this invention is mentioned later in "(2) Manufacturing method of the titanium oxide used for the memory of this invention". Titanium oxide used in the memory of the present invention has a composition of Ti ₃ 0 ₅ and is characterized in that the resistance value changes with a change in crystal structure depending on a predetermined current (0.2 to 0.4 [A · mm ⁻² ]). doing. Here, as shown in FIG. 1, titanium oxide has a monoclinic crystal phase (hereinafter referred to as λ) in which Ti ₃ 0 ₅ maintains a paramagnetic metal state in a temperature range of 460 [K] or less. Phase, or λ-Ti ₃ 0 ₅ ). In addition, this titanium oxide increases its temperature when it is in the λ phase, and when it exceeds about 460 [K], it transitions to the orthorhombic α phase (α-Ti ₃ 0 ₅ ) in the paramagnetic metal state. .

Incidentally, a conventional titanium oxide having a generally known composition of Ti ₃ 0 ₅ is about 460 [K] although the crystal structure becomes α phase when the temperature is higher than about 460 [K]. Lower than that, it has been confirmed that the crystal structure becomes β phase (β-Ti ₃ 0 ₅ ) having the characteristics of a nonmagnetic semiconductor (see, for example, FIG. 5 of Japanese Patent No. 5398025). In practice, the conventional titanium oxide that became β phase in the temperature range lower than about 460 [K] has a monoclinic crystal structure, and has Curie paramagnetism due to lattice defects near 0 [K]. Although there is a slight magnetization, it can be a non-magnetic semiconductor.

On the other hand, the titanium oxide used in the memory of the present invention is a non-magnetic semiconductor like the conventional titanium oxide even when the temperature is lowered to 460 [K] when the temperature is lowered after the crystal structure becomes α phase. The phase transition to the λ phase in the paramagnetic metal state without the phase transition to the β phase having the characteristics. In addition, this titanium oxide undergoes a phase transition from the λ phase to the β phase when the λ phase is irradiated with light of a predetermined wavelength or given a predetermined pressure at 460 [K] or less, and further 460 [K]. K] In the following, when a current of 0.2 to 0.4 [A · mm ⁻² ] is passed through the β phase, the phase can be changed from the β phase to the λ phase. This titanium oxide has a resistivity value of 30 [Ωcm] when it is a β phase of a non-magnetic semiconductor, while the resistivity value when it is a λ phase of a paramagnetic metal state. Since the value is 3 × 10 ⁻² [Ω cm], the resistance value differs depending on the difference between the β phase and the λ phase. Here, the values of the resistivity of the λ phase and the β phase are the results of investigation by contact mode measurement and impedance measurement of an atomic force microscope (AFM), respectively.

As described above, the titanium oxide used in the memory of the present invention can undergo a phase transition from the λ phase to the β phase by an external stimulus (light or pressure) at 460 [K] or less. The phase transition from the β phase to the λ phase can be performed by passing an electric current, and the resistance value can be changed by changing the crystal phase by an external stimulus and current supply. In addition, this titanium oxide uses light of a predetermined wavelength with respect to the β phase at 460 [K] or less (for example, 532 [nm], 6 [ns] pulsed laser light (hereinafter also referred to as pulse light), Phase transition from β phase to λ phase by irradiation with light intensity of 3 × 10 ^-6 [mJ μm ^-2 pulse ^-1 ] or more and 7 × 10 ^-6 [mJ μm ^-2 pulse ^-1 ] or less Can be made.

Here, FIG. 2A shows the SR-XRPD pattern of titanium oxide at room temperature under atmospheric pressure (0.1 [MPa]). In this case, FIG. 2A shows the crystal structure when titanium oxide is in the λ phase. As a result of analyzing the SR-XRPD pattern in FIG. 2A, the λ phase is monoclinic and belongs to the space group C2 / m, and the lattice constants are a = 9.8330 (2) Å, b = 3.78509 (6) Å , C = 9.9667 (3) Å, unit cell volume is 370.859 (12) Å ³ , Rwp = 2.404 [%], Rexp = 0.863 [%] Showing the factor). Here, if the lattice constants are a = 9.8330 (2) ± 0.1%, b = 3.78509 (6) ± 0.1%, and c = 9.9667 (3) ± 0.3%, it can be said that the crystal structure of the λ phase.

  2B is a schematic diagram of the crystal structure of the λ phase viewed from the b-axis direction, and FIG. 2C is a schematic diagram showing the electron density distribution of the λ phase. The λ phase has three Ti sites (Ti1, Ti2, Ti3) whose symmetries are not equivalent and five zero sites (01, 02, 03, 04, 05), and Ti is distorted in six coordination. An octahedral structure was formed.

On the other hand, when a pressure of 5.1 [GPa] was applied to the λ-phase titanium oxide at room temperature or light having a wavelength of 532 [nm] was irradiated at room temperature, as shown in FIG. The SR-XRPD pattern was different from the XRPD pattern (FIG. 2A), and it was confirmed that the phase transitioned to the β phase. As a result of analyzing the SR-XRPD pattern in FIG. 3A, the β phase is monoclinic and belongs to the space group C2 / m, and the lattice constants are a = 9.6416 (4) Å, b = 3.78376 (9) Å , C = 9.3584 (4) Å, unit cell volume was 341.33 (2) Å ³ , Rwp = 2.231 [%], Rexp = 0.935 [%].

  FIG. 3B is a schematic diagram of a β-phase crystal structure viewed from the b-axis direction, and FIG. 3C is a schematic diagram illustrating an electron density distribution of the β phase. The β phase also has three Ti sites (Ti1, Ti2, Ti3) whose symmetries are not equivalent, and five zero sites (01, 02, 03, 04, 05), and Ti is a six-coordinate octahedron. The structure was formed.

  The main difference between the β phase and the λ phase lies in the coordination structure of Ti3. In the λ phase, Ti3 is bonded to two 01, one 03, and three 05, but in the β phase , Ti3 is connected with two 01, one 03, one 04, and two 05. Therefore, in the β phase, one Ti3-05 bond in the λ phase is replaced by one Ti3-04 bond. Thus, the titanium oxide used in the memory of the present invention has different crystal structures in the λ phase and the β phase.

Here, in the above-described embodiment, a material using anatase-type titanium oxide as a raw material has been described. However, such a characteristic is similarly expressed even when rutile-type titanium oxide is used as a raw material. The anatase-type titanium oxide and rutile-type titanium oxide used in the memory of the present invention undergo a phase transition from the β phase to the λ phase by flowing a current of 0.2 to 0.4 [A · mm ⁻² ], and have a resistance value of Can change.

Here, the phenomenon that the titanium oxide undergoes a phase transition to the λ phase when a current is passed through the titanium oxide composed of the β phase using rutile titanium oxide as a raw material will be described below. (I) of FIG. 4A is a photograph showing a state before applying a current, which is titanium oxide after pressure is applied. Moreover, (ii) of FIG. 4A is a photograph showing the state of titanium oxide after a current of 0.4 [A · mm ⁻² ] is passed. It was confirmed visually that the titanium oxide before the current was applied had a brownish color and then turned black when the current was applied.

  Then, when the XRPD pattern for the brown color of (i) in FIG. 4A was examined, as shown in (i) of FIG. 4B, it was confirmed that the crystal structure was a β phase crystal structure, Examination of the XRPD pattern for black and blue in (ii) of FIG. 4A confirmed that the crystal structure was changed to the λ phase as shown in (ii) of FIG. 4B. As a result, it was confirmed that the current became a brown β-phase before the current was applied, and the black-blue λ phase after the current was applied.

  Considering the phase transition crystallographically, as shown in FIG. 4C, in the β phase, Ti3-05 bonds are broken and Ti3-04 bonds are formed, and then a current is passed. In the phase transition from the β phase to the λ phase caused by this, the Ti3-04 bond is broken and the Ti3-05 bond is formed. Such a phase transition is due to a change in the bonding state of Ti3 due to current.

  Further, the phase transition from the β phase to the λ phase caused by such current supply is analyzed thermodynamically and summarized, as shown in (i) of FIG. 4D, Gibbs free energy G, pair, non-charge In the curve of the local unit ratio x, a local minimum energy portion appears, and when a current is passed through the titanium oxide, as shown in FIG. 4D (ii), the β phase is exceeded across the energy barrier. Induces a reverse phase transition from λ to λ.

Incidentally, in order to investigate the numerical value of the current when the titanium oxide undergoes a phase transition from the β phase to the λ phase, the β phase titanium oxide prepared in “(2) Manufacturing method of titanium oxide used in the memory of the present invention” described later. A pellet was prepared using Pt and Pt was deposited on the surface of the pellet, and then a stainless steel electrode was provided on the Pt with an Ag paste to prepare a plurality of sample pellets. Then, different currents were passed through each sample pellet at a temperature of 298 [K], and then the crystal phase of each sample pellet was examined. Here, for each sample pellet, 0.05 [A · mm ^-2 ], 0.10 [A · mm ^-2 ], 0.15 [A · mm ^-2 ], 0.20 [A · mm ^-2 ], and 0.30 [A ^-Different currents of mm ^-2 ] were passed, and each sample pellet after passing the current was crushed and observed with XRPD. As a result, a result as shown in FIG. 5 was obtained. From Fig. 5, it is possible to change the β phase to the λ phase by passing a current of 0.20 [A · mm ^-2 ] or more to titanium oxide, while oxidizing current of 0.15 [A · mm ^-2 ] or less. It was confirmed that the β-phase can be maintained by flowing it through titanium.

(1-1) Photoinduced phase transition from λ phase to β phase by light irradiation (the principle of data erasure using light irradiation)
Next, regarding the titanium oxide used in the memory of the present invention, the light-induced phase transition from the λ phase to the β phase by light irradiation will be described. Here, a black-blue sample prepared in “(2) Method for producing titanium oxide used in the memory of the present invention” described later was prepared, and this sample was observed by XRPD. Was. When this black-blue sample was irradiated with 532 [nm] pulsed laser light (Nd ³⁺ YAG laser), the part that gave the predetermined light intensity by the pulsed laser light turned brown. Furthermore, when the spot where the color changed to brown was observed with XRPD, it had a β-phase crystal structure.

  Thus, as shown in FIG. 6A, the titanium oxide used in the memory of the present invention can change the crystal structure from the λ phase to the β phase by pulsed light at 460 [K] or less. It has been confirmed that this titanium oxide undergoes a phase transition from a β phase to an α phase by CW (Continuous Wave) light, and a phase transition from the α phase to the λ phase again as the temperature decreases. For this reason, for example, when titanium oxide is in the β phase as an initial state, the current is supplied to phase shift to the λ phase by writing current, and then the pulse light is irradiated to the λ phase. It is possible to erase the data by making the phase transition again to the β phase.

  Thus, when the above-described titanium oxide is used for a memory, it can execute three stages, that is, initialization of the memory by light irradiation, data writing by current supply, and data erasing by light irradiation. In addition, the light at the time of phase transition to the β phase by irradiating pulse light to the λ phase is from ultraviolet light to infrared light (355 [nm] to 1064 [nm]), and predetermined light described later Any light having an intensity may be used. Incidentally, the photo-induced phase transition of the titanium oxide from the λ phase to the β phase is described in detail in Japanese Patent No. 5398025.

Here, FIG. 6B shows the light intensity necessary for the phase transition from the λ phase to the β phase. In order to cause the phase transition of λ phase titanium oxide to β phase titanium oxide using a pulse laser beam of 532 [nm], 6 [ns], for example, at 460 [K] or lower, as shown in FIG. 6B, It has been confirmed that it is desirable to set the light intensity of the pulsed laser light to a value exceeding 7 × 10 ⁻⁶ [mJ μm ⁻² pulse ⁻¹ ]. In addition, the above-described titanium oxide can also cause phase transition of β-phase titanium oxide to λ-phase titanium oxide using pulsed laser light at 460 [K] or less. In this case, for example, 532 [nm] , 6 [ns] pulse laser light, the intensity of the pulse laser light is 3 × 10 ^-6 [mJ μm ^-2 pulse ^-1 ] or more and 7 × 10 ^-6 [mJ μm ^-2 pulse ^-1 ] It has been confirmed that the following is desirable. This point will be described later in “(1-3) Photo-induced phase transition from β phase to λ phase by light irradiation (photo-induced phase transition used in a method for writing data in a pressure applied state)”.

(1-2) Phase transition from λ phase to β phase by pressure application (Principle of data erasure using pressure application)
Next, regarding the titanium oxide used in the memory of the present invention, the ratio of the λ phase to the β phase when pressure was applied at 460 [K] or less was examined, as shown in FIGS. 7A, 7B, and 7C. Results were obtained. FIG. 7A is an SR-XRPD pattern when a pressure of 0.1 [MPa], 0.6 [GPa], 1.1 [GPa], 1.9 [GPa], 3.0 [GPa], or 4.6 [GPa] is sequentially applied to titanium oxide. is there. From FIG. 7A, it was confirmed that the peak intensity indicating the λ phase crystal structure gradually decreased as the pressure increased, while the peak intensity indicating the β phase crystal structure gradually increased.

  Here, when the SR-XRPD pattern shown in FIG. 7A is analyzed by the Rietveld method, the result shown in FIG. 7B is obtained for the λ phase, while the result shown in FIG. 7C is obtained for the β phase. was gotten. As shown in FIG. 7B, the λ phase starts to decrease when a pressure of 0.4 [GPa] is applied, the phase transition of the crystal structure to the β phase starts, and when a pressure of 1.1 [GPa] is applied, the λ phase The ratio of λ phase in the crystal structure becomes almost zero when a pressure of 3.7 [GPa] or more is finally applied when the ratio of is reduced from about 0.8 to 0.5.

  As shown in FIG. 7C, the β phase starts to increase when a pressure of 0.4 [GPa] is applied, and a phase transition of the crystal structure starts from the λ phase. When a pressure of 1.1 [GPa] is applied, the β phase When the ratio of is increased from about 0.2 to 0.5 at the beginning and finally a pressure of 3.7 [GPa] or more is applied, almost all of the crystal structure becomes β phase. Therefore, for the titanium oxide used in the memory of the present invention, in order to change the phase from the λ phase to the β phase by applying pressure, 0.4 [GPa] or more, preferably 1.1 [GPa] or more, more preferably 3.7 [GPa]. It is desirable to apply the above pressure.

  FIG. 8A shows a curve of the Gibbs free energy G calculated by calculation and the ratio x of the charge delocalized unit when the pressure is increased. For the calculation of the pressure 0 [GPa], the transition enthalpy ΔH and the transition entropy ΔS obtained as measured values by DSC measurement of the sample were used, and the values of these transition enthalpy ΔH and transition entropy ΔS were calculated. The value of the interaction parameter γ obtained by fitting to the temperature dependence of the measured magnetic susceptibility was used. For changes in transition enthalpy ΔH and transition entropy ΔS when pressure was applied, values estimated by first-principles phonon mode calculations were used. In the titanium oxide used in the memory of the present invention, when pressure is applied from the outside, the transition enthalpy ΔH increases and the transition entropy ΔS decreases, so the Gibbs free energy G increases as shown in FIG. 8A.

Since the decrease in transition entropy ΔS in the λ phase is larger than that in the β phase, the increase in Gibbs free energy G in the λ phase is larger than that in the β phase. From this, it can be said that the phase transition due to the pressure at the phase transition pressure (P _{λ → β} ) is reproduced by the model shown in FIG. 8A. As shown in FIGS. 8A and 8B, when the applied pressure is increased, the energy barrier disappears, and the λ phase transitions to the β phase. On the other hand, as shown in FIG. 8C, the β phase generated by applying the pressure remains as it is because it is a thermodynamically stable phase even if the pressure is removed.

  For this reason, for example, when titanium oxide is in the β phase as an initial state, after the current is supplied and the phase transitions to the λ phase and data is written, the pressure is further applied to the λ phase to regain the β phase. It is possible to erase data by phase transition to. Thus, when the above-described titanium oxide is used in a memory, it can execute three steps, that is, initialization of the memory by applying pressure, writing of data by supplying current, and erasing of data by applying pressure.

  Here, the pressure value when the phase transition of the titanium oxide from the λ phase to the β phase is a value when anatase type titanium oxide is used as a raw material. When rutile type titanium oxide is used, it is desirable to apply a pressure of 60 [MPa] or more when the phase transition from the λ phase to the β phase is performed.

(1-3) Photo-induced phase transition from β phase to λ phase by light irradiation (photo-induced phase transition used for writing data under pressure application)
In the above-described embodiment, the case where the phase transition from the β phase to the λ phase is performed by current supply is described. However, the titanium oxide used in the memory of the present invention is predetermined when in the β phase. Since the phase transition from the β phase to the λ phase is caused by the irradiation of the light, data can be written even by the light irradiation. Here, (i) of FIG. 9A shows the state of titanium oxide before applying pressure, (ii) of FIG. 9A shows the state of titanium oxide after applying pressure P of 2.5 [GPa], (A) of FIG. 9A shows a pulsed laser beam having a wavelength of 532 [nm] (pulse width 6 [ns], light intensity 3.0 [mJ μm ⁻² pulse ⁻¹ ]) hν after being irradiated as writing light. It is a photograph which shows the state of. Titanium oxide, which had turned black-blue before applying pressure, became a brownish color when pressure was applied, and then it was visually confirmed that when it was irradiated with writing light, it became the same black-blue color as before pressure was applied. .

  Then, when the differential XRD pattern obtained by subtracting the blackish blue color of (i) from the brown color of (ii) in FIG. 9A was examined, as shown in (i) of FIG. On the other hand, when the differential XRD pattern obtained by subtracting the brown color of (ii) from the black-blue color of (iii) of FIG. 9A was examined, (ii) of FIG. As shown in FIG. 2, it was confirmed that the crystal structure was changed to the λ phase. Thus, before applying pressure, it is a black-blue λ phase, and after applying pressure P, it becomes a brown β-phase, and after irradiation with the pulsed laser light hν, the same black as before applying pressure. It was confirmed that the color became blue and λ phase. When the pressure application and the writing light irradiation were further repeated, the surface of the titanium oxide was discolored in the same manner as (i) to (iii) in FIG. 9A, and the λ phase to the β phase, the β phase to the λ phase, Furthermore, it was confirmed that the phase transition from the λ phase to the β phase was repeated.

  Considering such a phase transition crystallographically, as shown in FIG. 9C, when a pressure P is applied, in the phase transition from the λ phase to the β phase, the bond of Ti3-05 is broken, and Ti3-04 Next, when writing light is irradiated, the reverse phase transition from the β phase to the λ phase breaks the Ti3-04 bond and the Ti3-05 bond again. Thus, the reversible phase transition is due to a change in the binding state of Ti3 by an external stimulus such as pressure or light irradiation.

  In addition, a reversible phase transition between the λ phase and the β phase that occurs by alternately performing such pressure application and writing light irradiation is analyzed thermodynamically and summarized in (i) of FIG. 9D. As shown, the λ phase is a metastable phase before pressure is applied, but when pressure is applied, the Gibbs free energy G, pair of charge delocalized units, as shown in (ii) of FIG. 9D. The curve shape of the ratio x changes, and the local minimum energy portion of the λ phase disappears.

When the pulsed laser beam is irradiated to the titanium oxide as the writing light after the pressure on the titanium oxide is removed, as shown in FIG. 9D (iii), the reverse phase transition from the β phase to the λ phase across the energy barrier. Induces. Since optical absorption of λ phase is metal absorption, ultraviolet light to infrared light (laser light of 355 [nm] to 1064 [nm]) is effective for this metal-semiconductor transition as writing light. I understand. As shown in FIG. 6B, in order to cause the phase transition of β-phase titanium oxide to λ-phase titanium oxide using pulsed laser light at 460 [K] or less, for example, 532 [nm], 6 When [ns] pulse laser light is used, the light intensity of the pulse laser light is 3 × 10 ^-6 [mJ μm ^-2 pulse ^-1 ] or more and 7 × 10 ^-6 [mJ μm ^-2 pulse ^-1 ] or less. Is necessary.

  In addition, for example, this titanium oxide is in a β phase when pressure is applied as an initial state. When writing light is irradiated with the pressure applied as it is, the phase transition from β to λ phase causes data to be transferred. Can be written. And this titanium oxide can phase transition from the λ phase to the β phase again by applying another pressure after the phase transition to the λ phase while the pressure is applied. Can do. Thus, the above-described titanium oxide can execute three stages, that is, initialization of the memory by applying pressure, writing of data by supplying current and applying light under pressure application, and erasing of data by applying new pressure.

(2) Method for Producing Titanium Oxide Used for Memory of the Present Invention Next, an example of the method for producing titanium oxide described above will be described below. In this case, providing a predetermined amount of a powder body consisting of Ti0 ₂ particles of nano size. Here, for example, the Ti0 ₂ particles constituting the powder material, the particle diameter is used about 7 [nm] about anatase Ti0 ₂ particles, these Ti0 ₂ particles about 3 to 9 [g] prepared. Incidentally, at this time, it may be used rutile type Ti0 ₂ particles.

Then, these Ti0 ₂ under a hydrogen atmosphere powder body consisting of particles (0.3~1.0 [L / min]) between about 1200 1-5 hours at [℃] In, firing process. As a result, powdered titanium oxide having a composition of an oxide containing Ti ³⁺ (Ti ₃ 0 ₅ ) can be generated by the reduction reaction of the Ti 0 ₂ particles. The obtained titanium oxide is a powder having a secondary particle size of about 2 to 3 μm obtained by sintering nanoparticles having a primary particle size of about 25 nm. Such a structure can be confirmed by SEM and TEM.

  Incidentally, at this time, if the hydrogen atmosphere is 0.1 [L / min] or more, the firing temperature is 1100 [° C.] to 1400 [° C.], and the firing time is 1 hour or more, the λ phase is contained in the produced powder. The titanium oxide of about 50% or more can be included.

Here, for example, when the particle diameter using about 500 [nm] about rutile Ti0 ₂ particles, the primary particle size of about 200 [nm] × 30 [nm ] about nanoparticles stripe-type Dimensions As a result, sintered titanium oxide having a secondary particle size of about 4 × 1 [μm] can be obtained. Such a structure can be confirmed by SEM and TEM. Titanium oxide rutile Ti0 ₂ particles and raw materials, it was confirmed that a phase transition to 60 [MPa] beta phase from the λ phase at a pressure of. In contrast to titanium oxide using anatase-type titanium oxide as a raw material, the shape of primary particles of titanium oxide using rutile-type titanium oxide as a raw material is a stripe type. It is presumed that one of the causes of the improvement in the characteristics is that the stress applied to the interface differs due to the difference in shape.

  In addition, the titanium oxide mentioned above can be produced | generated also by the sol-gel method and a sintering process, for example. In this case, a gel-like mixed solution is generated by appropriately adding a silane compound solution to a sol-like mixed solution prepared by mixing a titanium chloride aqueous solution and an ammonia aqueous solution. In this gel-like mixed solution, silica-coated titanium hydroxide compound particles in which the surface of titanium hydroxide compound particles is coated with silica can be produced. Subsequently, after separating these silica-coated titanium hydroxide compound particles from the mixed solution, titanium oxide can be generated in the silica by washing, drying and firing. Incidentally, at this time, the silica covering the titanium oxide may be removed with an alkali solution such as tetramethylammonium hydroxide to thereby remove the silica.

  Finally, the titanium oxide thus produced (including titanium oxide coated with silica) is dispersed in, for example, a PVA solution to produce a dispersion, and then the surface of the plate-like electrode substrate or the same plate A memory element can be formed by solidifying the dispersion liquid in a layer form on the surface of the piezoelectric element in a spin coating method. Next, a memory device using the titanium oxide thus generated as a memory element and a volatile recording medium will be described in order.

(3) Memory Device According to First Embodiment (3-1) Configuration of Memory Device In FIG. 10, reference numeral 1 denotes a memory device according to the present invention, and a plurality of bit lines BLa and BLb and a plurality of word lines WLa and WLb. For example, memory cells 2a, 2b, 2c, 2d are arranged at each intersection position, and 1-bit information can be stored in each memory cell 2a, 2b, 2c, 2d. Has been. Among the memory cells 2a, 2b, 2c, and 2d, the memory device 1 uses the memory cells 2a and 2b (2c and 2d) arranged in one direction (in this case, the column direction) to provide one bit line BLa (BLb). A predetermined voltage can be applied to each bit line BLa, BLb by a bit line voltage application circuit (not shown). In addition, the memory device 1 shares one word line WLa (WLb) with the memory cells 2a and 2c (2b and 2d) arranged in the other direction (in this case, the row direction) crossing one direction. A predetermined voltage can be applied to each word line WLa, WLb by a word line voltage application circuit (not shown).

  Furthermore, in this embodiment, in the memory device 1, the memory cells 2a and 2b (2c and 2d) arranged in one direction (column direction) share one source line SLa (SLb). In this embodiment, the case where the memory cells 2a, 2b (2c, 2d) arranged in the column direction share one source line SLa (SLb) has been described. However, the present invention is not limited to this, One source line may be shared by all the memory cells 2a, 2b, 2c, 2d.

  Here, since these memory cells 2a, 2b, 2c, and 2d all have the same configuration, the following description will be focused on the memory cell 2a in the first row and the first column. In this case, the memory cell 2a includes the selection transistor 3 and the memory 4, and the voltage of the bit line BLa can be applied to the memory 4 via the selection transistor 3 when the selection transistor 3 is turned on.

  The selection transistor 3 has a MOS (Metal-Oxide-Semiconductor) transistor configuration, for example, and has a gate connected to the word line WLa, a drain connected to the bit line BLa, and a source connected to the memory 4. The selection transistor 3 can be turned on / off by the difference between the voltage of the word line WLa and the voltage of the bit line BLa, and can be applied with the voltage from the bit line BLa to the memory 4 by being turned on. As a result, a current based on the voltage of the bit line BLa can flow from the select transistor 3 to the source line SLa via the memory 4 in the memory cell 2a.

  On the other hand, when the selection transistor 3 is turned off, the memory cell 2a can block the voltage from the bit line BLa by the selection transistor 3 and prevent the current from flowing through the memory 4. Such a memory device 1 adjusts the voltages of the word lines WLa, WLb and the bit lines BLa, BLb, and thereby, for example, a desired one of the plurality of memory cells 2a, 2b, 2c, 2d arranged in a matrix. A predetermined current can be supplied only to the memory 4 of the memory cell 2a.

(3-2) Configuration of Memory Element As shown in FIG. 11, each memory 4 provided in the memory cells 2a, 2b, 2c, 2d has a plate-like memory element 6 stacked on an electrode substrate 5. In addition, a film-like transparent electrode 7 is stuck on the memory element 6. In the memory 4, when a voltage is applied to the transparent electrode 7 from the selection transistor 3 (FIG. 10), a current based on the voltage can flow to the transparent electrode 7, the memory element 6, and the electrode substrate 5.

Here, the present invention has a composition of Ti ₃ 0 ₅ , and the resistance value is changed by phase transition from the β phase to the λ phase by a predetermined current (0.2 to 0.4 [A · mm ⁻² ]). The memory element 6 is formed of the titanium oxide. As shown in FIG. 3, the titanium oxide forming the memory element 6 has a monoclinic crystal phase (λ phase, or TiO 2) in which Ti ₃ 0 ₅ maintains a paramagnetic metal state at 460 [K] or less. λ-Ti ₃ 0 ₅ ), and light of a predetermined wavelength and a predetermined light intensity (a value exceeding 7 × 10 ^-6 [mJ μm ^-2 pulse ^-1 ]) enters the λ phase below 460 [K]. When irradiated, the phase transitions to the β phase of the non-magnetic semiconductor. Further, at 460 [K] or less, the phase transitions again to the λ phase by 0.2 to 0.4 [A · mm ^-2 ] current flowing in the β phase. obtain.

  In the case of this embodiment, the memory 4 utilizes the phase transition from the λ phase to the β phase of the memory element 6 due to light irradiation and the phase transition from the β phase to the λ phase of the memory element 6 due to current supply. Data initialization, data writing, and data erasing can be performed.

  The memory 4 has different resistance values when the memory element 6 is in the β phase of the nonmagnetic semiconductor and when it is in the λ phase of the paramagnetic metal state. Whether a predetermined voltage is applied from the selection transistor 3 to the memory element 6, the resistance value of the memory element 6 is measured from the read current flowing through the memory element 6 based on the voltage, and data is written to the memory element 6. It can be judged. Hereinafter, a data initialization operation, a data writing operation, and a data erasing operation in the memory device 1 will be described in order.

(3-3) Data Initialization Operation In this case, the memory device 1 of the present invention initializes all or a part of the memory cells 2a, 2b, 2c, 2d of the memory device 1 as preparation before writing data. To do. Here, for example, initialization light (ultraviolet light to infrared light (355 [nm] to 1064 [nm]) from an initialization light source (not shown) of the memory device 1 and a light intensity of 7 × 10 ^{− 6} [mJ μm ⁻² pulse ⁻¹ ]) is uniformly irradiated from the transparent electrode 7 side to the memory elements 6 of each memory 4, and the initialization of each memory element 6 is performed at once. Thereby, in the memory device 1, in all the memories 4 irradiated with the initialization light, the memory element 6 becomes the β phase and the resistance value becomes uniform.

Such data initialization can also be performed individually for the memory cells 2a, 2b, 2c, and 2d. When performing selective initialization for such memory cells 2a, 2b, 2c, 2d, first, for example, in accordance with “(3-5) Data read operation” described later, the memory cells 2a, 2b , 2c, 2d, the resistance value of each memory element 6 is measured, and for example, the memory cell 2a in which the memory element 6 is in the λ phase is specified. Thereafter, the memory device 1 has initialization light (ultraviolet light to infrared light (355 [nm] to 1064 [nm]) from an initialization light source (not shown) and a light intensity of 7 × 10 ⁻⁶ [ mJ μm ^-2 pulse ^-1 ]) is irradiated from the transparent electrode 7 side to the memory element 6 made of λ-phase titanium oxide in the specified memory cell 2a etc., so that only the memory cell 2a etc. Perform initialization.

  In this way, the memory device 1 uses the batch irradiation of the initialization light and the selective irradiation of the initialization light to make the resistance values uniform by setting the memory elements 6 of all the memories 4 to the β phase. . In this case, the memory device 1 associates the code “0” or “1” with, for example, when the memory element 6 has the β-phase resistance value. Thus, at this stage, any memory 4 in the memory device 1 has a uniform code “0” (or code “1”), and thus no data is written.

(3-4) Data Write Operation In the memory device 1, for example, when data is written only to the memory cell 2a, the memory cell 2a is selected by adjusting the voltages of the bit lines BLa and BLb and the word lines WLa and WLb. Only transistor 3 is turned on. For example, a high voltage is applied to the bit line BLa and word line WLa to which the memory cell 2a to which data is written is connected, while the bit line BLb and word to which only the memory cell 2b, 2c and 3d to which no data is written is connected. A low voltage is applied to the line WLb.

Thereby, in the memory device 1, the selection transistor 3 in the memory cell 2a is turned on, the bit line BLa and the source line SLa are electrically connected via the memory cell 2a, and based on the voltage applied to the bit line BLa, A write current of 0.2 to 0.4 [A · mm ⁻² ] can flow through the memory 4 of the memory cell 2a. Thus, in the memory 4 of the memory cell 2a, a write current of 0.2 to 0.4 [A · mm ⁻² ] flows to the memory element 6, so that the titanium oxide of the memory element 6 undergoes a phase transition from the β phase to the λ phase. To do. In this manner, the resistance value of the memory cell 2a is changed by the phase transition of the titanium oxide of the memory element 6 from the β phase to the λ phase, and data can be written.

At this time, in the memory cell 2c that shares the word line WLa with the memory cell 2a to which data is written and the data is not written, the selection transistor 3 is turned on, but the low voltage is applied to the bit line BLb. Therefore, a write current of 0.2 to 0.4 [A · mm ⁻² ] does not flow through the memory 4, and data writing can be prohibited. In addition, in the memory cells 2b and 2d that are connected to the word line WLb to which the low voltage is applied and do not write data, the selection transistor 3 is turned off in both of them, current does not flow to the memory 4, and data is written. Can be banned.

(3-5) Data Read Operation In the memory device 1, for example, when reading data from the memory cell 2a, the selection transistor of the memory cell 2a is adjusted by adjusting the voltages of the bit lines BLa and BLb and the word lines WLa and WLb. Turn on only 3 As a result, in the memory cell 2a, the bit line BLa and the source line SLa are electrically connected via the selection transistor 3 and the memory 4, and a read current flows between the bit line BLa and the source line SLa. Here, the read current is selected to be 0.01 to 0.15 [A · mm ⁻² ] different from the write current generated during the data write operation. Thus, even if no data is written and the titanium oxide of the memory element 6 is in the β phase, the memory 4 of the memory cell 2a causes the titanium oxide of the memory element 6 to shift to the λ phase by the read current. Without transition, the crystalline state of titanium oxide in the memory element 6 can be maintained as it is.

  At this time, the read current flowing through the memory 4 of the memory cell 2a between the bit line BLa and the source line SLa depends on the resistance value that differs depending on whether the titanium oxide of the memory element 6 in the memory 4 is in the β phase or the λ phase. The value changes. Therefore, the memory device 1 measures the read current flowing through the memory 4 of the memory cell 2a via the bit line BLa or the source line SLa, and data is stored in the memory 4 of the memory cell 2a based on the current value of the read current. It can be determined whether or not data has been written.

(3-6) Data Erase Operation Here, for example, initialization light (from ultraviolet light to infrared light (355 [nm] to 1064 [nm]) from an initialization light source (not shown) of the memory device 1 is used. And light intensity exceeding 7 × 10 ⁻⁶ [mJ μm ⁻² pulse ⁻¹ ]) is uniformly irradiated to each memory cell 2a, 2b, 2c, 2d as erasing light LT. As a result, each of the memory cells 2a, 2b, 2c, and 2d collectively undergoes photoinduced phase transition to the β phase regardless of whether the titanium oxide of the memory element 6 is in the λ phase or the β phase. Thus, in the memory device 1, in all the memories 4 irradiated with the erasing light LT, the memory element 6 becomes the β phase, the resistance value becomes uniform, and the data can be erased.

Further, such data erasing operation can be individually performed on the memory cells 2a, 2b, 2c and 2d. In the case of selectively erasing data from such memory cells 2a, 2b, 2c, 2d, first, for example, according to the above-mentioned “(3-5) Data read operation”, the memory cells 2a, The resistance value of each memory element 6 in 2b, 2c, and 2d is measured, and the memory cell 2a and the like in which the memory element 6 is in the λ phase is specified. The memory device 1 includes initialization light (ultraviolet light to infrared light (355 [nm] to 1064 [nm]) from an initialization light source (not shown) and a light intensity of 7 × 10 ⁻⁶ [ mJ μm ⁻² pulse ⁻¹ ] is irradiated to the λ-phase memory element 6 in the specified memory cell 2a or the like as erasing light LT. Thereby, in the memory cell 2a, the titanium oxide of the memory element 6 undergoes a light-induced phase transition from the λ phase to the β phase. Thus, the memory device 1 causes the memory element 6 such as the memory cell 2a or the like to undergo phase transition from the λ phase to the β phase titanium oxide by irradiating only the specified memory cell 2a or the like with the erasing light LT. The memory element 6 in the cell 2a or the like can have a β-phase resistance value, and data in the memory cell 2a or the like can be selectively erased.

(3-7) Operation and Effect In the above configuration, the memory device 1 has a composition of Ti ₃ 0 ₅ and is supplied with a write current of 0.2 to 0.4 [A · mm ⁻² ] at 460 [K] or less. Then, the memory element 6 of each memory cell 2a, 2b, 2c, 2d is made of titanium oxide that undergoes a phase transition from the β phase of the nonmagnetic semiconductor to the λ phase of the paramagnetic metal state, which has a resistance value different from that of the β phase. It was made to form. Thus, in the memory device 1, for example, when data is written to the memory cell 2a, a write current is passed only to the memory cell 2a, so that the memory element 6 of the memory cell 2a is changed from β-phase titanium oxide to λ-phase titanium oxide. The data can be written by changing the resistance value of the memory element 6 by changing the phase to.

Further, in the memory device 1, for example, when reading data from the memory cell 2a, the memory element 6 of the memory 4 is caused to flow by passing a read current of 0.01 to 0.15 [A · mm ⁻² ] to the memory 4 of the memory cell 2a. Even in the β phase, a read current can be passed while maintaining the crystalline state of the titanium oxide of the memory element 6 without causing a phase transition to the λ phase. Thus, in the memory device 1, by measuring the resistance value of the memory element 6 from the read current flowing through the memory cell 2a, the crystal of whether the memory element 6 of the memory cell 2a is in β phase or λ phase The state can be specified, and it can be determined whether data is written in the memory cell 2a.

Further, in the memory device 1, light from ultraviolet light to infrared light (355 [nm] to 1064 [nm]) and light intensity exceeding 7 × 10 ⁻⁶ [mJ μm ⁻² pulse ⁻¹ ] is emitted. As the erasing light, for example, the memory element 6 irradiates the memory cell 2a or the like made of λ-phase titanium oxide, thereby causing the titanium oxide of the memory element 6 such as the memory cell 2a or the like to undergo phase transition from the λ phase to the β phase Therefore, by uniformly or selectively irradiating the erasing light, all the memory elements 6 of the memory cells 2a, 2b, 2c, 2d are aligned in the β phase, and the memory cells 2a, 2b, 2c, 2d Can be deleted. In the case of selectively irradiating the erasing light, for example, the state in which the data is erased only by the memory cell 2a irradiated with the light and the data is held in the remaining memory cells 2b, 2c, 2d. You can also.

(4) Memory Device According to Second Embodiment (4-1) Configuration of Memory Device In FIG. 12, in which parts corresponding to those in FIG. The configuration of the memory 14 of the memory cells 12a, 12b, 12c, and 12d is different from that of the first embodiment, and data can be erased by the piezoelectric element 16 provided in the memory 14. In this case, the memory device 11 includes, for example, memory cells 12a, 12b, 12c, and 12d arranged in a matrix, and one memory cell 12a, 12b (12c, 12d) arranged in one direction (in this case, the column direction). The bit lines BLa (BLb) are shared, and a predetermined voltage can be applied to each of the bit lines BLa and BLb by a bit line voltage application circuit (not shown).

  The memory device 11 includes memory cells 12a and 12c (12b and 12d) arranged in another direction (in this case, the row direction) crossing one direction, and one word line WLa (WLb) and one memory cell 12a. The source line SLa (SLb) is shared, and a predetermined voltage can be applied to each word line WLa, WLb by a word line voltage application circuit (not shown). In this embodiment, the memory cells 12a, 12b (12c, 12d) arranged in the column direction have been described as sharing one source line SLa (SLb). However, the present invention is not limited to this. One source line may be shared by all the memory cells 12a, 12b, 12c, and 12d.

  In addition to this configuration, the memory device 11 shares one piezoelectric element control line PL1a (PL1b) with the memory cells 12a, 12b (12c, 12d) arranged in one direction (column direction), and the piezoelectric element A predetermined voltage can be applied from the control line PL1a (PL1b) to each piezoelectric element 16 of the memory cells 12a, 12b (12c, 12d). As a result, the memory device 11 deforms each piezoelectric element 16 of the memory cells 12a, 12b, 12c, and 12d with the voltage from the piezoelectric element control lines PL1a and PL1b, and the memory element 6 provided on the pressure element 16 It is designed to give pressure.

  In this embodiment, the case where the memory cells 12a, 12b (12c, 12d) arranged in the column direction share one piezoelectric element control line PL1a (PL1b) has been described. However, the present invention is not limited to this. Instead, one piezoelectric element control line may be shared by all the memory cells 12a, 12b, 12c, and 12d.

  Here, since all of the memory cells 12a, 12b, 12c, and 12d have the same configuration, the following description will be focused on the memory cell 12a in the first row and the first column. In this case, the memory cell 12a includes the selection transistor 3 and the memory 14, and the voltage of the bit line BLa can be applied to the memory 14 via the selection transistor 3 when the selection transistor 3 is turned on.

  The select transistor 3 can be turned on by the difference between the voltage of the word line WLa and the voltage of the bit line BLa, thereby applying the voltage from the bit line BLa to the memory element 6 of the memory 14. As a result, a current based on the voltage of the bit line BLa can flow from the selection transistor 3 to the source line SLa via the memory 4 in the memory cell 12a.

  On the other hand, the selection transistor 3 can be turned off to cut off voltage application from the bit line BLa to the memory element 6 and prevent current from flowing through the memory 4. The memory device 11 adjusts the voltage between the word lines WLa, WLb and the bit lines BLa, BLb, and thereby, for example, a desired memory cell among the plurality of memory cells 12a, 12b, 12c, 12d arranged in a matrix A predetermined current can be supplied only to the memory 4 of 12a.

(4-2) Configuration of Memory Element As shown in FIG. 13 in which parts corresponding to those in FIG. 11 are denoted by the same reference numerals, each memory 14 provided in the memory cells 2a, 2b, 2c, 2d has a plate-like shape. Similarly, a plate-like memory element 6 is laminated on the piezoelectric element 16. As described above, the memory element 6 has a composition of Ti ₃ 0 ₅ , and undergoes a phase transition from a β phase to a λ phase by a predetermined current (0.2 to 0.4 [[A · mm ⁻² ]), and has a resistance value. Is formed of titanium oxide that changes. In this case, the memory element 6 is formed so that one planar surface is in close contact with the installation surface of the piezoelectric element 16, and a pair of electrodes 15a and 15b are provided on opposite side surfaces. Further, in the memory element 6, the source of the selection transistor 3 is connected to one electrode 15a, and the source line SLa is connected to the other electrode 15b, and a predetermined direction from one electrode 15a to the other electrode 15b is established. Current can flow.

  The piezoelectric element 16 provided with the memory element 6 is formed in a flat plate shape, for example, using PZT (lead zirconate titanate) or the like, and can be deformed by expanding and contracting when a voltage is applied. Yes. In the case of this embodiment, the piezoelectric element 16 is deformed by applying a voltage of, for example, 1 [V / μm] or more, and pressure is applied to the memory element 6 by the deformation, so that the titanium oxide of the memory element 6 is changed. Phase transition from the λ phase to the β phase can be performed.

  Thus, in the case of this embodiment, the memory 14 uses the phase transition from the λ phase to the β phase of the memory element 6 by applying pressure and the phase transition from the β phase to the λ phase of the memory element 6 by supplying current. Thus, data initialization, data writing, and data erasing can be performed. The data writing method to the memory 14 is the same as the above-described “(3-4) Data writing operation”, and the data reading method to the memory 14 is also the above “(3-5) data”. The data initialization operation and the data erasing operation, which are different from those in the first embodiment described above, will be described below in order.

(4-3) Data Initialization Operation In this case, the memory device 11 of the present invention initializes all or part of the memory cells 12a, 12b, 12c, 12d of the memory device 11 as a preparation before writing data. To do. Here, for example, a predetermined voltage is applied from the piezoelectric element control lines PL1a and PL1b of the memory device 11 to the piezoelectric elements 16 of the memory cells 12a, 12b, 12c, and 12d to deform the piezoelectric elements 16. As a result, the memory cells 12a, 12b, 12c, and 12d are given a predetermined pressure to the memory element 6 by the deformation of the piezoelectric element 16, and the memory elements 6 are initialized. Thereafter, the memory device 11 stops the voltage application to the piezoelectric element control lines PL1a and PL1b, returns each piezoelectric element 16 to the original state, and shifts to a data writing operation.

  At this time, in the memory device 11, in all the memories 14, the memory element 6 becomes β-phase by the pressure given by the deformation of the piezoelectric element 16, and the resistance value becomes uniform. In this case, the memory device 11 associates the code “0” or “1” with, for example, when the memory element 6 has the β-phase resistance value. As a result, the uniform code “0” (or code “1”) is obtained in any memory 14 of the memory device 11 at this stage, so that no data is written.

(4-4) Data Erasing Operation In this case, in the memory device 11, the memory cells 12 a, 12 b, 12 c are connected from the piezoelectric element control lines PL 1 a, PL 1 b to the memory cells 12 a, 12 b, 12 c, similarly to the “(4-3) data initialization operation” described above. , 12d, a predetermined voltage is applied to each piezoelectric element 16. As a result, each of the memory cells 12a, 12b, 12c, and 12d causes the memory element 6 to be moved by the pressure applied by the deformation by the piezoelectric element 16, even if the titanium oxide of the memory element 6 is in either the λ phase or the β phase. Phase transition to β phase is possible. Thus, in the memory device 11, by applying pressure from the piezoelectric element 16 to the memory element 6, the memory element 6 becomes β phase in all the memories 14 and the resistance value becomes uniform, and the data can be in an erased state.

  Incidentally, in the case of this embodiment, such data erasure is written in the memory cells 12a, 12b, 12c, and 12d by uniformly applying data erasing voltages to the piezoelectric element control lines PL1a and PL1b. Each data can be erased at once. For example, if a voltage for erasing data is applied only to the piezoelectric element control line PL1a, only the data in the memory cells 2a and 2b provided along the piezoelectric element control line PL1a can be erased.

(4-5) Operation and effect In the above configuration, the memory device 11 has a composition of Ti ₃ 0 ₅ and is supplied with a write current of 0.2 to 0.4 [A · mm ⁻² ] at 460 [K] or less. Then, the memory element 6 of each of the memory cells 12a, 12b, 12c, and 12d is made of titanium oxide that undergoes a phase transition from the β phase of the nonmagnetic semiconductor to the λ phase of the paramagnetic metal state having a resistance value different from that of the β phase. It was made to form. Accordingly, in the memory device 11, for example, when data is written to the memory cell 12a, a write current is supplied only to the memory cell 12a, so that the memory element 6 of the memory cell 12a is changed from β-phase titanium oxide to λ-phase oxide. Data can be written by changing the resistance value of the memory element 6 by changing the phase to titanium.

In the memory device 11, for example, when reading data from the memory cell 12a, by passing a read current of 0.01 to 0.15 [A · mm ⁻² ] to the memory cell 12a, the memory element 6 of the memory cell 12a temporarily becomes β Even if it is a phase, it is possible to flow a read current while maintaining the crystalline state of titanium oxide of the memory element 6 without causing a phase transition to the λ phase. As a result, in the memory device 11, the resistance value of the memory element 6 is measured from the read current flowing through the memory cell 12a, thereby determining whether the memory element 6 of the memory cell 12a is in the β phase or the λ phase. The state can be specified, and it can be determined whether data is written in the memory cell 12a.

  Further, in this memory device 11, the piezoelectric element 16 is deformed by applying a predetermined voltage to the piezoelectric element 16, and the pressure is applied to the memory element 6 by the deformation of the piezoelectric element 16, whereby the memory cell 12a , 12b, 12c, 12d, even if the titanium oxide of each memory element 6 is in the λ phase, the phase transition is made to the β phase, and all the memory elements 6 of the memory cells 12a, 12b, 12c, 12d are all in the β phase Thus, the data in the memory cells 12a, 12b, 12c, 12d can be erased.

(5) Memory Device According to Third Embodiment In the second embodiment described above, a predetermined voltage is applied to each piezoelectric element 16 from the piezoelectric element control lines PL1a, PL1b, and each memory cell 12a, 12b, Although the case where the voltage is uniformly applied to 12c and 12d has been described, the present invention is not limited to this, and the piezoelectric element side selection transistor that selectively applies the voltage to the piezoelectric element 16 as shown in FIG. The memory cell 22 provided with 23 may be applied. In this case, the memory device has a configuration in which memory cells 22 as shown in FIG. 14 are arranged in a matrix. For example, a plurality of memory cells 22 arranged in one direction (column direction) include piezoelectric element control bit lines PBLa and piezoelectric elements. The control source line PSLa is shared, and the word line WLa can be shared by a plurality of memory cells 22 arranged in the other direction (in this case, the row direction) intersecting with one direction.

  In the memory cell 22, the piezoelectric element side selection transistor 23 and the selection transistor 3 share the word line WLa. The piezoelectric element side select transistor 23 has, for example, a MOS transistor configuration, and has a gate connected to the word line WLa, a drain connected to the piezoelectric element control bit line PBLa, and a source connected to the piezoelectric element 16. The piezoelectric element 16 is connected to the source of the piezoelectric element side selection transistor 23 and also to the piezoelectric element control source line PSLa.

  The piezoelectric element side select transistor 23 can be turned on / off by the difference between the voltage of the word line WLa and the voltage of the piezoelectric element control bit line PBLa, and when turned on, the voltage from the piezoelectric element control bit line PBLa is applied to the piezoelectric element 16 Can be applied. As a result, the piezoelectric element 16 can be deformed based on the voltage from the piezoelectric element control bit line PBLa, and can apply a pressure to the memory element 6 to cause the titanium oxide of the memory element 6 to transition from the λ phase to the β phase. . On the other hand, when the piezoelectric element side selection transistor 23 is turned off, the memory cell 22 blocks the voltage from the piezoelectric element control bit line PBLa by the piezoelectric element side selection transistor 23, and the memory element 6 is not deformed without deformation of the piezoelectric element 16. It is possible to prevent application of pressure to the.

  In such a memory device in which the memory cells 22 are arranged in a matrix, when erasing data, the voltages of a plurality of word lines and the voltages of a plurality of piezoelectric element control bit lines are adjusted to form a matrix. Among the plurality of arranged memory cells 22, for example, a voltage is applied only to the piezoelectric element 16 of the desired memory cell 22 to apply pressure to the memory element 6, and titanium oxide of the memory element 6 is applied only to a specific memory cell 22. Data can be erased by phase transition to the β phase.

(6) Memory Device According to Fourth Embodiment Next, a data writing method according to another embodiment in the memory device 11 shown in FIG. 12 will be described. Here, a volatile memory 14 is realized in which data of each memory cell 12a, 12b, 12c, 12d is automatically erased when the power to the memory device 11 is turned off. Hereinafter, a data initialization operation, a data write operation, a data read operation, and a data erase operation will be described in this order.

(6-1) Data Initialization Operation In this case, the memory device 11 initializes all or part of the memory cells 12a, 12b, 12c, 12d of the memory device 11 as a preparation before writing data. Here, for example, voltage is continuously applied from the piezoelectric element control lines PL1a and PL1b of the memory device 11 to the piezoelectric elements 16 of the memory cells 12a, 12b, 12c, and 12d, and the piezoelectric element 16 is maintained in a deformed state. As a result, the memory cells 12a, 12b, 12c, and 12d continue to have a predetermined pressure applied to the memory element 6 due to the deformation of the piezoelectric element 16, and the initialization of each memory element 6 is performed.

  At this time, in the memory device 11, in all the memories 14, the memory element 6 becomes β phase by the constant pressure given by the deformation of the piezoelectric element 16, and the resistance value becomes uniform. Then, the memory device 11 associates, for example, the code “0” or “1” with the memory element 6 having the β-phase resistance value. As a result, the uniform code “0” (or code “1”) is obtained in any memory 14 of the memory device 11 at this stage, so that no data is written.

(6-2) Data Write Operation In the memory device 11, for example, when data is written only to the memory cell 12a, the memory cell 12a is selected by adjusting the voltages of the bit lines BLa and BLb and the word lines WLa and WLb. Only transistor 3 is turned on. For example, a high voltage is applied to the bit line BLa and the word line WLa to which the memory cell 12a as a selected memory cell to which data is written is connected, while only the memory cells 12b, 12c, and 12d to which data is not written are connected. A low voltage is applied to the bit line BLb and the word line WLb.

Thereby, in the memory device 11, the selection transistor 3 in the memory cell 12a is turned on, the bit line BLa and the source line SLa are electrically connected via the memory cell 12a, and based on the voltage applied to the bit line BLa, A write current of 0.2 to 0.4 [A · mm ⁻² ] can flow through the memory 14 of the memory cell 12a. At this time, the memory 14 of the memory cell 12a is in a state where a constant pressure is applied to the memory element 6 by the piezoelectric element 16, but a write current of 0.2 to 0.4 [A · mm ⁻² ] is applied to the memory element 12 By flowing to 6, the titanium oxide of the memory element 6 undergoes a phase transition from the β phase to the λ phase. In this way, in the memory cell 2a, the titanium oxide of the memory element 6 undergoes a phase transition from the β phase to the λ phase while a certain pressure is applied from the piezoelectric element 16 to the memory element 6, and the resistance value is increased. Change, and data can be written.

(6-3) Data Read Operation In the memory device 11, for example, when reading data from the memory cell 12a, the selection transistor of the memory cell 12a is adjusted by adjusting the voltages of the bit lines BLa and BLb and the word lines WLa and WLb. 3 is turned on, the bit line BLa and the source line SLa are electrically connected through the memory cell 12a, and the bit line BLa is connected to the source line SLa through the memory cell 12a to 0.01 to 0.15 [A. ^Apply a read current of mm ^-2 ]. At this time, the memory 14 of the memory cell 12a continues to be in a state where a certain pressure is applied to the memory element 6 by the piezoelectric element 16.

Here, even in the case of this embodiment, the memory 14 of the memory cell 12a has a read current selected from 0.01 to 0.15 [A · mm ⁻² ]. Even when the titanium oxide 6 is in the β phase, the titanium oxide in the memory element 6 can be maintained in the crystalline state of the memory element 6 without causing a phase transition of the titanium oxide in the memory element 6 to the λ phase by the read current.

  At this time, the read current flowing through the memory 14 of the memory cell 12a between the bit line BLa and the source line SLa depends on the resistance value that differs depending on whether the titanium oxide of the memory element 6 in the memory 14 is β phase or λ phase. The value changes. Therefore, the memory device 11 measures the read current flowing through the memory cell 12a through the source line SLa while the pressure is applied to the memory element 6 by the piezoelectric element 16, and based on the current value of the read current. Thus, it can be determined whether or not data is written in the memory 14 of the memory cell 12a.

(6-4) Data Erasing Operation In this case, in the memory device 11, when the power is turned off, the voltage application applied to the piezoelectric element control lines PL1a and PL1b is stopped, and the memory cell 12a is responded accordingly. , 12b, 12c, 12d also stops the voltage application to the piezoelectric elements 16. As a result, the piezoelectric elements 16 of the memory cells 12a, 12b, 12c, and 12d are deformed to the original state when no voltage is applied, and the deformation pressure is applied to the memory element 6 provided on the installation surface. give.

  As a result, in the memory cells 12a, 12b, 12c, and 12d, regardless of whether the titanium oxide of the memory element 6 is in the λ phase or the β phase, the pressure applied by the deformation of the piezoelectric element 16 to the original shape The memory element 6 can be phase-shifted to the β phase. Thus, in the memory device 11, when the power is turned off, the pressure is automatically applied from the piezoelectric element 16 to the memory element 6, and the memory element 6 becomes β phase in all the memories 14, and the resistance value becomes uniform. Thus, the data can be erased.

  Incidentally, when the power is subsequently turned on, the memory device 11 again applies a voltage from the piezoelectric element control lines PL1a, PL1b to the piezoelectric elements 16 of all the memory cells 12a, 12b, 12c, 12d, and the piezoelectric elements The pressure is applied to the memory element 6 by 16 so that data can be written to each memory 14.

(6-5) Actions and Effects In the above configuration, the memory device 11 has a composition of Ti ₃ 0 ₅ and, when a pressure is applied at 460 [K] or less, the memory device 11 is not separated from the λ phase in the paramagnetic metal state. When the phase transition to the β phase of the magnetic semiconductor and further a write current of 0.2 to 0.4 [A · mm ⁻² ] is supplied, each of the memory cells 12a, 12b, A memory element 6 of 12c and 12d was formed.

  In such a memory device 11, when data is written, a voltage is applied to each of the piezoelectric elements 16 of the memory cells 12a, 12b, 12c, and 12d, and the piezoelectric element 16 is deformed to apply a constant pressure to the memory element 6. Subsequently, the titanium oxide of the memory element 6 is changed to the β phase. In the memory device 11, for example, when data is written to the memory cell 12a, a write current is passed only to the memory cell 12a, so that the memory element 6 of the memory cell 12a is changed from β-phase titanium oxide to λ-phase titanium oxide. The data can be written by changing the resistance value of the memory element 6 by changing the phase to.

  In the case of this embodiment, when the power is turned off, the memory device 11 stops the voltage application from the piezoelectric element control lines PL1a, PL1b to the respective piezoelectric elements 16 of the memory cells 12a, 12b, 12c, 12d. In addition, each memory element 6 can be phase-shifted to the β phase by the pressure applied by the piezoelectric element 16 being deformed to the original shape, and thus all the memories are automatically and simultaneously turned off. 14 data can be erased.

(7) Memory Device According to Fifth Embodiment In the above-described fourth embodiment, when data is written, the pressure is applied to the memory element 6 by the piezoelectric element 16 of the memory 14. A write current of 0.2 to 0.4 [A · mm ⁻² ] was supplied to the memory element 6 to change the titanium oxide of the memory element 6 from the β phase to the λ phase to write data.

  However, the present invention is not limited to this, and as shown in FIG. 15, in the state where the pressure is applied to the memory element 6 by the piezoelectric element 16 of the memory 31, the above-described “(1-3) Utilizing the principle of “photo-induced phase transition to λ phase (photo-induced phase transition used for writing data under pressure application)”, irradiation of write light LT1 causes the titanium oxide of memory element 6 to be transformed from β phase to λ Data may be written after phase transition to a phase.

In this case, the memory 31, the state where a constant pressure is applied from the piezoelectric element 16 in the memory device 6, the infrared light from the ultraviolet light (355 [nm] ~1064 [nm ]), and 3 × 10 ^{- 6} [mJ μm ⁻² pulse ⁻¹ ] or more and 7 × 10 ⁻⁶ [mJ μm ⁻² pulse ⁻¹ ] or less of light intensity is irradiated to the memory element 6 as the write light LT1, and thus the memory element The titanium oxide of 6 is phase-shifted from the β phase to the λ phase, the resistance value is changed, and data can be written.

  Further, in this memory 31, when the power of the memory device is turned off, the voltage application to the piezoelectric element 16 is stopped, and the memory element 6 is caused by the pressure applied by the piezoelectric element 16 being deformed to the original shape. Can be phase transitioned to β-phase titanium oxide, thus automatically erasing data as soon as the power is turned off.

  At this time, as a data reading method, whether or not data is written in the memory 31 based on the current value of the read current flowing in the memory 31 in accordance with the “(3-5) Data reading operation” described above. Can be read.

  As another data reading method, the memory device 11 irradiates the memory element 6 with light for reading having a predetermined light intensity, and detects the return light returning from the memory element 6 by the light receiving element. Whether or not data has been written to the memory element 6 may be determined from the difference in reflectance caused by the difference in the crystal structure of titanium oxide (whether or not data is written).

  Note that the reading light used here has a wavelength of 355 [nm] to 1064 [nm], for example, and when the memory element 6 is irradiated, the titanium oxide of the memory element 6 changes from the λ phase to the β phase, and the β phase. The light intensity is such that it does not undergo phase transition from λ to λ phase. Incidentally, when it is determined whether or not data is written in the memory element 6 by the light for reading in this way, the electrodes 15a and 15b provided on the side surface of the memory element 6 are unnecessary, and the bit line in the memory device 11 BLa, BLb and word lines WLa, WLb are also unnecessary.

(8) Volatile recording medium Next, the above-mentioned “(1-3) Photo-induced phase transition from β-phase to λ-phase by light irradiation (photo-induced phase transition used for a method of writing data in a pressure applied state)” A volatile recording medium using the principle will be described. In this case, the volatile recording medium has a composition of Ti ₃ 0 ₅ and undergoes a phase transition from the λ phase of the paramagnetic metal state to the β phase of the nonmagnetic semiconductor when pressure is applied at 460 [K] or less. Furthermore, the phase is changed from β phase to λ phase by light irradiation (light irradiation with light intensity of 3 × 10 ^-6 [mJ μm ^-2 pulse ^-1 ] or more and 7 × 10 ^-6 [mJ μm ^-2 pulse ^-1 ] or less). It has a memory element formed of titanium oxide that transitions. The volatile recording medium has a configuration in which a memory element is formed on, for example, a plate-like piezoelectric element. In the state where pressure is applied to the memory element by the piezoelectric element, the above-described “(1-3) light irradiation”. utilizing the principle of "(light-induced phase transition used in the method of writing data in a pressure-applied state) light-induced phase transition from β-phase to λ phase by the light intensity of ^{3 × 10 -6 [mJ μm -2} pulse - ¹ ] 7 × 10 ^-6 [mJ μm ^-2 pulse ^-1 ] or less is irradiated as write light, and data is written by changing the phase of titanium oxide in the memory element from β phase to λ phase. .

  Incidentally, there is no particular limitation on the shape of the volatile recording medium, and it is formed in a disc shape like a general optical disk such as BD (Blu-ray Disc, registered trademark) or DVD (Digital Versatile Disc, registered trademark). A chucking hole may be formed in the central portion. In the case of such a disk-like volatile recording medium, when the volatile recording medium is installed in the recording / reproducing apparatus, the electrode of the recording / reproducing apparatus contacts the piezoelectric element of the volatile recording medium, and the recording / reproducing apparatus A voltage can be applied to the piezoelectric element.

In this volatile recording medium, when data is written, a predetermined voltage is continuously applied from the recording / reproducing device to the piezoelectric element, so that a constant pressure is continuously applied from the piezoelectric element to the memory element. Infrared light (355 [nm] to 1064 [nm]), light intensity is 3 × 10 ^-6 [mJ μm ^-2 pulse ^-1 ] or more and 7 × 10 ^-6 [mJ μm ^-2 pulse ^-1 ] or less Light is irradiated to the memory element as writing light. Thereby, in the volatile recording medium, the titanium oxide of the memory element is phase-shifted from the β phase to the λ phase by light irradiation, and data can be written.

  At this time, as a data reading method, for example, a reading light having a predetermined light intensity is irradiated to the memory element, and the return light returning from the memory element is detected by the light receiving element, and the titanium oxide Whether or not data has been written to the memory element can be determined from the difference in reflectance caused by the difference in crystal structure (whether or not data is written).

  Further, in this volatile recording medium, when the power of the recording / reproducing apparatus is turned off, the voltage application to the piezoelectric element is stopped, and the memory element is caused by the pressure applied by the piezoelectric element deforming to its original shape. Can be phase transitioned to β-phase titanium oxide, and thus data can be automatically erased at the same time as the power is turned off.

  The present invention is not limited to the above-described examples, and various modifications can be made within the scope of the gist of the present invention. The first to fifth embodiments and volatile You may combine suitably each structure of a recording medium.

1,11 Memory device
2a, 2b, 2c, 2d, 12a, 12b, 12c, 12d, 22 Memory cells
4,14,31 memory
6 Memory elements
16 Piezoelectric element
23 Piezo element side select transistor
BLa, BLb bit line
WLa, WLb Word line

Claims (10)

A memory in which data is written by changing a resistance value of the memory element by supplying a write current to the memory element,
The memory element is
Titanium oxide having a composition of Ti ₃ 0 ₅ is contained, and when the write current is supplied, the titanium oxide having a β phase having the characteristics of a nonmagnetic semiconductor has a crystal structure in a paramagnetic metal state. A memory characterized in that the resistance value changes by phase transition to the λ phase. 2. The read current different from the write current is supplied to the memory element during a data read operation, and a resistance value of the memory element is specified based on a change in the read current. Memory. The memory according to claim 1, wherein the write current is 0.2 to 0.4 [A · mm ⁻² ]. The memory element is characterized in that, when erasing light is irradiated during a data erasing operation, the titanium oxide formed of the λ phase changes to the β phase and changes its resistance value. Item 4. The memory according to any one of Items 1 to 3. The memory element is provided in a piezoelectric element;
The memory element is characterized in that, when data is erased, pressure is applied by deformation of the piezoelectric element, so that the titanium oxide composed of the λ phase changes to the β phase and changes its resistance value. The memory according to any one of claims 1 to 3. The memory element is provided in a piezoelectric element;
In the data write operation, the memory element is applied with pressure by deformation of the piezoelectric element, and the titanium oxide remains in the β-phase state and the write current is supplied, whereby the memory element is in the β-phase. 4. The memory according to claim 1, wherein the titanium oxide undergoes a phase transition to the λ phase to change a resistance value. 5. A memory device comprising a plurality of bit lines and a plurality of word lines, wherein a memory cell is arranged at each crossing position of the bit lines and the word lines,
The memory device according to claim 1, wherein each of the memory cells is provided with the memory according to claim 1. The memory cell includes a selection transistor between the bit line and the memory,
8. The memory device according to claim 7, wherein in the memory cell to which data is written, the voltage of the bit line is applied to the memory by turning on the selection transistor, and a write current flows through the memory. A memory device comprising a plurality of bit lines and a plurality of word lines, wherein a memory cell is arranged at each crossing position of the bit lines and the word lines,
Each of the memory cells
Memory according to claim 5 or 6,
A select transistor provided between the bit line and the memory;
A piezoelectric element side selection transistor to which a voltage is applied from a piezoelectric element control bit line,
When the piezoelectric element side selection transistor is turned on, a voltage is applied to the piezoelectric element from the piezoelectric element control bit line, and the piezoelectric element is deformed. When a pressure is applied to the composition of Ti ₃ 0 ₅ , the phase transition from a λ phase having a crystal structure in a paramagnetic metal state to a β phase having the characteristics of a non-magnetic semiconductor is irradiated with writing light. A memory element formed of titanium oxide that undergoes a phase transition from the β phase to the λ phase;
A piezoelectric element that deforms when a voltage is applied and applies pressure to the memory element;
The memory element includes
Volatilization is characterized in that when the writing light is irradiated in a state where pressure is applied by the piezoelectric element, the titanium oxide composed of the β phase undergoes phase transition to the λ phase and data is written. Recording medium.

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