JP2016163320A - Image reading device and semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an image reading device and the like capable of reducing deterioration in image quality.SOLUTION: An image reading device comprises: a first circuit block 510 that includes a first light receiving element PD1, a second light receiving element PD2, a first current circuit, a second current circuit, a first holding part C1, and a second holding part C2; and a second circuit block 520 that includes a third light receiving element PD3, a fourth light receiving element PD4, a third current circuit, a fourth current circuit, a third holding part C3, and a fourth holding part C4. The first current circuit and the second current circuit are connected with first ground wiring W1 and first gate wiring Wg1. The third current circuit and the fourth current circuit are connected with second ground wiring W2 and second gate wiring Wg2. The image reading device comprises: third ground wiring W3 connected with a first connection point Wx1 between the first current circuit and the second current circuit, and with a ground terminal GND; and fourth ground wiring W4 connected with a second connection point Wx2 between the third current circuit and the fourth current circuit, and with the ground terminal GND.SELECTED DRAWING: Figure 6

Description

  The present invention relates to an image reading apparatus and a semiconductor device.

  An image reading device (scanner) using a contact image sensor, a copier or a composite printer having a printing function added thereto have been developed. As a contact image sensor used in an image reading apparatus, a configuration using a photodiode provided on a semiconductor substrate is used.

  In the contact image sensor, a current circuit that generates a load current for reading an output signal from a photodiode is provided for each photodiode (Patent Document 1).

JP 2012-10008 A

  In the case of the above-described configuration, it is usually considered that a plurality of current circuits are connected to the ground terminal by a common ground wiring. However, since this ground wiring has a resistance component, a potential difference is caused by the current flowing from the current circuit. Therefore, the ground potential of each current circuit may differ depending on the position of the photodiode.

  When a plurality of current circuits are configured with a current mirror circuit that generates a current equivalent to one reference current, the variation in the ground potential causes variation in the current value of the current generated by the current circuit. There was a possibility that the voltage amplification factor of the pixel signal would change, resulting in a problem that the output signal deteriorated (shading). The deterioration of the output signal is one of the causes of the image quality deterioration of the image reading apparatus.

  The present invention has been made in view of the above technical problems. According to some aspects of the present invention, it is possible to provide an image reading apparatus and a semiconductor device that can reduce image quality deterioration.

  SUMMARY An advantage of some aspects of the invention is to solve at least a part of the problems described above, and the invention can be implemented as the following aspects or application examples.

[Application Example 1]
The image reading apparatus according to this application example is
An image reading device for reading an image,
A first circuit block including a first light receiving element and a second light receiving element that receive light from the image and perform photoelectric conversion, a first current circuit and a second current circuit, and a first holding unit and a second holding unit. When,
A second circuit block including a third light receiving element and a fourth light receiving element that receive light from the image and perform photoelectric conversion, a third current circuit and a fourth current circuit, and a third holding part and a fourth holding part. When,
With
The first current circuit generates a first current for transferring a first output signal based on an output signal of the first light receiving element to the first holding unit,
The second current circuit generates a second current for transferring a second output signal based on the output signal of the second light receiving element to the second holding unit,
The third current circuit generates a third current for transferring a third output signal based on the output signal of the third light receiving element to the third holding unit,
The fourth current circuit generates a fourth current for transferring a fourth output signal based on the output signal of the fourth light receiving element to the fourth holding unit,
The first holding unit holds the transferred first output signal,
The second holding unit holds the transferred second output signal,
The third holding unit holds the transferred third output signal,
The fourth holding unit holds the transferred fourth output signal,
The first current circuit and the second current circuit are electrically connected to a first ground wiring, and are also electrically connected to a first gate wiring for applying a first gate voltage,
The third current circuit and the fourth current circuit are electrically connected to a second ground wiring and electrically connected to a second gate wiring for applying a second gate voltage,
A third ground line electrically connected to a ground terminal and a first connection point provided on the first ground line between the first current circuit and the second current circuit;
A second connection point provided on the second ground wiring between the third current circuit and the fourth current circuit and a fourth ground wiring electrically connected to the ground terminal;
An image reading apparatus further comprising:

  According to this application example, the current flowing through each ground line can be reduced as compared with the case where the first circuit block and the second circuit block are connected to the ground terminal by one ground line. The variation in ground potential can be reduced. In addition, since the ground potential of the current circuit near the boundary between adjacent circuit blocks is close to that in the case where the first connection point and the second connection point are provided at each circuit block end, the adjacent circuit The current value of the current generated by the current circuit near the boundary between the blocks becomes a close value. As a result, variation in signals held in the holding unit near the boundary between adjacent circuit blocks can be reduced. Therefore, since a rapid sensitivity difference near the boundary between adjacent circuit blocks can be reduced, an image reading apparatus that can reduce image quality deterioration can be realized.

[Application Example 2]
In the above image reading apparatus,
The first current circuit is located at a first end of the first circuit block;
The second current circuit is located at a second end of the first circuit block;
The third current circuit is located at a first end of the second circuit block;
The fourth current circuit is located at a second end of the second circuit block;
The wiring length of the first ground wiring from the first connection point to the first current circuit is equal to the wiring length from the first connection point to the second current circuit,
The wiring length of the second ground wiring from the second connection point to the third current circuit may be equal to the wiring length from the second connection point to the fourth current circuit.

According to this application example, the first connection point is in the center between the first current circuit and the second current circuit, and the second connection point is in the center between the third current circuit and the fourth current circuit. As a result, the ground potentials of the first current circuit and the second current circuit can be made equal, and the grounds of the third current circuit and the fourth current circuit can be made equal, so that the ground of the current circuit near the boundary between adjacent circuit blocks can be obtained. The potential becomes a closer value, and the current value of the current generated by the current circuit near the boundary between adjacent circuit blocks becomes a closer value. As a result, it is possible to further reduce the variation in the signal held in the holding unit near the boundary between adjacent circuit blocks. Therefore, since a rapid sensitivity difference near the boundary between adjacent circuit blocks can be reduced, an image reading apparatus that can reduce image quality deterioration can be realized.

[Application Example 3]
In the above image reading apparatus,
The first gate voltage and the second gate voltage may have different voltage values.

  According to this application example, even when the wiring length from the ground terminal is different and the ground potential is different between the first circuit block and the second circuit block, the gate supplied to the current circuit for each circuit block Since the voltages are different, variation in current generated in each current circuit can be reduced. As a result, variations in signals held in the holding units can be reduced. Therefore, an image reading apparatus that can reduce image quality deterioration can be realized.

[Application Example 4]
In the above image reading apparatus,
The wiring length of the third ground wiring is longer than the wiring length of the fourth ground wiring,
The first gate voltage may be a voltage value higher than the second gate voltage.

  According to this application example, since the ground potential increases as the wiring length from the ground terminal becomes longer, each current circuit is generated between the first circuit block and the second circuit block by increasing the gate voltage. The variation in the current value of the current to be reduced can be reduced. As a result, variations in signals held in the holding units can be reduced. Therefore, an image reading apparatus that can reduce image quality deterioration can be realized.

[Application Example 5]
An image reading apparatus as described above,
The first light receiving element, the second light receiving element, the third light receiving element, and the fourth light receiving element may be positioned side by side in one direction.

  As a result, an image reading apparatus capable of reading a large image can be realized. In addition, since the light receiving elements are arranged in one direction, the normal configuration is that the wiring length from the ground terminal to the current circuit corresponding to each light receiving element is different. Therefore, by applying the present invention, it is possible to realize an image reading apparatus that can benefit from a reduction in image quality degradation.

[Application Example 6]
The semiconductor device according to this application example is
A first circuit block including a first light receiving element and a second light receiving element that receive light from an image and perform photoelectric conversion, a first current circuit and a second current circuit, and a first holding unit and a second holding unit; ,
A second circuit block including a third light receiving element and a fourth light receiving element that receive light from the image and perform photoelectric conversion, a third current circuit and a fourth current circuit, and a third holding part and a fourth holding part. When,
With
The first current circuit generates a first current for transferring a first output signal based on an output signal of the first light receiving element to the first holding unit,
The second current circuit generates a second current for transferring a second output signal based on the output signal of the second light receiving element to the second holding unit,
The third current circuit generates a third current for transferring a third output signal based on the output signal of the third light receiving element to the third holding unit,
The fourth current circuit generates a fourth current for transferring a fourth output signal based on the output signal of the fourth light receiving element to the fourth holding unit,
The first holding unit holds the transferred first output signal,
The second holding unit holds the transferred second output signal,
The third holding unit holds the transferred third output signal,
The fourth holding unit holds the transferred fourth output signal,
The first current circuit and the second current circuit are electrically connected to a first ground wiring, and are also electrically connected to a first gate wiring for applying a first gate voltage,
The third current circuit and the fourth current circuit are electrically connected to a second ground wiring and electrically connected to a second gate wiring for applying a second gate voltage,
A third ground line electrically connected to a ground terminal and a first connection point provided on the first ground line between the first current circuit and the second current circuit;
A second connection point provided on the second ground wiring between the third current circuit and the fourth current circuit and a fourth ground wiring electrically connected to the ground terminal;
A semiconductor device further comprising:

  According to this application example, the current flowing through each ground line can be reduced as compared with the case where the first circuit block and the second circuit block are connected to the ground terminal by one ground line. The variation in ground potential can be reduced. In addition, since the ground potential of the current circuit in the vicinity of the boundary between adjacent circuit blocks is close to that in the case where the first connection point and the second connection point are provided at each circuit block end, the adjacent circuit blocks The current value of the current generated by the current circuit in the vicinity of the boundary becomes a close value. Thus, it is possible to realize a semiconductor device that can reduce variations in signals held in a holding unit near the boundary between adjacent circuit blocks.

1 is an external perspective view showing a multifunction machine according to an embodiment. It is the perspective view which showed the internal structure of the scanner unit. It is a disassembled perspective view which shows the structure of an image sensor typically. It is a top view which shows typically arrangement | positioning of an image reading chip | tip. It is a top view which shows typically the outline | summary of the layout structure of an image reading chip | tip. It is a circuit diagram of an image reading chip. 2 is a partial plan view schematically showing a layout configuration of an image reading chip. FIG. FIG. 8A is a graph schematically showing the relationship between the current circuit number and the ground potential Vgnd and each gate voltage, and FIG. 8B shows the current circuit number and the current generated by each current circuit. It is a graph which shows a relation typically.

  DESCRIPTION OF EMBODIMENTS Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the drawings. The drawings used are for convenience of explanation. The embodiments described below do not unduly limit the contents of the present invention described in the claims. Also, not all of the configurations described below are essential constituent requirements of the present invention.

  Hereinafter, a multifunction peripheral (composite apparatus) 1 to which an image reading apparatus of the present invention is applied will be described with reference to the accompanying drawings. FIG. 1 is an external perspective view showing the multifunction device 1. As shown in FIG. 1, the multifunction machine 1 includes a printer unit (image recording apparatus: first apparatus) 2 that is an apparatus main body, and a scanner unit (image reading apparatus) that is an upper unit disposed on the printer unit 2. : A second device) 3. In the following description, it is assumed that the front-rear direction in FIG. 1 is the X-axis direction and the left-right direction is the Y-axis direction.

As shown in FIG. 1, the printer unit 2 is disposed above a feeding path (not shown) that feeds a sheet recording medium (printing paper or cut sheet) along a feeding path, An apparatus frame (not shown) on which a printing unit (not shown) that performs printing processing on a recording medium by an inkjet method, a panel-type operation unit 63 disposed on the front surface, and a transport unit, a printing unit, and an operation unit 63 are mounted. And a device housing 65 covering these. The apparatus housing 65 is provided with a discharge port 66 through which the recording medium after printing is discharged. Although not shown, a USB port and a power supply port are provided at the bottom of the rear surface. That is, the multifunction device 1 is configured to be connectable to a computer or the like via a USB port.

  The scanner unit 3 is rotatably supported by the printer unit 2 via a hinge 4 at the rear end portion, and covers the upper part of the printer unit 2 so as to be freely opened and closed. That is, by pulling up the scanner unit 3 in the rotation direction, the upper surface opening of the printer unit 2 is exposed, and the inside of the printer unit 2 is exposed through the upper surface opening. On the other hand, the scanner unit 3 is pulled down in the rotation direction and placed on the printer unit 2, so that the scanner unit 3 closes the upper surface opening. As described above, by opening the scanner unit 3, it is possible to replace the ink cartridge, clear a paper jam, and the like.

  FIG. 2 is a perspective view showing the internal structure of the scanner unit 3. As shown in FIGS. 1 and 2, the scanner unit 3 is rotatably supported on an upper frame 11 that is a housing, an image reading unit 12 housed in the upper frame 11, and an upper portion of the upper frame 11. And an upper lid 13. As shown in FIG. 2, the upper frame 11 includes a box-shaped lower case 16 that houses the image reading unit 12, and an upper case 17 that covers the top surface of the lower case 16. In the upper case 17, a glass document placing plate (document table; not shown) is widely arranged, and a medium to be read (document) with a reading surface facing down is placed thereon. On the other hand, the lower case 16 is formed in a shallow box shape with the upper surface opened.

  As shown in FIG. 2, the image reading unit 12 includes a line sensor type sensor unit 31, a sensor carriage 32 on which the sensor unit 31 is mounted, and extends in the Y-axis direction, and supports the sensor carriage 32 in a slidable manner. And a self-propelled sensor moving mechanism 34 that moves the sensor carriage 32 along the guide shaft 33. The sensor unit 31 includes an image sensor (sensor unit) 41 that is a complementary metal-oxide-semiconductor (CMOS) line sensor extending in the X-axis direction, and is moved along the guide shaft 33 by a motor-driven sensor moving mechanism 34. Reciprocate in the Y-axis direction. As a result, the image of the medium to be read (original) on the original placement plate is read. The sensor unit 31 may be a CCD (Charge Coupled Device) line sensor.

  FIG. 3 is an exploded perspective view schematically showing the configuration of the image sensor 41. In the example shown in FIG. 3, the image sensor 41 includes a case 411, a light source 412, a lens 413, a module substrate 414, and an image reading chip 415 (semiconductor device) for reading an image. The light source 412, the lens 413, and the image reading chip 415 are accommodated between the case 411 and the module substrate 414. The case 411 is provided with a slit. Light emitted from the light source 412 is applied to the read medium through the slit, and reflected light from the read medium is input to the lens 413 through the slit. The lens 413 guides the input light to the image reading chip 415.

  FIG. 4 is a plan view schematically showing the arrangement of the image reading chip 415. As shown in FIG. 4, a plurality of image reading chips 415 are arranged on the module substrate 414 in a one-dimensional direction (X-axis direction in FIG. 4). Thereby, the scanner unit 3 (image reading apparatus) capable of reading a large image can be realized.

  FIG. 5 is a plan view schematically showing an outline of the layout configuration of the image reading chip 415. In the example illustrated in FIG. 5, the image reading chip 415 includes, on a semiconductor substrate 4150, a plurality of light receiving elements 416 that receive light from an image and perform photoelectric conversion, and an image from a signal generated by photoelectric conversion by the light receiving element 416. And a signal conversion unit 417 that generates an image reading signal that is a signal corresponding to the signal. The light receiving element 416 in the present embodiment is configured by a photodiode. The image reading signal may be an analog signal or a digital data signal. The signal conversion unit 417 may serially output an image reading signal based on the signal from each light receiving element 416.

  As shown in FIG. 5, the image reading chip 415 includes a plurality of light receiving elements 416 positioned side by side in a one-dimensional direction (X-axis direction in FIG. 5). Thereby, the scanner unit 3 (image reading apparatus) capable of reading a large image can be realized.

  FIG. 6 is a circuit diagram of the image reading chip 415. FIG. 7 is a partial plan view schematically showing the layout configuration of the image reading chip 415.

  The image reading chip 415 shown in FIG. 6 includes a first light receiving element PD1 and a second light receiving element PD2 as the light receiving element 416, a first current circuit (transistor M31) and a second current circuit (transistor M32), The first circuit block 510 including the holding unit C1 and the second holding unit C2, the third light receiving element PD3 and the fourth light receiving element PD4 as the light receiving element 416, the third current circuit (transistor M33) and the fourth current A second circuit block 520 including a circuit (transistor M34), a third holding unit C3 and a fourth holding unit C4, a reading unit 530, and a control circuit 540 are provided. First current circuit (transistor M31), first holding unit C1, second current circuit (transistor M32), second holding unit C2, third current circuit (transistor M33), third holding unit C3, fourth current circuit ( The transistor M34), the fourth holding unit C4, the reading unit 530, and the control circuit 540 are configured as a part of the signal conversion unit 417 described above.

  The anode of the first light receiving element PD1 is connected to the ground potential, and the cathode is connected to the source of the transistor M11 and the gate of the transistor M21. The source of the transistor M21 is connected to the first terminal of the first holding unit C1 through the switch SW11, and is connected to the first terminal of the first current circuit (transistor M31) through the switch SW21.

  The anode of the second light receiving element PD2 is connected to the ground potential, and the cathode is connected to the source of the transistor M12 and the gate of the transistor M22. The source of the transistor M22 is connected to the first terminal of the second holding unit C2 via the switch SW12, and is connected to the first terminal of the second current circuit (transistor M32) via the switch SW22.

  The anode of the third light receiving element PD3 is connected to the ground potential, and the cathode is connected to the source of the transistor M13 and the gate of the transistor M23. The source of the transistor M23 is connected to the first terminal of the third holding unit C3 via the switch SW13, and is connected to the first terminal of the third current circuit (transistor M33) via the switch SW23.

The anode of the fourth light receiving element PD4 is connected to the ground potential, and the cathode is connected to the source of the transistor M14 and the gate of the transistor M24. The source of the transistor M24 is connected to the first terminal of the fourth holding unit C4 via the switch SW14, and is connected to the first terminal of the fourth current circuit (transistor M34) via the switch SW24.

  The first current circuit (transistor M31) generates a first current for transferring a first output signal based on the output signal of the first light receiving element PD1 to the first holding unit C1. The first current drives the transistor M21 that amplifies the output signal of the first light receiving element PD1. In the example shown in FIG. 6, the first current circuit (transistor M31) is configured as a current mirror circuit that generates a current equivalent to that of the current source Ir1.

  The second current circuit (transistor M32) generates a second current for transferring a second output signal based on the output signal of the second light receiving element PD2 to the second holding unit C2. The second current drives the transistor M22 that amplifies the voltage of the output signal of the second light receiving element PD2. In the example shown in FIG. 6, the second current circuit (transistor M32) is configured as a current mirror circuit that generates a current equivalent to the current of the current source Ir1.

  The first current circuit (transistor M31) and the second current circuit (transistor M32) are electrically connected to the first gate wiring Wg1 to which the first gate voltage Vg1 is applied. In the example shown in FIG. 6, the first gate wiring Wg1 is electrically connected to the gate and drain of the transistor M1, the gate of the transistor M31, and the gate of the transistor M32.

  The first current circuit (transistor M31) and the second current circuit (transistor M32) are electrically connected to the first ground wiring W1. In the example shown in FIG. 6, the first ground wiring W1 is electrically connected to the source of the transistor M1, the source of the transistor M31, and the source of the transistor M32.

  The third current circuit (transistor M33) generates a third current for transferring a third output signal based on the output signal of the third light receiving element PD3 to the third holding unit C3. The third current drives the transistor M23 that amplifies the voltage of the output signal of the third light receiving element PD3. In the example shown in FIG. 6, the third current circuit (transistor M33) is configured as a current mirror circuit that generates a current equivalent to the current source Ir2 current.

  The fourth current circuit (transistor M34) generates a fourth current for transferring the fourth output signal based on the output signal of the fourth light receiving element PD4 to the fourth holding unit C4. The fourth current drives the transistor M24 that amplifies the output signal of the fourth light receiving element PD4. In the example shown in FIG. 6, the fourth current circuit (transistor M34) is configured as a current mirror circuit that generates a current equivalent to the current of the current source Ir2.

  The third current circuit (transistor M33) and the fourth current circuit (transistor M34) are electrically connected to the second gate wiring Wg2 to which the second gate voltage Vg2 is applied. In the example shown in FIG. 6, the second gate wiring Wg2 is electrically connected to the gate and drain of the transistor M2, the gate of the transistor M33, and the gate of the transistor M34.

  The third current circuit (transistor M33) and the fourth current circuit (transistor M34) are electrically connected to the second ground wiring W2. In the example shown in FIG. 6, the second ground wiring W2 is electrically connected to the source of the transistor M2, the source of the transistor M33, and the source of the transistor M33.

The first holding unit C1 holds the transferred first output signal. The second holding unit C2 holds the transferred second output signal. The third holding unit C3 holds the transferred third output signal. The fourth holding unit C4 holds the transferred fourth output signal. In the present embodiment, the first holding unit C1, the second holding unit C2, the third holding unit C3, and the fourth holding unit C4 are each configured by a capacitor. The first holding unit C1, the second holding unit C2, the third holding unit C3, and the fourth holding unit C4 constitute a line memory as a whole.

  As shown in FIGS. 6 and 7, the image reading chip 415 of the present embodiment further includes a third ground wiring W3 and a fourth ground wiring W4. The third ground line W3 is electrically connected to the first connection point Wx1 and the ground terminal GND provided on the first ground line W1 between the first current circuit (transistor M31) and the second current circuit (transistor M32). Connect to. The fourth ground wiring W4 is electrically connected to the second connection point Wx2 and the ground terminal GND provided on the second ground wiring W2 between the third current circuit (transistor M33) and the fourth current circuit (transistor M34). Connect to.

  In the above example, the number of light receiving elements 416 and current circuits included in each circuit block is two, but may be three or more. Further, the number of the light receiving elements 416 and the current circuits may be different for each circuit block. In the above example, the number of circuit blocks is two, but may be three or more.

  FIG. 8A is a graph schematically showing the relationship between the current circuit number and the ground potential Vgnd and each gate voltage, and FIG. 8B shows the current circuit number and the current generated by each current circuit. It is a graph which shows a relation typically. In FIG. 8A, the horizontal axis represents the current circuit number, and the vertical axis represents the ground potential Vgnd, the first gate voltage Vg1, and the second gate voltage Vg2. In FIG. 8B, the horizontal axis represents the current circuit number, and the vertical axis represents the current value of the current generated by each current circuit.

  The current circuit number is a number assigned to each current circuit including the first current circuit, the second current circuit, the third current circuit, and the fourth current circuit. As shown in FIG. 5, the light receiving elements 416 are arranged side by side in one direction, and each current circuit is provided so as to correspond to the light receiving element 416. For example, the left to right in the X-axis direction is provided. A number that increases toward is assigned as a current circuit number.

  In the example shown in FIGS. 8A and 8B, the first circuit block 510 and the second circuit block 520 include three or more light receiving elements 416 and current circuits corresponding thereto. The case is shown.

  As the wiring length from the ground terminal GND to each current circuit becomes longer, the ground potential Vgnd increases due to the resistance component of the ground wiring. As shown in FIG. 8A, the ground potential Vgnd near the center of the first circuit block 510 having the first connection point Wx1 and near the center of the second circuit block 520 having the second connection point Wx2 is low. The ground potential Vgnd of the current circuit away from the first connection point Wx1 and the second connection point Wx2 becomes high.

If the channel length modulation effect is ignored, the current value of the current generated in each current circuit is proportional to (gate voltage−ground potential Vgnd−transistor threshold voltage Vth) ² , so (gate voltage−ground potential Vgnd). ) Can be reduced, the current value can be reduced. In the present embodiment, as shown in FIG. 8B, each current circuit (the first connection point Wx1 and the second connection point) near the boundary between the first circuit block 510 and the second circuit block 520 has the above-described configuration. Variation in the current value of the current generated in the current circuit separated from the connection point Wx2 can be reduced.

According to the present embodiment, since the first circuit block 510 and the second circuit block 520 and the ground terminal GND are connected by one ground wiring, the current flowing through each ground wiring can be reduced. Variations in the ground potential Vgnd of each current circuit can be reduced. In addition, since the first connection point Wx1 and the second connection point Wx2 are provided at the end of each circuit block, the ground potential Vgnd of the current circuit near the boundary between adjacent circuit blocks becomes a close value. The current value of the current generated by the current circuit near the boundary between adjacent circuit blocks becomes a close value. As a result, variation in signals held in the holding unit near the boundary between adjacent circuit blocks can be reduced. Therefore, since a rapid difference in sensitivity near the boundary between adjacent circuit blocks can be reduced, an image reading chip 415 (semiconductor device) that can reduce image quality deterioration can be realized. Therefore, it is possible to realize the scanner unit 3 (image reading apparatus) that can reduce image quality deterioration.

  As shown in FIGS. 6 and 7, in the present embodiment, the first current circuit (transistor M31) is located at the first end of the first circuit block 510 (the left end in FIGS. 6 and 7). The second current circuit (transistor M32) is located at the second end of the first circuit block 510 (the right end in FIGS. 6 and 7). The third current circuit (transistor M33) is located at the first end (the left end in FIGS. 6 and 7) of the second circuit block 520, and the fourth current circuit (transistor M34) is the second circuit block. It is located at the second end of 520 (the right end in FIGS. 6 and 7).

  As shown in FIG. 7, in the present embodiment, the wiring length from the first connection point Wx1 to the first current circuit (transistor M31) of the first ground wiring W1 is the second current from the first connection point Wx1. The wiring length from the second connection point Wx2 to the third current circuit (transistor M33) of the second ground wiring W2 is equal to the wiring length to the circuit (transistor M32). It is equal to the wiring length to the transistor M34).

  According to this embodiment, the first connection point Wx1 is in the center between the first current circuit (transistor M31) and the second current circuit (transistor M32), and the second connection point Wx2 is the third current circuit (transistor). M33) and the fourth current circuit (transistor M34), the ground potential Vgnd of the first current circuit (transistor M31) and the second current circuit (transistor M32) is made equal, and the third current Since the ground potential Vgnd of the circuit (transistor M33) and the fourth current circuit (transistor M34) can be made equal, the ground potential Vgnd of the current circuit in the vicinity of the boundary between adjacent circuit blocks becomes a closer value, and between adjacent circuit blocks The current value of the current generated by the current circuit near the boundary is even closer. As a result, it is possible to further reduce the variation in the signal held in the holding unit near the boundary between adjacent circuit blocks. Therefore, it is possible to realize the image reading chip 415 (semiconductor device) that can reduce a sudden difference in sensitivity near the boundary between adjacent circuit blocks. Therefore, it is possible to realize the scanner unit 3 (image reading apparatus) that can reduce image quality deterioration.

  In the present embodiment, the first gate voltage Vg1 and the second gate voltage Vg2 have different voltage values. As shown in FIG. 7, since the wiring length from the source of the transistor M1 to the ground terminal GND is different from the wiring length from the source of the transistor M2 to the ground terminal GND, the ground potential Vgnd between the transistor M1 and the transistor M2 is Different from each other. As a result, the voltage value of the first gate voltage Vg1 is different from the voltage value of the second gate voltage Vg2.

According to the present embodiment, even when the wiring length from the ground terminal GND is different between the first circuit block 510 and the second circuit block 520 and the ground potential Vgnd is different, each circuit block has a current circuit. Since the supplied gate voltages are different, variations in currents generated in the first current circuit (transistor M31), the second current circuit (transistor M32), the third current circuit (transistor M33), and the fourth current circuit (transistor M34) Can be reduced. Thereby, it is possible to realize an image reading chip 415 (semiconductor device) that can reduce variations in signals held in the first holding unit C1, the second holding unit C2, the third holding unit C3, and the fourth holding unit C4. Therefore, it is possible to realize the scanner unit 3 (image reading apparatus) that can reduce image quality deterioration.

  In the present embodiment, the wiring length of the third ground wiring W3 is longer than the wiring length of the fourth ground wiring W4, and the first gate voltage Vg1 is higher than the second gate voltage Vg2.

As the wiring length from the ground terminal GND to each current circuit becomes longer, the ground potential Vgnd increases due to the resistance component of the ground wiring. Since the current value of the current generated in each current circuit is proportional to (gate voltage−ground potential Vgnd−transistor threshold voltage Vth) ² , the variation in (gate voltage−ground potential Vgnd) is reduced. The variation in current value can be reduced. Therefore, as shown in FIG. 8A, the first gate voltage Vg1 is set to a voltage value higher than the second gate voltage Vg2. As a result, as shown in FIG. 8B, the variation in the current value of the current generated in each current circuit between the first circuit block 510 and the second circuit block 520 can be reduced. .

  According to this embodiment, the longer the wiring length from the ground terminal GND, the higher the ground potential Vgnd. Therefore, by increasing the gate voltage, each of the first circuit block 510 and the second circuit block 520 Variation in the current value of the current generated by the current circuit can be reduced. As a result, variations in signals held in the first holding unit C1, the second holding unit C2, the third holding unit C3, and the fourth holding unit C4 can be reduced. Therefore, an image reading chip 415 (semiconductor device) that can reduce image quality deterioration can be realized. Therefore, it is possible to realize the scanner unit 3 (image reading apparatus) that can reduce image quality deterioration.

  As described above, the image reading chip 415 of the present embodiment includes the plurality of light receiving elements 416 including the first light receiving element PD1, the second light receiving element PD2, the third light receiving element PD3, and the fourth light receiving element PD4. As shown in FIG. 5, the plurality of light receiving elements 416 are arranged side by side in one direction. In the example shown in FIG. 5, the light receiving elements 416 are positioned side by side in the X-axis direction.

  According to the present embodiment, since the light receiving elements 416 are arranged in one direction, the normal configuration is that the wiring length from the ground terminal GND to the current circuit corresponding to each light receiving element 416 is different. Therefore, by applying the present invention, it is possible to realize a scanner unit 3 (image reading apparatus) that can benefit from reduction in image quality degradation.

  The reading unit 530 sequentially reads the first output signal from the first holding unit C1, reads the second output signal from the second holding unit C2, reads the third output signal from the third holding unit C3, and the fourth holding unit. Read the fourth output signal from C4.

  The control circuit 540 controls each switch and the transistor M11, the transistor M12, the transistor M13, and the transistor M14. An example of control by the control circuit 540 will be described below.

  First, the control circuit 540 turns on the transistor M11, the transistor M12, the transistor M13, and the transistor M14 for a first predetermined time period, and sets the first light receiving element PD1, the second light receiving element PD2, the third light receiving element PD3, and the fourth light receiving element. The cathode of PD4 is controlled to the power supply potential.

  After the first predetermined time has elapsed, the first light receiving element PD1, the second light receiving element PD2, the third light receiving element PD3, and the fourth light receiving element PD4 receive light for the second predetermined time, and charge corresponding to the amount of light is transmitted to the transistor M21, The voltage is converted into voltage at each gate of the transistor M22, the transistor M23, and the transistor M24.

  After the second predetermined time has elapsed, the control circuit 540 turns on the switch SW11, the switch SW12, the switch SW13, the switch SW14, the switch SW21, the switch SW22, the switch SW23, and the switch SW24. As a result, the transistors M21 to M24 operate as a source follower circuit, transfer the first output signal based on the output signal corresponding to the amount of light received by the first light receiving element PD1 to the first holding unit C1, and the second light receiving element PD2 The second output signal based on the output signal corresponding to the amount of received light is transferred to the second holding unit C2, and the third output signal based on the output signal corresponding to the amount of received light of the third light receiving element PD3 is transferred to the third holding unit C3 Then, a fourth output signal based on the output signal corresponding to the amount of light received by the fourth light receiving element PD4 is transferred to the fourth holding unit C4.

  Thereafter, the control circuit 540 turns off the switch SW11, the switch SW12, the switch SW13, the switch SW14, the switch SW21, the switch SW22, the switch SW23, and the switch SW24.

  Thereafter, the control circuit 540 outputs a control signal to the reading unit 530, and the reading unit 530 receives the first output signal held in the first holding unit C1, the second output signal held in the second holding unit C2, The third output signal held in the third holding unit C3 and the fourth output signal held in the fourth holding unit C4 are sequentially output to the terminal OUT.

  As mentioned above, although this embodiment or the modification was demonstrated, this invention is not limited to these this embodiment or a modification, It is possible to implement in a various aspect in the range which does not deviate from the summary.

  The present invention includes configurations that are substantially the same as the configurations described in the embodiments (for example, configurations that have the same functions, methods, and results, or configurations that have the same objects and effects). In addition, the invention includes a configuration in which a non-essential part of the configuration described in the embodiment is replaced. In addition, the present invention includes a configuration that achieves the same effect as the configuration described in the embodiment or a configuration that can achieve the same object. In addition, the invention includes a configuration in which a known technique is added to the configuration described in the embodiment.

DESCRIPTION OF SYMBOLS 1 ... MFP, 2 ... Printer unit, 3 ... Scanner unit, 4 ... Hinge part, 11 ... Upper frame, 12 ... Image reading part, 13 ... Upper lid, 16 ... Lower case, 17 ... Upper case, 31 ... Sensor unit, 32 ... sensor carriage, 33 ... guide shaft, 34 ... sensor moving mechanism, 41 ... image sensor, 63 ... operating unit, 65 ... device housing, 66 ... discharge port, 411 ... case, 412 ... light source, 413 ... lens, 414 ... Module substrate, 415 ... image reading chip, 416 ... light receiving element, 417 ... signal conversion unit, 510 ... first circuit block, 520 ... second circuit block, 530 ... reading unit, 540 ... control circuit, C1 ... first holding unit C2 ... second holding unit, C3 ... third holding unit, C4 ... fourth holding unit, GND ... ground terminal, Ir1, Ir2 ... current source, 1, M2, M11, M12, M13, M14, M21, M22, M23, M24, M31, M32, M33, M34 ... Transistor, PD1, PD2, PD3, PD4 ... Light receiving element, SW11, SW12, SW13, SW14, SW21 , SW22, SW23, SW24 ... switch, W1 ... first ground wiring, W2 ... second ground wiring, W3 ... third ground wiring, W4 ... fourth ground wiring, Wg1 ... first gate wiring, Wg2 ... second gate wiring. , Wx1 ... first connection point, Wx2 ... second connection point

Claims (6)

An image reading device for reading an image,
A first circuit block including a first light receiving element and a second light receiving element that receive light from the image and perform photoelectric conversion, a first current circuit and a second current circuit, and a first holding unit and a second holding unit. When,
A second circuit block including a third light receiving element and a fourth light receiving element that receive light from the image and perform photoelectric conversion, a third current circuit and a fourth current circuit, and a third holding part and a fourth holding part. When,
With
The first current circuit generates a first current for transferring a first output signal based on an output signal of the first light receiving element to the first holding unit,
The second current circuit generates a second current for transferring a second output signal based on the output signal of the second light receiving element to the second holding unit,
The third current circuit generates a third current for transferring a third output signal based on the output signal of the third light receiving element to the third holding unit,
The fourth current circuit generates a fourth current for transferring a fourth output signal based on the output signal of the fourth light receiving element to the fourth holding unit,
The first holding unit holds the transferred first output signal,
The second holding unit holds the transferred second output signal,
The third holding unit holds the transferred third output signal,
The fourth holding unit holds the transferred fourth output signal,
The first current circuit and the second current circuit are electrically connected to a first ground wiring, and are also electrically connected to a first gate wiring for applying a first gate voltage,
The third current circuit and the fourth current circuit are electrically connected to a second ground wiring and electrically connected to a second gate wiring for applying a second gate voltage,
A third ground line electrically connected to a ground terminal and a first connection point provided on the first ground line between the first current circuit and the second current circuit;
A second connection point provided on the second ground wiring between the third current circuit and the fourth current circuit and a fourth ground wiring electrically connected to the ground terminal;
An image reading apparatus further comprising: The image reading apparatus according to claim 1,
The first current circuit is located at a first end of the first circuit block;
The second current circuit is located at a second end of the first circuit block;
The third current circuit is located at a first end of the second circuit block;
The fourth current circuit is located at a second end of the second circuit block;
The wiring length of the first ground wiring from the first connection point to the first current circuit is equal to the wiring length from the first connection point to the second current circuit,
The image reading device, wherein a wiring length of the second ground wiring from the second connection point to the third current circuit is equal to a wiring length from the second connection point to the fourth current circuit. The image reading apparatus according to claim 1 or 2,
The image reading apparatus, wherein the first gate voltage and the second gate voltage have different voltage values. The image reading apparatus according to any one of claims 1 to 3,
The wiring length of the third ground wiring is longer than the wiring length of the fourth ground wiring,
The image reading apparatus, wherein the first gate voltage has a voltage value higher than the second gate voltage. The image reading apparatus according to any one of claims 1 to 4,
The image reading apparatus, wherein the first light receiving element, the second light receiving element, the third light receiving element, and the fourth light receiving element are arranged side by side in one direction. A first circuit block including a first light receiving element and a second light receiving element that receive light from an image and perform photoelectric conversion, a first current circuit and a second current circuit, and a first holding unit and a second holding unit; ,
A second circuit block including a third light receiving element and a fourth light receiving element that receive light from the image and perform photoelectric conversion, a third current circuit and a fourth current circuit, and a third holding part and a fourth holding part. When,
With
The first current circuit generates a first current for transferring a first output signal based on an output signal of the first light receiving element to the first holding unit,
The second current circuit generates a second current for transferring a second output signal based on the output signal of the second light receiving element to the second holding unit,
The third current circuit generates a third current for transferring a third output signal based on the output signal of the third light receiving element to the third holding unit,
The fourth current circuit generates a fourth current for transferring a fourth output signal based on the output signal of the fourth light receiving element to the fourth holding unit,
The first holding unit holds the transferred first output signal,
The second holding unit holds the transferred second output signal,
The third holding unit holds the transferred third output signal,
The fourth holding unit holds the transferred fourth output signal,
The first current circuit and the second current circuit are electrically connected to a first ground wiring, and are also electrically connected to a first gate wiring for applying a first gate voltage,
The third current circuit and the fourth current circuit are electrically connected to a second ground wiring and electrically connected to a second gate wiring for applying a second gate voltage,
A third ground line electrically connected to a ground terminal and a first connection point provided on the first ground line between the first current circuit and the second current circuit;
A second connection point provided on the second ground wiring between the third current circuit and the fourth current circuit and a fourth ground wiring electrically connected to the ground terminal;
A semiconductor device further comprising:

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