JP2016157833A - Semiconductor device manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device manufacturing method which makes it possible to recognize an ID even during a working process after mounting of a support medium to demounting of the support medium.SOLUTION: A semiconductor device manufacturing method comprises the steps of: forming an element part on a first surface of a semiconductor substrate where an ID is marked; forming an adhesive layer on the first surface of the semiconductor substrate; forming a photothermal conversion agent layer on a second surface of a light permeable support medium; removing the photothermal conversion agent on the support medium at a place corresponding to the iD; and mounting the support medium on the semiconductor substrate in such a manner that the first surface of the semiconductor substrate and the second surface of the support medium face each other.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a method for manufacturing a semiconductor device.

  In recent years, the degree of integration of semiconductor devices has been improved year by year, and accordingly, the miniaturization and multilayering of wiring have been advanced. On the other hand, since various semiconductor devices incorporated in mobile products such as smart phones are mounted with high density, a reduction in package size and a reduction in thickness are required.

  In response to such a demand, a technique called MCP (Multi Chip Package) for mounting a plurality of semiconductor chips on a single wiring board at a high density has been developed. Among them, a CoC (Chip on Chip) type semiconductor device (semiconductor package) has attracted attention, and in this CoC type semiconductor device, a chip stack formed by stacking semiconductor chips having through electrodes is the main surface of the wiring board. Implemented above. The through electrode is referred to as TSV (Through Substrate Via), and is provided so as to penetrate the semiconductor substrate of the semiconductor chip. Both ends of the through electrode are connected to a wiring substrate or another semiconductor chip via a bump electrode.

  As a method for forming the through electrode, there are a viamidel method and a via last method (for example, see Patent Document 1). In the Viamide method, the formation of through electrode holes and embedding of the through electrode material are executed from the surface side of the semiconductor substrate in the initial stage of the semiconductor device manufacturing process, and then elements (transistors, memory capacitors, etc.) and wiring layers are formed. At the same time, the semiconductor substrate is thinned by CMP or the like from the back side of the semiconductor substrate, and one end of the through electrode is exposed to complete the through electrode. In contrast, in the via last method, after the wiring layer is formed, the thickness of the semiconductor substrate is reduced from the back surface side to a predetermined thickness, and then the formation of the through electrode hole and the embedding of the through electrode material are performed from the back surface side of the semiconductor substrate. Thus, the through electrode is completed.

  There is also a technique for temporarily integrating a support having a high mechanical strength and a semiconductor substrate that is thicker than the thinned semiconductor substrate from the thinning process to the dicing process of the semiconductor substrate (for example, Patent Documents). 2). This reinforces the mechanical strength against cracking, bending and the like of the thinned semiconductor substrate.

JP 2011-228419 A JP 2004-64040 A

The following analysis has been made by the present inventors.
The above-described conventional technology has a problem in that the ID written on the semiconductor wafer cannot be confirmed while the support and the semiconductor substrate are integrated, resulting in a large loss cost. Hereinafter, this problem will be described with a specific example with reference to FIG.

  FIG. 46-A) shows the state of the semiconductor substrate in which the front bumps are formed on the upper surface (first surface) before mounting. A rectangular semiconductor chip formation region (element portion) is provided on the first surface of the semiconductor substrate to form a semiconductor chip. An outer peripheral region where no semiconductor chip is formed is provided on the outer peripheral side of the semiconductor substrate, and an ID such as a wafer ID or a lot ID (for example, ID: 1A05158) is provided on the outer peripheral region as shown in FIG. 46-A. Marked with a laser marker. ID: 1A05158 represents 1A: input year / month ID, 05: wafer ID, 158: lot ID.

  FIG. 46-B) shows a state where a thermosetting support adhesive layer is laminated on the first surface of the semiconductor substrate. Since the support adhesive is not light-shielding, in this state, the operator can still visually confirm the ID (laser mark character).

  On the other hand, FIG. 46-C) shows the support body before mounting. The support is made of, for example, transparent quartz glass. FIG. 46-D) shows a state in which a photothermal conversion agent is applied to the lower surface (second surface) of the support. The photothermal conversion agent is, for example, a mixture of carbon black (carbon powder), which is a light absorber, transparent filler (silica, talc, barium sulfate, etc.), and a thermally decomposable resin mixed with a solvent and dried. Yes, it is polymerized and cured by a heat treatment of 80 degrees or more. The photothermal conversion agent layer on the support composed of the photothermal conversion agent is a layer rich in light shielding properties and endothermic properties, and the light absorption rate is generally 80% or more.

  46-E) shows a support on the semiconductor substrate such that the first surface of the semiconductor substrate shown in FIG. 46-B) and the second surface of the support shown in FIG. 46-D) face each other. Indicates the mounted state. The polymer of the semiconductor substrate / support shown in FIG. 46-E) uses the UV light (or UV light + heat treatment) after mounting the support, and the photothermal conversion agent layer on the support and the support Curing / polymerization treatment with the adhesive layer is performed. By this curing / polymerization treatment, the adhesive force from the semiconductor substrate to the support adhesive layer, the photothermal conversion agent layer on the support, and the support is reinforced. In this state, since the photothermal conversion agent layer on the support sandwiched between the semiconductor substrate and the support is a light-shielding body, the operator must visually confirm the ID (laser mark character) on the semiconductor substrate. I can't.

  The polymer of the semiconductor substrate / support is subjected to a thinning process or a dicing process. In these processing steps, for example, 25 semiconductor wafers corresponding to one lot are stored in a storage case for one lot. For example, the input date and lot ID are specified in the storage case. In each storage case, 25 shelves are prepared, and semiconductor wafers are stored in the order of wafer ID (01 to 25) from the top of the shelf (or from the bottom of the shelf).

  When a storage case is set in each process apparatus, each process apparatus takes out each semiconductor wafer by a transfer robot and executes a corresponding process. Thereafter, the processed semiconductor wafer is returned to the position of the original shelf in the original storage case by the transfer robot. At this time, the computer in each process apparatus identifies each semiconductor wafer by the ID of the storage case and the position of the shelf.

  Here, when a computer trouble occurs in each process apparatus and the storage of the storage case ID and the shelf position of the semiconductor wafer being transferred disappears, the transfer robot cannot return the semiconductor wafer being transferred to the original position. . In particular, the operator cannot visually confirm the ID on the semiconductor substrate while the support and the semiconductor substrate are integrated, that is, in the work process from after the support is mounted to the demount of the support. Therefore, the semiconductor wafer being transferred cannot be manually returned to the original position. As a result, the semiconductor wafer being transferred is discarded in the worst case, which causes a large loss cost in production.

  Therefore, an object of the present invention is to provide a method for manufacturing a semiconductor device capable of recognizing an ID even during a work process from after mounting a support to demounting the support.

  According to a first aspect of the present invention, a step of forming an element portion on a first surface of a semiconductor substrate on which an ID is written, a step of forming an adhesive layer on the first surface of the semiconductor substrate, and light transmittance Forming a photothermal conversion agent layer on the second surface of the support, removing the photothermal conversion agent on the support at a location corresponding to the ID, the first surface of the semiconductor substrate, and the first of the support There is provided a method of manufacturing a semiconductor device including a step of mounting a support on a semiconductor substrate so that the two surfaces face each other.

  According to a second aspect of the present invention, a step of forming an element portion on the first surface of the semiconductor substrate, a step of forming an adhesive layer on the first surface of the semiconductor substrate, and a light transmissive support Forming a photothermal conversion agent layer on the second surface, engraving an ID recognizable from the third surface opposite to the second surface on the photothermal conversion agent layer, the first surface of the semiconductor substrate, There is provided a method of manufacturing a semiconductor device including a step of mounting a support on a semiconductor substrate so that the second surface of the support faces the second surface.

  ADVANTAGE OF THE INVENTION According to this invention, the manufacturing method of the semiconductor device which can recognize ID on a semiconductor substrate even during the operation | work process from after mounting a support body to demounting of a support body is provided.

It is a figure for demonstrating the outline | summary of this invention. It is a sequence diagram which shows the flow of preparation of a support body. It is a figure for demonstrating the preparation of a support body. It is a figure for demonstrating the preparation of a support body. It is a sequence diagram which shows the flow of a viamidel method. It is a figure for demonstrating a viamidel method. It is a figure for demonstrating a viamidel method. It is a figure for demonstrating a viamidel method. It is a figure for demonstrating a viamidel method. It is a figure for demonstrating a viamidel method. It is a figure for demonstrating a viamidel method. It is a figure for demonstrating a viamidel method. It is a figure for demonstrating a viamidel method. It is a figure for demonstrating a viamidel method. It is a figure for demonstrating a viamidel method. It is a figure for demonstrating a viamidel method. It is a figure for demonstrating a viamidel method. It is a figure for demonstrating a viamidel method. It is a figure for demonstrating a viamidel method. It is a figure for demonstrating a viamidel method. It is a figure for demonstrating a viamidel method. It is a figure for demonstrating a viamidel method. It is a sequence diagram which shows the flow of a via last method. It is a figure for demonstrating the vialast method. It is a figure for demonstrating the vialast method. It is a figure for demonstrating the vialast method. It is a figure for demonstrating the vialast method. It is a figure for demonstrating the vialast method. It is a figure for demonstrating the vialast method. It is a figure for demonstrating the vialast method. It is a figure for demonstrating the vialast method. It is a figure for demonstrating the vialast method. It is a figure for demonstrating the vialast method. It is a figure for demonstrating the vialast method. It is a figure for demonstrating the vialast method. It is a figure for demonstrating the vialast method. It is a figure for demonstrating the vialast method. It is a figure for demonstrating the vialast method. It is a figure for demonstrating the vialast method. It is a figure for demonstrating the vialast method. It is a figure which shows an example of packaging. It is a figure which shows an example of packaging. It is a sequence diagram which shows the flow of preparation of a support body. It is a figure for demonstrating the preparation of a support body. It is a figure for demonstrating the preparation of a support body. It is a figure for demonstrating a prior art.

  In the drawings, the invention is schematically represented and will be described below with reference to the drawings. Identical or equivalently acting components are in most cases described using the same drawing reference signs. Note that the reference numerals of the drawings attached to the following description are added for convenience to each element as an example for facilitating understanding, and are not intended to limit the present invention to the illustrated embodiment.

The preferable form of each said viewpoint is described below.
One aspect of the present invention is as described in the first aspect.

  Another embodiment of the present invention is as described in the second aspect.

  In the above method for manufacturing a semiconductor device, the photothermal conversion agent preferably contains at least carbon black.

  In the method for manufacturing a semiconductor device described above, it is preferable to apply the adhesive before mounting.

  Preferably, the method for manufacturing a semiconductor device further includes a step of performing UV-light irradiation and curing / polymerization treatment of the adhesive and the photothermal conversion agent after mounting.

  In the method for manufacturing a semiconductor device, it is preferable that the method further includes a step of polymerizing and curing by applying a heat treatment after applying the photothermal conversion agent.

  In the above method for manufacturing a semiconductor device, it is preferable to form a through electrode on the first surface of the semiconductor substrate after the element portion is formed.

  In the method for manufacturing a semiconductor device described above, the light transmittance of the support is preferably 50% or more.

  Next, the outline of the present invention will be described. FIG. 1 is a diagram for explaining the outline of the present invention. As shown in FIG. 1, in manufacturing a semiconductor device, an element portion is formed on a first surface of a semiconductor substrate on which an ID is written, and then an adhesive is applied to the first surface of the semiconductor substrate on which the element portion is formed. To form an adhesive layer. Moreover, a photothermal conversion agent is given to the 2nd surface of a light-transmissive support body, and a photothermal conversion agent layer is formed. Here, the photothermal conversion agent at a location corresponding to the ID written on the first surface of the semiconductor substrate is removed. And a support body is mounted on a semiconductor substrate so that the 1st surface of a semiconductor substrate and the 2nd surface of a support body may oppose. By doing in this way, it becomes possible to recognize ID on a semiconductor substrate via a support body and an adhesive agent, and as a result, loss cost can be prevented.

  Hereinafter, an embodiment of the present invention will be described. A rectangular semiconductor chip formation region (element portion) is provided on the first surface of the semiconductor substrate to form a semiconductor chip. In particular, in the case of manufacturing a CoC (Chip on Chip) type semiconductor device in which semiconductor chips are stacked, a viamide method and a via last method are employed to form a TSV (Through Substrate Via).

"Biamidol method"
In the viamidel method, a photothermal conversion agent layer 102 (hereinafter also referred to as “photothermal conversion layer”) is formed on a support 101 made of quartz glass by applying a photothermal conversion agent by spin coating (hereinafter also referred to as “photothermal conversion layer”). Step S101 in FIG. 2 and FIGS. 3A and 3B). The light transmittance of the support 101 under visible light is preferably 50% or more. The photothermal conversion agent layer 102 on the support is a layer obtained by mixing a carbon black (carbon powder) as a light absorber, a transparent filler (silica, talc, barium sulfate, etc.), and a thermally decomposable resin with a solvent and drying. Yes, it is a layer rich in light shielding and heat absorption. In particular, the light absorption rate of the photothermal conversion agent layer 102 on the support is 80% or more. Subsequently, the photothermal conversion agent layer 102 on the support is heat-treated at 80 ° C. or more to be polymerized and cured (step S102).

  Next, a part of the photothermal conversion agent layer 102 on the support is removed. By doing so, the ID written on the semiconductor substrate 103 can be recognized from the support 101 side (step S103 and FIGS. 3C and 4). The partial removal of the photothermal conversion agent layer 102 on the support uses YV04 laser (output 10 to 18 W, irradiation pitch 100 to 200 um), resist mask formation + etching removal while suppressing damage to the support 101 as much as possible. Is preferred.

  3C and 4, when a window corresponding to each character of ID written on the semiconductor substrate 103 is formed in the photothermal conversion agent layer 102 on the support (for example, a window of 7 × 3 mm is 7 characters). For example, the entire character string may be surrounded by a single window. The support adhesive described later flows into the place where the photothermal conversion agent layer 102 on the support is removed, and the support 101 and the support adhesive are in direct contact with each other. The portion where the adhesive for support is removed is only a small percentage (for example, 1% or less) with respect to the entire area of the photothermal conversion agent layer 102 on the support. And does not adversely affect desorption.

  Concurrently with the preparation of the support 101 described above, elements (not shown) such as transistors and capacitors are formed on the semiconductor substrate 103 and covered with an interlayer film to form an element formation layer 106 (FIG. 5). Step S201 and FIG. 6). Note that the element formation layer 106 is also provided with a conductive plug (not shown) for electrically connecting the wiring layer and each element.

Next, a mask pattern of the through-electrode hole 108 is formed on the element formation layer 106 with the first resist 107, and dry etching is performed in two steps to the middle of the element formation layer 106 and the semiconductor substrate 103 using the mask pattern as a mask. (FIG. 7). In the first step, the silicon oxide insulating film of the element formation layer 106 is selectively dry-etched, and the transfer of the through electrode hole 108 is advanced to the surface of the silicon semiconductor substrate 103. The selection ratio of the silicon oxide film to silicon in the first step is set to about 30, and the etching gas is a fluorocarbon gas such as C ₄ F ₈ , C ₅ F ₈ , C ₄ F ₆ , C ₆ F ₈ or the like. used. Although a thin portion of the silicon nitride film may be formed during element formation, the above gas causes no particular problem because the silicon nitride film is also selectively etched. In the second step, the silicon semiconductor substrate 103 is selectively dry etched, and the etching is stopped when the etching progresses to an etching time to a predetermined depth. In this second step, a mixed gas of HBr and Cl ₂ is used.

  Next, the first resist 107 is removed, and a first insulating film 109 is formed so as to cover the side wall in the through electrode hole 108. The first insulating film 109 is preferably a silicon nitride film formed by plasma CVD. Subsequently, a first barrier / seed film 110 is formed by PVD so as to cover the first insulating film 109. The first barrier / seed film 110 is a laminated film of tantalum nitride (lower layer) and copper (upper layer). Then, a first Cu plating film 111 is formed by electrolytic plating to fill the through electrode hole 108 (FIG. 8).

  Next, the first barrier / seed film 110 and the first Cu plating film 111 on the element formation layer 106 are removed by CMP (FIG. 9). The process from the formation of the mask pattern with the first resist 107 to the removal of the first barrier / seed film 110 and the first Cu plating film 111 is referred to as formation of a through electrode (step S202).

  Next, the wiring interlayer insulating film 112 is formed on the element forming layer 106, and the wiring layer 113 is formed in the wiring interlayer insulating film 112 (step S203). The wiring layer 113 not only connects the through electrodes and the bumps, but also connects the elements to each other and connects the bumps and the elements. The first wiring is preferably Cu wiring, the second wiring and the first via are Cu wiring formed by a dual damascene method, and the third wiring and the second via are preferably aluminum wiring using reflow aluminum. Note that the wiring interlayer insulating film 112 is not a single layer of silicon oxide film, but a silicon nitride film or silicon carbonitride film (SiCN), which serves as a barrier film necessary for forming Cu wiring, and an interlayer film or a low-layer used. It may be a laminated film of an insulating film including a dielectric film (Low-k film) or the like, and may include a cover film formed after the third wiring is formed. The wiring interlayer insulating film 112 is provided with a bump opening 114 larger than the diameter of the through electrode hole 108 so that a part of the uppermost wiring is exposed (FIG. 10).

  Next, a second barrier / seed film 115 is formed by PVD so as to cover the side wall of the bump opening 114. The second barrier / seed film 115 is a laminated film of titanium (lower layer) and copper (upper layer). Subsequently, a pattern is formed with the second resist 116 so as to have an opening having an opening diameter D1 larger than the hole diameter of the bump opening 114. The second resist 116 serves as a protective film in the electrolytic plating method. Subsequently, a second Cu plating film 117 and a Ni / Au plating film 118 are formed by electrolytic plating (FIG. 11).

  Next, the second resist 116 is removed, and the second barrier seed film 115 existing under the second resist 116 is also removed. Here, the formation of the front bump 119 is completed (step S204 and FIG. 12).

  Next, a support adhesive is applied to the surface on which the front bumps 119 are formed to form a support adhesive layer 105 (step S205), and the support 101 is mounted (step S206). After the support 101 is mounted, curing and polymerization of the photothermal conversion agent layer 102 on the support and the thermosetting adhesive layer 105 for support using UV light (or UV light + heat treatment), that is, UV Cure is executed (step S207). As a result, the adhesive force from the semiconductor substrate 103 to the support adhesive layer 105, the support photothermal conversion agent layer 102, and the support 101 is enhanced. Subsequently, the semiconductor substrate 103 is inverted (FIG. 13).

Next, the semiconductor substrate 103 is etched back from the back side (upper side in FIG. 14) to form a thin film (step S208 and FIG. 14). In the thinning process, the first insulating film 109 is exposed to the back side of the semiconductor substrate 103 by etching back halfway using a back grinder or a CMP apparatus and finally etching back by dry etching. The dry etching at this time is performed by selectively etching silicon using HBr and Cl ₂ gas, and in a state where the through electrode protrudes from the surface of the semiconductor substrate 103, the first insulating film 109 is a side wall of the through electrode. On the condition that it remains so as to cover.

  Next, the second insulating film 120 is formed by plasma CVD so as to cover the through electrode protruding from the back side of the semiconductor substrate 103 and the entire back surface of the semiconductor substrate 103 (FIG. 15). The second insulating film 120 is preferably a silicon nitride film.

  Next, the protruding portion of the through electrode and a part of the second insulating film 120 are removed by CMP and planarized (FIG. 16). At this time, the first barrier / seed film 110 and the first Cu plating film 111 of the through electrode are recessed (recessed).

  Next, the third barrier / seed film 121 is formed by the PVD method. The third barrier / seed film 121 is a laminated film of titanium (lower layer) and copper (upper layer). Next, a pattern is formed with the third resist 122 such that an aperture having an aperture diameter D2 is formed on the through electrode. The third resist 122 serves as a plating protective film. Subsequently, a third Cu plating film 123 and a SnAg plating film 124 are formed by electrolytic plating (FIG. 17).

  Next, the third resist 122 is removed, and the third barrier / seed film 121 existing under the third resist 122 is removed. Here, the formation of the back bump 125 is completed (FIG. 18). The process from the formation of the second insulating film 120 to the removal of the third barrier / seed film 121 is referred to as the formation of the back bump 125 (step S209).

  Next, a dicing tape 126 is attached to the back surface side on which the back bump 125 is formed. A dicing tape adhesive layer 127 is interposed between the dicing tape 126 and the back surface side. Next, the semiconductor substrate is inverted (step S210 and FIG. 19).

  Next, by irradiating a laser from the support side toward the photothermal conversion agent layer 102 on the support to thermally decompose the support adhesive layer 102 and generating voids in the photothermal conversion agent layer 102 on the support The support 101 and the support adhesive layer 105 are demounted (detached) from the semiconductor substrate 103 by being softened. The support adhesive layer 105 remaining on the semiconductor substrate 103 is removed using a peeling tape (step S211 and FIG. 20).

  Next, the semiconductor substrate 103 is diced in units of semiconductor chips (step S212), and individual semiconductor chip pieces are picked up from the dicing tape 126 (step S213, FIG. 21).

  Then, the separated semiconductor chips are stacked using a flip chip bonding apparatus (step S214, FIG. 22). Here, the SnAg plating film existing on the back bump 125 of the first semiconductor chip 128 and the Ni / Au plating film existing on the front bump 119 of the second semiconductor chip 129 are solder-bonded.

"Bialast method"
In the via last method, in parallel with the preparation of the support 101 described above, the element forming layer 106 is formed in the same manner as the viamide method (step S301 in FIG. 23 and FIG. 24). Subsequently, the wiring interlayer insulating film 112 is formed on the element forming layer 106, and the wiring layer 113 is formed in the wiring interlayer insulating film 112 (step S302, FIG. 25).

  Next, the second barrier / seed film 115 is formed by the PVD method so as to cover the side wall of the bump opening 114 and has an opening having an opening diameter D3 larger than the hole diameter of the bump opening 114. Then, a pattern is formed with the second resist 116. Subsequently, a second Cu plating film 117 and a Ni / Au plating film 118 are formed by electrolytic plating (FIG. 26). Then, the second resist 116 and the second barrier / seed film 115 are partially removed to form a front bump 119 (step S303 and FIG. 27).

  Next, the support adhesive layer 105 is formed (step S304), and the support 101 is mounted (step S305). Then, after performing UV curing (step S306), the semiconductor substrate 103 is inverted (FIG. 28). Subsequently, the semiconductor substrate 103 is etched back from the back side (upper side in FIG. 29) to form a thin film (step S307 and FIG. 29). In this thinning process, a back grinder or a CMP apparatus is used. Then, the second insulating film 120 is formed by plasma CVD so as to cover the entire back surface of the semiconductor substrate 103 (FIG. 30). The second insulating film 120 is preferably a silicon nitride film.

Next, a mask pattern of the through electrode hole 108 is formed on the second insulating film 120 with the first resist 107, and the semiconductor substrate 103 and the element formation layer 106 are dry-etched in two steps using the mask pattern as a mask. Electrode holes 108 are formed (FIG. 31). In the first step, the silicon of the semiconductor substrate 103 is selectively dry etched, and when the arrival of the element formation layer 106 to the silicon oxide insulating film is detected by the end point detector, the dry etching is stopped. In this first step etching, it is preferable to use a mixed gas of HBr and Cl ₂ . In the second step etching, the element formation layer 106 is etched until the wiring layer 113 is reached. As the etching gas for the second step, it is preferable to use a fluorocarbon-based gas such as C ₄ F ₈ , C ₅ F ₈ , C ₄ F ₆ , and C ₆ F ₈ . Although a thin portion of the silicon nitride film may be formed during element formation, the above gas causes no particular problem because the silicon nitride film is also selectively etched.

  Next, the first resist 107 is removed, and a first insulating film 109 is formed on the sidewall of the through electrode hole 108 by plasma CVD. The first insulating film 109 is preferably a silicon nitride film. Subsequently, the first insulating film 109 is etched back to expose the wiring layer 113 (FIG. 32).

  Next, the third barrier / seed film 121 is formed by the PVD method (FIG. 33). The third barrier / seed film 121 is a laminated film of titanium (lower layer) and copper (upper layer). Next, a pattern is formed with the third resist 122 so that an opening having an opening diameter D4 is formed on the through electrode (FIG. 34). The third resist 122 serves as a plating protective film. Next, a third Cu plating film 123 and a SnAg plating film 124 are formed by electrolytic plating (FIG. 35). The through electrode hole 108 is filled with the third Cu plating film 123.

  Next, the third resist 122 is removed, and the third barrier / seed film 121 existing under the third resist 122 is removed. Here, the integral formation of the through electrode and the back bump 125 is completed (step S308 and FIG. 36).

  Next, as in the biamide method, a dicing tape adhesive layer 127 is formed, a dicing tape 126 is attached (step S309 and FIG. 37), and the support 101 and the support adhesive layer 105 are attached to the semiconductor substrate 103 by laser irradiation. Is demounted (step S310 and FIG. 38). Subsequently, the semiconductor substrate 103 is diced (step S311), and individual semiconductor chip pieces are picked up from the dicing tape 126 (step S312 and FIG. 39). Then, the semiconductor chips are stacked and bonded (step S313, FIG. 40).

"Packaging"
The CoC type semiconductor device manufactured as described above is packaged as a DRAM (Dynamic Random Access Memory) chip, for example. As shown in FIGS. 41 and 42, the semiconductor package 600 includes solder balls 601, a rewiring layer 602, an interface chip 603, a plurality of stacked semiconductor chips 604, and a lead frame 605. The semiconductor chip 604 is electrically connected by the through electrode 606. With such a configuration, the semiconductor package 600 functioning as a memory can be further reduced in size and performance.

  As described above, according to one embodiment described as Example 1, the photothermal conversion agent layer at the location corresponding to the ID is removed, so that the process from the mounting of the support to the demounting of the support can be performed. However, the ID written on the semiconductor substrate can be recognized. For this reason, it becomes possible to avoid the discarding of the wafer resulting from the unknown ID, which can greatly contribute to the reduction of the loss cost. In addition, it is possible to manufacture a semiconductor device with almost no damage to the support, and if the residue of the photothermal conversion agent layer is removed after the support is demounted, the support can be recycled any number of times. It is possible.

  In a preferred embodiment of the present invention according to Example 2, an ID is imprinted on the photothermal conversion agent layer 102 on the support 101 on the support 101 using a laser marker. Specifically, the photothermal conversion agent layer 102 on the support is formed on the surface of the support 101 (step S401 in FIG. 43 and FIGS. 44 (a) and 44 (b)), and heat treatment is performed at 80 ° C. or higher for polymerization / Curing is performed (step S402). Then, using the YV04 laser (output 10 to 18 W, irradiation pitch 100 to 200 μm), the same ID as the ID written on the semiconductor substrate 103 is imprinted on the photothermal conversion agent layer 102 on the support (FIG. 43). Step S403 and FIG. 44 (c)). It is preferable that the ID is inverted and engraved so that it is easy to read when visually recognized through the support 101.

  In this way, since the support 101 is a transparent body having a light transmittance of 50% or more, the ID imprinted on the photothermal conversion agent layer 102 on the support can be recognized via the support 101. It becomes possible (FIG. 45). Also in this case, the support adhesive flows into the stamped portion, and the support 101 and the support adhesive are in direct contact, but the stamped portion is the support Since it is only a small ratio (for example, 1% or less) with respect to the entire area of the upper photothermal conversion agent layer 102, it does not adversely affect the adhesion and detachability between the support 101 and the semiconductor substrate 103. Other points are the same as those in the embodiment according to the first embodiment.

  It should be noted that the disclosures of the above patent documents are incorporated herein by reference. Within the scope of the entire disclosure (including claims) of the present invention, the embodiment can be changed and adjusted based on the basic technical concept. Further, various combinations or selections of various disclosed elements (including each element of each claim, each element of each embodiment, each element of each drawing, etc.) are possible within the framework of the entire disclosure of the present invention. is there. That is, the present invention of course includes various variations and modifications that could be made by those skilled in the art according to the entire disclosure including the claims and the technical idea. In particular, with respect to the numerical ranges described in this document, any numerical value or small range included in the range should be construed as being specifically described even if there is no specific description.

101 Support 102 Photothermal Conversion Agent Layer (Photothermal Conversion Layer) on Support
DESCRIPTION OF SYMBOLS 103 Semiconductor substrate 104 Removal part 105 Adhesive layer 106 for support bodies Element formation layer 107 1st resist 108 Through electrode hole 109 1st insulating film 110 1st barrier seed film 111 1st Cu plating film 112 Wiring interlayer insulation film 113 Wiring layer 114 Bump opening 115 Second barrier / seed film 116 Second resist 117 Second Cu plating film 118 Ni / Au plating film 119 Table bump 120 Second insulating film 121 Third barrier / seed film 122 Third resist 123 Third Cu Plating film 124 SnAg plating film 125 Back bump 126 Dicing tape 127 Dicing tape adhesive layer 128 First semiconductor chip 129 Second semiconductor chip 600 Semiconductor package 601 Solder ball 602 Redistribution layer 603 Interface chip 604 Semiconductor chip 605 Lee Frame 606 through electrode

Claims (14)

Forming an element portion on the first surface of the semiconductor substrate on which the ID is written;
Forming an adhesive layer on the first surface of the semiconductor substrate;
Forming a photothermal conversion agent layer on the second surface of the light transmissive support;
Removing the photothermal conversion agent on the support at the location corresponding to the ID;
A method of manufacturing a semiconductor device, comprising: mounting the support on the semiconductor substrate such that the first surface of the semiconductor substrate and the second surface of the support are opposed to each other.   The method for manufacturing a semiconductor device according to claim 1, wherein the photothermal conversion agent contains at least carbon black.   The method for manufacturing a semiconductor device according to claim 1, wherein the formation of the adhesive layer is performed before the mounting.   The method for manufacturing a semiconductor device according to claim 3, further comprising a step of performing curing / polymerization treatment of the adhesive and the photothermal conversion agent by irradiating UV light after the mounting.   The method for manufacturing a semiconductor device according to claim 1, further comprising a step of polymerizing and curing by heat treatment after forming the photothermal conversion agent layer.   The method for manufacturing a semiconductor device according to claim 1, further comprising a step of forming a through electrode on the first surface of the semiconductor substrate after the formation of the element portion.   2. The method of manufacturing a semiconductor device according to claim 1, wherein the support has a light transmittance of 50% or more. Forming an element portion on the first surface of the semiconductor substrate;
Forming an adhesive layer on the first surface of the semiconductor substrate;
Forming a photothermal conversion agent layer on the second surface of the light transmissive support;
Marking the photothermal conversion agent layer with an ID recognizable from a third surface opposite to the second surface;
A method of manufacturing a semiconductor device, comprising: mounting the support on the semiconductor substrate such that the first surface of the semiconductor substrate and the second surface of the support are opposed to each other.   The method of manufacturing a semiconductor device according to claim 8, wherein the photothermal conversion agent includes at least carbon black.   The method of manufacturing a semiconductor device according to claim 8, wherein the formation of the adhesive layer is performed before the mounting.   The method for manufacturing a semiconductor device according to claim 10, further comprising a step of performing curing / polymerization processing of the adhesive and the photothermal conversion agent by irradiating UV light after the mounting.   The method for manufacturing a semiconductor device according to claim 8, further comprising a step of polymerizing and curing by heat treatment after forming the photothermal conversion agent layer.   The method for manufacturing a semiconductor device according to claim 8, further comprising a step of forming a through electrode on the first surface of the semiconductor substrate after the formation of the element portion.   The method of manufacturing a semiconductor device according to claim 8, wherein the support has a light transmittance of 50% or more.