JP2016154260A - Semiconductor photodetection element - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor photodetection element capable of suppressing time resolution from being different among pixels and also improving the time resolution more.SOLUTION: A semiconductor photodetection element 10 includes: a plurality of avalanche photodiodes APD operating in a Geiger mode and formed in a semiconductor substrate 1N; a plurality of quenching resistances R1 connected in series to the corresponding avalanche photodiodes APD and arranged on the side of a main surface 1Na of the semiconductor substrate 1N; a through electrode TE electrically connected to the plurality of quenching resistances R1 and also formed penetrating the semiconductor substrate 1N; and a bump electrode electrically connected to the through electrode TE and arranged on the reverse surface side of the main surface 1Na of the semiconductor substrate 1N. Wiring distances from the respective avalanche photodiodes APD to the bump electrode via the quenching resistance R1 and the through electrode TE are equal.SELECTED DRAWING: Figure 14

Description

  The present invention relates to a light detection device.

  A photodiode array comprising a plurality of avalanche photodiodes operating in Geiger mode, a quenching resistor connected in series to each avalanche photodiode, and a signal line having the quenching resistor connected in parallel (Semiconductor light detection element) is known (for example, refer to Patent Document 1). In this photodiode array, when the avalanche photodiode constituting the pixel detects photons and performs Geiger discharge, a pulsed signal is obtained by the action of a quenching resistor connected to the avalanche photodiode. Each avalanche photodiode counts photons. Therefore, even when a plurality of photons are incident at the same timing, the number of incident photons is determined according to the output charge amount or the signal intensity of the total output pulse.

JP 2011-003739 A

  In the semiconductor photodetection element described above, since the quenching resistor is connected in parallel to the signal line, the avalanche photodiodes are also connected in parallel. In a semiconductor photodetecting element having a plurality of avalanche photodiodes connected in parallel, a distance (hereinafter referred to as “wiring distance”) of wirings (signal lines) for guiding a signal output from each avalanche photodiode is a pixel. When the wiring distance is different between pixels, the time resolution is different between pixels due to the influence of the resistance and capacitance of the wiring.

  An object of the present invention is to provide a photodetection device that can suppress time resolution from being different between pixels and can further improve the time resolution.

  A photodetection device according to the present invention includes a semiconductor photodetection element having a semiconductor substrate including first and second main surfaces facing each other, a second photodetection element disposed opposite to the semiconductor photodetection element, and a second main surface of the semiconductor substrate. A semiconductor photodetecting element, comprising: a mounting substrate having an opposing third main surface; and a glass substrate disposed opposite to the semiconductor photodetecting element and having a fourth main surface facing the first main surface of the semiconductor substrate. Is operated in Geiger mode and is a plurality of avalanche photodiodes formed in the semiconductor substrate, and is connected in series to each avalanche photodiode and is disposed on the first main surface side of the semiconductor substrate A plurality of through-electrodes that are electrically connected to the quenching resistor and formed through the semiconductor substrate from the first main surface side to the second main surface side, and mounted The plate is a plurality of first electrodes arranged on the third main surface side corresponding to each through electrode, and a signal that is electrically connected to the plurality of first electrodes and that processes output signals from each avalanche photodiode A through-electrode and a first electrode are electrically connected via a bump electrode, and the side surface of the semiconductor substrate and the side surface of the glass substrate are flush with each other. .

  In the photodetecting device according to the present invention, a plurality of through electrodes that are electrically connected to the quenching resistor and penetrate the semiconductor substrate from the first main surface side to the second main surface side are provided on the semiconductor substrate of the semiconductor photodetecting element. Since the through electrode of the semiconductor photodetecting element and the first electrode of the mounting substrate are electrically connected through the bump electrode, the wiring distance of each pixel can be extremely shortened and the value varies. It can be aligned without. Therefore, the influence of the resistance and capacitance of the wiring is remarkably suppressed, and the time resolution is further improved.

  In the present invention, the mechanical strength of the semiconductor substrate can be increased by the glass substrate disposed opposite to the semiconductor photodetector. Moreover, since the side surface of the semiconductor substrate and the side surface of the glass substrate are flush with each other, dead space can be reduced.

  The main surface facing the fourth main surface of the glass substrate may be flat. In this case, the scintillator can be installed on the glass substrate very easily.

  The through electrode may be located in a region between each avalanche photodiode. In this case, it is possible to prevent a decrease in the aperture ratio in each pixel.

  The semiconductor photodetecting element further includes a second electrode that is electrically connected to the corresponding through electrode and disposed on the second main surface side of the semiconductor substrate, and the first electrode and the second electrode are bump electrodes. It may be connected via. In this case, the first electrode and the second electrode can be reliably connected by the bump electrode.

  Each avalanche photodiode includes a semiconductor substrate of a first conductor, a first semiconductor region of a second conductivity type formed on the first main surface side of the semiconductor substrate, a first semiconductor region formed in the first semiconductor region A second semiconductor region of a second conductivity type having a higher impurity concentration than the region; a third electrode disposed on the first main surface side of the semiconductor substrate and electrically connecting the second semiconductor region and the quenching resistor; The second electrode may be formed on a region corresponding to the second semiconductor region on the second main surface. In this case, the size of the second electrode can be set relatively large, the connection between the first electrode and the second electrode by the bump electrode can be performed more reliably, and the mechanical strength of the connection can be increased.

  A plurality of quenching resistors may be electrically connected to the through electrode. In this case, the through electrodes are shared between the pixels, and the number of through electrodes formed on the semiconductor substrate can be reduced. Thereby, the fall of the mechanical strength of a semiconductor substrate can be suppressed.

  The wiring distance from each avalanche photodiode to the through electrode through the corresponding quenching resistor may be equal. In this case, even in the configuration in which the through electrodes are shared between the pixels, it is possible to prevent the time resolution from being lowered.

  ADVANTAGE OF THE INVENTION According to this invention, while suppressing that time resolution differs between pixels, the photodetector which can improve time resolution further can be provided.

It is a schematic perspective view which shows the photon detection apparatus which concerns on this embodiment. It is a figure for demonstrating the cross-sectional structure of the photon detection apparatus which concerns on this embodiment. It is a schematic plan view of a semiconductor photodetection element. It is a schematic plan view of a semiconductor photodetection element. It is a circuit diagram of a photon detection device. It is a schematic plan view of a mounting substrate. It is a figure for demonstrating the manufacturing process of the photon detection apparatus which concerns on this embodiment. It is a figure for demonstrating the manufacturing process of the photon detection apparatus which concerns on this embodiment. It is a figure for demonstrating the manufacturing process of the photon detection apparatus which concerns on this embodiment. It is a figure for demonstrating the manufacturing process of the photon detection apparatus which concerns on this embodiment. It is a figure for demonstrating the manufacturing process of the photon detection apparatus which concerns on this embodiment. It is a figure for demonstrating the manufacturing process of the photon detection apparatus which concerns on this embodiment. It is a figure for demonstrating the manufacturing process of the photon detection apparatus which concerns on this embodiment. It is a schematic plan view of a semiconductor photodetection element.

  Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. In the description, the same reference numerals are used for the same elements or elements having the same function, and redundant description is omitted.

  With reference to FIGS. 1-6, the structure of the photon detection apparatus 1 which concerns on this embodiment is demonstrated. FIG. 1 is a schematic perspective view showing a photodetecting device according to the present embodiment. FIG. 2 is a diagram for explaining a cross-sectional configuration of the photodetecting device according to the present embodiment. 3 and 4 are schematic plan views of the semiconductor photodetector element. FIG. 5 is a circuit diagram of the photodetector. FIG. 6 is a schematic plan view of the mounting substrate.

  As shown in FIGS. 1 and 2, the light detection device 1 includes a semiconductor light detection element 10, a mounting substrate 20, and a glass substrate 30. The mounting substrate 20 is disposed to face the semiconductor light detection element 10. The glass substrate 30 is disposed so as to face the semiconductor photodetector 10. The semiconductor light detection element 10 is disposed between the mounting substrate 20 and the glass substrate 30.

  The semiconductor photodetecting element 10 is composed of a photodiode array PDA. The photodiode array PDA has a semiconductor substrate 1N that has a rectangular shape in plan view. The semiconductor substrate 1N includes a main surface 1Na and a main surface 1Nb facing each other. The semiconductor substrate 1N is an N-type (first conductivity type) semiconductor substrate made of Si.

  The photodiode array PDA includes a plurality of avalanche photodiodes APD formed on the semiconductor substrate 1N. As shown in FIG. 3, a quenching resistor R1 is connected in series to each avalanche photodiode APD. One avalanche photodiode APD constitutes one pixel in the photodiode array PDA. Each avalanche photodiode APD is connected in parallel with each other in series with the quenching resistor R1, and a reverse bias voltage is applied from the power supply. The output current from the avalanche photodiode APD is detected by a signal processing unit SP described later. In FIG. 3, the description of the insulating layer L1 shown in FIG. 2 is omitted for clarity of the structure.

  Each avalanche photodiode APD has a P-type (second conductivity type) first semiconductor region 1PA and a P-type (second conductivity type) second semiconductor region 1PB. The first semiconductor region 1PA is formed on the main surface 1Na side of the semiconductor substrate 1N. The second semiconductor region 1PB is formed in the first semiconductor region 1PA and has a higher impurity concentration than the first semiconductor region 1PA. The planar shape of the second semiconductor region 1PB is, for example, a polygon (in this embodiment, an octagon). The depth of the first semiconductor region 1PA is deeper than that of the second semiconductor region 1PB.

  The semiconductor substrate 1N has an N-type (first conductivity type) semiconductor region 1PC. The semiconductor region 1PC is formed on the main surface 1Na side of the semiconductor substrate 1N. The semiconductor region 1PC prevents a PN junction formed between the N-type semiconductor substrate 1N and the P-type first semiconductor region 1PA from being exposed to a through-hole TH in which a later-described through-electrode TE is disposed. The semiconductor region 1PC is formed at a position corresponding to the through hole TH (through electrode TE).

  As shown in FIG. 3, the avalanche photodiode APD includes an electrode E1 and an electrode E3, which are arranged on the main surface 1Na side of the semiconductor substrate 1N. The electrode E1 is electrically connected to the second semiconductor region 1PB. The electrode E3 is formed on the semiconductor substrate 1N outside the second semiconductor region 1PB as viewed from the main surface 1Na side via the insulating layer L1. The first semiconductor region 1PA is electrically connected to the electrode E1 through the second semiconductor region 1PB.

  As shown in FIG. 4, the avalanche photodiode APD includes an electrode (not shown) electrically connected to the semiconductor substrate 1N and disposed on the main surface 1Nb side of the semiconductor substrate 1N, an electrode E5, And an electrode E7 connected to the electrode E5. The electrode E5 is formed on the semiconductor substrate 1N outside the second semiconductor region 1PB as viewed from the main surface 1Nb side via an insulating layer L2. The electrode E7 is formed on the semiconductor substrate 1N overlapping with the second semiconductor region 1PB when viewed from the main surface 1Nb side via the insulating layer L2. That is, the electrode E7 is formed on a region corresponding to the second semiconductor region 1PB on the main surface 1Nb. In FIG. 4, the description of the passivation film PF shown in FIG. 2 is omitted for clarity of the structure.

  The photodiode array PDA has a quenching resistor R1 formed on the semiconductor substrate 1N outside the second semiconductor region 1PB via the insulating layer L1 for each individual avalanche photodiode APD. That is, the quenching resistor R1 is arranged on the main surface 1Na side of the semiconductor substrate 1N. The quenching resistor R1 has one end connected to the electrode E1 and the other end connected to the electrode E3.

  The photodiode array PDA includes a plurality of through electrodes TE. The through electrode TE is provided for each individual avalanche photodiode APD. The through electrode TE is formed so as to penetrate the semiconductor substrate 1N from the main surface 1Na side to the main surface 1Nb side. That is, the through electrode TE is disposed in the through hole TH that penetrates the semiconductor substrate 1N. The insulating layer L2 is also formed in the through hole TH. Therefore, the through electrode TE is disposed in the through hole TH via the insulating layer L2.

  The through electrode TE has one end connected to the electrode E3 and the other end connected to the electrode E5. The quenching resistor R1 is electrically connected to the electrode E7 via the electrode E3, the through electrode TE, and the electrode E5.

  The through electrode TE is disposed in a region between the avalanche photodiodes APD in plan view. In this embodiment, the avalanche photodiodes APD are two-dimensionally arranged in M rows in the first direction and N columns (M and N are natural numbers) in the second direction orthogonal to the first direction. The through electrode TE is formed in a region surrounded by four avalanche photodiodes APD. Since the through electrodes TE are provided for each avalanche photodiode APD, they are two-dimensionally arranged in M rows in the first direction and N columns in the second direction.

  The quenching resistor R1 has a higher resistivity than the electrode E1 to which it is connected. Quenching resistor R1 is made of polysilicon, for example. As a method for forming the quenching resistor R1, a CVD (Chemical Vapor Deposition) method can be used.

  The electrodes E1, E3, E5, E7 and the through electrode TE are made of a metal such as aluminum. When the semiconductor substrate is made of Si, AuGe / Ni or the like is often used as the electrode material in addition to aluminum. Although it depends on the process design, the electrode E5, the electrode E7, and the through electrode TE can be integrally formed. As a method of forming the electrodes E1, E3, E5, E7 and the through electrode TE, a sputtering method can be used.

  When Si is used, a Group 3 element such as B is used as the P-type impurity, and a Group 5 element such as N, P, or As is used as the N-type impurity. Even if N-type and P-type semiconductors are substituted for each other to form an element, the element can function. As a method for adding these impurities, a diffusion method or an ion implantation method can be used.

As a material of the insulating layers L1 and L2, SiO ₂ or SiN can be used. As a method for forming the insulating layer L1, L2, when the insulating layer L1, L2 consists of SiO _2, it is possible to use a thermal oxidation method or a sputtering method.

  In the case of the above structure, an avalanche photodiode APD is formed by forming a PN junction between the N-type semiconductor substrate 1N and the P-type first semiconductor region 1PA. The semiconductor substrate 1N is electrically connected to an electrode (not shown) formed on the back surface of the substrate 1N, and the first semiconductor region 1PA is connected to the electrode E1 through the second semiconductor region 1PB. The quenching resistor R1 is connected in series with the avalanche photodiode APD (see FIG. 5).

  In the photodiode array PDA, each avalanche photodiode APD is operated in the Geiger mode. In the Geiger mode, a reverse voltage (reverse bias voltage) larger than the breakdown voltage of the avalanche photodiode APD is applied between the anode and the cathode of the avalanche photodiode APD. That is, the (−) potential V1 is applied to the anode and the (+) potential V2 is applied to the cathode. The polarities of these potentials are relative, and one of the potentials can be a ground potential.

  The anode is a P-type first semiconductor region 1PA, and the cathode is an N-type semiconductor substrate 1N. When light (photons) enters the avalanche photodiode APD, photoelectric conversion is performed inside the substrate to generate photoelectrons. Avalanche multiplication is performed in a region near the PN junction interface of the first semiconductor region 1PA, and the amplified electron group flows toward an electrode formed on the back surface of the semiconductor substrate 1N. That is, when light (photon) is incident on any pixel (avalanche photodiode APD) of the semiconductor photodetector 10 (photodiode array PDA), it is multiplied and taken out from the electrode E7 as a signal.

  As shown in FIGS. 2 and 13, the mounting board 20 has a main surface 20 a and a main surface 20 b that face each other. The mounting substrate 20 has a rectangular shape in plan view. Main surface 20a is opposed to main surface 1Nb of semiconductor substrate 1N. The mounting substrate 20 includes a plurality of electrodes E9 arranged on the main surface 20a side. As shown in FIG. 2, the electrode E9 is disposed corresponding to the through electrode TE. Specifically, the electrode E9 is formed on each region of the main surface 20a facing the electrode E7.

  The side surface 1Nc of the semiconductor substrate 1N and the side surface 20c of the mounting substrate 20 are flush with each other as shown in FIGS. In other words, the outer edge of the semiconductor substrate 1N and the outer edge of the mounting substrate 20 coincide with each other in plan view.

  The electrode E7 and the electrode E9 are connected by a bump electrode BE. Thereby, the through electrode TE is electrically connected to the electrode E9 via the electrode E5, the electrode E7, and the bump electrode BE. The quenching resistor R1 is electrically connected to the electrode E9 via the electrode E3, the through electrode TE, the electrode E5, the electrode E7, and the bump electrode BE. Similarly to the electrodes E1, E3, E5, E7 and the through electrode TE, the electrode E9 is also made of a metal such as aluminum. As an electrode material, AuGe / Ni or the like may be used in addition to aluminum. The bump electrode BE is made of, for example, solder.

  The mounting board 20 includes a signal processing unit SP as shown in FIG. That is, the mounting substrate 20 constitutes an ASIC (Application Specific Integrated Circuit). Each electrode E9 is electrically connected to the signal processing unit SP through wiring (not shown) formed in the mounting substrate 20. An output signal from each avalanche photodiode APD (semiconductor photodetecting element 10) is input to the signal processing unit SP, and the signal processing unit SP processes an output signal from each avalanche photodiode APD. The signal processing unit SP includes a CMOS circuit that converts an output signal from each avalanche photodiode APD into a digital pulse. The mounting substrate 20 is configured to include a circuit for recording time information corresponding to each pixel (avalanche photodiode APD). As a circuit for recording time information, a time digital converter (TDC), a time voltage converter (TAC) or the like is used. Thereby, the difference in the wiring distance in the mounting substrate 20 does not affect the time resolution.

  A passivation film PF having openings formed at positions corresponding to the bump electrodes BE is disposed on the main surface 1Nb side of the semiconductor substrate 1N and the main surface 20a side of the mounting substrate 20. The passivation film PF is made of SiN, for example. As a method for forming the passivation film PF, a CVD (Chemical Vapor Deposition) method can be used.

  The glass substrate 30 has a main surface 30a and a main surface 30b facing each other. The glass substrate 30 has a rectangular shape in plan view. Main surface 30a faces main surface 1Nb of semiconductor substrate 1N. The main surface 30b is flat. In the present embodiment, the main surface 30a is also flat. The glass substrate 30 and the semiconductor photodetecting element 10 are optically connected by an optical adhesive OA. The glass substrate 30 may be formed directly on the semiconductor photodetecting element 10.

  Although not shown, a scintillator is optically connected to the main surface 30b of the glass substrate 30 by an optical adhesive. The scintillation light from the scintillator passes through the glass substrate 30 and enters the semiconductor light detection element 10.

  The side surface 1Nc of the semiconductor substrate 1N and the side surface 30c of the glass substrate 30 are flush with each other as shown in FIG. In other words, the outer edge of the semiconductor substrate 1N and the outer edge of the glass substrate 30 coincide with each other in plan view.

  Next, with reference to FIGS. 7 to 13, a method for manufacturing the above-described photodetector 1 will be described. 7-13 is a figure for demonstrating the manufacturing process of the photon detection apparatus based on this embodiment.

  First, a semiconductor substrate 1N on which a portion (first semiconductor region 1PA, second semiconductor region 1PB, insulating layer L1, quenching resistor R1, electrode E1, and electrode E3) corresponding to the photodiode array PDA is prepared ( (See FIG. 7). The semiconductor substrate 1N is prepared in the form of a semiconductor wafer in which a plurality of portions corresponding to the photodiode array PDA are formed.

  Next, the glass substrate 30 is bonded to the prepared semiconductor substrate 1N via the optical adhesive OA (see FIG. 8). Thereby, the glass substrate 30 and the semiconductor light detection element 10 are optically connected. Similarly to the semiconductor substrate 1N, the glass substrate 30 is also prepared in the form of a glass substrate base material including a plurality of glass substrates 30.

  Next, the semiconductor substrate 1N is thinned from the main surface 1Nb side (see FIG. 9). As a thinning method of the semiconductor substrate 1N, a mechanical polishing method or a chemical polishing method can be used.

  Next, a through hole TH for arranging the through electrode TE is formed in the semiconductor substrate 1N (see FIG. 10). As a method for forming the through hole TH, a dry etching method and a wet etching method can be appropriately selected and applied.

  Next, portions (through electrodes TE, electrodes E5, and electrodes E7) corresponding to the photodiode array PDA are formed in the semiconductor substrate 1N in which the through holes TH are formed (see FIG. 11).

  Next, a passivation film PF having an opening formed at a position corresponding to the bump electrode BE is formed on the main surface 1Nb side of the semiconductor substrate 1N, and then the bump electrode BE is formed (see FIG. 12). Thereby, the structure by which the semiconductor photodetection element 10 and the glass substrate 30 are opposingly arranged is obtained. Prior to the formation of the bump electrode BE, UBM (Under Bump Metal) is formed in a region exposed from the passivation film PF in the electrode E7. The UBM is made of a material that is electrically and physically connected to the bump electrode BE. An electroless plating method can be used as a method for forming the UBM. As a method for forming the bump electrode BE, a method of mounting a solder ball or a printing method can be used.

  Next, the semiconductor photodetecting element 10 on which the glass substrate 30 is arranged is bump-connected to the separately prepared mounting substrate 20 (see FIG. 13). Thereby, the structure by which the semiconductor photodetecting element 10 with which the glass substrate 30 was opposingly arranged, and the mounting substrate 20 were opposingly arranged is obtained. A bump electrode BE is formed on the mounting substrate 20 on the main surface 20a side at a position corresponding to the electrode E9. The mounting substrate 20 is also prepared in the form of a semiconductor wafer on which a plurality of mounting substrates 20 are formed.

  Next, the laminated body which consists of the glass substrate 30 (glass substrate base material), the semiconductor photodetector 10 (semiconductor wafer), and the mounting substrate 20 (semiconductor wafer) is cut | disconnected by dicing. Thereby, the side surface 1Nc of the semiconductor substrate 1N, the side surface 20c of the mounting substrate 20, and the side surface 30c of the glass substrate 30 are flush with each other. Through these processes, the individual photodetectors 1 are obtained.

  As described above, in the present embodiment, the semiconductor substrate 1N of the semiconductor photodetector 10 (photodiode array PDA) is electrically connected to the quenching resistor R1 and from the main surface 1Na side to the main surface 1Nb side. A plurality of through electrodes TE penetrating 1N are formed. The through electrode TE of the semiconductor light detection element 10 and the electrode E9 of the mounting substrate 20 are electrically connected via the bump electrode BE. As a result, the wiring distance from each pixel (avalanche photodiode APD) can be made extremely short, and the values can be made uniform without any variation. Therefore, the influence of the resistance and capacitance of the wiring from each pixel is remarkably suppressed, and the time resolution is further improved.

  In the present embodiment, the mechanical strength of the semiconductor substrate 1N can be increased by the glass substrate 30 disposed to face the semiconductor photodetector 10. This is particularly effective when the semiconductor substrate 1N is thinned.

  The side surface 1Nc of the semiconductor substrate 1N and the side surface 30c of the glass substrate 30 are flush with each other. For this reason, dead space can be reduced. Further, the side surface 1Nc of the semiconductor substrate 1N and the side surface 20c of the mounting substrate 20 are flush with each other. For this reason, the dead space can be further reduced.

  The glass substrate 30 has a major surface 30b. Thereby, installation of the scintillator to the glass substrate 30 can be performed very easily.

  In the present embodiment, the through electrode TE is located in a region between each avalanche photodiode APD. Thereby, the fall of the aperture ratio in each pixel can be prevented.

  The semiconductor photodetecting element 10 includes an electrode E7 that is electrically connected to the corresponding through electrode TE and is disposed on the main surface 1Nb side of the semiconductor substrate 1N, and the electrode E7 and the electrode E9 are interposed via the bump electrode BE. Connected. Thereby, the connection by the bump electrode BE of the electrode E7 and the electrode E9 can be performed reliably.

  Each avalanche photodiode APD includes a semiconductor substrate 1N, a first semiconductor region 1PA, a second semiconductor region 1PB, and an electrode E1 that electrically connects the second semiconductor region 1PB and the quenching resistor R1. The electrode E7 is formed on a region corresponding to the second semiconductor region 1PB on the main surface 1Nb. Thereby, the size of the electrode E7 can be set relatively large, and the connection between the electrode E7 and the electrode E9 by the bump electrode BE can be more reliably performed, and the mechanical strength of the connection can be increased.

  The preferred embodiments of the present invention have been described above. However, the present invention is not necessarily limited to the above-described embodiments, and various modifications can be made without departing from the scope of the present invention.

  One quenching resistor R1 is electrically connected to one penetration electrode TE, but is not limited thereto. As shown in FIG. 14, a plurality of quenching resistors (for example, four quenching resistors) 1R may be electrically connected to one penetration electrode TE. In this case, the through electrodes TE are shared between the pixels, and the number of through electrodes TE formed in the semiconductor substrate 1N can be reduced. Thereby, the fall of the mechanical strength of the semiconductor substrate 1N can be suppressed. The number of quenching resistors electrically connected to one through electrode TE is not limited to “4”, but may be “3” or less, or may be “5” or more.

  When a plurality of quenching resistors R1 are electrically connected to one through electrode TE, the wiring distance from each avalanche photodiode APD to the through electrode TE via the corresponding quenching resistor R1 may be equal. preferable. In this case, even in the configuration in which the through electrode TE is shared between the pixels, it is possible to prevent the time resolution from being lowered.

  The shapes of the first and second semiconductor regions 1PB and 1PB are not limited to the shapes described above, and may be other shapes (for example, a circular shape). Further, the number (number of rows and number of columns) and arrangement of the avalanche photodiode APD (second semiconductor region 1PB) are not limited to those described above.

  The present invention can be used in a light detection device that detects weak light.

  DESCRIPTION OF SYMBOLS 1 ... Photodetection apparatus, 1N ... Semiconductor substrate, 1Na, 1Nb ... Main surface, 1Nc ... Side surface, 1PA ... First semiconductor region, 1PB ... Second semiconductor region, 10 ... Semiconductor photodetection element, 20 ... Mounting substrate, 20a, 20b ... main surface, 20c ... side surface, 30 ... glass substrate, 30a, 30b ... main surface, 30c ... side surface, APD ... avalanche photodiode, BE ... bump electrode, E1, E3, E5, E7, E9 ... electrode, PDA ... Photodiode array, R1... Quenching resistor, SP... Signal processing unit, TE.

Claims (2)

A semiconductor photodetecting element having a semiconductor substrate including first and second main surfaces facing each other,
A plurality of avalanche photodiodes operating in the Geiger mode and formed in the semiconductor substrate;
A plurality of quenching resistors connected in series to each of the avalanche photodiodes and disposed on the first main surface side of the semiconductor substrate;
A through electrode that is electrically connected to the plurality of quenching resistors and is formed through the semiconductor substrate from the first main surface side to the second main surface side;
A bump electrode electrically connected to the through electrode and disposed on the second main surface side of the semiconductor substrate,
The semiconductor photodetecting element, wherein a wiring distance from each avalanche photodiode to the bump electrode through the quenching resistor and the through electrode is equal.   The semiconductor photodetecting element according to claim 1, wherein the through electrode is located in a region between the avalanche photodiodes in a plan view.

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