JP2016127435A - Semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To achieve equalization of temperature of a plurality of semiconductor elements at low cost in a semiconductor device in which the plurality of semiconductor elements are connected in parallel with each other.SOLUTION: A power module 100 comprises: two IGBT chips 1a, 1b which are connected in parallel with each other; a temperature detection circuit 3a for detecting temperature of the temperature detection circuit 3a; a temperature detection circuit 3b for detecting temperature of the IGBT chip 1b; and a gate resistance adjustment circuit 2b which includes a comparator circuit 25b for comparing an output voltage of the temperature detection circuit 3a and an output voltage of the temperature detection circuit 3b, and increases gate resistance of the IGBT chip 1b when temperature of the IGBT chip 1b becomes higher than temperature of the IGBT chip 1a, and decreases gate resistance of the IGBT chip 1b when temperature of the IGBT chip 1b becomes lower than temperature of the IGBT chip 1a.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a semiconductor device having a plurality of insulated gate semiconductor elements connected in parallel to each other.

  Insulated gate semiconductor elements used in power semiconductor devices (power modules) include IGBTs (Insulated Gate Bipolar Transistors), MOSFETs (Metal Oxide Semiconductor Field Effect Transistors), and various semiconductor elements having structures similar to them. It has been known. Hereinafter, an IGBT will be mainly described as an example.

  The IGBT chip used in the power module has an upper limit on the current rating due to size restrictions. A power module having a current rating larger than the upper limit of the IGBT chip is realized by connecting a plurality of IGBT chips in parallel inside the package. For example, a power module with a rating of 1200 V / 200 A can be realized by connecting two chips with a current rating of 100 A in parallel.

  Since the same drive signal is input to the gate electrodes of the two chips connected in parallel, both chips are simultaneously turned on / off if the threshold voltages (Vge (th)) of both chips are equal. In this case, since the switching losses of both chips are equal, the temperatures of both chips are also equal. However, if there is a difference between the threshold voltages of the two chips, the two chips are turned on / off at different timings (a difference occurs in the length of the on period). In this case, the chip with the lower threshold voltage is turned on at an earlier timing than the chip with the higher threshold voltage and is responsible for more switching loss. Therefore, a chip with a low threshold voltage has a higher temperature than a chip with a high threshold voltage.

  The life of the power module correlates with the temperature amplitude, and the life is shortened as the temperature change increases. Therefore, in a power module configured by connecting a plurality of chips in parallel, if the threshold voltages of these chips vary, the life of the power module becomes shorter than that of a power module having only one chip.

  In addition, in a power module configured by connecting a plurality of chips in parallel, even if the collector-emitter saturation voltage (Vce (sat)) of these chips varies, a large amount of current flows in some chips. Since the temperature of the plurality of chips varies, the life of the power module is shortened as described above.

  As a method for solving this problem, there is a method in which chips are ranked and managed based on electrical characteristics such as a threshold voltage and a collector-emitter saturation voltage. When a power module is configured using a plurality of chips, the electrical characteristics of the plurality of chips of the power module can be made uniform by selecting chips of the same rank.

  Further, in Patent Document 1 below, even when a plurality of chips having different threshold voltages are used, the gate voltage at turn-on is corrected for each chip so that the apparent threshold voltages are the same. A gate drive circuit that can be used has been proposed.

JP 2008-048569 A

  In the method of managing the IGBT chips by ranking, it is necessary to perform a sorting process for allocating the IGBT chips to each rank, as well as the power module production, shipping, inventory management, etc. Must be done every time. Therefore, the manufacturing cost of the power module increases.

  Further, in the technique of Patent Document 1, the threshold voltage at the turn-on time of each chip can be made apparently the same, but the current imbalance at the turn-off time and the saturation voltage characteristic between the collector and the emitter affect the steady state. It cannot cope with current imbalance.

  The present invention has been made to solve the above-described problems, and in a semiconductor device configured by connecting a plurality of semiconductor elements in parallel, temperature equalization of each semiconductor element is realized at low cost. With the goal.

  A semiconductor device according to the present invention includes an insulated gate semiconductor element, a temperature detection circuit that detects a temperature of the semiconductor element, and a gate resistance adjustment circuit that adjusts a gate resistance of the semiconductor element. The adjustment circuit increases the gate resistance of the semiconductor element when the temperature of the semiconductor element becomes higher than a specified temperature, and increases the gate resistance of the semiconductor element when the temperature of the semiconductor element becomes lower than the specified temperature. Decrease.

  According to the present invention, the gate resistance of the semiconductor element is adjusted so that the temperature of the semiconductor element becomes a specified temperature. If the prescribed temperature is determined as the temperature of other semiconductor elements connected in parallel to the semiconductor element or the average value of the temperatures of those semiconductor devices, the temperatures of the plurality of semiconductor elements connected in parallel can be equalized. . Further, since it is not necessary to make the characteristics of a plurality of semiconductor elements uniform, it is not necessary to manage the semiconductor elements by ranking according to the characteristics, and an increase in manufacturing cost can be suppressed.

1 is a diagram showing a configuration of a power module according to Embodiment 1. FIG. It is a figure which shows the turn-on current waveform and turn-on loss waveform of each IGBT chip | tip in the ideal power module which consists of two IGBT chips | tips with the same threshold voltage. It is a figure which shows the turn-on current waveform and turn-on loss waveform of each IGBT chip | tip in the conventional power module which consists of two IGBT chips | tips from which a threshold voltage differs mutually. FIG. 6 is a diagram showing a turn-on current waveform and a turn-on loss waveform of each IGBT chip when two IGBT chips having different threshold voltages are used in the power module according to the first embodiment. FIG. 6 is a diagram showing a configuration of a power module according to a third embodiment. It is a figure which shows the structure of the power module which concerns on Embodiment 4. FIG. FIG. 10 is a diagram showing a configuration of a power module according to a fifth embodiment. It is a figure which shows the connection in the case of connecting in parallel the power module which concerns on Embodiment 5. FIG. It is a figure which shows the structure of a gate resistance adjustment circuit in the case of making the timing which correct | amends the gate resistance of an IGBT chip | tip at the time of turn-off of a power module. It is a figure which shows the structure of a gate resistance adjustment circuit in the case of making the timing which correct | amends the gate resistance of an IGBT chip into both the time of turn-on of a power module, and the time of turn-off.

  Hereinafter, a semiconductor device (power module) according to an embodiment of the present invention will be described. The present invention is widely applicable to semiconductor devices configured using insulated gate semiconductor elements such as IGBTs and MOSFETs, but the following embodiments show examples using IGBTs.

<Embodiment 1>
FIG. 1 is a diagram showing a configuration of a power module 100 that is a semiconductor device according to the first embodiment. Some high-capacity power modules include products in which 30 or more IGBT chips are connected in parallel. Here, for simplicity of explanation, a power module 100 including two IGBT chips is shown.

  The power module 100 includes a collector terminal 102 and an emitter terminal 103 which are main terminals, a gate terminal 101 which is a control terminal, and a ground terminal 104 for supplying a ground voltage (GS). In actual use, a power source and a load (not shown) are connected to the collector terminal 102 and the collector terminal 102, and a gate drive circuit 201 is connected to the gate terminal 101 via an external gate resistor 202. When the power module 100 performs a switching operation (on / off operation) in accordance with the drive signal (G) output from the gate drive circuit 201, the main current modulated by the switching operation is supplied to the load.

  As shown in FIG. 1, the power module 100 includes two IGBT chips 1a and 1b, a reference gate resistance circuit 2a that constitutes the gate resistance of the IGBT chip 1a, and a gate resistance adjustment circuit 2b that constitutes the gate resistance of the IGBT chip 1b. And a temperature detection circuit 3a for detecting the temperature of the IGBT chip 1a, and a temperature detection circuit 3b for detecting the temperature of the IGBT chip 1b.

  The collector electrodes of the IGBT chips 1 a and 1 b are connected to the collector terminal 102, and the emitter electrodes of the IGBT chips 1 a and 1 b are connected to the emitter terminal 103. That is, the IGBT chips 1a and 1b are connected in parallel with each other between the collector terminal 102 and the emitter terminal 103. The emitter terminal 103 is connected to the ground terminal 104 inside the power module 100.

  The gate electrode of the IGBT chip 1a is connected to the gate terminal 101 via the reference gate resistance circuit 2a. The gate electrode of the IGBT chip 1b is connected to the gate terminal 101 via the gate resistance adjustment circuit 2b. The configurations of the reference gate resistance circuit 2a and the gate resistance adjustment circuit 2b will be described later.

  The temperature detection circuit 3a detects the temperature of the IGBT chip 1a and outputs a voltage corresponding to the temperature. The temperature detection circuit 3a includes an on-chip diode 31a, a constant current circuit 32a, and a voltage detection circuit 33a. The on-chip diode 31a is formed on the surface of the IGBT chip 1a via an insulating layer. The constant current circuit 32a supplies a constant current to the on-chip diode 31a, and the voltage detection circuit 33a detects the voltage between the anode and the cathode of the on-chip diode 31a and outputs a voltage corresponding thereto. Since the anode-cathode voltage of the diode has a characteristic proportional to temperature, the output voltage of the voltage detection circuit 33a has a value corresponding to the temperature of the on-chip diode 31a, that is, the temperature of the IGBT chip 1a.

  The temperature detection circuit 3b detects the temperature of the IGBT chip 1b and outputs a voltage corresponding to the temperature. The configuration of the temperature detection circuit 3b is the same as that of the temperature detection circuit 3a, and includes a diode 31b on the chip, a constant current circuit 32b, and a voltage detection circuit 33b. The on-chip diode 31b is formed on the surface of the IGBT chip 1b via an insulating layer. The constant current circuit 32b supplies a constant current to the on-chip diode 31b, and the voltage detection circuit 33b detects the voltage between the anode and the cathode of the on-chip diode 31b and outputs a voltage corresponding thereto. The output voltage of the voltage detection circuit 33b has a value corresponding to the temperature of the on-chip diode 31b, that is, the temperature of the IGBT chip 1b.

  The reference gate resistance circuit 2a constitutes the gate resistance of the IGBT chip 1a. The reference gate resistance circuit 2a includes a main gate resistor 21a, an on-conduction diode 22a, and a sub-gate resistor 23a. The main gate resistor 21a and the sub-gate resistor 23a are formed on the surface of the IGBT chip 1a via an insulating layer like the on-chip diode 31a, and are connected to the gate electrode of the IGBT chip 1a.

  The main gate resistor 21a is connected between the gate terminal 101 and the gate electrode of the IGBT chip 1a. A series circuit of an on-conduction diode 22a and a sub-gate resistor 23a is connected in parallel with the main gate resistor 21a. The on-conduction diode 22a allows a current to flow through the sub-gate resistor 23a only when the power module 100 is turned on (when the gate electrode of the IGBT chip 1a is charged), and is turned off (when the gate electrode of the IGBT chip 1a is discharged). It functions to inactivate the sub-gate resistor 23a.

  The gate resistance adjusting circuit 2b constitutes the gate resistance of the IGBT chip 1b and is a circuit capable of adjusting the resistance value. The gate resistance adjusting circuit 2b includes a main gate resistor 21b, an on-conduction diode 22b, a MOSFET 24b, and a comparison circuit 25b. The main gate resistor 21b is formed on the surface of the IGBT chip 1b via an insulating layer in the same manner as the on-chip diode 31b, and is connected to the gate electrode of the IGBT chip 1b.

  The main gate resistor 21b is connected between the gate terminal 101 and the gate electrode of the IGBT chip 1b. A series circuit of an on-conduction diode 22b and a MOSFET 24b is connected in parallel with the main gate resistor 21b. The on-conduction diode 22b allows a current to flow through the MOSFET 24b only when the power module 100 is turned on (when the gate electrode of the IGBT chip 1b is charged), and deactivates the MOSFET 24b when the power module 100 is turned off (when the gate electrode of the IGBT chip 1b is discharged). To function.

  The output voltage of the comparison circuit 25b is applied to the gate electrode of the MOSFET 24b. The comparison circuit 25b receives the output voltage of the temperature detection circuit 3a (output voltage of the voltage detection circuit 33a) and the output voltage of the temperature detection circuit 3b (output voltage of the voltage detection circuit 33b), and corresponds to the difference between the two. Output voltage. Therefore, the output voltage of the comparison circuit 25b corresponds to the temperature difference between the IGBT chips 1a and 1b.

  Here, the main gate resistor 21a and the main gate resistor 21b are set to have the same resistance value, and the main gate resistor 21a and the on-conduction diode 22b are set to have the same on-resistance value. The output voltage of the comparison circuit 25b is biased so that the resistance value of the MOSFET 24b becomes equal to the resistance value of the sub-gate resistor 23a when the two input voltages are equal (this voltage is referred to as “bias voltage”). . Therefore, when the difference between the output voltage of the temperature detection circuit 3a and the output voltage of the temperature detection circuit 3b is 0, that is, when the temperatures of the IGBT chips 1a and 1b are equal to each other, the IGBT chip configured by the reference gate resistance circuit 2a. The gate resistance 1a is equal to the gate resistance of the IGBT chip 1b constituted by the gate resistance adjusting circuit 2b.

  For example, it is assumed that when the power module 100 is turned on (when the gate drive circuit 201 activates the drive signal), a current of 250 mA flows through the sub-gate resistor 23a. Further, it is assumed that the MOSFET 24b has characteristics that the threshold voltage is 3 V, the drain current is 250 mA when the gate voltage is 4 V, and the drain current is 500 mA when the gate voltage is 5 V. In such a case, when the difference between the output voltage of the temperature detection circuit 3a and the output voltage of the temperature detection circuit 3b is 0, the comparison circuit so that the output voltage of the comparison circuit 25b (gate voltage of the MOSFET 24b) is 4V. The output voltage of 25b may be biased (bias voltage = 4V). Further, if the rated current of the MOSFET 24b is 500 mA, the output voltage of the comparison circuit 25b changes in the range of 3V to 5V according to the difference between the output voltage of the temperature detection circuit 3a and the output voltage of the temperature detection circuit 3b. In addition, the input / output characteristics of the comparison circuit 25b may be adjusted.

  In the power module 100 according to the present embodiment, the gate resistance is set so that the temperature of the IGBT chip 1b approaches the temperature of the IGBT chip 1a with the temperature of the IGBT chip 1a (specific semiconductor element) as a reference (specified temperature). The resistance value of the adjustment circuit 2b, that is, the gate resistance of the IGBT chip 1b is controlled.

  First, when the temperatures of the IGBT chips 1a and 1b are equal to each other, the output voltage of the temperature detection circuit 3a is equal to the output voltage of the temperature detection circuit 3b. In this case, since the resistance value of the gate resistance adjustment circuit 2b is equal to the resistance value of the reference gate resistance circuit 2a, the gate resistances of the IGBT chips 1a and 1b are equal to each other.

  For example, when the temperature of the IGBT chip 1b becomes lower than the temperature (specified temperature) of the IGBT chip 1a, the output voltage of the comparison circuit 25b increases and the drain current of the MOSFET 24b increases. As a result, the resistance value of the gate resistance adjusting circuit 2b decreases, and the gate resistance of the IGBT chip 1b decreases. As a result, the timing at which the IGBT chip 1b is turned on is advanced, and the current flowing through the IGBT chip 1b when the power module 100 is turned on increases. Accordingly, since the turn-on loss of the IGBT chip 1b increases, the temperature of the IGBT chip 1b rises, and the temperature difference from the IGBT chip 1a decreases.

  On the other hand, when the temperature of the IGBT chip 1b becomes higher than the temperature of the IGBT chip 1a (specified temperature), the output voltage of the comparison circuit 25b decreases and the drain current of the MOSFET 24b decreases. As a result, the resistance value of the gate resistance adjusting circuit 2b increases, and the gate resistance of the IGBT chip 1b increases. As a result, the timing at which the IGBT chip 1b is turned on is delayed, and the current flowing through the IGBT chip 1b when the power module 100 is turned on decreases. Accordingly, since the turn-on loss of the IGBT chip 1b increases, the temperature of the IGBT chip 1b decreases, and the temperature difference from the IGBT chip 1a decreases.

  As described above, in the power module 100 according to the present embodiment, when a temperature difference occurs in the IGBT chips 1a and 1b, non-feedback is applied, and the resistance value of the gate resistance adjustment circuit 2b is reduced so as to reduce the temperature difference. It is corrected. Therefore, the temperatures of the IGBT chips 1a and 1b are controlled to be equal. Therefore, for example, even if the IGBT chips 1a and 1b have different characteristics such as threshold voltage and collector-emitter saturation voltage, a temperature difference is suppressed from occurring in the IGBT chips 1a and 1b. Therefore, the difference in the lifetimes of the IGBT chips 1a and 1b can be suppressed to a small extent, which can contribute to the extension of the lifetime of the power module 100.

  Further, since it is not necessary to manage the IGBT chip and the power module by ranking them, it is possible to contribute to the reduction of the manufacturing cost of the power module. Furthermore, since the gate resistance of the IGBT chip is controlled based on the detection result of the temperature difference of the IGBT chip, the above effect can be obtained regardless of the cause of the temperature difference. For example, it is possible to cope with a case where a temperature difference of the IGBT chip occurs due to a current imbalance in a steady state that is affected by a collector-emitter saturation voltage characteristic.

  2 to 4 are results of simulating the operation at the time of turn-on in a power module configured by connecting two IGBT chips in parallel. In these figures, the turn-on current waveform and the turn-on loss waveform of two IGBT chips are shown.

  FIG. 2 shows a turn-on current waveform and a turn-on loss waveform of each IGBT chip in an ideal power module composed of two IGBT chips having the same threshold voltage. The two IGBT chips have the same turn-on current waveform and turn-on loss waveform (the turn-on current waveform and the turn-on loss waveform in FIG. 2 overlap each other).

  FIG. 3 shows a turn-on current waveform and a turn-on loss waveform of each IGBT chip when two IGBT chips having different threshold voltages are used in the conventional power module. One IGBT chip (solid line) had a loss of + 34% with respect to FIG. 2, and the other IGBT chip (dotted line) had a loss of −28% with respect to FIG. This difference in loss causes a temperature imbalance between the two IGBT chips.

  FIG. 4 shows a turn-on current waveform and a turn-on loss waveform of each IGBT chip when two IGBT chips having different threshold voltages are used in the power module of the first embodiment. The characteristics of each IGBT chip are set to be the same as in the case of FIG. It was confirmed that the loss of each IGBT chip was almost the same as the case of FIG. 2 (difference of ± 1% or less). By suppressing the difference in loss, the temperatures are almost the same between the two IGBT chips.

<Embodiment 2>
In the second embodiment, the reference gate resistance circuit 2a and the temperature detection circuit 3a are formed integrally with the IGBT chip 1a. Similarly, the gate resistance adjustment circuit 2b and the temperature detection circuit 3b are formed integrally with the IGBT chip 1b.

  The constant current circuits 32a and 32b included in the power module 100 of FIG. 1 can be configured using operational amplifiers (operational amplifiers). The voltage detection circuits 33a and 33b can also be configured as buffer circuits using operational amplifiers. Furthermore, the comparison circuit 25b can also be configured as a differential amplifier circuit using an operational amplifier.

  Further, the current flowing through the on-chip diodes 31a and 31b may be in units of microamperes, and the MOSFET 24b only controls a current comparable to the current flowing through the sub-gate resistor 23a. Therefore, the reference gate resistance circuit 2a and the gate resistance adjustment circuit 2b The power consumption in the temperature detection circuit 3a and the temperature detection circuit 3b is about 5 to 10 V in voltage and about 1 mA in current.

  From the above, the area required for forming the IC (Integrated Circuit) of the reference gate resistance circuit 2a and the temperature detection circuit 3a and the area required for forming the IC of the gate resistance adjustment circuit 2b and the temperature detection circuit 3b are each 2 mm. It is expected to be about 3mm square. These are about 5 to 15% in the area ratio with respect to the IGBT chip 1a or the IGBT chip 1b.

  As a method of integrating the reference gate resistance circuit 2a and the temperature detection circuit 3a with the IGBT chip 1a, for example, an IC of the reference gate resistance circuit 2a and the temperature detection circuit 3a is formed on the IGBT chip 1a in the manufacturing process of the IGBT chip 1a. Alternatively, a method in which the chip on which the reference gate resistance circuit 2a and the temperature detection circuit 3a are formed may be bonded to the IGBT chip 1a. Similarly, the gate resistance adjustment circuit 2b and the temperature detection circuit 3b may be integrated with the IGBT chip 1b, or the gate resistance adjustment circuit 2b and the temperature detection circuit 3b may be integrated on the IGBT chip 1b. A method may be used in which a chip on which the resistance adjustment circuit 2b and the temperature detection circuit 3b are formed is bonded to the IGBT chip 1b.

  The reference gate resistance circuit 2a and the temperature detection circuit 3a are integrated with the IGBT chip 1a, and the gate resistance adjustment circuit 2b and the temperature detection circuit 3b are integrated with the IGBT chip 1b, so that it can be applied to the same package as the conventional power module. The advantage that it can be obtained.

<Embodiment 3>
As can be seen from FIG. 1, the reference gate resistance circuit 2a and the gate resistance adjustment circuit 2b described in the first embodiment have different configurations. Therefore, when the reference gate resistance circuit 2a and the temperature detection circuit 3a are integrated with the IGBT chip 1a and the gate resistance adjustment circuit 2b and the temperature detection circuit 3b are integrated with the IGBT chip 1b as in the second embodiment, the reference gate The IGBT chip 1a on which the resistance circuit 2a is mounted and the IGBT chip 1b on which the gate resistance adjustment circuit 2b is mounted have different configurations. That is, it is necessary to prepare two types of IGBT chips.

  Here, the gate resistance adjusting circuit 2b of FIG. 1 needs to change the resistance value according to the temperature difference between the IGBT chips 1a and 1b, but the resistance value of the reference gate resistance circuit 2a is constant regardless of the temperature difference. It's okay. The resistance value of the reference gate resistance circuit 2a is set to be equal to that of the gate resistance adjustment circuit 2b when the temperature difference between the IGBT chips 1a and 1b is zero.

  FIG. 5 is a diagram showing a configuration of a power module 100 that is a semiconductor device according to the third embodiment. The power module 100 has a configuration in which the sub-gate resistor 23a of the reference gate resistor circuit 2a is replaced with a MOSFET 24a and a comparator circuit 25a in the configuration of FIG.

  The MOSFET 24a and the comparison circuit 25a have the same electrical characteristics as the MOSFET 24b and the comparison circuit 25b of the gate resistance adjustment circuit 2b, respectively. However, the two input terminals of the comparison circuit 25a are short-circuited. Here, the two input terminals of the comparison circuit 25a are both connected to the output terminal of the temperature detection circuit 3a (the output terminal of the voltage detection circuit 33a). Therefore, a constant voltage (bias voltage) is output from the comparison circuit 25a. The bias voltage of the comparison circuit 25a is set to the same value as the bias voltage of the comparison circuit 25b.

  As a result, the resistance value of the reference gate resistance circuit 2a is constant, and the value is the same as that of the gate resistance adjustment circuit 2b when the temperature difference between the IGBT chips 1a and 1b is zero. That is, the reference gate resistance circuit 2a in FIG. 5 is equivalent to the reference gate resistance circuit 2a in FIG.

  As can be seen from FIG. 5, in the power module 100 of the third embodiment, the reference gate resistance circuit 2a and the gate resistance adjustment circuit 2b have the same circuit configuration except for the connection of the input terminal of the comparison circuit 25a. Therefore, when the second embodiment is applied to the power module 100 of the third embodiment, the IGBT chip 1a on which the reference gate resistance circuit 2a is mounted and the IGBT chip 1b on which the gate resistance adjustment circuit 2b is mounted have the same circuit configuration. This can be realized with an IGBT chip. Thereby, the production process, inventory management and the like can be simplified, and the manufacturing cost can be reduced.

<Embodiment 4>
In the power module 100 shown in the first to third embodiments, the control of the resistance value of the gate resistance adjustment circuit 2b is performed only when the power module 100 is turned on. Further, if the reference gate resistance circuit 2a, the gate resistance adjustment circuit 2b, and the temperature detection circuits 3a and 3b are integrated as in the second embodiment, low power consumption can be expected.

  Therefore, in the fourth embodiment, the drive signal output from the external gate drive circuit 201 is used as the power source of the reference gate resistance circuit 2a, the gate resistance adjustment circuit 2b, and the temperature detection circuits 3a and 3b. FIG. 6 is a diagram illustrating a configuration of a power module 100 that is a semiconductor device according to the fourth embodiment.

  The reference gate resistance circuit 2a and the temperature detection circuit 3a are realized as an IC 40a, and the gate resistance adjustment circuit 2b and the temperature detection circuit 3b are realized as an IC 40b. Here, the third embodiment is applied, and the ICs 40a and 40b have the same circuit configuration. In the IC 40a, the two input terminals of the comparison circuit 25a are connected so as to be short-circuited. The IC 40b is wired so that the output voltages of the temperature detection circuits 3a and 3b are input to the two input terminals of the comparison circuit 25b.

  As shown in FIG. 6, the power (Vdd) of the ICs 40 a and 40 b is taken from the gate terminal 101. In this case, part of the current for the gate drive circuit 201 to charge the gate electrodes of the IGBT chips 1a and 1b is supplied to the ICs 40a and 40b. In this configuration, since it is not necessary to supply power to the ICs 40a and 40b from the outside, the power module 100 can have a simple configuration similar to that of a conventional power module.

  Note that even if a part of the current for charging the gate electrodes of the IGBT chips 1a and 1b is supplied to the ICs 40a and 40b as in the present embodiment, the current flowing into the ICs 40a and 40b is very small. The influence on the operation of the chips 1a and 1b is small. Even if the operation of the IGBT chips 1a and 1b is affected, the influence can be corrected by the external gate resistor 202, which is not a problem.

<Embodiment 5>
Just as a power module that controls a current exceeding the rated current of each IGBT chip can be realized by connecting a plurality of IGBT chips in parallel, if a plurality of power modules are connected in parallel, Control of current exceeding the rated current becomes possible.

  The power module 100 according to the first embodiment can eliminate the temperature imbalance in the internal IGBT chips 1a and 1b. However, when a plurality of power modules 100 are connected in parallel, the temperature between the plurality of power modules 100 can be reduced. The imbalance cannot be resolved. In the fifth embodiment, a power module 100 that enables this is proposed.

  FIG. 7 is a diagram showing a configuration of a power module 100 that is a semiconductor device according to the fifth embodiment. The power module 100 has a configuration in which the two input terminals of the comparison circuit 25a are released from the configuration of FIG. Therefore, the circuit 2a constituting the gate resistance of the IGBT chip 1a and the circuit 2b constituting the gate resistance of the IGBT chip 1b have exactly the same configuration.

  Further, a reference temperature input terminal 105 and an internal temperature output terminal 106 are added as external terminals of the power module 100. The internal temperature output terminal 106 is for outputting the output voltage of the temperature detection circuit 3b to the outside. The reference temperature input terminal 105 is used to input a voltage corresponding to a reference temperature (specified temperature).

  As shown in FIG. 7, one input terminal of the comparison circuit 25 a is connected to the reference temperature input terminal 105, and the other input terminal is connected to the temperature detection circuit 3 a and also serves as the internal temperature output terminal 106. One input terminal of the comparison circuit 25b is connected to the reference temperature input terminal 105, and the other input terminal is connected to the temperature detection circuit 3b.

  When the reference temperature input terminal 105 and the internal temperature output terminal 106 are short-circuited, the two input terminals of the comparison circuit 25a are short-circuited, and the configuration is the same as in FIG. However, if the space between the reference temperature input terminal 105 and the internal temperature output terminal 106 is open, the output voltage of the comparison circuit 25a changes according to the voltage difference between the reference temperature input terminal 105 and the internal temperature output terminal 106. Therefore, the resistance value of the circuit 2a including the main gate resistor 21a, the on-conduction diode 22a, and the MOSFET 24a varies. That is, the circuit 2a functions as a “reference gate resistor circuit” having a constant resistance value when the reference temperature input terminal 105 and the internal temperature output terminal 106 are short-circuited, and the reference temperature input terminal 105 and the internal temperature In a state in which the space between the output terminal 106 is opened, it functions as a “gate resistance adjusting circuit” whose resistance value is variable.

  FIG. 8 is a diagram showing a connection when a plurality of power modules 100 according to Embodiment 5 are connected in parallel. When a plurality of power modules 100 are connected in parallel, the reference temperature input terminals 105 of all the power modules 100 are connected to each other. Then, the internal temperature output terminal 106 of one specific power module 100 (hereinafter referred to as “specific power module 100”) is connected to the reference temperature input terminal 105, and the internal temperature output terminal 106 of the other power module 100 is connected to the internal temperature output terminal 106. Do not connect anything.

  As a result, the circuit 2a of the specific power module 100 becomes the “reference gate resistance circuit”. Further, the output voltage of the temperature detection circuit 3a of the specific power module 100 is output from the internal temperature output terminal 106, and the reference temperature input terminal 105 of all the power modules 100 is set to a reference temperature (specified temperature). Input as the corresponding voltage.

  On the other hand, the circuits 2a of the power modules 100 other than the specific power module 100 and the circuits 2b of all the power modules 100 become “gate resistance adjusting circuits”, and the voltage (specific power module) input to the reference temperature input terminal 105 The resistance value changes so that the difference between the output voltage of 100 temperature detection circuit 3a) and the output voltage of temperature detection circuit 3a or 3b becomes small. As a result, the temperature of the IGBT chips 1a and 1b of all the power modules 100 is controlled to be equal to the temperature (specified temperature) of the IGBT chip 1a of the specific power module 100.

  As described above, according to the power module 100 of the fifth embodiment, in addition to eliminating the temperature imbalance in the internal IGBT chips 1a and 1b, it is also possible to eliminate the temperature imbalance between the plurality of power modules 100. it can.

<Embodiment 6>
In the first embodiment, the timing at which the gate resistance of the IGBT chip 1b is corrected by the gate resistance adjusting circuit 2b is when the power module 100 is turned on, but it may be when the power module 100 is turned off. In that case, the gate resistance adjusting circuit 2b may be configured as shown in FIG. The gate resistance adjusting circuit 2b of FIG. 9 is obtained by replacing the on-conducting diode 22b with an off-conducting diode 26b whose anode / cathode is reversed and the MOSFET 24b with a MOSFET 27b whose drain / source is reversed with respect to the configuration of FIG. . Similar to the comparison circuit 25b of FIG. 1, the output voltages of the temperature detection circuits 3a and 3b are input to the two input terminals of the comparison circuit 28b connected to the gate of the MOSFET 27b.

  Further, although not shown, in the series circuit of the diode 22a and the sub-gate resistor 23a of the reference gate resistor circuit 2a, the anode and cathode of the diode 22a are reversed from those in FIG. Alternatively, the reference gate resistance circuit 2a may have the same circuit configuration as that of FIG. 9 by applying the third to fifth embodiments (FIGS. 5 to 8).

  Further, the timing for correcting the gate resistance of the IGBT chip 1b may be both at the time of turn-on and at the time of turn-off. In that case, the gate resistance adjusting circuit 2b may be configured as shown in FIG. The gate resistance adjusting circuit 2b of FIG. 10 is obtained by adding the off-conduction diode 26b, the MOSFET 27b, and the comparison circuit 28b shown in FIG. 9 to the configuration of FIG.

  Further, although not shown, two series circuits of a diode 22a and a sub-gate resistor 23a are provided in the reference gate resistor circuit 2a, and the anode and cathode of one of the diodes 22a are reversed from those in FIG. Alternatively, the reference gate resistance circuit 2a may have the same circuit configuration as that of FIG. 10 by applying the third to fifth embodiments (FIGS. 5 to 8).

  In fields such as resonant mode power supplies, there may be no switching loss at turn-on. In that case, it is effective to correct the gate resistance of the IGBT chip 1b at the time of turn-off or both at the time of turn-off and at the time of turn-on.

<Embodiment 7>
In the seventh embodiment, the IGBT chips 1a and 1b, the reference gate resistance circuit 2a, the gate resistance adjustment circuit 2b, and the temperature detection circuits 3a and 3b of the power module 100 according to the present invention are elements using silicon carbide (SiC). Configure.

  A power module using an IGBT chip made of silicon carbide can operate under a temperature condition of 200 ° C. or higher, and has a wider temperature range than a power module using an IGBT chip made of silicon (Si). However, under a high temperature condition exceeding 200 ° C., the variation in the electrical characteristics of the IGBT chip becomes larger than that under the temperature condition of 150 ° C. or less, and current imbalance between the IGBT chips when connected in parallel deteriorates. Therefore, the present invention is particularly effective when applied to a power module having an IGBT chip made of silicon carbide.

  Further, when the reference gate resistance circuit 2a, the gate resistance adjustment circuit 2b, and the temperature detection circuits 3a and 3b are formed on the IGBT chips 1a and 1b that are operated under a high temperature condition, it is necessary to be able to adapt to the same high temperature condition. . Therefore, the reference gate resistance circuit 2a, the gate resistance adjustment circuit 2b, and the temperature detection circuits 3a and 3b may also be configured by elements using silicon carbide.

<Modification>
In the above embodiment, a power module in which two IGBT chips are connected in parallel is shown. However, the present invention is also applicable to a power module in which three or more IGBT chips are connected in parallel. In that case, one of the plurality of IGBT chips is an IGBT chip having the gate electrode connected to the reference gate resistance circuit 2a, and all the other IGBT chips are connected to the gate electrode by the gate resistance adjusting circuit 2b. And it is sufficient.

  In the first embodiment, the sub-gate resistor 23a of the reference gate resistor circuit 2a may be omitted. That is, the reference gate resistance circuit 2a may be configured by only the main gate resistance 21a. The sub-gate resistor 23a may be connected between the gate and emitter of the IGBT chip 1a. In that case, the gate current flowing from the external gate resistor 202 is shunted.

  In the first to seventh embodiments, a series circuit of the on-conduction diode 22b of the gate resistance adjusting circuit 2b and the MOSFET 24b may be connected between the gate and the emitter of the IGBT chip 1b. Also in this case, since the value of the current flowing through the main gate resistor 21a can be controlled by controlling the MOSFET 24b, the apparent on-resistance of the IGBT can be controlled. Similarly, in the third to seventh embodiments, a series circuit of the on-conduction diode 22a of the reference gate resistance circuit 2a and the MOSFET 24a may be connected between the gate and the emitter of the IGBT chip 1a.

  In the first to seventh embodiments, the temperature of one of the plurality of IGBT chips connected in parallel (specific semiconductor element) is used as a reference to control the temperature of the other IGBT chip. May be, for example, an average temperature value of all IGBT chips. For example, the power module 100 is configured as shown in FIG. 7, and a circuit that generates a voltage corresponding to the average temperature of all IGBT chips included in the power module 100 is provided, and the voltage is supplied to the reference temperature input terminal 105. This is possible by doing. In that case, the magnitudes of the gate resistances of all IGBT chips are controlled (the power module 100 has no “reference gate resistance circuit”).

  In Embodiments 1-7, although the semiconductor element which comprises the power module 100 showed the example which used IGBT, this invention is widely applicable to insulated gate semiconductor elements, such as MOSFET.

  It should be noted that the present invention can be freely combined with each other within the scope of the invention, and each embodiment can be appropriately modified or omitted.

  100 power module, 1a, 1b IGBT chip, 2a reference gate resistance circuit, 2b gate resistance adjustment circuit, 21a, 21b main gate resistance, 22a, 22b ON conduction diode, 23a sub-gate resistance, 24a, 24b, 27b MOSFET, 25a, 25b , 28b comparison circuit, 26b off-conduction diode, 3a, 3b temperature detection circuit, 31a, 31b on-chip diode, 32a, 32b constant current circuit, 33a, 33b voltage detection circuit, 101 gate terminal, 102 collector terminal, 103 emitter terminal, 104 ground terminal, 105 reference temperature input terminal, 106 internal temperature output terminal, 201 gate drive circuit, 202 external gate resistance, 40a, 40b IC.

Claims (9)

An insulated gate semiconductor element;
A temperature detection circuit for detecting the temperature of the semiconductor element;
A gate resistance adjustment circuit for adjusting the gate resistance of the semiconductor element,
The gate resistance adjusting circuit increases the gate resistance of the semiconductor element when the temperature of the semiconductor element becomes higher than a specified temperature, and increases the gate resistance of the semiconductor element when the temperature of the semiconductor element becomes lower than the specified temperature. A semiconductor device characterized by reducing gate resistance. The semiconductor device according to claim 1, wherein the prescribed temperature is a temperature of a specific semiconductor element connected in parallel to the semiconductor element. A plurality of the semiconductor elements;
The plurality of semiconductor elements are connected in parallel to each other,
The semiconductor device according to claim 2, wherein the specific semiconductor element is one of the plurality of semiconductor elements. The semiconductor device according to claim 1, wherein the prescribed temperature is an average value of all temperatures of the semiconductor element and other semiconductor elements connected in parallel to the semiconductor element. 5. The temperature detection circuit and the gate resistance adjustment circuit are integrally formed with the semiconductor element by being disposed on a chip of the semiconductor element. 6. Semiconductor device. The semiconductor device according to claim 1, wherein a drive signal input to a gate electrode of the semiconductor element is used as a power source for the temperature detection circuit and the gate resistance adjustment circuit. 6. The semiconductor device according to claim 1, wherein a timing at which the gate resistance adjusting circuit adjusts a gate resistance of the semiconductor element is one or both of when the semiconductor element is turned on and turned off. 6. . An internal temperature output terminal from which the output voltage of the temperature detection circuit is output;
The semiconductor device according to claim 1, further comprising a reference temperature input terminal for inputting a voltage corresponding to the prescribed temperature. The semiconductor device according to claim 1, wherein the semiconductor element, the temperature detection circuit, and the gate resistance adjustment circuit are configured using silicon carbide.

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