JP2016103700A - Switch device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a switch device capable of transferring a plurality of low-delay frames addressed to the same output port while avoiding collision of the low-delay frames.SOLUTION: The switch device comprises a plurality of ports. The switch device includes: a P1 output delay adjustment part 41, a P2 output delay adjustment part 42, a P3 output delay adjustment part 43 and a P4 output delay adjustment part 44 by which, if the collision is detected regarding the plurality of low-delay frames which are inputted to the other ports and outputted from one port, priorities of the plurality of low-delay frames are determined and delay adjustment amounts of the plurality of low-delay frames are calculated on the basis of the priorities; and a P1 variable delay part 61, a P2 variable delay part 62, a P3 variable delay part 63 and a P4 variable delay part 64 by which the low-delay frame inputted to the one port is delayed with the delay adjustment amounts which are calculated by the P1 output delay adjustment part 41, the P2 output delay adjustment part 42, the P3 output delay adjustment part 43 and the P4 output delay adjustment part 44 of the other ports.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a switch device that transfers a frame by Ethernet (registered trademark).

  Conventional switch devices that are Ethernet switch devices include a cut-through method and a store-and-forward method. Since the cut-through switching device transfers frames without accumulating them, the transfer time is short, but errors cannot be checked and discarded, and error frames are also transferred to the network. On the other hand, the store-and-forward switching device has a buffer that can store one frame, so the delay time is longer than that of the cut-through method, but it can be discarded after checking for errors. do not do. Conventionally, since Ethernet has been used for information-related networks with a relatively high delay tolerance, store-and-forward switching devices have become mainstream. However, in recent years, studies for using Ethernet for transfer of control information and audio-visual information have been activated.

  In the following Patent Document 1, the switching device has a function of cyclically repeating a reserved transfer section for transferring a reserved frame and a free transfer section for transferring a non-reserved frame, and cuts when the reserved frame arrives in the reserved transfer section. A technique of a control method is disclosed in which through transfer is performed and a non-reserved frame is stored and forwarded to transfer a control frame sensitive to delay with low delay.

  In Non-Patent Document 1 below, a normal frame and an express frame having a lower delay than the normal frame are defined, and when transferring from the port of the switching device, the normal frame is divided and the express frame is interrupted and transmitted, and then the normal frame is transmitted. An IET (Interspersing Express Traffic) transfer method for transmitting the remainder of the frame is being studied.

Japanese Patent No. 5302559

IEEE802.3br Interspersing Express Traffic (IET) Task Force (TF) Baseline 2014-05-14 (http://www.ieee802.org/3/br/Baseline/8023-IET-TF-1405_Winkel-iet-Baseline-r3 .pdf)

  However, according to the technique disclosed in Patent Document 1, when the reserved frames collide, the reserved frames are also buffered in the frame buffer. For this reason, there is a problem that the reserved frame cannot be transferred in the shortest time. Also, the scheduling table must be set in some way in the network. Therefore, in addition to the priority of the frame, there is a problem that a manual timing setting or a function for automatically adjusting the timing is necessary.

  Further, according to the technique of Non-Patent Document 1, the delay priority control when the normal frame and the express frame collide is excellent, but a plurality of express frames input from a plurality of ports are output to the same destination port. In this case, there is a problem that the collision of the express frame cannot be avoided in the switch device.

  The present invention has been made in view of the above, and an object of the present invention is to obtain a switch device that can transfer a plurality of low-delay frames while avoiding collisions of a plurality of low-delay frames addressed to the same output port.

  In order to solve the above-described problems and achieve the object, the present invention is a switching device having a plurality of ports, and each port has a plurality of low-delay frames that are input to other ports and output from the own ports. When a collision is detected with respect to the output delay adjustment means for determining the priority of the plurality of low delay frames and calculating the delay adjustment amount of the plurality of low delay frames based on the priority, and input to the own port Variable delay means for delaying the low delay frame by a delay adjustment amount calculated by the output delay adjustment means of another port.

  According to the present invention, there is an effect that each low delay frame can be transferred while avoiding collision of a plurality of low delay frames addressed to the same output port.

The figure which shows the structural example of the functional block of the switch apparatus concerning Embodiment 1 of this invention. The figure which shows the delay control which avoids the collision of the express frame input from two ports in Embodiment 1 The figure which shows the delay control which avoids the collision of the express frame input from three ports in Embodiment 1 The figure which shows the delay control which avoids the collision of the express frame in Embodiment 2, Comprising: The control which delays the express frame with high priority The figure which shows the delay control which avoids the collision of the express frame in Embodiment 2, Comprising: The control which delays the express frame with a low priority is shown

  Hereinafter, a switch device according to an embodiment of the present invention will be described in detail with reference to the drawings. Note that the present invention is not limited to the embodiments.

Embodiment 1 FIG.
FIG. 1 is a diagram illustrating a configuration example of functional blocks of the switch device according to the first embodiment of the present invention. In FIG. 1, a four-port switch device is taken as an example to simplify the description. However, this is only an example, and the number of ports of the switch device may be an optimum number of ports for the system, or three ports or less or five ports. Even if it is above, the same effect can be acquired. The block configuration is an example of means for realizing a control method described below, and the configuration for realizing the control method is not limited. In FIG. 1, ports 1, 2, 3, and 4 are separately described on the input side of the switch device, and ports 1, 2, 3, and 4 are separately described on the output side of the switch device. The input side and output side port 1, the input side and output side port 2, the input side and output side port 3, and the input side and output side port 4 are the same port.

  The switch device is connected to the Ethernet and performs control to output a frame input from a certain port from another port. For example, the switch device can output a frame input from the port 1 from any one of the ports 2, 3, and 4. Further, the switch device can output the frame input from the ports 2, 3, 4 from the port 1. In the switch device, a port to which a frame is input is an input port, and a port that outputs a frame is an output port. In the following description, port 1 may be referred to as P1, port 2 as P2, port 3 as P3, and port 4 as P4. When any of P1, P2, P3, and P4 is given to the name of each component included in the switch device, each component is the frame input to the port indicated by P1 to P4 or the port indicated by P1 to P4 It operates on the frame output from

  Next, each configuration provided in the switch device will be described.

  The P1 reception IET MAC (Media Access Control) unit 11, the P2 reception IET MAC unit 12, the P3 reception IET MAC unit 13, and the P4 reception IET MAC unit 14 are connected to each port on the receiving side scheduled to be standardized by IEEE 802.3br. This is a reception MAC unit that supports the IET function. When there is no need to distinguish each configuration, it may be described as a reception IET MAC unit 11 to 14 or a reception IET MAC unit. The switch device includes a reception IET MAC unit for each port.

  The P1 frame identification unit 21, the P2 frame identification unit 22, the P3 frame identification unit 23, and the P4 frame identification unit 24 identify and output the priority of received frames input to the corresponding reception IET MAC units 11 to 14 at each port. Perform port identification. When there is no need to distinguish each component, it may be described as the frame identification units 21 to 24 or the frame identification unit. The switch device includes a frame identification unit for each port.

  The destination port search unit 31 creates an FDB (Filtering Data Base) by MAC address learning and searches for the destination of the received frame.

  The P1 output delay adjustment unit 41, the P2 output delay adjustment unit 42, the P3 output delay adjustment unit 43, and the P4 output delay adjustment unit 44 are configured such that, at each port, an express frame that is a low delay frame input from another port is an output port. If there is a collision, the P1 variable delay unit 61, the P2 variable delay unit 62, and the P3 variable delay unit corresponding to the port to which the express frame having a low priority is input is determined according to the priority of each express frame. 63 or P4 is instructed to delay the express frame to either the P4 variable delay unit 64. When there is no need to distinguish each configuration, it may be described as an output delay adjustment unit 41 to 44 or an output delay adjustment unit. The switch device includes an output delay adjustment unit for each port.

  In response to the P1 output delay request, the P1 output delay adjustment unit 41 instructs the P2 variable delay unit 62, the P3 variable delay unit 63, and the P4 variable delay unit 64 to delay the express frame input from the corresponding port. Specifically, the P1 output delay adjustment unit 41 instructs the P2 variable delay unit 62 to delay the express frame input from the port 2, and the P3 variable delay unit 63 inputs the express frame input from the port 3. The delay of the express frame input from the port 4 is instructed to the P4 variable delay unit 64.

  Similarly, in response to the P2 output delay request, the P2 output delay adjustment unit 42 sets the delay of the express frame input from the corresponding port to the P1 variable delay unit 61, the P3 variable delay unit 63, and the P4 variable delay unit 64. Instruct. Specifically, the P2 output delay adjustment unit 42 instructs the P1 variable delay unit 61 to delay the express frame input from the port 1, and the P3 variable delay unit 63 inputs the express frame input from the port 3. The delay of the express frame input from the port 4 is instructed to the P4 variable delay unit 64.

  Further, the P3 output delay adjusting unit 43 instructs the P1 variable delay unit 61, the P2 variable delay unit 62, and the P4 variable delay unit 64 to delay the express frame input from the corresponding port in response to the P3 output delay request. To do. Specifically, the P3 output delay adjustment unit 43 instructs the P1 variable delay unit 61 to delay the express frame input from the port 1, and the P2 variable delay unit 62 inputs the express frame input from the port 2. The delay of the express frame input from the port 4 is instructed to the P4 variable delay unit 64.

  The P4 output delay adjustment unit 44 instructs the delay of the express frame input from the corresponding port to the P1 variable delay unit 61, the P2 variable delay unit 62, and the P3 variable delay unit 63 in response to the P4 output delay request. To do. Specifically, the P4 output delay adjustment unit 44 instructs the P1 variable delay unit 61 to delay the express frame input from the port 1, and the P2 variable delay unit 62 inputs the express frame input from the port 2. And the P3 variable delay unit 63 is instructed to delay the express frame input from the port 3. When there is no need to distinguish each request, it may be described as an output delay request.

  The multiplexing unit 51 multiplexes the normal frames output from the frame identification units 21 to 24. The normal frame buffer unit 52 stores the normal frame multiplexed by the multiplexing unit 51. The separation unit 53 reads and separates the multiplexed normal frames from the normal frame buffer unit 52, and separates the separated normal frames into a P1 transmission IET MAC unit 71, a P2 transmission IET MAC unit 72, a P3 transmission IET MAC unit 73, Output to P4 transmission IET MAC unit 74.

  The P1 variable delay unit 61, the P2 variable delay unit 62, the P3 variable delay unit 63, and the P4 variable delay unit 64 adjust the P1 output delay corresponding to the output port that is the destination of the express frame input to the own port at each port. Based on the output delay requests from the unit 41, the P2 output delay adjustment unit 42, the P3 output delay adjustment unit 43, and the P4 output delay adjustment unit 44, the express frame input to the own port is delayed. For example, the P1 variable delay unit 61 delays the express frame input to the port 1 based on output delay requests from the P2 output delay adjustment unit 42, the P3 output delay adjustment unit 43, and the P4 output delay adjustment unit 44. This is because, in the switch device, the express frame is output from a port different from the input port. When there is no need to distinguish each configuration, the variable delay units 61 to 64 or the variable delay unit may be described. The switch device includes a variable delay unit for each port.

  The P1 transmission IET MAC unit 71, the P2 transmission IET MAC unit 72, the P3 transmission IET MAC unit 73, and the P4 transmission IET MAC unit 74 support the IET function on the transmission side scheduled to be standardized by IEEE 802.3br at each port. It is a transmission MAC part. When there is no need to distinguish each configuration, it may be described as a transmission IET MAC unit 71 to 74 or a transmission IET MAC unit. The switch device includes a transmission IET MAC unit for each port.

  A structural feature of the switch device according to the first embodiment is that each port includes an output delay adjustment unit and a variable delay unit that can dynamically change the delay adjustment amount based on an adjustment result by the output delay adjustment unit. is there.

  In FIG. 1, an arrow line described as an express frame indicates an express frame path that is a transmission path of an express frame, and an arrow line described as a normal frame is a transmission path of a normal frame. Indicates the normal frame path.

  Next, delay control performed by the switch device according to the first embodiment will be described.

  When the terminals (not shown) connected to each port do not support the IET function, the reception IET MAC units 11 to 14 receive all the received frames from the terminals that do not support the IET function in the express frame path for each port. Are output to the frame identification units 21 to 24 corresponding to. On the other hand, when a terminal (not shown) connected to each port supports the IET function, the reception IET MAC units 11 to 14 determine whether the reception frame is an express frame or a normal frame according to information stored in the preamble of the reception frame. Based on the determination result, the received frame is assigned to an express frame path or a normal frame path, and is output to the corresponding frame identifying units 21 to 24 for each port.

  Note that a normal frame transmitted from a terminal that supports the IET function may be divided when the express frame interrupts. When the divided normal frames are input, the reception IET MAC units 11 to 14 assemble the divided normal frames and output them to the frame identification units 21 to 24 corresponding to each port.

  The frame identification units 21 to 24 receive information on an arbitrary area of the received frame (for example, an Ethernet frame) about the received frame output from the corresponding received IET MAC unit 11 to 14 from a terminal that does not support the IET function. The received frame is distributed to the express frame path or the normal frame path based on the Type / Length field value of the VLAN or the priority value of the VLAN tag) or the set value set for each port. On the other hand, when the connected terminal supports the IET function and the received IET MAC unit 11 to 14 has already assigned the received frame to the express frame or the normal frame, the frame identifying units 21 to 24 use the express frame or the normal frame. There is no need to sort out.

  The frame identification units 21 to 24 extract destination information for the express frame and the normal frame, issue a search request including the destination information to the destination port search unit 31, and based on a response from the destination port search unit 31, Output port information, which is information about the output port that is the destination of the frame, is assigned to each frame. The frame identifying units 21 to 24 output the express frame to which the output port information is added to the corresponding variable delay units 61 to 64 through the express frame path, and the normal frame to which the output port information is added to the multiplexing unit through the normal frame path. To 51.

  Similarly to the conventional switch device, the destination port search unit 31 searches the FDB with the destination information of each frame as a key in response to the search request from the frame identification units 21 to 24, determines the output port as the destination, The output port information that is a response to the search request is notified to the identification units 21 to 24.

  The output delay adjustment units 41 to 44 output express frames output from the frame identification units 21 to 24 corresponding to ports other than the corresponding output ports and transmitted on the express frame path from the variable delay units 61 to 64. Monitor. For example, when paying attention to the P1 output delay adjustment unit 41 of the port 1, the P1 output delay adjustment unit 41 is output from the P2 frame identification unit 22, the P3 frame identification unit 23, and the P4 frame identification unit 24, and the P2 variable delay unit 62, The express frame transmitted on the express frame path to the P3 variable delay unit 63 and the P4 variable delay unit 64 is monitored. Specifically, the P1 output delay adjustment unit 41 monitors whether or not the express frame input from the ports 2, 3, and 4 is an express frame output from the port 1. Monitor the frame for collisions.

  FIG. 2 is a diagram illustrating delay control for avoiding collision of express frames input from two ports in the first embodiment. Squares on ports 2 and 3 indicate express frames. Here, as shown in FIG. 2A, the express frames input from ports 2 and 3 are both frames to be output from port 1, and the output timing collides before delay adjustment, that is, the frame transmission period is Assume that there are duplicates.

  For example, when the P1 output delay adjustment unit 41 detects a collision in output timing from the temporal overlap of express frames indicating the frame data valid range, the P1 output delay adjustment unit 41 collides based on the frame information of each express frame acquired from each input port. An arbitrary area of one express frame (for example, internal header information used inside the switch circuit, a Type / Length field value of the Ethernet frame, a VLAN priority value) is checked, and a predetermined arbitrary rule (for example, the switch circuit The priority of each express frame is determined by internal header information used internally, Type / Length field value of Ethernet frame, and priority information associated with VLAN priority value). Alternatively, when the priority is determined in advance for each port to which the express frame is input, the P1 output delay adjustment unit 41 determines the priority of each express frame based on the information of the port to which each express frame is input. May be. Here, the priority of the express frame input from the port 2 is “high”, and the priority of the express frame input from the port 3 is “low”.

  When the priority of each express frame is determined, the P1 output delay adjustment unit 41 avoids a collision at the time of output at the port 1 which is an output port, so that the P2 variable delay unit delays the express frame with a low priority. 62, an instruction is given to the P3 variable delay unit 63 and the P4 variable delay unit 64. Specifically, in the case of FIG. 2, the P1 output delay adjustment unit 41 has a lower P3 priority for the express frame input from the port 3 than the priority of the express frame input from the port 2. The delay unit 63 sets a delay adjustment amount that can avoid collision with the express frame input from the port 2 by the P1 output delay request, and adjusts the delay of the express frame input from the port 3. .

  FIG. 2B shows the state of each express frame after delay adjustment in which the express frame input from the port 3 is subjected to delay adjustment. The minimum delay adjustment amount set by the P1 output delay adjustment unit 41 in the P3 variable delay unit 63 is “overlap time of express frame + minimum IFG (Inter Frame Gap) of Ethernet”, but if necessary, add delay overhead May be. The minimum IFG of Ethernet is a time of 12 bytes.

  As a result, even if the output timings of two express frames collide with the same output port, the switching device delays one of the express frames, thereby taking into account the priority for the delay of each express frame. The express frame can be transferred while avoiding the above.

  FIG. 3 is a diagram illustrating delay control for avoiding collision of express frames input from three ports in the first embodiment. The squares on ports 2, 3, and 4 indicate express frames. Here, as shown in FIG. 3A, each express frame input from ports 2, 3, and 4 is a frame to be output from port 1, and the output timing collides before delay adjustment, that is, the frame Assume that the transmission periods overlap.

  The P1 output delay adjustment unit 41 determines the priority of the three express frames that collide, as in the case of FIG. Here, the priority of the express frame input from the port 2 is “high”, the priority of the express frame input from the port 3 is “low”, and the priority of the express frame input from the port 4 is “medium”. And

  The P1 output delay adjustment unit 41 has the highest priority of the express frame input from the port 2, then the priority of the express frame input from the port 4 is high, and the express frame input from the port 3 Since the priority is the lowest, a delay adjustment amount is set for the P4 variable delay unit 64 of the port 4 so as to avoid collision with the express frame input from the port 2 by the P1 output delay request, The delay adjustment of the express frame input from the port 4 is performed. Also, the P1 output delay adjustment unit 41 sends an express frame input from the port 2 and a P4 variable delay unit 64 input from the port 4 in response to a P1 output delay request to the P3 variable delay unit 63 of the port 3. The delay adjustment amount is set so as to avoid collision with the delay-adjusted express frame, and the delay adjustment of the express frame input from the port 3 is performed.

  FIG. 3B shows the state of each express frame after delay adjustment of the express frame input from the port 4 and delay adjustment of the express frame input from the port 3. The minimum value of the delay adjustment amount set by the P1 output delay adjustment unit 41 in the P4 variable delay unit 64 is “the transfer start time of the express frame with the medium priority from the port 4 before the delay adjustment and the priority from the port 2” Is the difference time from the transfer completion time of the high express frame + the minimum IFG of Ethernet ”, but a delay overhead may be added if necessary. Further, the minimum value of the delay adjustment amount set by the P1 output delay adjustment unit 41 in the P3 variable delay unit 63 is “the transfer start time of the express frame with low priority from the port 3 before the delay adjustment and the port 2 The difference time from the transfer completion time of the express frame with high priority + the minimum IFG of Ethernet + the transfer time of the express frame with the medium priority from the port 4 after delay adjustment + the minimum IFG of Ethernet ” May be added.

  In the above description, the transfer completion time of the express frame with high priority from port 2 is A shown in FIG. 3, and the transfer start time of the express frame with medium priority from port 4 before delay adjustment Is B shown in FIG. 3, the transfer start time of the express frame with low priority from the port 3 before delay adjustment is C shown in FIG. 3, and the priority from the port 4 after delay adjustment is medium The transfer time of the express frame is D shown in FIG.

  Thereby, in the switch device, even when the output timings of the three express frames addressed to the same output port collide, by delaying the two express frames, the priority is given to the delay of each express frame, and the collision is considered. The express frame can be transferred while avoiding the above.

  In FIG. 1, the signal line of the output delay request from the output delay adjustment units 41 to 44 is described as if one signal line is branched into three, but one signal line is provided for each variable delay unit. A configuration in which a dedicated signal line is provided one by one may be used.

  The variable delay units 61 to 64 are input from the frame identification units 21 to 24 corresponding to their own ports via the express frame path based on the output delay requests from the output delay adjustment units 41 to 44 corresponding to the other connected ports. The expressed express frame is delayed by an amount specified for each output port. The variable delay units 61 to 64 output the delayed express frame or the non-delayed express frame to each transmission IET MAC unit 71 to 74.

  On the other hand, a frame identified as a normal frame by the frame identifying units 21 to 24 is input to each of the transmission IET MAC units 71 to 74 via the multiplexing unit 51, the normal frame buffer unit 52, and the separation unit 53.

  The transmission IET MAC units 71 to 74 are connected to an express frame path that is a transmission path of a frame input to a port other than the corresponding output port and a normal frame path from the separation unit 53. For example, the P1 transmission IET MAC unit 71 having the output port 1 as the output port includes an express frame path from the P2 variable delay unit 62 corresponding to the input port 2 and an express frame from the P3 variable delay unit 63 corresponding to the input port 3. The path, the express frame path from the P4 variable delay unit 64 corresponding to the input port 4, and the normal frame path from the separation unit 53 are connected.

  The transmission IET MAC units 71 to 74 capture the express frame whose output port number indicated by the output port information given by the frame identification units 21 to 24 is the self-port for the express frame input from the express frame path. Transfer from its own port. In the transmission IET MAC units 71 to 74, the express frames input from the express frame path are adjusted in advance by the output delay adjustment units 41 to 44 and the variable delay units 61 to 64, and thus do not collide.

  Further, the transmission IET MAC units 71 to 74, for the normal frame input from the normal frame path, output the normal frame whose output port number indicated by the output port information given by the frame identification units 21 to 24 is addressed to its own port. Import and transfer from own port. Here, in the transmission IET MAC units 71 to 74, there is a possibility that the normal frame input from the normal frame path and the frame input from the express frame path may collide. In this case, this is considered in the IEEE 802.3br task force. The express frame can be transferred with a low delay by interrupting and transmitting the express frame to the normal frame.

  As described above, according to the first embodiment, when the switching device separates the received frame into an express frame and a normal frame and detects that the express frame collides at the output port, the delay of each express frame is determined. , The express frame with a low priority is transferred with a delay from the express frame with a high priority. As a result, it is possible to obtain an effect that low-delay transfer of an express frame can be realized based on the priority while cooperating with the Ethernet frame transfer method standardized by IEEE 802.3br. In particular, when a cyclically and discretely required low delay frame such as a control signal is input from a plurality of ports, the switch device autonomously transfers each frame with an appropriate delay adjustment amount. There is an effect that delay priority control can be performed.

  In the first embodiment, the P1 output delay adjustment unit 41 calculates the delay adjustment amount of the express frame with a low priority and does not calculate the delay adjustment amount of the express frame with a high priority. However, the present invention is limited to this. It is not a thing. The P1 output delay adjustment unit 41 may perform delay control by calculating a delay adjustment amount for avoiding a collision while outputting all express frames in descending order of priority. In this case, the P1 output delay adjustment unit 41 may set the delay adjustment amount to zero or may set the delay adjustment amount to other than zero for the express frame with the highest priority. The case where the delay adjustment amount of the express frame having the highest priority is zero is the same as not delaying the express frame having the highest priority.

  In the first embodiment, the case where the priority of the express frame is “high”, “medium”, and “low” has been described. However, the present invention is not limited to this. The priority of the express frame may be expressed by a numerical value, and the priority level between the express frames may be determined by comparing the numerical values of the priority of the express frames.

  In the first embodiment, the P1 output delay adjustment unit 41 is specifically described. However, this is only an example, and the P2 output delay adjustment unit 42, the P3 output delay adjustment unit 43, and the P4 output delay adjustment unit 44 are also described. The same delay control as that of the P1 output delay adjustment unit 41 is performed.

Embodiment 2. FIG.
In the first embodiment, when the P1 output delay adjustment unit 41 detects a collision when outputting a plurality of express frames input from ports other than the port 1 from the port 1, the P1 output delay adjustment unit 41 uses the priority for the delay of the express frame. The delay adjustment amount of the express frame input from a port other than port 1 is determined.

  In the second embodiment, in the switching device, in addition to the priority for delay, a delay allowable amount for each priority is set. In the switching device, even when an express frame with a high priority collides with an express frame with a low priority, the delay adjustment amount of the express frame with a high priority should be less than a delay tolerance set in advance for the high priority. For example, by delaying and transferring an express frame having a high priority, the delay in the switch of an express frame having a low priority collided is mitigated.

  The functional block configuration of the switch device for realizing the second embodiment may be the same as that of the first embodiment shown in FIG. The difference between the first embodiment and the second embodiment is a method of delay control at the time of output delay request generation in the output delay adjustment units 41 to 44. As described above, the output delay adjustment units 41 to 44 have a delay tolerance parameter for each priority in addition to a plurality of priorities associated with values in an arbitrary region of the express frame. .

  Next, delay control performed by the switch device according to the second embodiment will be described.

  FIG. 4 is a diagram illustrating delay control for avoiding collision of express frames in the second embodiment, and control for delaying express frames with high priority. FIG. 5 is a diagram illustrating the delay control for avoiding the collision of the express frame in the second embodiment, and the control for delaying the express frame having a low priority. Here, as shown in FIG. 4A and FIG. 5A, an express frame with a low priority inputted in advance from port 2 and an express frame with a high priority inputted late from port 3 are included. Assume that both frames are to be output from port 1 and output timing collides before delay adjustment, that is, the frame transmission periods overlap.

  In the first embodiment, the P1 output delay adjustment unit 41 unconditionally gives priority to an express frame having a high priority and performs delay adjustment to delay an express frame having a low priority. There is a concern that the delay adjustment amount given to the input express frame with a low priority, that is, the delay penalty will increase. Therefore, in the second embodiment, when the P1 output delay adjusting unit 41 detects the collision of the express frames shown in FIGS. 4A and 5A, the P1 output delay adjusting unit 41 selects the express frame with a high priority that is input late. A high priority delay adjustment amount that is a delay adjustment amount in the case of delaying is calculated, the calculated high priority delay adjustment amount, and a high priority delay allowance that is a delay allowance set in advance for an express frame having a high priority Compare

  When high priority delay adjustment amount ≦ high priority delay allowable amount, the P1 output delay adjustment unit 41 performs delay control to delay an express frame having a high priority with the calculated high priority delay adjustment amount. FIG. 4B shows the state of each express frame after delay adjustment in which the express frame having a high priority input from the port 3 is subjected to delay adjustment. The minimum value of the delay adjustment amount set by the P1 output delay adjustment unit 41 in the P3 variable delay unit 63 is “express frame overlap time + Ethernet minimum IFG”, but delay overhead may be added if necessary.

  On the other hand, when the high priority delay adjustment amount> the high priority delay allowable amount, the P1 output delay adjustment unit 41 performs delay control to delay an express frame with a low priority, as in the first embodiment. FIG. 5B shows the state of each express frame after delay adjustment in which the express frame having a low priority input from the port 2 is subjected to delay adjustment. The minimum value of the delay adjustment amount set by the P1 output delay adjustment unit 41 in the P2 variable delay unit 62 is “the transfer frame transfer start time from the port 2 before the delay adjustment and the express frame transfer completion time from the port 3” Difference time + Ethernet minimum IFG ", but delay overhead may be added if necessary.

  In the above description, the transfer completion time of the express frame with high priority from the port 3 is E shown in FIG. 5, and the transfer start time of the express frame with low priority from the port 2 before delay adjustment is shown. Is F shown in FIG.

  As described above, according to the second embodiment, the switching device sets the delay tolerance for each priority in addition to the priority for delay, and adjusts the delay of the express frame. As a result, even when a high-priority express frame and a low-priority express frame collide at the output port, if the delay adjustment amount of the high-priority express frame is less than or equal to the preset delay tolerance, the priority By transferring a high express frame with a delay, it is possible to obtain an effect of mitigating the delay in the switch device of the express frame having a low priority.

  In the second embodiment, the case where the priority of the express frame is set to “high” and “low” and the allowable delay amount is set for each priority has been described. However, the present invention is not limited to this. The priority of the express frame may be expressed by a numerical value, and a delay allowable amount may be set for each numerical value or for each fixed numerical value range.

  In the second embodiment, the P1 output delay adjustment unit 41 is specifically described. However, this is only an example, and the P2 output delay adjustment unit 42, the P3 output delay adjustment unit 43, and the P4 output delay adjustment unit 44 are also described. The same delay control as that of the P1 output delay adjustment unit 41 is performed.

  The configuration described in the above embodiment shows an example of the contents of the present invention, and can be combined with another known technique, and can be combined with other configurations without departing from the gist of the present invention. It is also possible to omit or change the part.

  1, 2, 3, 4 ports, 11 P1 reception IET MAC section, 12 P2 reception IET MAC section, 13 P3 reception IET MAC section, 14 P4 reception IET MAC section, 21 P1 frame identification section, 22 P2 frame identification section, 23 P3 frame identification unit, 24 P4 frame identification unit, 31 destination port search unit, 41 P1 output delay adjustment unit, 42 P2 output delay adjustment unit, 43 P3 output delay adjustment unit, 44 P4 output delay adjustment unit, 51 multiplexing unit, 52 normal frame buffer unit, 53 separation unit, 61 P1 variable delay unit, 62 P2 variable delay unit, 63 P3 variable delay unit, 64 P4 variable delay unit, 71 P1 transmission IET MAC unit, 72 P2 transmission IET MAC unit, 73 P3 transmission IET MAC section, 74 P4 transmission IET MAC section.

Claims (5)

A switch device having a plurality of ports, and for each port,
When a collision is detected for a plurality of low delay frames that are input to another port and output from the own port, the priority of the plurality of low delay frames is determined, and the delay adjustment of the plurality of low delay frames is performed based on the priority Output delay adjusting means for calculating the amount;
Variable delay means for delaying a low delay frame input to the own port by a delay adjustment amount calculated by an output delay adjustment means of another port;
A switch device comprising: The output delay adjusting means calculates a delay adjustment amount for avoiding a collision while outputting the plurality of low delay frames in descending order of priority.
The switch device according to claim 1. The output delay adjustment means makes the delay adjustment amount of the low-delay frame with the highest priority zero.
The switch device according to claim 2. The output delay adjustment means sets a delay tolerance for each priority, a low-delay frame with low priority is input first, and a low-delay with high priority that is higher in priority than the low-delay frame with low priority When a frame is input with a delay, if the delay adjustment amount calculated for the high-priority low-delay frame is less than or equal to the allowable delay amount at a high priority, the calculated low-priority value with the calculated delay adjustment amount. Control to delay the delay frame,
The switch device according to claim 1. The output delay adjustment means determines the priority of the low delay frame based on the priority set for the port to which the low delay frame is input.
The switch device according to any one of claims 1 to 4, wherein:

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