JP2016092185A - Pattern formation method, electronic device and pattern formation device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve the accuracy of the alignment of a pattern between a substrate layer and a semiconductor layer.SOLUTION: There is provided a pattern formation method that is a method for forming a pattern of a semiconductor layer on a substrate layer on which a pattern obtained by modifying an ink material pattern printed on a substrate is formed. In the pattern formation method, a pattern of the semiconductor layer is formed at a predetermined position on the substrate layer, using a mask in which an opening position is corrected in response to a position shift of the modified pattern with respect to a position on the design of an ink material pattern formed on the substrate layer.SELECTED DRAWING: Figure 4

Description

  The present invention relates to a pattern forming method, an electronic device, and a pattern forming apparatus.

  Electronic devices using organic materials that are light, hard to break, and easy to be flexible are being considered for use in a wide variety of promising markets such as lighting, electronic paper, and solar cells. In addition, electronic devices using organic materials have performance inferior to inorganic and metal materials such as silicon (Si), but they are expected to develop unique applications by taking advantage of their ability to be manufactured at low cost. Has been. The reason why an electronic device using an organic material can be manufactured at low cost is that the organic material can be made into a solution and a bottom-up manufacturing method such as a printing method can be applied.

  FIG. 1 shows an example of a printing process for producing an organic TFT (Thin Film Transistor) array. As the printing method, for example, the reverse printing method disclosed in Patent Document 1 can be used. Reversal printing refers to a flat plate with a reversal pattern to be printed from a blanket plate made of PDMS (silicone rubber) uniformly coated with ink. And printing by transferring ink.

Japanese Patent No. 3689536

  However, when the pattern of the semiconductor layer is formed on the base layer patterned on the substrate using the printing method, the substrate contracts when the base layer is modified, and relative displacement occurs between the two patterns. There is.

  Accordingly, an object of the present invention is to provide a pattern forming method capable of improving the alignment accuracy between the pattern of the base layer and the pattern of the semiconductor layer.

  One proposal is a method of forming a semiconductor layer pattern on a base layer on which a modified pattern of an ink material pattern printed on a substrate is formed, and the design of the ink material pattern to be formed on the base layer A pattern forming method is provided in which a pattern of a semiconductor layer is formed at a predetermined position of an underlayer using a mask in which an opening position is corrected corresponding to the shift of the position of a modified pattern with respect to the position.

  According to one aspect, it is possible to improve the alignment accuracy between the pattern of the base layer and the pattern of the semiconductor layer.

It is the figure which showed the preparation process of the organic TFT array. It is sectional drawing of an organic TFT array. It is a figure which shows the deformation | transformation of the resin-made film substrates which concern on one Embodiment. It is a figure which shows the preparation process of the organic TFT array which concerns on 1st Embodiment. It is a block diagram of the mask production apparatus which concerns on 1st Embodiment. It is a figure which shows the preparation process of the organic TFT array which concerns on 2nd Embodiment. It is a block diagram of the mask selection apparatus concerning 2nd Embodiment. It is a schematic diagram which shows the outline of the vapor deposition apparatus which concerns on one Embodiment.

  Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. In addition, in this specification and drawing, about the component which has the substantially same function structure, the duplicate description is abbreviate | omitted by attaching | subjecting the same code | symbol.

[Electronic device manufacturing process]
First, a printing process for producing an organic TFT (Thin Film Transistor) array will be described. Here, the reverse printing method is used as the printing method. Reverse printing is a method in which unnecessary ink is removed with a relief printing pattern having a pattern to be printed from a blanket plate made of PDMS, for example, by applying a uniform ink, and a substrate to be transferred (film) is brought into contact with the above-mentioned flat substrate to apply the ink. This is a technique for transferring and printing.

  FIG. 1 shows an example of a manufacturing process flow of an organic TFT array. A 120 μm thick polycarbonate (PC) film was used as the resin film substrate.

  After the substrate is loaded and the substrate is preheated, a gate layer is formed as the first layer. The surface to be printed on the PC film is neutralized to remove dust and the like. A gate pattern is formed by reversal printing using nano silver ink. Thereby, the gate layer 10 shown in FIG. 2 is printed on the substrate. In this state, the nano silver ink is modified by heating in an oven at 180 ° C. for 30 minutes. After that, it is allowed to stand at room temperature for about 3 hours and waits for recovery of PC film characteristics.

  In the second layer, a gate insulating layer is formed. First, the surface to be printed on which the gate pattern is formed is subjected to spin cleaning to remove dirt. Subsequently, UV irradiation is used to remove dirt and improve the wettability on the wiring. Finally, the static electricity is removed to remove dust. Next, a gate insulating layer (PVP: polyvinylphenol) is applied to a thickness of about 1 μm. Thereby, the gate insulating layer 20 shown in FIG. 2 is formed so as to cover the gate layer 10. In this state, the gate insulating layer 20 is modified by heating in an oven at 170 ° C. for 60 minutes. After that, it is allowed to stand at room temperature for about 3 hours and waits for recovery of PC film characteristics.

  In the third layer, a source-drain layer is formed. The coating surface of the gate insulating layer 20 (PVP) is neutralized to remove dust and the like. A source-drain pattern is formed by reversal printing using nano silver ink. Thereby, the source-drain layers 30 and 40 shown in FIG. 2 are printed on the gate insulating layer 20 (PVP). The nano silver ink is modified by heating in an oven at 180 ° C. for 30 minutes. After that, it is allowed to stand at room temperature for about 3 hours and waits for recovery of PC film characteristics.

  In the fourth layer, a semiconductor layer is formed. The surface to be printed on which the source-drain pattern is formed on the gate insulating layer 20 (PVP) is wet-cleaned to remove organic contamination. Subsequently, the charge is removed and dust is removed. A semiconductor layer pattern is formed by reverse printing using P3HT ink. As a result, the semiconductor layer 50 shown in FIG. 2 is formed between the source-drain layers 30 and 40. Immediately after application, put in a nitrogen atmosphere glove box and heat on a hot plate at 150 ° C. for 15 minutes. After that, it is left in a glove box in a nitrogen atmosphere for about 3 hours and waits for the PC film characteristics to recover.

The electrical characteristics of the produced organic TFT were measured using a tester in a glove box in a nitrogen (N ₂ ) atmosphere.

  In the fifth layer, a passivation layer is formed. Wet cleaning or UV irradiation that damages the semiconductor material is not performed, and a fluorine resin (CYTOP (registered trademark)) film having a thickness of 1 μm is formed by reverse printing. Heat in an oven at 150 ° C. for 20 minutes. Thereby, the passivation layer 60 shown in FIG. 2 is formed on the gate insulating layer 20.

  The flexible organic TFT array prototyped above has undergone a modification process four times, and a structure is formed on the surface of the PC film, but no warpage or local distortion is observed on the substrate itself. Further, even if the operation of bending the PC film substrate is repeated, the printed pattern does not peel off from the substrate.

  However, the manufacturing process described above has problems for practical use in terms of variation in characteristics and transistor performance. This is considered to be mainly caused by the fact that when the organic semiconductor layer is formed by a printing process, the semiconductor layer is not regularly oriented in the channel portion, and the semiconductor layer cannot be uniformly applied.

  On the other hand, when the semiconductor layer is formed not by a printing process but by a vacuum process, a uniform film can be easily obtained without worrying about orientation. For this reason, the semiconductor layer formed using the vacuum process can easily achieve the transistor performance of 10 times or more at present as compared with the semiconductor layer formed using the printing process.

The characteristics of the semiconductor layer when formed by a printing process and when formed by a vacuum process are listed below. Note that layers other than the semiconductor layer are formed by a printing method in any process.
(1) Since the vacuum process requires a film forming apparatus in addition to a printing apparatus that forms layers other than the semiconductor layer, the cost and footprint increase.
(2) In the printing process, it is necessary to exchange the blanket between when the semiconductor layer is printed and when another wiring or an insulating layer is printed in order to suppress deterioration in characteristics of the semiconductor material.
(3) In the printing process, since the semiconductor material is formed into an ink to form a film, the material cost is increased as compared with a vacuum process in which the semiconductor material is used as it is.
(4) High performance can be obtained more stably in the vacuum process than in the printing process.
(5) The vacuum process does not require a modification (firing) step after film formation, and the substrate temperature can be suppressed to room temperature.
(6) The vacuum process requires a longer film formation time than the printing process.
(7) The pattern of the semiconductor layer cannot be matched with the substrate deformed in both the vacuum process and the printing process.

  The characteristics of the semiconductor layer when formed by a printing process and when formed by a vacuum process have been described above. Table 1 shows the results of comparison for each item.

以下、表１を参照しながら、半導体層を印刷プロセスで形成する場合と真空プロセスで形成する場合のそれぞれの優位性について説明する。

Hereinafter, with reference to Table 1, advantages of the semiconductor layer formed by the printing process and the vacuum process will be described.

  As shown in Table 1, when the semiconductor layer is formed by a printing process, the same apparatus as that used when printing a layer other than the semiconductor layer can be used, and the introduction cost can be suppressed.

  On the other hand, when the semiconductor layer is formed by a vacuum process, the process of converting the semiconductor material into an ink is unnecessary, so the cost of the semiconductor material can be reduced, and the film can be formed while maintaining the chemical structure, resulting in high transistor performance. Is easily obtained. In addition, since no modification (firing) process is required after film formation, the total time required for film formation and modification can be shortened and the substrate does not shrink.

  As described above, there are different advantages between the printing process and the vacuum process, and which process is adopted can be arbitrarily selected according to the purpose.

  However, regardless of which process is selected, it is necessary to align the pattern of the underlying layer, which is a modified ink material pattern printed on the substrate, and the pattern of the semiconductor layer. Occurs. This is mainly due to the deformation of the substrate due to the heat treatment in modifying the ink material pattern of the underlayer.

  FIG. 3 is a view showing a modified example of the resin film substrate according to the embodiment, and the deformation amount of the substrate when the 200 mm square resin film substrate is heated to modify the ink material pattern was measured. Results are shown. Here, the design position of the ink material pattern on the substrate before baking indicated by the black solid line grid is substantially equal to the position of the ink material pattern on the substrate before baking.

  As shown in FIG. 3, the layout of the printed pattern of the underlayer formed on the resin film substrate is a deformation of the substrate due to the modification of the ink material pattern, and the design position of the ink material pattern on the substrate before baking. (Indicated by diamonds). This deviation amount is about 20 μm at the maximum as shown by the arrows in the figure.

  For this reason, even if it tries to align the alignment mark (FIG. 3) provided at two diagonal positions on the resin film substrate and the alignment mark of the plate, the patterns of both do not overlap at the desired design position. .

  Therefore, in the embodiment described below, a pattern forming method is proposed that improves the alignment accuracy between the pattern of the base layer and the pattern of the semiconductor layer. At this time, in this embodiment, since a device with reliable operation can be manufactured, the semiconductor layer is formed by a vacuum process. Hereinafter, a method for producing an organic TFT array using the pattern forming method according to the first embodiment will be described with reference to FIGS.

<First Embodiment>
[Manufacturing process of organic TFT array]
FIG. 4 shows a flowchart of the manufacturing process of the organic TFT array using the pattern forming method according to the first embodiment.

  As shown in FIG. 4, first, the resin film substrate is preheated at a maximum load (180 ° C., 60 minutes) applied to the substrate in the modification step described later to release the initial strain of the substrate (S20). . Next, the substrate is cleaned, that is, neutralized to remove particles (S21).

  Next, the pattern of the gate layer is printed using nano silver ink with a reverse printing machine (S22). Step S22 is an example of a first pattern forming process for printing a first ink material pattern for forming a metal layer.

  Immediately after printing, in the gate insulating layer coating step, for example, PVP (polyvinylphenol resin) is coated on the entire surface by spin coating or slit nozzle coating (S23). Step S23 is an example of an application process for applying an insulating material after the first pattern formation process.

  The substrate after the PVP application is sent to a drying furnace and dried at a low temperature for a short time until the surface of the PVP is not sticky (S24).

  After drying, the pattern of the source-drain layer is printed using nano silver ink with a reverse printing machine (S25). Step S25 is an example of a second pattern forming process for printing a second ink material pattern for forming a metal layer at a position corresponding to the position of the printed first ink material pattern after the coating process. It is.

  Thereafter, the substrate on which the three layers of the gate layer, the source layer, and the drain layer are formed is integrally heated by a thermal equilibrium heating means, for example, an oven reforming furnace (S26). Step S26 is an example of a reforming process for integrally reforming the first ink material pattern, the insulating material, and the second ink material pattern after the second pattern forming process.

  In the modification, the three layers may be integrally modified based on the modification condition of the material that is most difficult to modify among the first ink material pattern, the insulating material, and the second ink material pattern. Good. In the case of the first embodiment, the heating condition is set to 180 ° C. and 60 minutes, the most severe of the temperature and time among the three layers. Thereby, each layer can be modified and each layer can have desired electrical characteristics. Thereafter, the formed laminated film is cooled (S27).

  Note that the ink material of the first ink material pattern and the second ink material pattern may be composed of a material including nanomaterials of 1 micron or less than 1 micron. In the steps other than the reforming step and the drying step, the first ink material pattern, the gate insulating material, and the second ink material pattern may not be heated and dried.

  Subsequently, it is determined whether or not it is necessary to change a mask used in a film forming process (mask vapor deposition) for forming a semiconductor layer described later (S28).

  In the first embodiment, whether or not the mask needs to be changed is determined based on whether or not the lot number of the current substrate is acquired and is different from the lot number of the preceding substrate. In other words, a mask change request is issued when the lot number of the current board is different from the lot number of the preceding board, and a mask change request is issued when the lot number of the current board is the same as the lot number of the preceding board. Do not.

  The determination as to whether or not the mask needs to be changed is not limited to the above. For example, a mask change request may be issued when the number of substrates that have passed through the process reaches a predetermined number. good. This determination may be performed by an administrator, may be controlled by hardware, or may be controlled by software.

  When there is no mask change request, the surface to be printed on which the source-drain pattern is formed on the gate insulating layer (PVP) is wet-cleaned to remove organic stains. Subsequently, the charge is removed and dust is removed (S30).

  If there is a request to change the mask, a new mask is produced (S29-1), and then the printed surface on which the source-drain pattern is formed on the gate insulating layer (PVP) is wet-cleaned to remove organic contamination. To do. Subsequently, the charge is removed and dust is removed (S30). Note that a process of manufacturing a new mask will be described later.

  Next, a semiconductor layer pattern is formed on the masked substrate by evaporating the semiconductor material using a vapor deposition apparatus (see FIG. 8) (S31). At this time, if there is no mask change request, the mask used in the preceding substrate is used, and if there is a mask change request, mask deposition is performed using a newly produced mask.

  Here, before carrying in a vapor deposition apparatus, a board | substrate and a mask are positioned by aligning each alignment mark of a board | substrate and a mask. In the first embodiment, as shown in FIG. 3, the alignment is provided at two diagonal positions near the coordinates (X, Y) = (0, 0) and near the coordinates (X, Y) = (200, 200). Although the mark is used for positioning, the position and quantity of the alignment mark are not limited to this.

  In the first embodiment, the organic material pentacene is used as the semiconductor material. However, the present invention is not limited to this, and for example, an inorganic material such as silicon may be used.

  In the first embodiment, an evaporation method is used as a vacuum process for forming a semiconductor layer. However, the present invention is not limited to this. For example, a film forming method such as a sputtering method or a CVD (Chemical Vapor Deposition) method is used. Can also be used.

  In the first embodiment, the case where the three layers of the gate layer, the gate insulating layer, and the source-drain layer, which are base layers of the semiconductor layer, are integrally modified has been described. However, the present invention is not limited to this. For example, as described in the example of the manufacturing process of the electronic device, the gate layer, the gate insulating layer, and the source-drain layer that are the base layers of the semiconductor layer may be modified.

[Mask manufacturing method]
An example of a mask manufacturing method in the pattern forming method according to the first embodiment will be described with reference to FIG.

  As shown in FIG. 5, mask fabrication is performed by a mask fabrication apparatus that includes a coordinate measuring apparatus 100 and a mask processing apparatus 104. The coordinate measuring apparatus 100 includes a measurement unit 101, a calculation unit 102, and a storage unit 103.

  First, in the mask change confirmation (S28 in FIG. 4), when a mask change request is issued, the substrate is carried into the coordinate measuring apparatus 100.

  As shown in FIG. 3, positioning is performed so that one end of the loaded substrate coincides with the coordinates (X, Y) = (0, 0) of the design value of the ink material pattern formed on the underlayer. The measuring means 101 measures the coordinates of a plurality of grid-like reference marks (indicated by diamonds) provided on the positioned substrate, and transmits the measured position information to the computing means 102 (first step).

  Note that the substrate for which measurement has been completed is unloaded from the coordinate measuring apparatus 100.

  The calculation means 102 corrects the opening position of the mask corresponding to the positional deviation based on the positional information of the reference mark measured in the first step and the positional information on the design of the ink material pattern formed on the underlayer. Corrected design data is calculated (second step). The computing unit 102 transmits the calculated corrected design data to the storage unit 103 and the mask processing apparatus 104, respectively.

  The storage unit 103 stores corrected design data in association with a mask ID for identifying a mask every time a mask is manufactured.

  The design position information of the ink material pattern to be formed on the underlayer is stored in advance in the storage unit 103 and can be read out from the storage unit 103 by the calculation unit 102.

  Based on the corrected design data calculated in the second step, the mask processing apparatus 104 processes the mask so that the opening position is corrected to a desired position (third step).

  Although the mask manufacturing method has been described above, the present invention is not limited to this. For example, the difference between the position information measured in the first step and the position information on the design of the ink material pattern formed on the underlayer may be transmitted to the calculation means 102.

  The computing means 102 has a CPU (Central Processing Unit), a ROM (Read Only Memory), and a RAM (Random Access Memory) not shown. The CPU executes mask production control in accordance with various data and programs stored in the storage means 103, for example. The storage unit 103 can be realized as a RAM or a ROM using, for example, a semiconductor memory, a magnetic disk, or an optical disk.

  For example, various arithmetic processing programs and corrected design data performed to execute mask fabrication are stored in the storage unit 103 and provided. These arithmetic processing programs and corrected design data may be read into the storage means 103 via a driver (not shown), or downloaded from a network (not shown) and stored in the storage means 103. There may be.

  Further, a DSP (Digital Signal Processor) may be used instead of the CPU in order to realize the functions of the above-described units. Note that the function of the computing means 102 may be realized by operating using software, or may be realized by operating using hardware.

[effect]
Next, the effect of manufacturing an electronic device using the pattern forming method of the first embodiment will be described.

  When the gate layer, the gate insulating layer, and the source-drain layer, which are base layers, are printed on the resin film substrate and then modified, the resin film substrate contracts. As a result, a positional deviation between the pattern on the base layer and the pattern on the semiconductor layer occurs.

  However, in the first embodiment, the semiconductor layer can be formed by using the mask whose opening position is corrected in accordance with the position information of the deformed substrate by the above mask manufacturing method. Thereby, the precision of alignment with the pattern of a base layer and the pattern of a semiconductor layer can be improved.

  In other words, the semiconductor layer can be formed in the channel portion with high accuracy, and further, a semiconductor material that has less characteristic variation than the printing process can be formed by a vacuum process, so that high transistor performance can be obtained.

  From the above, the TFT manufactured by the manufacturing process according to the first embodiment can significantly suppress the positional deviation as compared with the TFT manufactured by the conventional manufacturing process, and has an extremely large effect.

  As described above, according to the pattern forming method according to the first embodiment, positional displacement between the pattern of the base layer and the pattern of the semiconductor layer is suppressed, and alignment can be performed with high accuracy.

  Next, a method for producing an organic TFT array according to the second embodiment will be described with reference to FIGS.

Second Embodiment
[Manufacturing process of organic TFT array]
FIG. 6 shows a flowchart of the manufacturing process of the organic TFT array using the pattern forming method according to the second embodiment.

  Since the formation of the underlayer (gate layer, gate insulating layer, source-drain layer) according to the second embodiment is the same as that of the first embodiment, a description thereof will be omitted.

  As shown in FIG. 6, it is determined whether or not it is necessary to change a mask used in a film formation process (mask vapor deposition) for forming a semiconductor layer, which will be described later, with respect to the stacked film on the substrate formed in S20 to S27. (S28).

  In the second embodiment, as in the first embodiment, whether or not the mask needs to be changed is determined based on whether the lot number of the current substrate is acquired and is different from the lot number of the preceding substrate. . In other words, a mask change request is issued when the lot number of the current board is different from the lot number of the preceding board, and a mask change request is issued when the lot number of the current board is the same as the lot number of the preceding board. Do not.

  The determination as to whether or not the mask needs to be changed is not limited to the above. For example, a mask change request may be issued when the number of substrates that have passed through the process reaches a predetermined number. good.

  When it is not necessary to change the mask, the surface to be printed on which the source-drain pattern is formed on the gate insulating layer (PVP) is wet-cleaned to remove organic contamination. Subsequently, the charge is removed and dust is removed (S30).

  If it is necessary to change the mask, a new mask is selected (S29-2), and then the printed surface on which the source-drain pattern is formed on the gate insulating layer (PVP) is wet-cleaned to remove organic contamination. Remove. Subsequently, the charge is removed and dust is removed (S30). The process of selecting a new mask will be described later.

  Next, a semiconductor layer pattern is formed on the masked substrate by evaporating the semiconductor material using a vapor deposition apparatus (see FIG. 8) (S31). At this time, if there is no mask change request, the mask used in the preceding substrate is used, and if there is a mask change request, mask deposition is performed using the newly selected mask.

  Note that modifications of the substrate and mask alignment method and the semiconductor layer formation method are the same as those in the first embodiment, and thus are omitted.

[How to select a mask]
An example of a mask selection method in the pattern forming method according to the second embodiment will be described with reference to FIG.

  As shown in FIG. 7, mask selection is performed by a mask selection device including a coordinate measurement device 100 and a mask storage device 105. The coordinate measuring apparatus 100 includes a measurement unit 101, a calculation unit 102, and a storage unit 103.

  First, in the mask change confirmation (S28 in FIG. 6), when a mask change request is issued, the substrate is carried into the coordinate measuring apparatus 100.

  As shown in FIG. 3, positioning is performed so that one end of the loaded substrate coincides with the coordinates (X, Y) = (0, 0) of the design value of the ink material pattern formed on the underlayer. The measuring means 101 measures the coordinates of a plurality of grid-like reference marks (indicated by diamonds) provided on the positioned substrate, and transmits the measured position information to the computing means 102 (first step).

  Note that the substrate for which measurement has been completed is unloaded from the coordinate measuring apparatus 100.

  The storage means 103 stores a plurality of corrected design data corresponding to the mask IDs for identifying a plurality of masks prepared in advance.

  The mask ID of the corrected design data in which the position information of the reference mark obtained in the first step is compared with a plurality of designed correction data stored in the storage means 103 according to this embodiment, and the numerical values of both are approximated. Select one. The computing means 102 transmits the selected mask ID to the mask storage device 105 (fourth step).

  Note that the corrected design data of the mask stored in the storage unit 103 may be stored in the storage unit 103 by the mask manufacturing method of the first embodiment, for example. Further, for example, it may be stored in the storage means 103 by calculating in advance from the shrinkage rate of the resin film.

  The mask storage device 105 stores a plurality of masks whose opening positions are corrected. Therefore, the mask storage device 105 selects a corrected mask corresponding to the mask ID selected in the fourth step (fifth step). Here, selecting the mask includes transporting the mask selected by a transport means (not shown) to the vapor deposition apparatus.

  The computing means 102 has a CPU, ROM, and RAM (not shown). For example, various arithmetic processing programs and corrected design data performed for executing mask selection are stored in the storage unit 103 and provided. The CPU executes mask selection control according to various data and programs stored in the storage means 103, for example.

[effect]
Next, effects of manufacturing an electronic device using the pattern forming method according to the second embodiment will be described.

  According to the pattern forming method according to the second embodiment, in addition to the effects described in the first embodiment, by selecting one mask from a plurality of previously prepared masks and using it as a mask in the vapor deposition process. , Mask manufacturing process can be reduced, process time can be shortened, and cost can be reduced.

[Vapor deposition equipment]
In the pattern forming method according to the first embodiment and the second embodiment, the semiconductor layer is formed by vapor deposition using a mask.

  Below, an example of the vapor deposition apparatus which performs vapor deposition using a mask is demonstrated, referring FIG.

  FIG. 8 is a schematic diagram illustrating a schematic configuration of the vapor deposition apparatus 110 according to an embodiment.

  As shown in FIG. 8, the vapor deposition apparatus 110 includes a processing container 111 having a processing space 111A defined therein, a substrate holding mechanism 112 and a vapor deposition source 113 installed in the processing space 111A. Further, the processing vessel 111 is formed with an exhaust port 111B for evacuating the processing space 111A. The exhaust port 111B is connected to an exhaust means (not shown) via an exhaust path 114, and the processing space 111A is decompressed. It is the structure which can be made into a state.

  Further, the processing container 111 is formed with a substrate transfer port 111 </ b> C provided with a gate valve 115. By opening the gate valve 115, for example, the substrate W and the mask M can be carried out from the processing space 111A, or the substrate W and the mask M can be carried into the processing space 111A by a transfer device (not shown). Has been. The substrate W and the mask M carried into the processing space 111A are held by the substrate holding mechanism 112. As the substrate holding mechanism 112, a mechanical chuck, a magnet chuck, or the like can be used.

  The substrate W and the mask M are positioned by aligning the alignment marks of the substrate W and the mask M before being loaded into the processing space 111A or after being loaded into the processing space 111A. Positioning is performed by an alignment device (not shown). In one embodiment, as shown in FIG. 3, alignment marks provided at two diagonal positions near the coordinates (X, Y) = (0, 0) and near the coordinates (X, Y) = (200, 200). Is used for positioning, but the position and quantity of the alignment mark are not limited to this.

  Further, the mask M attached to the substrate W is removed from the substrate W after being carried out of the processing space 111A, and is repeatedly used for a predetermined number of substrates W.

  The substrate holding mechanism 112 is disposed in the processing container 111, and includes, for example, a guide member 112C, a support 112B, a substrate holding unit 112A that holds the substrate W and the mask M, and a driving device (not shown). It is set as having. One end of the support 112B is supported by the guide member 112C in a state of being movable in a direction substantially parallel to the substrate W, and the substrate holding portion 112A is integrated with the support 112B at the other end. It is arranged. The driving device (not shown) is for moving the substrate holding portion 112A together with the support body 112B in a direction substantially parallel to the substrate W.

  The vapor deposition source 113 holds, for example, a liquid or solid vapor deposition material S. The vapor deposition material S is a semiconductor material. When vapor deposition is performed on the substrate W, the vapor deposition raw material S is vaporized or sublimated by heating the vapor deposition raw material S held by a heating unit 113A connected to a power source 116, for example, a heater.

  The vaporized or sublimated vapor deposition material S stays in the processing space 111A, and a vapor deposition film is formed on the surface of the substrate W held by the substrate holding mechanism 112.

  In this case, it is preferable to perform deposition while moving the substrate W by the substrate holding mechanism 112 because the uniformity of the deposited film in the plane of the substrate W becomes good. In this case, in addition to the substrate holding portion 112A moving substantially parallel to the substrate W, the substrate holding portion 112A may be rotated, and the in-plane uniformity of the vapor deposition film on the substrate W is further improved. It becomes.

  Heretofore, the method for forming a semiconductor layer by vapor deposition using the mask M has been specifically described.

  In the mask vapor deposition in one embodiment, as shown in FIG. 8, since the vapor deposition source S and the substrate W to which the mask M is attached are installed at a predetermined distance, the mask M and the substrate W are installed. The temperature of the region that is shown is almost equal to room temperature. For this reason, the position shift between the pattern of the base layer and the pattern of the mask M does not occur during the vapor deposition. In the mask vapor deposition in one embodiment, the substrate W is disposed above the vapor deposition source 113, but the present invention is not limited to this. For example, the substrate W may be disposed below the vapor deposition source 113, and the substrate W and the vapor deposition source 113 may be disposed so as to be vertical.

  As described above, the pattern forming method, the electronic device using the pattern forming method, and the pattern forming apparatus for forming the pattern for the electronic device have been described by way of example. However, the present invention is not limited to the above example, and within the scope of the present invention. Various modifications and improvements are possible.

  For example, in the TFT fabrication according to the above embodiment, the gate layer is first reverse printed on the substrate, and after the gate insulating layer is applied, the source-drain layer is reverse printed on the gate insulating layer. The arrangement of the source-drain layers may be reversed. That is, the TFT may be manufactured by first performing reverse printing of the source-drain layer on the substrate and then performing reverse printing of the gate layer on the gate insulating layer.

  In addition, for example, in the pattern forming method of the pattern for an electronic device according to the embodiment, a TFT for forming a gate layer, a gate insulating layer, a source-drain layer, and a semiconductor layer on a resin film substrate was manufactured. It is not limited. That is, all the electronic devices that form the pattern of the semiconductor layer on the base layer on which the modified pattern of the ink material pattern printed on the substrate is formed, and the pattern of the present invention is included in all such electronic devices. A forming method can be applied. In addition to polycarbonate (PC), a plastic film substrate such as polyethylene terephthalate (PET), polyethylene naphthalate (PEN), or polyethersulfone (PES) can be used as the resin film substrate.

DESCRIPTION OF SYMBOLS 10 Gate layer 20 Gate insulating layer 30 Source layer 40 Drain layer 50 Semiconductor layer 60 Passivation layer 100 Coordinate measuring apparatus 101 Measuring means 102 Calculation means 103 Storage means 104 Mask processing apparatus 105 Mask storage apparatus 110 Deposition apparatus W Substrate M Mask

Claims (9)

A method of forming a pattern of a semiconductor layer on an underlayer on which a pattern obtained by modifying an ink material pattern printed on a substrate is formed,
The semiconductor layer is formed at a predetermined position of the underlayer using a mask whose opening position is corrected corresponding to the shift of the position of the modified pattern with respect to the design position of the ink material pattern formed on the underlayer. The pattern formation method which forms the pattern of this. The corrected mask is
A first step of measuring position information of a pattern obtained by modifying an ink material pattern printed on the substrate;
Corrected design data for correcting the opening position corresponding to the position shift based on the position information measured in the first step and the position information on the design of the ink material pattern formed on the underlayer. A second step of calculating;
A third step of processing the mask based on the corrected design data calculated in the second step;
The pattern forming method according to claim 1, wherein the pattern is a mask manufactured by a process including: The corrected mask is
A first step of measuring position information of a pattern obtained by modifying an ink material pattern printed on the substrate;
A fourth step of selecting one mask based on the positional information measured in the first step from a plurality of previously prepared masks whose opening positions are corrected;
The pattern forming method according to claim 1, wherein the mask is selected by a process including:   The pattern forming method according to claim 1, wherein the substrate is a resin film substrate.   The pattern formation method according to claim 1, wherein the pattern of the semiconductor layer is formed by evaporating a semiconductor material.   The pattern forming method according to claim 2, wherein the corrected mask is manufactured for each lot or a plurality of lots of the substrate.   The pattern of the semiconductor layer is formed at a predetermined position of the underlayer using a mask in which the opening position is corrected corresponding to the shift of the position of the modified pattern with respect to the design position of the ink material pattern formed on the underlayer. An electronic device manufactured using a pattern forming method for forming a film. A pattern forming apparatus for forming a semiconductor layer pattern on an underlayer on which a pattern obtained by modifying an ink material pattern printed on a substrate is formed,
The semiconductor layer is formed at a predetermined position of the underlayer using a mask whose opening position is corrected corresponding to the shift of the position of the modified pattern with respect to the design position of the ink material pattern formed on the underlayer. The pattern formation apparatus which forms the pattern for electronic devices by forming the pattern of this. A method of forming a pattern of a semiconductor layer on a substrate,
Using the mask in which the opening position is corrected corresponding to the deviation between the designed position of the ink material pattern formed on the substrate and the actual position of the ink material pattern after the modification process, the semiconductor layer The pattern formation method which forms the pattern of this.

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