JP2016077122A - Breaker reaction time measurement device for digital protective relay system - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a right breaker reaction time even if a system fundamental frequency is switched, in a digital protective relay system.SOLUTION: An interruption circuit 30 interrupts an arithmetic processing part 40 at interruption intervals which are set correspondingly to detected system fundamental frequencies of 50 Hz and 60 Hz. As interruption processing, the arithmetic processing part 40 makes a counter count a time from output of a breaker opening command and input of an answer of a breaker ON state to output of the breaker opening command and input of an answer of a breaker OFF state. When counting is finished, information representing a coefficient corresponding to a frequency during counting by the counter and detected by frequency detection means and a count value of the counter are paired and stored in a backup RAM, and the breaker reaction time is calculated by multiplying the count value and the coefficient.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a circuit breaker response time measuring device in a digital protective relay device.

  Conventionally, the measurement of the circuit breaker response time in a digital protective relay device that protects a system in which the system fundamental frequency is switched has been performed as follows, for example.

  That is, first, the CPU is interrupted at an electrical angle interval of 30 ° of the system basic frequency (50 Hz or 60 Hz) (1.666 ms for the 50 Hz system and 1.388 ms for the 60 Hz system), and the circuit breaker open command Is output until the circuit breaker “OFF” answer is input, and when the measurement is completed, the counter value is stored in the backup RAM.

  Then, the counter value is read from the backup RAM, and the circuit breaker response time is calculated by multiplying by a known fixed coefficient (1.666 ms for the 50 Hz system and 1.388 ms for the 60 Hz system).

  FIG. 13 is a flowchart showing an example of the procedure of the response time measurement process of the conventional circuit breaker, and FIG. 14 is a diagram showing the contents stored in the backup RAM according to the conventional method. FIG. 14 shows an example in which the system fundamental frequency is 50 Hz.

  The processing of steps S1 to S11 in FIG. 13 is executed every 30 ° electrical angle (1.666 ms for the 50 Hz system, 1.388 ms for the 60 Hz system) of the system fundamental frequency (50 Hz or 60 Hz).

  First, in step S1, it is determined whether or not a breaker open command is being output. If not, the timer start flag is turned off in step S2 and the process is terminated.

  If the circuit breaker release command is being output, it is determined in step S3 whether the circuit breaker answer is “OFF” or “ON”. If the circuit breaker answer is “OFF”, the timer activation flag is turned OFF in step S4, and if “ON”, the timer activation flag is turned ON in step S5.

  Next, in step S6, it is determined whether or not the timer activation flag has been switched from OFF to ON. If the determination result in step S6 is Yes, the counter is cleared in step S7, the past data is erased, and the measurement of the circuit breaker response time is started.

  If the determination result in step S6 is No, and after execution of step S7, it is determined in step S8 whether the timer activation flag is ON.

  If the determination result in step S8 is Yes, the circuit breaker has not yet been turned off, so the counter is incremented in step S9 and the response time measurement is continued.

  If the determination result in step S8 is No, and after execution of step S9, it is determined in step S10 whether the timer activation flag has been switched from ON to OFF.

  If the determination result in step S10 is Yes, the response time measurement is terminated to indicate that the circuit breaker is turned off, and the counter value of the counter is stored in the backup RAM in step S11.

  If the determination result in step S10 is No, and after executing step S11, the process ends.

  As described above, since the counter value is stored in the backup RAM, the same circuit breaker response time can always be obtained by multiplying the fixed coefficient even when the apparatus power is switched on and off.

  For example, Patent Document 1 discloses a technique for automatically selecting a current sampling interval in a digital protection relay device.

JP-A-7-322473

  Conventionally, in the circuit breaker response time measuring method shown in FIGS. 13 and 14, the coefficient (known fixed coefficient) to be multiplied by the counter value of the backup RAM is programmed to either 1.666 ms for the 50 Hz system or 1.388 ms for the 60 Hz system. In the system where the system fundamental frequency is switched, if it is fixed to either one, the correct circuit breaker response time cannot be obtained in the opposite system.

  In addition, it has a function to determine the system fundamental frequency by relay or external input, and resets the interrupt interval of electrical angle 30 ° when it is detected from the judgment result that the system fundamental frequency has changed from 50Hz to 60Hz or 60Hz to 50Hz. The digital protection relay device has the same problems as described above.

  That is, in the interrupt process, when the circuit breaker opening command is output and the circuit breaker “OFF” answer is input, the counter is incremented, and the counter value is stored in the backup RAM at the end of measurement. The coefficient is selected according to the determination result of the system fundamental frequency (1.666 ms for the 50 Hz system and 1.388 ms for the 60 Hz system), and the circuit breaker response time is calculated by multiplying the counter value. Since the coefficient selection is also switched, the same circuit breaker response time cannot be obtained even when multiplied by the counter value.

  For example, when the counter value at the end of measurement is 24 in a 50 Hz system, the circuit breaker response time is 24 × 1.666 ms≈40 ms. However, when the system frequency is changed to 60 Hz by re-calculating, the circuit breaker response time is 24 × 1.388 ms≈33 ms, and the correct circuit breaker response time cannot be calculated without information on the system fundamental frequency (50 Hz or 60 Hz) at the end of measurement.

  SUMMARY OF THE INVENTION The present invention solves the above-mentioned problems, and its object is to provide a breaker response time measuring device for a digital protective relay device that can obtain a correct circuit breaker response time even when the system fundamental frequency is switched. There is to do.

  The circuit breaker response time measuring device for a digital protective relay device according to claim 1 for solving the above-mentioned problem is a digital protective relay device for protecting a system in which the system fundamental frequency is switched. A frequency detection means for detecting whether the first frequency or a second frequency different from the first frequency, and a setting corresponding to each of the first and second frequencies detected by the frequency detection means An interrupt means for outputting an interrupt start signal at a predetermined interrupt interval, and an interrupt start signal output from the interrupt means, and an instruction to open a circuit breaker in the protection target equipment of the digital protective relay device is output and shut off When the answer to the breaker is input, the release command for the breaker has been output and the answer to the breaker off condition is input. Counting means for counting the time until the counter, and at the end of the counting of the counter, out of the information representing the coefficients respectively set corresponding to the first and second frequencies, the frequency at the time of counting of the counter And a storage means for storing information representing a coefficient corresponding to the frequency detected by the frequency detection means and the count value of the counter as a set, and multiplying the count value and the coefficient stored as a set in the storage means. And a response time calculating means for calculating the circuit breaker response time.

  The circuit breaker response time measuring device for a digital protective relay device according to claim 2, wherein the information indicating the coefficient is information for selecting a coefficient set corresponding to the first frequency or the second frequency. The response time calculating means selects a coefficient set corresponding to the first frequency or the second frequency based on the information for selecting the coefficient, and multiplies the selected coefficient by the count value. It is characterized by doing.

  According to the above configuration, the correct circuit breaker response time can be obtained even when the system fundamental frequency is switched.

  The circuit breaker response time measuring device for a digital protective relay device according to claim 3 is characterized in that the storage means is a backup RAM.

  According to the above configuration, no data is lost even when the apparatus power is turned off and on, and a correct circuit breaker response time can be obtained even when the system fundamental frequency is switched.

(1) According to the first to third aspects of the invention, the correct circuit breaker response time can be obtained even when the system fundamental frequency is switched.
(2) According to the third aspect of the present invention, no data is lost even if the apparatus power is turned off and on, and a correct circuit breaker response time can be obtained even when the system fundamental frequency is switched.

The block diagram which shows the principal part of the digital protection relay apparatus in the embodiment of this invention. The flowchart of the system frequency discrimination | determination process which the commercial frequency switching detection circuit of the digital protection relay apparatus in the embodiment of this invention performs. The block diagram of the interruption circuit of the digital protection relay apparatus in the embodiment of this invention. The block diagram of the taking-in circuit of the circuit breaker open | release command output of the digital protection relay apparatus in the example of embodiment of this invention. The block diagram of the circuit breaker answer taking circuit of the digital protection relay device in the embodiment of the present invention. Explanatory drawing which shows the timer structure of the digital protection relay apparatus in the embodiment of this invention. The flowchart which shows the process at the time of the circuit breaker response time measurement in Example 1 of this invention. Explanatory drawing which shows the storage content of the backup RAM in Example 1 of this invention. The flowchart which shows the process at the time of the circuit breaker response time calculation in Example 1 of this invention. The flowchart which shows the process at the time of the circuit breaker response time measurement in Example 2 of this invention. Explanatory drawing which shows the storage content of the backup RAM in Example 2 of this invention. The flowchart which shows the process at the time of the circuit breaker response time calculation in Example 2 of this invention. The flowchart which shows the process at the time of the circuit breaker response time measurement by a conventional system. Explanatory drawing which shows the storage content of the backup RAM in a conventional system.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings, but the present invention is not limited to the following embodiments. FIG. 1 shows a main part of a digital protection relay device in this embodiment, particularly a circuit configuration around a CPU.

  In FIG. 1, reference numeral 10 denotes an input conversion unit that captures information such as voltage and current of a system to be protected. The system voltage / current captured by the input conversion unit 10 is input to the analog filters 21 a and 21 b of the analog input unit 20. The outputs of the analog filters 21a and 21b are selected by the multiplexer 22 and converted into digital signals by the A / D converter 23.

  In the digital protection relay device of this embodiment, it is detected whether the system fundamental frequency of the system is a first frequency (for example, 50 Hz) or a second frequency (for example, 60 Hz) by a relay or an external input. A commercial frequency switching detection circuit (not shown) is provided as the frequency detection means of the present invention.

  30 is an interrupt interval (electrical angle 30 ° interval; 1.666 ms for 50 Hz system, 1.388 ms for 60 Hz system) set corresponding to each of the first and second frequencies detected by the commercial frequency switching detection circuit. ) To output an interrupt activation signal (interrupt means of the present invention).

  Reference numeral 40 denotes an arithmetic processing unit having the functions of the counting means, storage means, and response time calculation means of the present invention, and includes a CPU 41, a memory 42 such as a ROM, a RAM, and the like.

  A digital input unit 50 receives a contact output of a relay that responds depending on the state of an external device as a circuit breaker answer, or receives a trip answer that automatically checks and checks a circuit breaker release command (trip) output.

  A digital output unit 60 outputs a circuit breaker open command (trip) or the like.

  Reference numeral 70 denotes serial device networking (ETHRTNET) for connecting to other networks.

  The analog input unit 20, interrupt circuit 30, arithmetic processing unit 40, digital input unit 50, digital output unit 60, and serial device networking 70 are connected to each other by a bus 80.

  FIG. 2 shows a flow chart of the system frequency discrimination process performed by the commercial frequency switching detection circuit as the frequency detection means.

  In FIG. 2, it is determined in step S21 whether or not the system fundamental frequency is 50 Hz by the detection relay. If it is determined Yes, the system fundamental frequency is set to 50 Hz in step S22.

  If the determination result in step S21 is No, it is determined in step S23 whether or not the system fundamental frequency is 60 Hz by the detection relay. If it is determined Yes, the system fundamental frequency is set to 60 Hz in step S24.

  If the determination result in step S23 is No, it is determined in step S25 whether or not it is the same as the system frequency 60 Hz of the external device.

  If the determination result in step S25 is Yes, the process of step S24 is performed. If the determination result is No, the process of step S22 is performed and the process ends.

  FIG. 3 shows the configuration of the interrupt circuit 30 shown in FIG. In FIG. 3, the counter 32 counts the oscillation output of the crystal oscillator 31, and compares whether or not the count value of the counter 32 matches the setting information of 50 Hz or 60 Hz set by the commercial frequency switching detection circuit of FIG. When the decision is made by the decision unit 33 and they match, an interruption (activation signal) with an electrical angle of 30 ° of the system fundamental frequency is output to the CPU 41 of the arithmetic processing unit 40 in FIG.

  That is, when the crystal oscillator 31 is 2.88 MHz, the electrical angle 30 ° of the 50 Hz system is 600 Hz. Therefore, when the counter 32 is 4800 (2880000 ÷ 600), a 30 ° interrupt is output. In the 60 Hz system, since the electrical angle 30 ° is 720 Hz, a 30 ° interrupt is output when the counter 32 is 4000.

  FIG. 4 shows the configuration of an output circuit for a circuit breaker opening command and a trip answer capturing circuit. In FIG. 4, the circuit breaker release command output DO output from the trip sequence 61 provided in the digital protective relay device (the digital output unit 60) of FIG. 1 is digitally transmitted via the auxiliary relay 62 and the trip circuit 63. It is introduced into the contact 90 of the relay, and the ON / OFF state of the contact 90 is taken from the digital input unit 50 as a trip answer.

  This trip answer capture is used for confirmation of automatic inspection.

  FIG. 5 shows the configuration of the circuit breaker answering circuit and its capturing circuit. In FIG. 5, an output signal from the external device circuit 100 (a signal indicating the response of “ON” and “OFF” of the circuit breaker) is introduced into the contact 90 of the digital relay, and the ON / OFF state of the contact 90 indicates the circuit breaker answer. As shown in FIG.

  1 is activated by an interrupt output (interrupt activation signal output at an electrical angle interval of 30 °) output from the interrupt circuit 30, and the circuit breaker is opened from the trip sequence 61 of FIG. When the command (DO) is output and the answerer in the circuit breaker on state is input from the digital input unit 50 as shown in FIG. 5, the circuit breaker release command is output and the answerer in the circuit breaker off state is output. A process of counting (measuring) the time until input by a counter in the arithmetic processing unit 40 is performed. At the end of the count (end of measurement), the count value of the counter and the information representing the coefficient set corresponding to the system fundamental frequency detected by the system frequency discrimination process of FIG. The data is stored in a backup RAM in the processing unit 40.

  The configuration of the counter and backup RAM in the arithmetic processing unit 40 is shown in FIG. In FIG. 6, the counter 42a (RAM) in the memory 42 is initialized (0) at the start of measurement, incremented (+1) during measurement, and the measurement value is stored in the backup RAM 42b at the end of measurement.

  Furthermore, the response time calculation means provided in the arithmetic processing unit 40 of FIG. 1 calculates the circuit breaker response time by multiplying the count value stored in the backup RAM 42b and a coefficient.

  For example, a plurality of counters 42a are provided corresponding to a plurality of circuit breakers.

  In the first embodiment, the first frequency (for example, 50 Hz) or the second frequency (for example, 50 Hz) is stored as information representing the coefficient corresponding to the system fundamental frequency stored in the backup RAM after the counting by the counting unit of the arithmetic processing unit 40 is completed. For example, coefficient selection information (for example, 0 for a 50 Hz system and 1 for a 60 Hz system) set corresponding to 60 Hz is used.

  FIG. 7 is a flowchart showing the procedure of the circuit breaker response time measurement process in the first embodiment, which is performed by the counting means and the storage means of the arithmetic processing unit 40, and FIG.

  The processing in steps S31 to S41 in FIG. 7 is executed every 30 ° electrical angle interval (1.666 ms for the 50 Hz system and 1.388 ms for the 60 Hz system) of the system fundamental frequency (50 Hz or 60 Hz).

  First, in step S31, it is determined whether or not a breaker open command (output of trip circuit 63 in FIG. 4) is being output. If not, the timer start flag is turned OFF in step S32 and the process is terminated. To do.

  If the breaker open command is being output, it is determined in step S33 whether the breaker answer (breaker answer taken from the digital input unit 50 in FIG. 5) is “OFF” or “ON”. If the circuit breaker answer is “OFF”, the timer activation flag is turned OFF in step S34, and if “ON”, the timer activation flag is turned ON in step S35.

  Next, in step S36, it is determined whether or not the timer activation flag has been switched from OFF to ON. If the determination result in step S36 is Yes, the counter is cleared in step S37, the past data is erased (counter initialization (0) in FIG. 6), and measurement of the circuit breaker response time is started.

  If the determination result in step S36 is No, and after execution of step S37, it is determined in step S38 whether the timer activation flag is ON.

  If the determination result in step S38 is Yes, the circuit breaker has not yet been turned off, and in step S39, the counter is incremented (counter increment (+1) in FIG. 6) to measure the response time. continue.

  If the determination result in step S38 is No, and after execution of step S39, it is determined in step S40 whether the timer activation flag has been switched from ON to OFF.

  If the determination result in step S40 is Yes, the response time measurement is terminated to indicate that the circuit breaker has been turned off. In step S41, the counter value of the counter and the coefficient selection information corresponding to the detected system fundamental frequency (For example, 0 for the 50 Hz system and 1 for the 60 Hz system) is stored in the backup RAM 42b.

  If the determination result in step S40 is No, the process ends after execution of step S41.

  As described above, based on the count value and coefficient selection information stored in the backup RAM, the response time calculation means of the arithmetic processing unit 40 performs response time calculation processing according to the flowchart of FIG. In FIG. 9, in step S51, it is determined whether or not the circuit breaker coefficient selection information stored in the backup RAM is “0”. If “0”, the coefficient is 1.666 as a 50 Hz system. If it is not “0”, 1.388 is selected as the coefficient if it is 60 Hz (step S53).

  In step S54, the circuit breaker response time is calculated by multiplying the selected coefficient by the measurement counter value stored in the backup RAM, and the process ends.

  According to the first embodiment, the counter value and the coefficient selection information at the end of the measurement of the circuit breaker response time are stored in the backup RAM. Even when there is switching, the circuit breaker response time can always be obtained by calculating based on the counter value measured in the past and the coefficient selection information.

  Also, when the system fundamental frequency is switched during measurement, the circuit breaker release command output is turned off by measuring the relay lock for a certain period of time (as a result of trip output being turned off by relay lock as a general digital relay function). Since the count value and coefficient selection information in the middle are terminated (canceled) without being stored in the backup RAM, the counter value and coefficient selection information measured in the past are protected until the measurement is properly terminated, and the correct circuit breaker response time is obtained. Can be obtained.

  In the second embodiment, the first frequency (for example, 50 Hz) or the second frequency (for example, 50 Hz) is stored as information representing the coefficient corresponding to the system fundamental frequency stored in the backup RAM after the counting by the counting unit of the arithmetic processing unit 40 is completed. For example, a coefficient set corresponding to 60 Hz (for example, 1.666 ms for the 50 Hz system and 1.388 ms for the 60 Hz system) is used.

  FIG. 10 is a flowchart showing the procedure of the circuit breaker response time measurement process in the second embodiment, which is performed by the counting means and the storage means of the arithmetic processing unit 40, and FIG.

  The processing in steps S61 to S71 in FIG. 10 is executed every 30 ° electrical angle interval (1.666 ms for the 50 Hz system and 1.388 ms for the 60 Hz system) of the system fundamental frequency (50 Hz or 60 Hz).

  First, in step S61, it is determined whether or not a breaker open command (output of trip circuit 63 in FIG. 4) is being output. If not, the timer start flag is turned OFF in step S62 and the process is terminated. To do.

  If the circuit breaker release command is being output, it is determined in step S63 whether the circuit breaker answer (the circuit breaker answer taken in from the digital input unit 50 in FIG. 5) is “OFF” or “ON”. If the circuit breaker answer is “OFF”, the timer activation flag is turned OFF in step S64, and if “ON”, the timer activation flag is turned ON in step S65.

  Next, in step S66, it is determined whether or not the timer activation flag has been switched from OFF to ON. If the determination result in step S66 is Yes, the counter is cleared in step S67, the past data is erased (counter initialization (0) in FIG. 6), and the measurement of the circuit breaker response time is started.

  If the determination result in step S66 is No, and after execution of step S67, it is determined in step S68 whether the timer activation flag is ON.

  If the determination result in step S68 is Yes, the circuit breaker has not yet been turned off, and in step S69, the counter is incremented (counter increment (+1) in FIG. 6) to measure the response time. continue.

  If the determination result in step S68 is No, and after execution of step S69, it is determined in step S70 whether the timer activation flag has been switched from ON to OFF.

  If the determination result in step S70 is Yes, the response time measurement is terminated to indicate that the circuit breaker has been turned off. In step S71, the counter value of the counter and a coefficient corresponding to the detection system fundamental frequency (for example, 5066 for the 50 Hz system and 1.388 ms for the 60 Hz system) are stored in the backup RAM 42b.

  If the determination result in step S70 is No, and after executing step S71, the process ends.

  Based on the count value and the coefficient stored in the backup RAM by the process of FIG. 10, the response time calculation means of the arithmetic processing unit 40 multiplies the measurement counter value by the coefficient as shown in step S81 of FIG. The time is calculated and the process ends.

  According to the second embodiment, since the counter value and the coefficient at the end of the measurement of the circuit breaker response time are stored in the backup RAM, there is no data loss even when the apparatus power is switched on and off, and the system basic frequency can be switched. Even if there is, the circuit breaker response time can always be obtained by calculating based on the counter value and coefficient measured in the past.

  Also, when the system fundamental frequency is switched during measurement, the circuit breaker release command output is turned off by measuring the relay lock for a certain period of time (as a result of trip output being turned off by relay lock as a general digital relay function). Since the count value and coefficient in the middle are terminated (stopped) without being stored in the backup RAM, the counter value and coefficient measured in the past are protected until the measurement is properly terminated, and the correct breaker response time can be obtained. .

DESCRIPTION OF SYMBOLS 10 ... Input conversion part 20 ... Analog input part 30 ... Interrupt circuit 31 ... Crystal oscillator 32, 42a ... Counter 33 ... Comparison coincidence determination part 40 ... Arithmetic processing part 41 ... CPU
42 ... Memory 42b ... Backup RAM
DESCRIPTION OF SYMBOLS 50 ... Digital input part 60 ... Digital output part 61 ... Trip sequence 62 ... Auxiliary relay 63 ... Trip circuit 70 ... Serial device networking 80 ... Bus 90 ... Contact of digital relay 100 ... External equipment circuit

Claims (3)

In the digital protection relay device that protects the system where the system fundamental frequency is switched,
A frequency detection means for detecting whether the system fundamental frequency of the system is a first frequency or a second frequency different from the first frequency;
Interrupt means for outputting an interrupt activation signal at an interrupt interval set corresponding to each of the first and second frequencies detected by the frequency detection means;
The circuit breaker is activated by an interrupt activation signal output from the interrupt means, and when a circuit breaker opening command in the protection target equipment of the digital protective relay device is output and an answerer in the circuit breaker on state is input. Counting means for counting by the counter the time until the release command is output and the circuit breaker-off answer is input,
Of the information representing the coefficients set corresponding to the first and second frequencies at the end of counting of the counter, the frequency at the time of counting of the counter and detected by the frequency detecting means Storage means for storing information representing the corresponding coefficient and the count value of the counter as a set;
A response time calculating means for calculating a circuit breaker response time by multiplying a count value and a coefficient stored as a set in the storage means;
A circuit breaker response time measuring device for a digital protective relay device, comprising: The information representing the coefficient is information for selecting a coefficient set corresponding to the first frequency or the second frequency,
The response time calculating means selects a coefficient set corresponding to the first frequency or the second frequency based on the information for selecting the coefficient, and multiplies the selected coefficient by a count value. The circuit breaker response time measuring device for a digital protective relay device according to claim 1,   3. The circuit breaker response time measuring device for a digital protective relay device according to claim 1, wherein the storage means is a backup RAM.

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