JP2016076910A - Interleaver generation method and interleaver generation device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an interleaver generation method capable of fast generating an interleaver that constitutes a code with a high error correction capability.SOLUTION: A parameter set of the interleaver with which a specific input sequence pattern is rearranged into a specific output sequence pattern by the interleaver is calculated (steps ST1 and ST2). Parameters to be a difference set of the parameter set that is calculated in the steps ST1 and ST2 are calculated (steps ST3 and ST4). Any parameter is selected from among a plurality of parameters calculated in the steps ST3 and ST4 (step ST5). The interleaver is generated using the parameter calculated in the step ST5.SELECTED DRAWING: Figure 5

Description

  The present invention relates to an interleaver generating method and an interleaver generating apparatus for generating an interleaver used for an error correction code such as a turbo code.

  In an error correction code such as a turbo code, a high error correction capability approaching the Shannon limit is realized by using an interleaver that rearranges information sequences. In general, an interleaver realizes a communication device capable of high-speed processing and high error correction capability by using a mapping pattern of a Latin square / rectangular structure obtained by repeatedly shifting a basic pseudo-random number sequence (for example, patent document) 1).

JP 2008-160169 A

In order to incorporate the interleaver into an error correction code such as a turbo code, the number of columns of the mapping matrix used for the rearrangement of the information sequence, the pattern of the basic pseudo random number sequence, and the start position shift pattern when reading the basic pseudo random number sequence (hereinafter referred to as parameters) Need to be determined).
The conventional interleaver changes the parameters for each desired information sequence length, calculates the output weight distribution of the code including the interleaver generated using these parameters for each parameter, and the union bound is the best. Must be determined heuristically. Here, for calculating the output weight distribution, it is necessary to input various information series patterns and record the output weight, and the search for the best union bound needs to be calculated by real values, so it is necessary to determine parameters. There was a problem that the calculation amount was large. In particular, if the information sequence length is made variable with a fine bit width of every 8 bits, the amount of calculation will be further increased.

  As described above, the amount of calculation required for determining the parameters of the conventional interleaver is enormous, and there is a problem that an interleaver constituting a code with high error correction capability cannot be generated at high speed according to the code structure. .

  The present invention has been made to solve the above-described problems, and an object of the present invention is to provide an interleaver generation method and interleaver generation apparatus capable of generating an interleaver constituting a code having high error correction capability at high speed. .

  In the interleaver generating method according to the present invention, an input sequence is stored in a buffer of M rows and N columns, and a basic pseudo-random sequence of length N is shifted in units of rows, whereby a Latin square or Latin rectangle of M rows and N columns is obtained. An interleaver generation method that generates a mapping pattern, maps an input sequence to the mapping pattern, and generates an interleaver that reads the input sequence after mapping in units of columns, and the specific input sequence pattern is converted into a specific output sequence pattern by the interleaver. An input sequence length calculation step for calculating a parameter set of interleavers to be rearranged, a parameter candidate calculation step for calculating a parameter that is a difference set of the parameter set calculated in the input sequence length calculation step, and a parameter calculated in the parameter candidate calculation step Interleaver generator that generates an interleaver using It is those with a door.

  The interleaver generation method of the present invention calculates an interleaver parameter set in which a specific input sequence pattern is rearranged to a specific output sequence pattern by the interleaver, calculates a parameter that is a difference set of the parameter set, and generates an interleaver Since it did in this way, the interleaver which comprises the code | symbol with high error correction capability can be produced | generated at high speed.

It is a block diagram which shows the communication system using the interleaver produced | generated by the interleaver production | generation method by Embodiment 1 of this invention. It is a block diagram which shows the other example of the communication system by Embodiment 1 of this invention. It is a block diagram of the turbo encoder containing the interleaver produced | generated by the interleaver production | generation method by Embodiment 1 of this invention. It is a block diagram which shows an example of the turbo encoder of FIG. It is a flowchart which shows the interleaver production | generation method by Embodiment 1 of this invention. It is a block diagram which shows the communication system using the interleaver produced | generated by the interleaver production | generation method by Embodiment 2 of this invention. It is a block diagram which shows the other example of the communication system by Embodiment 2 of this invention. It is a block diagram which shows the communication system containing the interleaver production | generation apparatus by Embodiment 3 of this invention. It is a block diagram which shows the interleaver production | generation apparatus by Embodiment 3 of this invention.

Embodiment 1 FIG.
1 is a configuration diagram showing a communication system including an interleaver generated by the interleaver generation method according to Embodiment 1 of the present invention. In FIG. 1, a transmission side communication device (hereinafter referred to as a transmission device 1) includes a turbo encoder 100 and a modulator 110, and a reception side communication device (hereinafter referred to as a reception device 2) The demodulator 210 and the turbo decoder 200 are included. The turbo encoder 100 and the turbo decoder 200 have the same interleavers 103 and 203 generated by an interleaver generation method described below. In FIG. 1 and FIG. 2 to be described later, configurations other than the interleavers 103 and 203 in the turbo encoder 100 and the turbo decoder 200 are not shown.

First, the flow of encoding and decoding processing in the communication system of Embodiment 1 will be briefly described.
The turbo encoder 100 in the transmission apparatus 1 receives an information sequence u = (u ₀ , u ₁ ,..., U _K−1 ) having a length K and generates a codeword v encoded using the interleaver 103. To do. Then, the modulator 110 in the transmission apparatus 1 digitally modulates the codeword v generated by the turbo encoder 100 according to a predetermined modulation method, and the modulated signal x = (x ₀ , x ₁ , ..., X _N-1 ) are transmitted to the receiver 2 via the communication path 3.

On the other hand, in the receiving apparatus 2, the demodulator 210 digitally demodulates the modulated signal y = (y ₀ , y ₁ ,..., Y _N−1 ) received via the communication path 3 in accordance with the modulation method. Further, turbo decoder 200 in receiving apparatus 2 decodes the demodulation result using interleaver 203 and outputs the decoding result (corresponding to original information sequence u).
Note that a plurality of communication devices including both the transmission device 1 and the reception device 2 may be configured, and signals may be transmitted and received between the plurality of communication devices.

  Further, as shown in FIG. 2, a puncture device 120 may be included in the transmission device 1, and a depuncture device 220 may be included in the reception device 2. In this case, the puncture unit 120 generates a codeword having a length W according to a request from the communication system by puncturing it from the output of the turbo encoder 100, and inputs this to the modulator 110. Further, the depuncture unit 220 depunctures the bits punctured by the puncture unit 120 and inputs the depunctured bits to the turbo decoder 200.

  As shown in FIG. 3, the turbo encoder 100 includes a first recursive systematic convolutional (hereinafter referred to as RSC) encoder 101, a second RSC encoder 102, and an interleaver 103. Composed. FIG. 4 shows an example of the above RSC encoder, but any configuration may be used as long as it is an RSC encoder constituting a turbo code, such as an RSC encoder of the W-CDMA standard. The turbo decoder 200 is configured corresponding to the turbo encoder 100.

Next, the rearrangement algorithm of the interleavers 103 and 203 according to the first embodiment will be described.
<Step 1>
Set the parameters.
K: Information series length
N: Number of columns in the mapping matrix
M = ceil (K / N): Number of mapping matrix rows
s: Start position shift number when reading the basic pseudo-random number sequence
p: Pattern of basic pseudo-random number sequence
C _p (0), C _p (1),..., C _p (N−1): Basic pseudo random number sequence Here, ceil (x) is the smallest integer equal to or greater than x. s is a prime positive integer or 1 with N. The basic pseudo-random number sequence is a permutation pattern of length N, and the set {C _p (0), C _p (1), ..., C _p (N-1)} is the set {0, 1, ..., Matches N-1}.

<Step 2>
By shifting the basic pseudo-random sequence by s pieces, constituting a pseudo-random number sequence CL _j of M different lengths N (i).
CL _j (i) = C _p ((i + s × j) mod N)
i = 0,1,…, N-1
j = 0,1,…, M-1
<Step 3>
An M × N input buffer matrix U _j (i) is prepared.
U _j (i) = i + N × j
i = 0,1,…, N-1
j = 0,1,…, M-1
<Step 4>
An M × N output buffer matrix U ′ _j (i) is prepared using CL _j (i).
U ' _j (i) = U _(M-1-j) (CL _(M-1-j) (i))
i = 0,1,…, N-1
j = 0,1,…, M-1

<Step 5>
The information series u is generated by reading the output buffer matrix U ′ _j (i) in column order.
u _{(j + M × i)} = U ' _j (i)
i = 0,1,…, N-1
j = 0,1,…, M-1
<Step 6>
When there is a difference between the number of elements of the mapping matrix and the information sequence length, the following output value having a size exceeding the information sequence length K is deleted (this operation is hereinafter referred to as pruning).
u _k ≧ K
Here, for the basic pseudo-random number sequence C _p (0), C _p (1),..., C _p (N−1) of length N used in step 1, for example, a prime number is selected as N and g _{0 is set} to N. It is generated as follows as a primitive element of.
C _p (0) = 1
C _p (i + 1) = (g ₀ × C _p (i)) mod N i = 0,…, N-3
C _p (N-1) = 0
This generation is the same as described below.
C _p (i) = g ₀ ⁱ mod N i = 0,…, N-2
C _p (N-1) = 0

Alternatively, N may be selected so that (N + 1) is a prime number, and g ₀ may be generated as follows with g ₀ as the primitive _element of (N + 1).
C _p (0) = 0
C _p (i + 1) = ((g ₀ × (C _p (i) +1)) mod (N + 1))-1 i = 0, ..., N-2
This generation is the same as described below.
C _p (i) = (g ₀ ⁱ mod (N + 1))-1 i = 0, ..., N-1
As described above, when generating a basic pseudo-random number sequence using a primitive element, especially when the primitive element g ₀ = 2, a double multiplication process for obtaining the basic pseudo-random number sequence is possible by 1-bit shift. It is also possible to reduce the processing amount by limiting N or (N + 1) to only prime numbers whose primitive element is 2.

Further, P ′ may be generated as follows, with N being a prime integer.
C _p (i) = (P '× i) modN i = 0,…, N-1
This generation is the same as described below.
C _p (0) = 0
C _p (i + 1) = (C _p (i) + P ') modN i = 0,…, N-2
Further, P ′ may be generated as follows, with N being a prime integer.
C _p (i) = (P '× i + Q) modN i = 0, ..., N-1
Here, Q is an arbitrary positive integer.
Further, the basic pseudo-random number sequence C _p (0), C _p (1),..., C _p (N-1) is a permutation pattern of length N, and the set {C _p (0), C _p ( As long as 1), ..., C _p (N-1)} matches the set {0,1, ..., N-1}, it may be any other.

Next, a method for calculating the parameters N, p, and s of the interleavers 103 and 203 according to the first embodiment will be described.
FIG. 5 shows a flowchart of this algorithm.
First, the definition of the sequence 1 + ^{D l} divisible by the feedback polynomial P of the first RSC encoder 101 (D), the n-number order from those values of the positive integers l is smaller _{l 1,} l 2, ..., and _{l n} To do. Of the series 1 + D ^{l ′} divisible by the feedback polynomial P ′ (D) of the second RSC encoder 102, n ′ pieces in order from the smallest positive integer l ′ are l ′ ₁ , l ′ ₂ ,. defined as l' _{n '} .

  The loop relating to the set (N, p, s) includes an input sequence length calculation step for calculating a parameter set of the interleavers 103 and 203 in which a specific input sequence pattern is rearranged by the interleavers 103 and 203 into a specific output sequence pattern, This corresponds to a parameter candidate calculation step for calculating a parameter that is a difference set of the parameter set calculated in the input sequence length calculation step.

<Step ST1>
In the loop relating to the set (N, p, s), the following holds for the number of columns N of the mapping matrix, the starting position shift number s at the time of reading the basic pseudo random number sequence, and the pattern p of the basic pseudo random number sequence: Calculate the combination.
abs (i × N + C _p ((N + j + i × s + k) mod N)) − C _p (k)) = l (1)
l = l ₁ , l ₂ ,…, l _n
i = 0, 1, ..., n _i
j = -n _j , ..., -1, 0, 1, ..., n _j
k = 0, 1, ..., N-1
abs (x) is the absolute value of x. n _i and n _j are each a positive integer of (N−1) or less.
This step ST1 is a step of obtaining a specific input sequence pattern, and the combination satisfying Equation (1) is to calculate a combination of i and j in which the input sequence is a self-terminating sequence.

<Step ST2>
Among the combinations of i and j calculated in step ST1, M values satisfying the following are calculated, and are sequentially set as M ₁ , M ₂ ,..., M _{n ″} .
abs (j × Mi) -k = l '(2)
k = 0, 1, ..., abs (j)
l '= l' ₁ , l' ₂ , ..., l'_n'
This step ST2 is a process for obtaining a specific output sequence pattern, and the combination satisfying the mathematical formula (2) is to calculate the value of M in which the sequence in which the input sequence is rearranged by the interleavers 103 and 203 becomes a self-terminating sequence. It is.

<Step ST3>
The set S _{N, p, s} is determined as follows using M ₁ , M ₂ ,..., M _{n ″} calculated in step ST2.
S ₀ = {K | 1 ≦ K ≦ N ² }
S _k = {K | N × (M _k −1) + 1 ≦ K ≦ N × M _k } k = 1, 2,..., N ''
S _{N, p, s} = S ₀ \ (S ₁ ∪S ₂ ∪… ∪S _{n ″} ) (3)
<Step ST4>
For a desired information sequence length K, a combination of _{N, p, and s} that satisfies KεS _{N, p, s} is selected and used as a parameter for the interleavers 103 and 203.

That is, step ST3 and step ST4 are parameter candidate calculation steps for calculating a parameter that is a difference set of the parameter set calculated in the input sequence length calculation step. The self-terminating sequence obtained in step ST1 and step ST2 is input to the first RSC encoder 101 or the second RSC encoder 102 in FIG. This is a sequence in which few code words are output. Since low-weight codewords cause a reduction in error correction capability, it should be avoided to input such a self-terminated sequence to the first RSC encoder 101 and the second RSC encoder 102 at the same time. . Therefore, the set _{SN, p, s} determined in step ST3 is a set of information sequence lengths K such that the self-terminated sequence is not input to the first RSC encoder 101 and the second RSC encoder 102 at the same time. The error correction capability can be improved by selecting a combination of _{N, p, s such} that KεS _{N, p, s} in step ST4.

<Step ST5>
In step ST4, when there are a plurality of combinations of _{N, p, and s} that satisfy KεS _{N, p, s} , for example, the one with the smallest N is selected. If there are still multiple choices, choose the one with the smallest p. If there are still multiple options, select the one that minimizes s. In addition, any selection method may be used as long as one combination can be determined, such as selection using pseudo-random numbers. That is, as a condition for determining one combination,
(A) The circuit scale at the time of mounting can be reduced. (B) The interleave spreading factor is good. (C) The interleaver has high randomness.
Here, the spreading factor indicates the effect of spreading the bit distance of the input sequence, and the smaller the bit distance, the better the nature as an interleaver.
The example of “select from the one with the smallest N. If there are still a plurality of choices, choose from the one with the smallest p. If there are still several choices, choose the one with the smallest s”. It is an example of the selection method based on (a) and (b).
In addition, this step ST5 corresponds to a parameter selection step for selecting one of these parameters when there are a plurality of parameters calculated in the parameter candidate calculation step.

<Step ST6, Step ST7>
If the basic pseudo-random number sequence has the following periodicity,
abs (C _p (j + 1 + floor (N / 2))-C _p (j + floor (N / 2))) = abs (C _p (j + 1) -C _p (j)) (4 )
j = 0, 1, ..., floor (N / 2) -2
The following combinations are also added to the combinations of i and j calculated in step ST1.
i = 1, 2, ..., n _i
j = (floor (N / 2) + (Ns) × i) modN (5)
Where floor (x) is the largest integer less than or equal to x.

  As described above, the parameters N, p, and s of the interleavers 103 and 203 are simply determined only by four arithmetic operations of integer values so as to avoid a large amount of low-weight codewords that cause a reduction in error correction capability. Therefore, an interleaver constituting a code having a high error correction capability can be generated at high speed according to the code structure.

  As described above, according to the interleaver generation method of the first embodiment, an input sequence is stored in a buffer of M rows and N columns, and a basic pseudorandom number sequence of length N is shifted in units of rows. An interleaver generation method for generating an interleaver that forms an N-column Latin square or Latin rectangular mapping pattern, maps an input sequence to the mapping pattern, and reads the mapped input sequence in units of columns. An input sequence length calculation step for calculating a parameter set of an interleaver that is rearranged into a specific output sequence pattern by the interleaver, and a parameter candidate calculation step for calculating a parameter that is a difference set of the parameter set calculated in the input sequence length calculation step , Using the parameters calculated in the parameter candidate calculation process Since a interleaver generating step of forming, the interleaver constituting a high code error correction capability can be generated at high speed.

  Further, according to the interleaver generation method of the first embodiment, since the specific input sequence pattern and the specific output sequence pattern are self-terminated sequences, a large amount of low-weight codewords that cause a reduction in error correction capability is generated. Interleaver parameters that can be avoided can be determined easily and at high speed.

  In addition, according to the interleaver generation method of the first embodiment, when there are a plurality of parameters calculated in the parameter candidate calculation step, the parameter selection step of selecting one of the plurality of parameters is provided. Since the interleaver is generated using the parameter selected in the parameter selection step instead of the parameter calculated in the candidate calculation step, the interleaver can be generated using a parameter having a high error correction capability.

Embodiment 2. FIG.
Although the interleaver parameters including the pruning process are calculated in the first embodiment, an example in which the parameters are simply calculated in the case of the following interleaver that does not include the pruning process will be described as a second embodiment.

  FIG. 6 is a configuration diagram illustrating a communication system according to the second embodiment including the turbo encoder 100a and the turbo decoder 200a. In FIG. 6, the transmission apparatus 1a includes a bit adjuster 130, a turbo encoder 100a, and a modulator 110, and the reception apparatus 2a includes a demodulator 210, a turbo decoder 200a, and a bit adjuster 230. To do. The turbo encoder 100a and the turbo decoder 200a have the same interleavers 103a and 203a inside. In FIG. 6 and FIG. 7 described later, configurations other than the interleavers 103a and 203a in the turbo encoder 100a and the turbo decoder 200a are not shown.

Next, the flow of encoding and decoding processing in the communication system according to the second embodiment will be briefly described.
The bit adjuster 130 in the transmission device 1a receives an information sequence u = (u ₀ , u ₁ ,..., U _K-1 ) having a length K, and (N-1-((K-1) mod N) ) Insert a known signal of 0 or 1 bit, and the sequence u ′ = (u ′ ₀ , u ′ ₁ , length L = K + (N−1 − ((K−1) mod N)) ..., U ′ _L−1 ) are generated and used as the input sequence of the interleaver 103a. The insertion position is (LK) arbitrary places such as the beginning and end of the information series. The turbo encoder 100a in the transmission apparatus 1a receives the bit-adjusted length sequence u ′ and generates a codeword v encoded using the interleaver 103a. The modulator 110 in the transmission device 1a digitally modulates the codeword v generated by the turbo encoder 2 in accordance with a predetermined modulation method, and the modulated signal x = (x ₀ , x ₁ , ..., X _N-1 ) are transmitted to the receiving device 2a via the communication path 3.

On the other hand, in the receiving apparatus 2a, the demodulator 210 digitally demodulates the modulated signal y = (y ₀ , y ₁ ,..., Y _N−1 ) received via the communication path 3 in accordance with the modulation method. Further, the turbo decoder 200a in the receiving device 2a decodes the demodulation result using the interleaver 203a, outputs the decoding result (corresponding to the original sequence u ′), and the bit adjuster 230 transmits The adjustment bits inserted at times are removed, and the result (corresponding to the original information series u) is output.
Note that a plurality of communication devices including both the transmission device 1a and the reception device 2a may be configured to transmit and receive signals between the plurality of communication devices.

  Further, as shown in FIG. 7, the transmitting device 1a may include a puncture device 120, and the receiving device 2a may include a depuncture device 220. In this case, the puncture unit 120 generates a codeword having a length W according to a request from the communication system by puncturing it from the output of the turbo encoder 100a, and inputs this to the modulator 110. Further, the depuncture unit 220 depunctures the bits punctured by the puncture unit 120 and inputs them to the turbo decoder 200a.

  As described in Embodiment 1, turbo encoder 100a includes first RSC encoder 101, second RSC encoder 102, and interleaver 103a. The first RSC encoder 101 and the second RSC encoder 102 are configured as shown in FIG. 4, but are not limited thereto. Further, the turbo decoder 200a is configured to correspond to the turbo encoder 100a.

The reordering algorithm for interleavers 103a and 203a in this embodiment is the same as the reordering algorithm for interleavers 103 and 203 in Embodiment 1, except that information sequence length K is replaced with interleaver input sequence length L, and pruning in <Step 6>. This excludes processing.
Further, the algorithm for calculating the parameters of the interleavers 103a and 203a of the present embodiment is the same as the calculation algorithm of the first embodiment, but is fixed at k = 0 in step ST2.

  As described above, the interleaver generation method of the second embodiment eliminates the pruning process in the interleaver generation required in the first embodiment and simplifies the parameter calculation algorithm of the interleavers 103a and 203a. An interleaver constituting a high code can be generated at higher speed.

Embodiment 3 FIG.
Embodiments 1 and 2 relate to an interleaver generation method for calculating parameters of interleavers 103, 103a, 203, and 203a. Next, an interleaver that calculates parameters of interleavers 103, 103a, 203, and 203a is described. An example relating to the generation apparatus will be described as a third embodiment.

  FIG. 8 is a block diagram showing a communication system including the interleaver generating device 10 according to Embodiment 3 of the present invention. FIG. 9 is a configuration diagram showing the inside of the interleaver generating apparatus 10. In FIG. 8, the configurations of the transmission apparatus 1 and the reception apparatus 2 are the same as those in the first embodiment. The turbo encoder 100 and the turbo decoder 200 have the same interleavers 103 and 203 generated by the interleaver generation device 10 inside.

  In FIG. 9, the interleaver generation device 10 includes an input sequence length set calculation unit 11, a parameter candidate calculation unit 12, and a parameter selection unit 13. The input sequence length set calculation unit 11 is a processing unit that calculates a parameter set of the interleaver 103 in which a specific input sequence pattern is rearranged into a specific output sequence pattern by the interleaver 103. The parameter candidate calculation unit 12 is a processing unit that calculates a parameter that is a difference set of the parameter sets calculated by the input sequence length set calculation unit 11. The parameter selection unit 13 is a processing unit that selects any combination from the parameters calculated by the parameter candidate calculation unit 12. In the third embodiment, the interleaver generating unit that generates the interleaver using the parameter calculated by the parameter candidate calculating unit 12 is realized by the interleavers 103 and 203.

The rearrangement algorithm of interleavers 103 and 203 in the third embodiment is the same as that of interleavers 103 and 203 in the first or second embodiment.
Next, a flow for calculating the parameters of the interleavers 103 and 203 in the interleaver generating apparatus 10 of the third embodiment will be described.
In the input sequence length set calculation unit 11 of the interleaver generation device 10, the feedback polynomial P (D) of the first RSC encoder 101 and the feedback polynomial P of the second RSC encoder 102 constituting the turbo encoder 100. A set S _{N, of} input sequence lengths in which a specific input sequence pattern is rearranged to a specific output sequence pattern by the interleaver 103 by the loop of step ST1 to step ST3 described in the flowchart of FIG. _{p and s} are calculated. The parameter candidate calculation unit 12 performs the process of step ST4 of the algorithm described in Embodiment 1 using _{SN, p, s} and the input sequence length of the interleaver 103, and sets the parameters N, p, s of the interleaver 103. A set of combinations is calculated. The parameter selection unit 13 performs the process of step ST5 of the algorithm described in the first embodiment using the set calculated by the parameter candidate calculation unit 12, and determines the parameters N, p, and s of the interleaver 103 by a deterministic method. Select and output.

  Also in the third embodiment, as shown in FIGS. 2, 6, and 7, the transmitter 1 may include the puncture device 120 and the bit adjuster 130, and the receiver 2 may include the depuncture device 220 and the bit adjuster 230. In this case, the flow of encoding and decoding processing in the communication system is the same as in the case of the first embodiment or the second embodiment.

  As described above, according to the interleaver generating apparatus of the third embodiment, an input sequence is stored in a buffer of M rows and N columns, and a basic pseudo-random number sequence of length N is shifted in units of rows. An interleaver generating apparatus that forms an N-column Latin square or Latin rectangular mapping pattern, generates an interleaver that maps an input sequence to the mapping pattern, and reads the mapped input sequence in units of columns, and includes a specific input sequence pattern Input sequence length set calculation unit that calculates a parameter set of an interleaver that is rearranged into a specific output sequence pattern by the interleaver, and parameter candidate calculation that calculates a parameter that is a difference set of the parameter set calculated by the input sequence length set calculation unit And the parameter calculated by the parameter candidate calculation unit Since the interleaver generation unit in the first or second embodiment is configured as an apparatus, an interleaver that configures a code having a high error correction capability is generated at high speed by the apparatus. be able to.

  Further, according to the interleaver generating apparatus of the third embodiment, since the specific input sequence pattern and the specific output sequence pattern are self-terminated sequences, a large number of low-weight codewords that cause a reduction in error correction capability are generated. The parameter of the interleaver that can avoid this can be obtained easily and at high speed.

  In addition, according to the interleaver generation device of the third embodiment, when there are a plurality of parameters calculated by the parameter candidate calculation unit, the interleaver generation unit includes a parameter selection unit that selects one of the plurality of parameters. Since the interleaver is generated using the parameter selected by the parameter selection unit instead of the parameter calculated by the candidate calculation unit, the interleaver can be generated using a parameter having a high error correction capability.

Embodiment 4 FIG.
In the first embodiment, the parameter of the interleaver using the basic pseudo random number sequence of length N is calculated. Next, the following using the basic pseudo random number sequence of length (N−1) is as follows. An example of calculating parameters in the case of such an interleaver will be described as a fourth embodiment.
The system configuration of the present embodiment is the same as that of the first embodiment described above, and will be described using the configurations of FIGS. Hereinafter, processing different from that of the first embodiment will be described.

First, the rearrangement algorithm of the interleavers 103 and 203 according to the present embodiment will be described. Here, only the processing of <Step 1> and <Step 2> different from Embodiment 1 will be described.
<Step 1>
Set the parameters.
K: Information series length
N: Number of columns in the mapping matrix
M = ceil (K / N): Number of mapping matrix rows
s: Start position shift number when reading the basic pseudo-random number sequence
p: Pattern of basic pseudo-random number sequence
C _p (0), C _p (1),..., C _p (N-2): Basic pseudo-random number sequence where ceil (x) is the smallest integer greater than or equal to x. s is a prime positive integer or 1 with N. The basic pseudo-random number sequence is a permutation pattern of length N, and the set {C _p (0), C _p (1), ..., C _p (N-2)} is the set {1, 2, ..., Matches N-1}.

<Step 2>
The basic pseudo-random number sequence is shifted by s pieces to construct M types of length N pseudo-random number sequences CL _j (i).
CL _j (i) = C _p ((i + s × j) mod (N-1))
i = 0,1,…, N-2
j = 0,1,…, M-1
CL _j (N-1) = 0
j = 0,1,…, M-1
Here, the basic pseudo-random number sequence C _p (0), C _p (1),..., C _p (N−2) of length (N−1) used in step 1 selects a prime number as N, for example, Generate g ₀ as the primitive _element of N as follows.
C _p (0) = 1
C _p (i + 1) = (g ₀ × C _p (i)) mod N
i = 0,…, N-3
This generation is the same as described below.
C _p (i) = g ₀ ⁱ mod N
i = 0,…, N-2

As described above, when generating a basic pseudo-random number sequence using a primitive element, especially when the primitive element g ₀ = 2, a double multiplication process for obtaining the basic pseudo-random number sequence is possible by 1-bit shift. It is also possible to reduce the processing amount by limiting N to only prime numbers whose primitive element is 2.
Alternatively, P ′ may be generated as follows with (N−1) being a prime integer.
C _p (i) = ((P '× i) mod (N-1)) + 1
i = 0, ..., N-2
Further, P ′ may be generated as follows, with N being a prime integer.
C _p (i) = ((P '× i + Q) mod (N-1)) + 1
i = 0, ..., N-2
Here, Q is an arbitrary positive integer.
Further, the basic pseudo-random number sequence C _p (0), C _p (1),..., C _p (N-2) is a rearrangement pattern of length (N−1), and the set {C _p (0) , C _p (1),..., C _p (N-2)} may be any other as long as they match the set {1,.

  As described above, the reordering algorithm of the interleavers 103 and 203 according to the fourth embodiment stores the input sequence in the buffer of M rows and N columns, and shifts the basic pseudo random number sequence of length (N-1) in units of rows. By forming a Latin square pattern or a Latin rectangular pattern of M rows (N-1) columns, the minimum value of the series of each row is arranged in the rightmost column of the pattern of M rows (N-1) columns. A mapping pattern of M rows and N columns is formed, an input sequence is mapped to the mapping pattern of M rows and N columns, and the mapped input sequence is read out in units of columns.

Next, a method for calculating the parameters N, p, and s of the interleavers 103 and 203 according to the present embodiment will be described. Here, only the processes of step ST1 and step ST3 different from the first embodiment and the processes of step ST6 and step ST7 accompanying the change of the process of step ST1 will be described.
<Step ST1>
A combination of i and j that satisfies the following is calculated for the number of columns N of the mapping matrix, the starting position shift number s at the time of reading the basic pseudo random number sequence, and the pattern p of the basic pseudo random number sequence.
abs (i × N + C _p (((N−1) + j + i × s + k) mod (N−1))) − C _p (k)) = l (1)
l = l ₁ , l ₂ ,…, l _n
i = 0, 1, ..., n _i
j = -n _j , ..., -1, 0, 1, ..., n _j
k = 0, 1, ..., N-2
abs (x) is the absolute value of x. n _i and n _j are each a positive integer of (N−2) or less.

<Step ST3>
The set S _{N, p, s} is determined as follows using M ₁ , M ₂ ,..., M _{n ″} calculated in step ST2.
S ₀ = {K | 1 ≦ K ≦ N × (N-1)}
S _k = {K | N × (Mk−1) + 1 ≦ K ≦ N × Mk} k = 1, 2,..., N ”
S _{N, p, s} = S ₀ \ (S ₁ ∪S ₂ ∪… ∪S _{n ”} )

<Step ST6, Step ST7>
When the basic pseudo-random number sequence has periodicity as expressed by Equation (4), the following combinations are also added to the combinations of i and j calculated in step ST1.
i = 1, 2, ..., n _i
j = (floor (N / 2) + (N-1-s) × i) mod (N-1)
Where floor (x) is the largest integer less than or equal to x.

  As described above, according to the interleaver generation method of the fourth embodiment, the input sequence is stored in the buffer of M rows and N columns, and the basic pseudo random number sequence of length (N-1) is shifted in units of rows. By forming a Latin square or Latin rectangular pattern of M rows (N-1) columns, and arranging the minimum value of the series of each row in the rightmost column of the pattern of M rows (N-1) columns, M rows An interleaver generation method for generating an interleaver that forms an N-column mapping pattern, maps an input sequence to an M-row N-column mapping pattern, and reads the mapped input sequence in units of columns, and the specific input sequence pattern is An input sequence length calculation step for calculating a parameter set of an interleaver that is rearranged into a specific output sequence pattern by an interleaver, and a parameter set calculated in the input sequence length calculation step Since a parameter candidate calculation step for calculating a parameter to be a difference set and an interleaver generation step for generating an interleaver using the parameter calculated in the parameter candidate calculation step are provided, parameters for an interleaver rearrangement algorithm different from the first embodiment Therefore, a wide range of choices can be taken when generating an interleaver constituting a code having a high error correction capability.

Embodiment 5 FIG.
In the second embodiment, an interleaver parameter using a basic pseudo-random number sequence of length N is calculated. Next, an interleaver using a basic pseudo-random number sequence of length (N-1) is used. In this case, an example of calculating parameters will be described as a fifth embodiment.
The system configuration on the drawing of the present embodiment is the same as that of the second embodiment described above, and will be described using the configuration of FIG. 6 in the second embodiment. Hereinafter, processing different from the second embodiment will be described.

The reordering algorithm for interleavers 103a and 203a in this embodiment is the same as the reordering algorithm for interleavers 103 and 203 in Embodiment 4, except that information sequence length K is replaced with interleaver input sequence length L, and pruning in <Step 6>. This excludes processing.
The algorithm for calculating the parameters of the interleavers 103a and 203a according to the present embodiment is the same as the calculation algorithm according to the fourth embodiment, but is fixed at k = 0 in step ST2.

  As described above, the interleaver generation method of the fourth embodiment provides a parameter calculation method for an interleaver rearrangement algorithm different from that of the second embodiment, so that an interleaver constituting a code having high error correction capability can be generated at high speed. You can take a wide range of options.

Embodiment 6 FIG.
Embodiments 4 and 5 are examples related to an interleaver generation method for calculating parameters of interleavers 103, 103a, 203, and 203a. Next, an interleaver that calculates parameters of interleavers 103, 103a, 203, and 203a is described. An example relating to the generation apparatus will be described as a sixth embodiment.

  Since the configuration of the communication system including the interleaver generating apparatus according to the sixth embodiment is the same as that shown in FIGS. 8 and 9, description will be made using the configurations of these drawings. The interleaver generation device 10 includes an input sequence length set calculation unit 11, a parameter candidate calculation unit 12, and a parameter selection unit 13. The input sequence length set calculation unit 11 is a processing unit that calculates a parameter set of the interleaver 103 in which a specific input sequence pattern is rearranged into a specific output sequence pattern by the interleaver 103. The parameter candidate calculation unit 12 is a processing unit that calculates a parameter that is a difference set of the parameter sets calculated by the input sequence length set calculation unit 11. The parameter selection unit 13 is a processing unit that selects any combination from the parameters calculated by the parameter candidate calculation unit 12. In the sixth embodiment, the interleaver generation unit that generates the interleaver using the parameter calculated by the parameter candidate calculation unit 12 is implemented in the interleavers 103 and 203.

The rearrangement algorithm for interleavers 103a and 203a in the sixth embodiment is the same as that for interleavers 103a and 203a in the fourth and fifth embodiments.
Next, a flow for calculating the parameters of the interleavers 103 and 203 in the interleaver generating apparatus 10 of the sixth embodiment will be described.
In the input sequence length set calculation unit 11, the feedback polynomial P (D) of the first RSC encoder 101 and the feedback polynomial P ′ (D) of the second RSC encoder 102 constituting the turbo encoder 100 are obtained. A set S _{N, p, s of} input sequence lengths in which a specific input sequence pattern is rearranged to a specific output sequence pattern by the interleaver 103 by the loop of step ST1 to step ST3 of the algorithm described in the fourth embodiment. Is calculated. In parameter candidate calculation section 12, a set of combinations of parameters N, p, and s of interleaver 103 is obtained by step ST4 of the algorithm described in Embodiment 4 using _{SN, p, s} and the input sequence length of interleaver 103. Is calculated. The parameter selection unit 13 performs the process of step ST5 of the algorithm described in the fourth embodiment using the set calculated by the parameter candidate calculation unit 12, and determines the parameters N, p, and s of the interleaver 103 by a deterministic method. Select and output.

  Also in the sixth embodiment, as shown in FIGS. 2, 6, and 7, the transmission device 1 may include the puncture device 120 and the bit adjuster 130, and the reception device 2 may include the depuncture device 220 and the bit adjuster 230. In this case, the flow of encoding and decoding processing in the communication system is the same as in the case of the fourth embodiment or the fifth embodiment.

  As described above, according to the interleaver generating device of the sixth embodiment, the input sequence is stored in the buffer of M rows and N columns, and the basic pseudo-random number sequence of length (N-1) is shifted in units of rows. By forming a Latin square or Latin rectangular pattern of M rows (N-1) columns, and arranging the minimum value of the series of each row in the rightmost column of the pattern of M rows (N-1) columns, M rows An interleaver generating apparatus that forms an N-column mapping pattern, maps an input sequence to an M-row N-column mapping pattern, and generates an interleaver that reads the mapped input sequence in units of columns, and the specific input sequence pattern is An input sequence length set calculation unit that calculates a parameter set of an interleaver that is rearranged into a specific output sequence pattern by an interleaver, and a parameter calculated by the input sequence length set calculation unit In the fourth embodiment or the fifth embodiment, the parameter candidate calculation unit that calculates the parameter that becomes the difference set of the combination and the interleaver generation unit that generates the interleaver using the parameter calculated by the parameter candidate calculation unit are provided. Since the interleaver generation method is configured as an apparatus, an interleaver that configures a code with high error correction capability can be generated at high speed by the apparatus.

  In the present invention, within the scope of the invention, any combination of the embodiments, or any modification of any component in each embodiment, or omission of any component in each embodiment is possible. .

  1, 1a transmitter, 2, 2a receiver, 3 communication channel, 10 interleaver generator, 11 input sequence length set calculator, 12 parameter candidate calculator, 13 parameter selector, 100, 100a turbo encoder, 101 1 RSC encoder, 102 2nd RSC encoder, 103, 103a, 203, 203a interleaver, 110 modulator, 120 puncture unit, 130, 230 bit adjuster, 200, 200a turbo decoder, 210 demodulator 220 Depuncture device.

Claims (8)

An input sequence is stored in a buffer of M rows and N columns, and a basic square random number sequence of length N is shifted in units of rows to form a mapping pattern of Latin squares or Latin rectangles of M rows and N columns. An interleaver generating method for generating an interleaver for mapping the input sequence to read the input sequence after mapping in units of columns,
An input sequence length calculating step of calculating a parameter set of the interleaver in which the specific input sequence pattern is rearranged to the specific output sequence pattern by the interleaver;
A parameter candidate calculation step for calculating a parameter that is a difference set of the parameter set calculated in the input sequence length calculation step;
An interleaver generation method comprising: an interleaver generation step for generating the interleaver using the parameter calculated in the parameter candidate calculation step. An input sequence is stored in a buffer of M rows and N columns, and a basic square random number sequence of length N is shifted in units of rows to form a mapping pattern of Latin squares or Latin rectangles of M rows and N columns. An interleaver generating device for generating an interleaver that maps the input sequence to read the input sequence after mapping in units of columns,
An input sequence length set calculation unit for calculating a parameter set of the interleaver in which a specific input sequence pattern is rearranged to a specific output sequence pattern by the interleaver;
A parameter candidate calculation unit that calculates a parameter that is a difference set of the parameter set calculated by the input sequence length set calculation unit;
An interleaver generating device comprising: an interleaver generating unit configured to generate the interleaver using the parameter calculated by the parameter candidate calculating unit. An input sequence is stored in a buffer of M rows and N columns, and a basic square random number sequence of length (N-1) is shifted in units of rows, whereby a pattern of Latin squares or Latin rectangles of M rows (N-1) columns And a mapping pattern of M rows and N columns is formed by arranging the minimum value of the series of each row in the rightmost column of the pattern of the M rows (N-1) columns, and the mapping pattern of the M rows and N columns An interleaver generating method for generating an interleaver for mapping the input sequence to read the input sequence after mapping in units of columns,
An input sequence length calculating step of calculating a parameter set of the interleaver in which the specific input sequence pattern is rearranged to the specific output sequence pattern by the interleaver;
A parameter candidate calculation step for calculating a parameter that is a difference set of the parameter set calculated in the input sequence length calculation step;
An interleaver generation method comprising: an interleaver generation step for generating the interleaver using the parameter calculated in the parameter candidate calculation step. An input sequence is stored in a buffer of M rows and N columns, and a basic square random number sequence of length (N-1) is shifted in units of rows, whereby a pattern of Latin squares or Latin rectangles of M rows (N-1) columns And a mapping pattern of M rows and N columns is formed by arranging the minimum value of the series of each row in the rightmost column of the pattern of the M rows (N-1) columns, and the mapping pattern of the M rows and N columns An interleaver generating device for generating an interleaver that maps the input sequence to read the input sequence after mapping in units of columns,
An input sequence length set calculation unit for calculating a parameter set of the interleaver in which a specific input sequence pattern is rearranged to a specific output sequence pattern by the interleaver;
A parameter candidate calculation unit that calculates a parameter that is a difference set of the parameter set calculated by the input sequence length set calculation unit;
An interleaver generating device comprising: an interleaver generating unit configured to generate the interleaver using the parameter calculated by the parameter candidate calculating unit.   4. The interleaver generation method according to claim 1, wherein the specific input sequence pattern and the specific output sequence pattern are self-terminated sequences.   The interleaver generating apparatus according to claim 2 or 4, wherein the specific input sequence pattern and the specific output sequence pattern are self-terminated sequences. When there are a plurality of parameters calculated in the parameter candidate calculation step, a parameter selection step of selecting any one of the plurality of parameters,
The interleaver generation step generates the interleaver using the parameter selected in the parameter selection step instead of the parameter calculated in the parameter candidate calculation step. The interleaver generation method according to any one of 5. When there are a plurality of parameters calculated by the parameter candidate calculation unit, a parameter selection unit that selects any one of the plurality of parameters,
The interleaver generation unit generates the interleaver using the parameter selected by the parameter selection unit instead of the parameter calculated by the parameter candidate calculation unit. The interleaver generating device according to any one of 6.

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